en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_i2c.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_i2c.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief I2C HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + IO operation functions
bogdanm 0:9b334a45a8ff 12 * + Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 @verbatim
bogdanm 0:9b334a45a8ff 15 ==============================================================================
bogdanm 0:9b334a45a8ff 16 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 17 ==============================================================================
bogdanm 0:9b334a45a8ff 18 [..]
bogdanm 0:9b334a45a8ff 19 The I2C HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 (#) Declare a I2C_HandleTypeDef handle structure, for example:
bogdanm 0:9b334a45a8ff 22 I2C_HandleTypeDef hi2c;
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
bogdanm 0:9b334a45a8ff 25 (##) Enable the I2Cx interface clock
bogdanm 0:9b334a45a8ff 26 (##) I2C pins configuration
bogdanm 0:9b334a45a8ff 27 (+++) Enable the clock for the I2C GPIOs
bogdanm 0:9b334a45a8ff 28 (+++) Configure I2C pins as alternate function open-drain
bogdanm 0:9b334a45a8ff 29 (##) NVIC configuration if you need to use interrupt process
bogdanm 0:9b334a45a8ff 30 (+++) Configure the I2Cx interrupt priority
bogdanm 0:9b334a45a8ff 31 (+++) Enable the NVIC I2C IRQ Channel
bogdanm 0:9b334a45a8ff 32 (##) DMA Configuration if you need to use DMA process
bogdanm 0:9b334a45a8ff 33 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
bogdanm 0:9b334a45a8ff 34 (+++) Enable the DMAx interface clock using
bogdanm 0:9b334a45a8ff 35 (+++) Configure the DMA handle parameters
bogdanm 0:9b334a45a8ff 36 (+++) Configure the DMA Tx or Rx channel
bogdanm 0:9b334a45a8ff 37 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
bogdanm 0:9b334a45a8ff 38 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
bogdanm 0:9b334a45a8ff 39 the DMA Tx or Rx channel
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 (#) Configure the Communication Clock Timing, Own Address1, Master Addressing Mode, Dual Addressing mode,
bogdanm 0:9b334a45a8ff 42 Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
bogdanm 0:9b334a45a8ff 45 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 52 =================================
bogdanm 0:9b334a45a8ff 53 [..]
bogdanm 0:9b334a45a8ff 54 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
bogdanm 0:9b334a45a8ff 55 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
bogdanm 0:9b334a45a8ff 56 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
bogdanm 0:9b334a45a8ff 57 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 *** Polling mode IO MEM operation ***
bogdanm 0:9b334a45a8ff 60 =====================================
bogdanm 0:9b334a45a8ff 61 [..]
bogdanm 0:9b334a45a8ff 62 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
bogdanm 0:9b334a45a8ff 63 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 67 ===================================
bogdanm 0:9b334a45a8ff 68 [..]
bogdanm 0:9b334a45a8ff 69 (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
bogdanm 0:9b334a45a8ff 70 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 71 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
bogdanm 0:9b334a45a8ff 72 (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
bogdanm 0:9b334a45a8ff 73 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 74 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
bogdanm 0:9b334a45a8ff 75 (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
bogdanm 0:9b334a45a8ff 76 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 77 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
bogdanm 0:9b334a45a8ff 78 (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
bogdanm 0:9b334a45a8ff 79 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 80 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
bogdanm 0:9b334a45a8ff 81 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 82 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 *** Interrupt mode IO MEM operation ***
bogdanm 0:9b334a45a8ff 85 =======================================
bogdanm 0:9b334a45a8ff 86 [..]
bogdanm 0:9b334a45a8ff 87 (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
bogdanm 0:9b334a45a8ff 88 HAL_I2C_Mem_Write_IT()
bogdanm 0:9b334a45a8ff 89 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 90 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
bogdanm 0:9b334a45a8ff 91 (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
bogdanm 0:9b334a45a8ff 92 HAL_I2C_Mem_Read_IT()
bogdanm 0:9b334a45a8ff 93 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 94 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
bogdanm 0:9b334a45a8ff 95 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 96 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 99 ==============================
bogdanm 0:9b334a45a8ff 100 [..]
bogdanm 0:9b334a45a8ff 101 (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 102 HAL_I2C_Master_Transmit_DMA()
bogdanm 0:9b334a45a8ff 103 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 104 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
bogdanm 0:9b334a45a8ff 105 (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 106 HAL_I2C_Master_Receive_DMA()
bogdanm 0:9b334a45a8ff 107 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 108 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
bogdanm 0:9b334a45a8ff 109 (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 110 HAL_I2C_Slave_Transmit_DMA()
bogdanm 0:9b334a45a8ff 111 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 112 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
bogdanm 0:9b334a45a8ff 113 (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 114 HAL_I2C_Slave_Receive_DMA()
bogdanm 0:9b334a45a8ff 115 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 116 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
bogdanm 0:9b334a45a8ff 117 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 118 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 *** DMA mode IO MEM operation ***
bogdanm 0:9b334a45a8ff 121 =================================
bogdanm 0:9b334a45a8ff 122 [..]
bogdanm 0:9b334a45a8ff 123 (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
bogdanm 0:9b334a45a8ff 124 HAL_I2C_Mem_Write_DMA()
bogdanm 0:9b334a45a8ff 125 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 126 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
bogdanm 0:9b334a45a8ff 127 (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
bogdanm 0:9b334a45a8ff 128 HAL_I2C_Mem_Read_DMA()
bogdanm 0:9b334a45a8ff 129 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback() is executed and user can
bogdanm 0:9b334a45a8ff 130 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
bogdanm 0:9b334a45a8ff 131 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 132 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135 *** I2C HAL driver macros list ***
bogdanm 0:9b334a45a8ff 136 ==================================
bogdanm 0:9b334a45a8ff 137 [..]
bogdanm 0:9b334a45a8ff 138 Below the list of most used macros in I2C HAL driver.
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
bogdanm 0:9b334a45a8ff 141 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
bogdanm 0:9b334a45a8ff 142 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
bogdanm 0:9b334a45a8ff 143 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
bogdanm 0:9b334a45a8ff 144 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
bogdanm 0:9b334a45a8ff 145 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 [..]
bogdanm 0:9b334a45a8ff 148 (@) You can refer to the I2C HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 @endverbatim
bogdanm 0:9b334a45a8ff 151 ******************************************************************************
bogdanm 0:9b334a45a8ff 152 * @attention
bogdanm 0:9b334a45a8ff 153 *
bogdanm 0:9b334a45a8ff 154 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 155 *
bogdanm 0:9b334a45a8ff 156 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 157 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 158 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 159 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 160 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 161 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 162 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 163 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 164 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 165 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 166 *
bogdanm 0:9b334a45a8ff 167 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 168 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 169 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 170 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 171 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 172 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 173 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 174 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 175 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 176 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 177 *
bogdanm 0:9b334a45a8ff 178 ******************************************************************************
bogdanm 0:9b334a45a8ff 179 */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 182 #include "stm32l4xx_hal.h"
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 185 * @{
bogdanm 0:9b334a45a8ff 186 */
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /** @defgroup I2C I2C
bogdanm 0:9b334a45a8ff 189 * @brief I2C HAL module driver
bogdanm 0:9b334a45a8ff 190 * @{
bogdanm 0:9b334a45a8ff 191 */
bogdanm 0:9b334a45a8ff 192
bogdanm 0:9b334a45a8ff 193 #ifdef HAL_I2C_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 196 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 197 /** @addtogroup I2C_Private_Constants I2C Private Constants
bogdanm 0:9b334a45a8ff 198 * @{
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */
bogdanm 0:9b334a45a8ff 201 #define I2C_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
bogdanm 0:9b334a45a8ff 202 #define I2C_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 203 #define I2C_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 204 #define I2C_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 205 #define I2C_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 206 #define I2C_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 207 #define I2C_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 208 #define I2C_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 209 #define I2C_TIMEOUT_FLAG ((uint32_t)25) /* 25 ms */
bogdanm 0:9b334a45a8ff 210 /**
bogdanm 0:9b334a45a8ff 211 * @}
bogdanm 0:9b334a45a8ff 212 */
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 215 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 216 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 217 /** @addtogroup I2C_Private_Functions I2C Private Functions
bogdanm 0:9b334a45a8ff 218 * @{
bogdanm 0:9b334a45a8ff 219 */
bogdanm 0:9b334a45a8ff 220 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 221 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 222 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 223 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 224 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 225 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 226 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 229 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 230 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 231 static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 232 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 233 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 234 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 237 static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 240 static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
bogdanm 0:9b334a45a8ff 243 /**
bogdanm 0:9b334a45a8ff 244 * @}
bogdanm 0:9b334a45a8ff 245 */
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 /** @defgroup I2C_Exported_Functions I2C Exported Functions
bogdanm 0:9b334a45a8ff 250 * @{
bogdanm 0:9b334a45a8ff 251 */
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 254 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 255 *
bogdanm 0:9b334a45a8ff 256 @verbatim
bogdanm 0:9b334a45a8ff 257 ===============================================================================
bogdanm 0:9b334a45a8ff 258 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 259 ===============================================================================
bogdanm 0:9b334a45a8ff 260 [..] This subsection provides a set of functions allowing to initialize and
bogdanm 0:9b334a45a8ff 261 deinitialize the I2Cx peripheral:
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 (+) User must Implement HAL_I2C_MspInit() function in which he configures
bogdanm 0:9b334a45a8ff 264 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 (+) Call the function HAL_I2C_Init() to configure the selected device with
bogdanm 0:9b334a45a8ff 267 the selected configuration:
bogdanm 0:9b334a45a8ff 268 (++) Clock Timing
bogdanm 0:9b334a45a8ff 269 (++) Own Address 1
bogdanm 0:9b334a45a8ff 270 (++) Addressing mode (Master, Slave)
bogdanm 0:9b334a45a8ff 271 (++) Dual Addressing mode
bogdanm 0:9b334a45a8ff 272 (++) Own Address 2
bogdanm 0:9b334a45a8ff 273 (++) Own Address 2 Mask
bogdanm 0:9b334a45a8ff 274 (++) General call mode
bogdanm 0:9b334a45a8ff 275 (++) Nostretch mode
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
bogdanm 0:9b334a45a8ff 278 of the selected I2Cx peripheral.
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 @endverbatim
bogdanm 0:9b334a45a8ff 281 * @{
bogdanm 0:9b334a45a8ff 282 */
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 /**
bogdanm 0:9b334a45a8ff 285 * @brief Initializes the I2C according to the specified parameters
bogdanm 0:9b334a45a8ff 286 * in the I2C_InitTypeDef and initialize the associated handle.
bogdanm 0:9b334a45a8ff 287 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 288 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 289 * @retval HAL status
bogdanm 0:9b334a45a8ff 290 */
bogdanm 0:9b334a45a8ff 291 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 292 {
bogdanm 0:9b334a45a8ff 293 /* Check the I2C handle allocation */
bogdanm 0:9b334a45a8ff 294 if(hi2c == NULL)
bogdanm 0:9b334a45a8ff 295 {
bogdanm 0:9b334a45a8ff 296 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 297 }
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /* Check the parameters */
bogdanm 0:9b334a45a8ff 300 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm 0:9b334a45a8ff 301 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
bogdanm 0:9b334a45a8ff 302 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
bogdanm 0:9b334a45a8ff 303 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
bogdanm 0:9b334a45a8ff 304 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
bogdanm 0:9b334a45a8ff 305 assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
bogdanm 0:9b334a45a8ff 306 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
bogdanm 0:9b334a45a8ff 307 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 if(hi2c->State == HAL_I2C_STATE_RESET)
bogdanm 0:9b334a45a8ff 310 {
bogdanm 0:9b334a45a8ff 311 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 312 hi2c->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 313
bogdanm 0:9b334a45a8ff 314 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
bogdanm 0:9b334a45a8ff 315 HAL_I2C_MspInit(hi2c);
bogdanm 0:9b334a45a8ff 316 }
bogdanm 0:9b334a45a8ff 317
bogdanm 0:9b334a45a8ff 318 hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 /* Disable the selected I2C peripheral */
bogdanm 0:9b334a45a8ff 321 __HAL_I2C_DISABLE(hi2c);
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
bogdanm 0:9b334a45a8ff 324 /* Configure I2Cx: Frequency range */
bogdanm 0:9b334a45a8ff 325 hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
bogdanm 0:9b334a45a8ff 326
bogdanm 0:9b334a45a8ff 327 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 328 /* Configure I2Cx: Own Address1 and ack own address1 mode */
bogdanm 0:9b334a45a8ff 329 hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
bogdanm 0:9b334a45a8ff 330 if(hi2c->Init.OwnAddress1 != 0)
bogdanm 0:9b334a45a8ff 331 {
bogdanm 0:9b334a45a8ff 332 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm 0:9b334a45a8ff 333 {
bogdanm 0:9b334a45a8ff 334 hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
bogdanm 0:9b334a45a8ff 335 }
bogdanm 0:9b334a45a8ff 336 else /* I2C_ADDRESSINGMODE_10BIT */
bogdanm 0:9b334a45a8ff 337 {
bogdanm 0:9b334a45a8ff 338 hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
bogdanm 0:9b334a45a8ff 339 }
bogdanm 0:9b334a45a8ff 340 }
bogdanm 0:9b334a45a8ff 341
bogdanm 0:9b334a45a8ff 342 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
bogdanm 0:9b334a45a8ff 343 /* Configure I2Cx: Addressing Master mode */
bogdanm 0:9b334a45a8ff 344 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm 0:9b334a45a8ff 345 {
bogdanm 0:9b334a45a8ff 346 hi2c->Instance->CR2 = (I2C_CR2_ADD10);
bogdanm 0:9b334a45a8ff 347 }
bogdanm 0:9b334a45a8ff 348 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
bogdanm 0:9b334a45a8ff 349 hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 352 /* Configure I2Cx: Dual mode and Own Address2 */
bogdanm 0:9b334a45a8ff 353 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
bogdanm 0:9b334a45a8ff 356 /* Configure I2Cx: Generalcall and NoStretch mode */
bogdanm 0:9b334a45a8ff 357 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 /* Enable the selected I2C peripheral */
bogdanm 0:9b334a45a8ff 360 __HAL_I2C_ENABLE(hi2c);
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 363 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 return HAL_OK;
bogdanm 0:9b334a45a8ff 366 }
bogdanm 0:9b334a45a8ff 367
bogdanm 0:9b334a45a8ff 368 /**
bogdanm 0:9b334a45a8ff 369 * @brief DeInitialize the I2C peripheral.
bogdanm 0:9b334a45a8ff 370 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 371 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 372 * @retval HAL status
bogdanm 0:9b334a45a8ff 373 */
bogdanm 0:9b334a45a8ff 374 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 375 {
bogdanm 0:9b334a45a8ff 376 /* Check the I2C handle allocation */
bogdanm 0:9b334a45a8ff 377 if(hi2c == NULL)
bogdanm 0:9b334a45a8ff 378 {
bogdanm 0:9b334a45a8ff 379 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 380 }
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 /* Check the parameters */
bogdanm 0:9b334a45a8ff 383 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 /* Disable the I2C Peripheral Clock */
bogdanm 0:9b334a45a8ff 388 __HAL_I2C_DISABLE(hi2c);
bogdanm 0:9b334a45a8ff 389
bogdanm 0:9b334a45a8ff 390 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
bogdanm 0:9b334a45a8ff 391 HAL_I2C_MspDeInit(hi2c);
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 hi2c->State = HAL_I2C_STATE_RESET;
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397 /* Release Lock */
bogdanm 0:9b334a45a8ff 398 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 return HAL_OK;
bogdanm 0:9b334a45a8ff 401 }
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403 /**
bogdanm 0:9b334a45a8ff 404 * @brief Initialize the I2C MSP.
bogdanm 0:9b334a45a8ff 405 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 406 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 407 * @retval None
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 410 {
bogdanm 0:9b334a45a8ff 411 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 412 the HAL_I2C_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 413 */
bogdanm 0:9b334a45a8ff 414 }
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 /**
bogdanm 0:9b334a45a8ff 417 * @brief DeInitialize the I2C MSP.
bogdanm 0:9b334a45a8ff 418 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 419 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 420 * @retval None
bogdanm 0:9b334a45a8ff 421 */
bogdanm 0:9b334a45a8ff 422 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 423 {
bogdanm 0:9b334a45a8ff 424 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 425 the HAL_I2C_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 426 */
bogdanm 0:9b334a45a8ff 427 }
bogdanm 0:9b334a45a8ff 428
bogdanm 0:9b334a45a8ff 429 /**
bogdanm 0:9b334a45a8ff 430 * @}
bogdanm 0:9b334a45a8ff 431 */
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
bogdanm 0:9b334a45a8ff 434 * @brief Data transfers functions
bogdanm 0:9b334a45a8ff 435 *
bogdanm 0:9b334a45a8ff 436 @verbatim
bogdanm 0:9b334a45a8ff 437 ===============================================================================
bogdanm 0:9b334a45a8ff 438 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 439 ===============================================================================
bogdanm 0:9b334a45a8ff 440 [..]
bogdanm 0:9b334a45a8ff 441 This subsection provides a set of functions allowing to manage the I2C data
bogdanm 0:9b334a45a8ff 442 transfers.
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 (#) There are two modes of transfer:
bogdanm 0:9b334a45a8ff 445 (++) Blocking mode : The communication is performed in the polling mode.
bogdanm 0:9b334a45a8ff 446 The status of all data processing is returned by the same function
bogdanm 0:9b334a45a8ff 447 after finishing transfer.
bogdanm 0:9b334a45a8ff 448 (++) No-Blocking mode : The communication is performed using Interrupts
bogdanm 0:9b334a45a8ff 449 or DMA. These functions return the status of the transfer startup.
bogdanm 0:9b334a45a8ff 450 The end of the data processing will be indicated through the
bogdanm 0:9b334a45a8ff 451 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
bogdanm 0:9b334a45a8ff 452 using DMA mode.
bogdanm 0:9b334a45a8ff 453
bogdanm 0:9b334a45a8ff 454 (#) Blocking mode functions are :
bogdanm 0:9b334a45a8ff 455 (++) HAL_I2C_Master_Transmit()
bogdanm 0:9b334a45a8ff 456 (++) HAL_I2C_Master_Receive()
bogdanm 0:9b334a45a8ff 457 (++) HAL_I2C_Slave_Transmit()
bogdanm 0:9b334a45a8ff 458 (++) HAL_I2C_Slave_Receive()
bogdanm 0:9b334a45a8ff 459 (++) HAL_I2C_Mem_Write()
bogdanm 0:9b334a45a8ff 460 (++) HAL_I2C_Mem_Read()
bogdanm 0:9b334a45a8ff 461 (++) HAL_I2C_IsDeviceReady()
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 (#) No-Blocking mode functions with Interrupt are :
bogdanm 0:9b334a45a8ff 464 (++) HAL_I2C_Master_Transmit_IT()
bogdanm 0:9b334a45a8ff 465 (++) HAL_I2C_Master_Receive_IT()
bogdanm 0:9b334a45a8ff 466 (++) HAL_I2C_Slave_Transmit_IT()
bogdanm 0:9b334a45a8ff 467 (++) HAL_I2C_Slave_Receive_IT()
bogdanm 0:9b334a45a8ff 468 (++) HAL_I2C_Mem_Write_IT()
bogdanm 0:9b334a45a8ff 469 (++) HAL_I2C_Mem_Read_IT()
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 (#) No-Blocking mode functions with DMA are :
bogdanm 0:9b334a45a8ff 472 (++) HAL_I2C_Master_Transmit_DMA()
bogdanm 0:9b334a45a8ff 473 (++) HAL_I2C_Master_Receive_DMA()
bogdanm 0:9b334a45a8ff 474 (++) HAL_I2C_Slave_Transmit_DMA()
bogdanm 0:9b334a45a8ff 475 (++) HAL_I2C_Slave_Receive_DMA()
bogdanm 0:9b334a45a8ff 476 (++) HAL_I2C_Mem_Write_DMA()
bogdanm 0:9b334a45a8ff 477 (++) HAL_I2C_Mem_Read_DMA()
bogdanm 0:9b334a45a8ff 478
bogdanm 0:9b334a45a8ff 479 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
bogdanm 0:9b334a45a8ff 480 (++) HAL_I2C_MemTxCpltCallback()
bogdanm 0:9b334a45a8ff 481 (++) HAL_I2C_MemRxCpltCallback()
bogdanm 0:9b334a45a8ff 482 (++) HAL_I2C_MasterTxCpltCallback()
bogdanm 0:9b334a45a8ff 483 (++) HAL_I2C_MasterRxCpltCallback()
bogdanm 0:9b334a45a8ff 484 (++) HAL_I2C_SlaveTxCpltCallback()
bogdanm 0:9b334a45a8ff 485 (++) HAL_I2C_SlaveRxCpltCallback()
bogdanm 0:9b334a45a8ff 486 (++) HAL_I2C_ErrorCallback()
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 @endverbatim
bogdanm 0:9b334a45a8ff 489 * @{
bogdanm 0:9b334a45a8ff 490 */
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492 /**
bogdanm 0:9b334a45a8ff 493 * @brief Transmits in master mode an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 494 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 495 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 496 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 497 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 498 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 499 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 500 * @retval HAL status
bogdanm 0:9b334a45a8ff 501 */
bogdanm 0:9b334a45a8ff 502 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 503 {
bogdanm 0:9b334a45a8ff 504 uint32_t sizetmp = 0;
bogdanm 0:9b334a45a8ff 505
bogdanm 0:9b334a45a8ff 506 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 507 {
bogdanm 0:9b334a45a8ff 508 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 509 {
bogdanm 0:9b334a45a8ff 510 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 511 }
bogdanm 0:9b334a45a8ff 512
bogdanm 0:9b334a45a8ff 513 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 514 {
bogdanm 0:9b334a45a8ff 515 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 516 }
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518 /* Process Locked */
bogdanm 0:9b334a45a8ff 519 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 520
bogdanm 0:9b334a45a8ff 521 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm 0:9b334a45a8ff 522 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 523
bogdanm 0:9b334a45a8ff 524 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 525 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 526 /* Size > 255, need to set RELOAD bit */
bogdanm 0:9b334a45a8ff 527 if(Size > 255)
bogdanm 0:9b334a45a8ff 528 {
bogdanm 0:9b334a45a8ff 529 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 530 sizetmp = 255;
bogdanm 0:9b334a45a8ff 531 }
bogdanm 0:9b334a45a8ff 532 else
bogdanm 0:9b334a45a8ff 533 {
bogdanm 0:9b334a45a8ff 534 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 535 sizetmp = Size;
bogdanm 0:9b334a45a8ff 536 }
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 do
bogdanm 0:9b334a45a8ff 539 {
bogdanm 0:9b334a45a8ff 540 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 541 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 542 {
bogdanm 0:9b334a45a8ff 543 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 544 {
bogdanm 0:9b334a45a8ff 545 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 546 }
bogdanm 0:9b334a45a8ff 547 else
bogdanm 0:9b334a45a8ff 548 {
bogdanm 0:9b334a45a8ff 549 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 550 }
bogdanm 0:9b334a45a8ff 551 }
bogdanm 0:9b334a45a8ff 552 /* Write data to TXDR */
bogdanm 0:9b334a45a8ff 553 hi2c->Instance->TXDR = (*pData++);
bogdanm 0:9b334a45a8ff 554 sizetmp--;
bogdanm 0:9b334a45a8ff 555 Size--;
bogdanm 0:9b334a45a8ff 556
bogdanm 0:9b334a45a8ff 557 if((sizetmp == 0)&&(Size!=0))
bogdanm 0:9b334a45a8ff 558 {
bogdanm 0:9b334a45a8ff 559 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 560 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 561 {
bogdanm 0:9b334a45a8ff 562 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 563 }
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 if(Size > 255)
bogdanm 0:9b334a45a8ff 566 {
bogdanm 0:9b334a45a8ff 567 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 568 sizetmp = 255;
bogdanm 0:9b334a45a8ff 569 }
bogdanm 0:9b334a45a8ff 570 else
bogdanm 0:9b334a45a8ff 571 {
bogdanm 0:9b334a45a8ff 572 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 573 sizetmp = Size;
bogdanm 0:9b334a45a8ff 574 }
bogdanm 0:9b334a45a8ff 575 }
bogdanm 0:9b334a45a8ff 576
bogdanm 0:9b334a45a8ff 577 }while(Size > 0);
bogdanm 0:9b334a45a8ff 578
bogdanm 0:9b334a45a8ff 579 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 580 /* Wait until STOPF flag is set */
bogdanm 0:9b334a45a8ff 581 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 582 {
bogdanm 0:9b334a45a8ff 583 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 584 {
bogdanm 0:9b334a45a8ff 585 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 586 }
bogdanm 0:9b334a45a8ff 587 else
bogdanm 0:9b334a45a8ff 588 {
bogdanm 0:9b334a45a8ff 589 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 590 }
bogdanm 0:9b334a45a8ff 591 }
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 594 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 597 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 598
bogdanm 0:9b334a45a8ff 599 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 600
bogdanm 0:9b334a45a8ff 601 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 602 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 603
bogdanm 0:9b334a45a8ff 604 return HAL_OK;
bogdanm 0:9b334a45a8ff 605 }
bogdanm 0:9b334a45a8ff 606 else
bogdanm 0:9b334a45a8ff 607 {
bogdanm 0:9b334a45a8ff 608 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 609 }
bogdanm 0:9b334a45a8ff 610 }
bogdanm 0:9b334a45a8ff 611
bogdanm 0:9b334a45a8ff 612 /**
bogdanm 0:9b334a45a8ff 613 * @brief Receives in master mode an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 614 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 615 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 616 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 617 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 618 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 619 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 620 * @retval HAL status
bogdanm 0:9b334a45a8ff 621 */
bogdanm 0:9b334a45a8ff 622 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 623 {
bogdanm 0:9b334a45a8ff 624 uint32_t sizetmp = 0;
bogdanm 0:9b334a45a8ff 625
bogdanm 0:9b334a45a8ff 626 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 627 {
bogdanm 0:9b334a45a8ff 628 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 629 {
bogdanm 0:9b334a45a8ff 630 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 631 }
bogdanm 0:9b334a45a8ff 632
bogdanm 0:9b334a45a8ff 633 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 634 {
bogdanm 0:9b334a45a8ff 635 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 636 }
bogdanm 0:9b334a45a8ff 637
bogdanm 0:9b334a45a8ff 638 /* Process Locked */
bogdanm 0:9b334a45a8ff 639 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 640
bogdanm 0:9b334a45a8ff 641 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm 0:9b334a45a8ff 642 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 643
bogdanm 0:9b334a45a8ff 644 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 645 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 646 /* Size > 255, need to set RELOAD bit */
bogdanm 0:9b334a45a8ff 647 if(Size > 255)
bogdanm 0:9b334a45a8ff 648 {
bogdanm 0:9b334a45a8ff 649 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 650 sizetmp = 255;
bogdanm 0:9b334a45a8ff 651 }
bogdanm 0:9b334a45a8ff 652 else
bogdanm 0:9b334a45a8ff 653 {
bogdanm 0:9b334a45a8ff 654 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 655 sizetmp = Size;
bogdanm 0:9b334a45a8ff 656 }
bogdanm 0:9b334a45a8ff 657
bogdanm 0:9b334a45a8ff 658 do
bogdanm 0:9b334a45a8ff 659 {
bogdanm 0:9b334a45a8ff 660 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 661 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 662 {
bogdanm 0:9b334a45a8ff 663 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 664 }
bogdanm 0:9b334a45a8ff 665
bogdanm 0:9b334a45a8ff 666 /* Write data to RXDR */
bogdanm 0:9b334a45a8ff 667 (*pData++) =hi2c->Instance->RXDR;
bogdanm 0:9b334a45a8ff 668 sizetmp--;
bogdanm 0:9b334a45a8ff 669 Size--;
bogdanm 0:9b334a45a8ff 670
bogdanm 0:9b334a45a8ff 671 if((sizetmp == 0)&&(Size!=0))
bogdanm 0:9b334a45a8ff 672 {
bogdanm 0:9b334a45a8ff 673 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 674 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 675 {
bogdanm 0:9b334a45a8ff 676 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 677 }
bogdanm 0:9b334a45a8ff 678
bogdanm 0:9b334a45a8ff 679 if(Size > 255)
bogdanm 0:9b334a45a8ff 680 {
bogdanm 0:9b334a45a8ff 681 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 682 sizetmp = 255;
bogdanm 0:9b334a45a8ff 683 }
bogdanm 0:9b334a45a8ff 684 else
bogdanm 0:9b334a45a8ff 685 {
bogdanm 0:9b334a45a8ff 686 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 687 sizetmp = Size;
bogdanm 0:9b334a45a8ff 688 }
bogdanm 0:9b334a45a8ff 689 }
bogdanm 0:9b334a45a8ff 690
bogdanm 0:9b334a45a8ff 691 }while(Size > 0);
bogdanm 0:9b334a45a8ff 692
bogdanm 0:9b334a45a8ff 693 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 694 /* Wait until STOPF flag is set */
bogdanm 0:9b334a45a8ff 695 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 696 {
bogdanm 0:9b334a45a8ff 697 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 698 {
bogdanm 0:9b334a45a8ff 699 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 700 }
bogdanm 0:9b334a45a8ff 701 else
bogdanm 0:9b334a45a8ff 702 {
bogdanm 0:9b334a45a8ff 703 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 704 }
bogdanm 0:9b334a45a8ff 705 }
bogdanm 0:9b334a45a8ff 706
bogdanm 0:9b334a45a8ff 707 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 708 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 709
bogdanm 0:9b334a45a8ff 710 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 711 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 712
bogdanm 0:9b334a45a8ff 713 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 714
bogdanm 0:9b334a45a8ff 715 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 716 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 717
bogdanm 0:9b334a45a8ff 718 return HAL_OK;
bogdanm 0:9b334a45a8ff 719 }
bogdanm 0:9b334a45a8ff 720 else
bogdanm 0:9b334a45a8ff 721 {
bogdanm 0:9b334a45a8ff 722 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 723 }
bogdanm 0:9b334a45a8ff 724 }
bogdanm 0:9b334a45a8ff 725
bogdanm 0:9b334a45a8ff 726 /**
bogdanm 0:9b334a45a8ff 727 * @brief Transmits in slave mode an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 728 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 729 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 730 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 731 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 732 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 733 * @retval HAL status
bogdanm 0:9b334a45a8ff 734 */
bogdanm 0:9b334a45a8ff 735 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 736 {
bogdanm 0:9b334a45a8ff 737 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 738 {
bogdanm 0:9b334a45a8ff 739 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 740 {
bogdanm 0:9b334a45a8ff 741 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 742 }
bogdanm 0:9b334a45a8ff 743
bogdanm 0:9b334a45a8ff 744 /* Process Locked */
bogdanm 0:9b334a45a8ff 745 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 746
bogdanm 0:9b334a45a8ff 747 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm 0:9b334a45a8ff 748 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 749
bogdanm 0:9b334a45a8ff 750 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 751 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 752
bogdanm 0:9b334a45a8ff 753 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 754 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 755 {
bogdanm 0:9b334a45a8ff 756 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 757 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 758 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 759 }
bogdanm 0:9b334a45a8ff 760
bogdanm 0:9b334a45a8ff 761 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 762 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 763
bogdanm 0:9b334a45a8ff 764 /* If 10bit addressing mode is selected */
bogdanm 0:9b334a45a8ff 765 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm 0:9b334a45a8ff 766 {
bogdanm 0:9b334a45a8ff 767 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 768 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 769 {
bogdanm 0:9b334a45a8ff 770 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 771 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 772 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 773 }
bogdanm 0:9b334a45a8ff 774
bogdanm 0:9b334a45a8ff 775 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 776 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 777 }
bogdanm 0:9b334a45a8ff 778
bogdanm 0:9b334a45a8ff 779 /* Wait until DIR flag is set Transmitter mode */
bogdanm 0:9b334a45a8ff 780 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 781 {
bogdanm 0:9b334a45a8ff 782 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 783 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 784 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 785 }
bogdanm 0:9b334a45a8ff 786
bogdanm 0:9b334a45a8ff 787 do
bogdanm 0:9b334a45a8ff 788 {
bogdanm 0:9b334a45a8ff 789 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 790 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 791 {
bogdanm 0:9b334a45a8ff 792 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 793 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 794
bogdanm 0:9b334a45a8ff 795 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 796 {
bogdanm 0:9b334a45a8ff 797 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 798 }
bogdanm 0:9b334a45a8ff 799 else
bogdanm 0:9b334a45a8ff 800 {
bogdanm 0:9b334a45a8ff 801 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 802 }
bogdanm 0:9b334a45a8ff 803 }
bogdanm 0:9b334a45a8ff 804
bogdanm 0:9b334a45a8ff 805 /* Read data from TXDR */
bogdanm 0:9b334a45a8ff 806 hi2c->Instance->TXDR = (*pData++);
bogdanm 0:9b334a45a8ff 807 Size--;
bogdanm 0:9b334a45a8ff 808 }while(Size > 0);
bogdanm 0:9b334a45a8ff 809
bogdanm 0:9b334a45a8ff 810 /* Wait until STOP flag is set */
bogdanm 0:9b334a45a8ff 811 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 812 {
bogdanm 0:9b334a45a8ff 813 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 814 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 815
bogdanm 0:9b334a45a8ff 816 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 817 {
bogdanm 0:9b334a45a8ff 818 /* Normal use case for Transmitter mode */
bogdanm 0:9b334a45a8ff 819 /* A NACK is generated to confirm the end of transfer */
bogdanm 0:9b334a45a8ff 820 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 821 }
bogdanm 0:9b334a45a8ff 822 else
bogdanm 0:9b334a45a8ff 823 {
bogdanm 0:9b334a45a8ff 824 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 825 }
bogdanm 0:9b334a45a8ff 826 }
bogdanm 0:9b334a45a8ff 827
bogdanm 0:9b334a45a8ff 828 /* Clear STOP flag */
bogdanm 0:9b334a45a8ff 829 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 830
bogdanm 0:9b334a45a8ff 831 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 832 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 833 {
bogdanm 0:9b334a45a8ff 834 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 835 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 836 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 837 }
bogdanm 0:9b334a45a8ff 838
bogdanm 0:9b334a45a8ff 839 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 840 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 841
bogdanm 0:9b334a45a8ff 842 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 843
bogdanm 0:9b334a45a8ff 844 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 845 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 846
bogdanm 0:9b334a45a8ff 847 return HAL_OK;
bogdanm 0:9b334a45a8ff 848 }
bogdanm 0:9b334a45a8ff 849 else
bogdanm 0:9b334a45a8ff 850 {
bogdanm 0:9b334a45a8ff 851 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 852 }
bogdanm 0:9b334a45a8ff 853 }
bogdanm 0:9b334a45a8ff 854
bogdanm 0:9b334a45a8ff 855 /**
bogdanm 0:9b334a45a8ff 856 * @brief Receive in slave mode an amount of data in blocking mode
bogdanm 0:9b334a45a8ff 857 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 858 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 859 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 860 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 861 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 862 * @retval HAL status
bogdanm 0:9b334a45a8ff 863 */
bogdanm 0:9b334a45a8ff 864 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 865 {
bogdanm 0:9b334a45a8ff 866 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 867 {
bogdanm 0:9b334a45a8ff 868 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 869 {
bogdanm 0:9b334a45a8ff 870 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 871 }
bogdanm 0:9b334a45a8ff 872
bogdanm 0:9b334a45a8ff 873 /* Process Locked */
bogdanm 0:9b334a45a8ff 874 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 875
bogdanm 0:9b334a45a8ff 876 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm 0:9b334a45a8ff 877 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 878
bogdanm 0:9b334a45a8ff 879 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 880 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 881
bogdanm 0:9b334a45a8ff 882 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 883 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 884 {
bogdanm 0:9b334a45a8ff 885 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 886 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 887 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 888 }
bogdanm 0:9b334a45a8ff 889
bogdanm 0:9b334a45a8ff 890 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 891 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 892
bogdanm 0:9b334a45a8ff 893 /* Wait until DIR flag is reset Receiver mode */
bogdanm 0:9b334a45a8ff 894 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 895 {
bogdanm 0:9b334a45a8ff 896 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 897 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 898 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 899 }
bogdanm 0:9b334a45a8ff 900
bogdanm 0:9b334a45a8ff 901 while(Size > 0)
bogdanm 0:9b334a45a8ff 902 {
bogdanm 0:9b334a45a8ff 903 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 904 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 905 {
bogdanm 0:9b334a45a8ff 906 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 907 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 908 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
bogdanm 0:9b334a45a8ff 909 {
bogdanm 0:9b334a45a8ff 910 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 911 }
bogdanm 0:9b334a45a8ff 912 else
bogdanm 0:9b334a45a8ff 913 {
bogdanm 0:9b334a45a8ff 914 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 915 }
bogdanm 0:9b334a45a8ff 916 }
bogdanm 0:9b334a45a8ff 917
bogdanm 0:9b334a45a8ff 918 /* Read data from RXDR */
bogdanm 0:9b334a45a8ff 919 (*pData++) = hi2c->Instance->RXDR;
bogdanm 0:9b334a45a8ff 920 Size--;
bogdanm 0:9b334a45a8ff 921 }
bogdanm 0:9b334a45a8ff 922
bogdanm 0:9b334a45a8ff 923 /* Wait until STOP flag is set */
bogdanm 0:9b334a45a8ff 924 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 925 {
bogdanm 0:9b334a45a8ff 926 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 927 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 928
bogdanm 0:9b334a45a8ff 929 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 930 {
bogdanm 0:9b334a45a8ff 931 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 932 }
bogdanm 0:9b334a45a8ff 933 else
bogdanm 0:9b334a45a8ff 934 {
bogdanm 0:9b334a45a8ff 935 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 936 }
bogdanm 0:9b334a45a8ff 937 }
bogdanm 0:9b334a45a8ff 938
bogdanm 0:9b334a45a8ff 939 /* Clear STOP flag */
bogdanm 0:9b334a45a8ff 940 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 941
bogdanm 0:9b334a45a8ff 942 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 943 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 944 {
bogdanm 0:9b334a45a8ff 945 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 946 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 947 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 948 }
bogdanm 0:9b334a45a8ff 949
bogdanm 0:9b334a45a8ff 950
bogdanm 0:9b334a45a8ff 951 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 952 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 953
bogdanm 0:9b334a45a8ff 954 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 955
bogdanm 0:9b334a45a8ff 956 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 957 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 958
bogdanm 0:9b334a45a8ff 959 return HAL_OK;
bogdanm 0:9b334a45a8ff 960 }
bogdanm 0:9b334a45a8ff 961 else
bogdanm 0:9b334a45a8ff 962 {
bogdanm 0:9b334a45a8ff 963 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 964 }
bogdanm 0:9b334a45a8ff 965 }
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 /**
bogdanm 0:9b334a45a8ff 968 * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 969 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 970 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 971 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 972 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 973 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 974 * @retval HAL status
bogdanm 0:9b334a45a8ff 975 */
bogdanm 0:9b334a45a8ff 976 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 977 {
bogdanm 0:9b334a45a8ff 978 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 979 {
bogdanm 0:9b334a45a8ff 980 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 981 {
bogdanm 0:9b334a45a8ff 982 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 983 }
bogdanm 0:9b334a45a8ff 984
bogdanm 0:9b334a45a8ff 985 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 986 {
bogdanm 0:9b334a45a8ff 987 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 988 }
bogdanm 0:9b334a45a8ff 989
bogdanm 0:9b334a45a8ff 990 /* Process Locked */
bogdanm 0:9b334a45a8ff 991 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 992
bogdanm 0:9b334a45a8ff 993 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm 0:9b334a45a8ff 994 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 995
bogdanm 0:9b334a45a8ff 996 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 997 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 998 if(Size > 255)
bogdanm 0:9b334a45a8ff 999 {
bogdanm 0:9b334a45a8ff 1000 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 1001 }
bogdanm 0:9b334a45a8ff 1002 else
bogdanm 0:9b334a45a8ff 1003 {
bogdanm 0:9b334a45a8ff 1004 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1005 }
bogdanm 0:9b334a45a8ff 1006
bogdanm 0:9b334a45a8ff 1007 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1008 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 1009 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 1010 {
bogdanm 0:9b334a45a8ff 1011 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 1012 }
bogdanm 0:9b334a45a8ff 1013 else
bogdanm 0:9b334a45a8ff 1014 {
bogdanm 0:9b334a45a8ff 1015 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 1016 }
bogdanm 0:9b334a45a8ff 1017
bogdanm 0:9b334a45a8ff 1018 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1019 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1020
bogdanm 0:9b334a45a8ff 1021 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1022 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1023 process unlock */
bogdanm 0:9b334a45a8ff 1024
bogdanm 0:9b334a45a8ff 1025
bogdanm 0:9b334a45a8ff 1026 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm 0:9b334a45a8ff 1027 /* possible to enable all of these */
bogdanm 0:9b334a45a8ff 1028 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
bogdanm 0:9b334a45a8ff 1029 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI );
bogdanm 0:9b334a45a8ff 1030
bogdanm 0:9b334a45a8ff 1031 return HAL_OK;
bogdanm 0:9b334a45a8ff 1032 }
bogdanm 0:9b334a45a8ff 1033 else
bogdanm 0:9b334a45a8ff 1034 {
bogdanm 0:9b334a45a8ff 1035 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1036 }
bogdanm 0:9b334a45a8ff 1037 }
bogdanm 0:9b334a45a8ff 1038
bogdanm 0:9b334a45a8ff 1039 /**
bogdanm 0:9b334a45a8ff 1040 * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1041 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1042 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1043 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1044 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1045 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1046 * @retval HAL status
bogdanm 0:9b334a45a8ff 1047 */
bogdanm 0:9b334a45a8ff 1048 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1049 {
bogdanm 0:9b334a45a8ff 1050 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1051 {
bogdanm 0:9b334a45a8ff 1052 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1053 {
bogdanm 0:9b334a45a8ff 1054 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1055 }
bogdanm 0:9b334a45a8ff 1056
bogdanm 0:9b334a45a8ff 1057 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 1058 {
bogdanm 0:9b334a45a8ff 1059 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1060 }
bogdanm 0:9b334a45a8ff 1061
bogdanm 0:9b334a45a8ff 1062 /* Process Locked */
bogdanm 0:9b334a45a8ff 1063 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1064
bogdanm 0:9b334a45a8ff 1065 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm 0:9b334a45a8ff 1066 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1067
bogdanm 0:9b334a45a8ff 1068 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1069 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1070 if(Size > 255)
bogdanm 0:9b334a45a8ff 1071 {
bogdanm 0:9b334a45a8ff 1072 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 1073 }
bogdanm 0:9b334a45a8ff 1074 else
bogdanm 0:9b334a45a8ff 1075 {
bogdanm 0:9b334a45a8ff 1076 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1077 }
bogdanm 0:9b334a45a8ff 1078
bogdanm 0:9b334a45a8ff 1079 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1080 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 1081 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 1082 {
bogdanm 0:9b334a45a8ff 1083 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1084 }
bogdanm 0:9b334a45a8ff 1085 else
bogdanm 0:9b334a45a8ff 1086 {
bogdanm 0:9b334a45a8ff 1087 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1088 }
bogdanm 0:9b334a45a8ff 1089
bogdanm 0:9b334a45a8ff 1090 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1091 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1092
bogdanm 0:9b334a45a8ff 1093 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1094 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1095 process unlock */
bogdanm 0:9b334a45a8ff 1096
bogdanm 0:9b334a45a8ff 1097 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm 0:9b334a45a8ff 1098 /* possible to enable all of these */
bogdanm 0:9b334a45a8ff 1099 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
bogdanm 0:9b334a45a8ff 1100 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI );
bogdanm 0:9b334a45a8ff 1101
bogdanm 0:9b334a45a8ff 1102 return HAL_OK;
bogdanm 0:9b334a45a8ff 1103 }
bogdanm 0:9b334a45a8ff 1104 else
bogdanm 0:9b334a45a8ff 1105 {
bogdanm 0:9b334a45a8ff 1106 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1107 }
bogdanm 0:9b334a45a8ff 1108 }
bogdanm 0:9b334a45a8ff 1109
bogdanm 0:9b334a45a8ff 1110 /**
bogdanm 0:9b334a45a8ff 1111 * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1112 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1113 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1114 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1115 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1116 * @retval HAL status
bogdanm 0:9b334a45a8ff 1117 */
bogdanm 0:9b334a45a8ff 1118 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1119 {
bogdanm 0:9b334a45a8ff 1120 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1121 {
bogdanm 0:9b334a45a8ff 1122 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1123 {
bogdanm 0:9b334a45a8ff 1124 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1125 }
bogdanm 0:9b334a45a8ff 1126
bogdanm 0:9b334a45a8ff 1127 /* Process Locked */
bogdanm 0:9b334a45a8ff 1128 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1129
bogdanm 0:9b334a45a8ff 1130 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1131 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1132
bogdanm 0:9b334a45a8ff 1133 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1134 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1135
bogdanm 0:9b334a45a8ff 1136 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1137 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1138 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1139
bogdanm 0:9b334a45a8ff 1140 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1141 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1142
bogdanm 0:9b334a45a8ff 1143 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1144 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1145 process unlock */
bogdanm 0:9b334a45a8ff 1146
bogdanm 0:9b334a45a8ff 1147 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm 0:9b334a45a8ff 1148 /* possible to enable all of these */
bogdanm 0:9b334a45a8ff 1149 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
bogdanm 0:9b334a45a8ff 1150 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_TXI );
bogdanm 0:9b334a45a8ff 1151
bogdanm 0:9b334a45a8ff 1152 return HAL_OK;
bogdanm 0:9b334a45a8ff 1153 }
bogdanm 0:9b334a45a8ff 1154 else
bogdanm 0:9b334a45a8ff 1155 {
bogdanm 0:9b334a45a8ff 1156 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1157 }
bogdanm 0:9b334a45a8ff 1158 }
bogdanm 0:9b334a45a8ff 1159
bogdanm 0:9b334a45a8ff 1160 /**
bogdanm 0:9b334a45a8ff 1161 * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1162 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1163 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1164 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1165 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1166 * @retval HAL status
bogdanm 0:9b334a45a8ff 1167 */
bogdanm 0:9b334a45a8ff 1168 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1169 {
bogdanm 0:9b334a45a8ff 1170 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1171 {
bogdanm 0:9b334a45a8ff 1172 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1173 {
bogdanm 0:9b334a45a8ff 1174 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1175 }
bogdanm 0:9b334a45a8ff 1176
bogdanm 0:9b334a45a8ff 1177 /* Process Locked */
bogdanm 0:9b334a45a8ff 1178 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1179
bogdanm 0:9b334a45a8ff 1180 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1181 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1182
bogdanm 0:9b334a45a8ff 1183 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1184 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1185
bogdanm 0:9b334a45a8ff 1186 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1187 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1188 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1189
bogdanm 0:9b334a45a8ff 1190 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1191 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1192
bogdanm 0:9b334a45a8ff 1193 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1194 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1195 process unlock */
bogdanm 0:9b334a45a8ff 1196
bogdanm 0:9b334a45a8ff 1197 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm 0:9b334a45a8ff 1198 /* possible to enable all of these */
bogdanm 0:9b334a45a8ff 1199 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
bogdanm 0:9b334a45a8ff 1200 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI);
bogdanm 0:9b334a45a8ff 1201
bogdanm 0:9b334a45a8ff 1202 return HAL_OK;
bogdanm 0:9b334a45a8ff 1203 }
bogdanm 0:9b334a45a8ff 1204 else
bogdanm 0:9b334a45a8ff 1205 {
bogdanm 0:9b334a45a8ff 1206 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1207 }
bogdanm 0:9b334a45a8ff 1208 }
bogdanm 0:9b334a45a8ff 1209
bogdanm 0:9b334a45a8ff 1210 /**
bogdanm 0:9b334a45a8ff 1211 * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1212 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1213 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1214 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1215 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1216 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1217 * @retval HAL status
bogdanm 0:9b334a45a8ff 1218 */
bogdanm 0:9b334a45a8ff 1219 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1220 {
bogdanm 0:9b334a45a8ff 1221 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1222 {
bogdanm 0:9b334a45a8ff 1223 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1224 {
bogdanm 0:9b334a45a8ff 1225 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1226 }
bogdanm 0:9b334a45a8ff 1227
bogdanm 0:9b334a45a8ff 1228 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 1229 {
bogdanm 0:9b334a45a8ff 1230 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1231 }
bogdanm 0:9b334a45a8ff 1232
bogdanm 0:9b334a45a8ff 1233 /* Process Locked */
bogdanm 0:9b334a45a8ff 1234 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1235
bogdanm 0:9b334a45a8ff 1236 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
bogdanm 0:9b334a45a8ff 1237 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1238
bogdanm 0:9b334a45a8ff 1239 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1240 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1241 if(Size > 255)
bogdanm 0:9b334a45a8ff 1242 {
bogdanm 0:9b334a45a8ff 1243 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 1244 }
bogdanm 0:9b334a45a8ff 1245 else
bogdanm 0:9b334a45a8ff 1246 {
bogdanm 0:9b334a45a8ff 1247 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1248 }
bogdanm 0:9b334a45a8ff 1249
bogdanm 0:9b334a45a8ff 1250 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1251 hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
bogdanm 0:9b334a45a8ff 1252
bogdanm 0:9b334a45a8ff 1253 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1254 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1255
bogdanm 0:9b334a45a8ff 1256 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1257 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 1258
bogdanm 0:9b334a45a8ff 1259 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1260 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 1261 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 1262 {
bogdanm 0:9b334a45a8ff 1263 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 1264 }
bogdanm 0:9b334a45a8ff 1265 else
bogdanm 0:9b334a45a8ff 1266 {
bogdanm 0:9b334a45a8ff 1267 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 1268 }
bogdanm 0:9b334a45a8ff 1269
bogdanm 0:9b334a45a8ff 1270 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 1271 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm 0:9b334a45a8ff 1272 {
bogdanm 0:9b334a45a8ff 1273 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1274 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1275
bogdanm 0:9b334a45a8ff 1276 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1277 {
bogdanm 0:9b334a45a8ff 1278 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1279 }
bogdanm 0:9b334a45a8ff 1280 else
bogdanm 0:9b334a45a8ff 1281 {
bogdanm 0:9b334a45a8ff 1282 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1283 }
bogdanm 0:9b334a45a8ff 1284 }
bogdanm 0:9b334a45a8ff 1285
bogdanm 0:9b334a45a8ff 1286
bogdanm 0:9b334a45a8ff 1287 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1288 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 1289
bogdanm 0:9b334a45a8ff 1290 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1291 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1292
bogdanm 0:9b334a45a8ff 1293 return HAL_OK;
bogdanm 0:9b334a45a8ff 1294 }
bogdanm 0:9b334a45a8ff 1295 else
bogdanm 0:9b334a45a8ff 1296 {
bogdanm 0:9b334a45a8ff 1297 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1298 }
bogdanm 0:9b334a45a8ff 1299 }
bogdanm 0:9b334a45a8ff 1300
bogdanm 0:9b334a45a8ff 1301 /**
bogdanm 0:9b334a45a8ff 1302 * @brief Receive in master mode an amount of data in non-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1303 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1304 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1305 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1306 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1307 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1308 * @retval HAL status
bogdanm 0:9b334a45a8ff 1309 */
bogdanm 0:9b334a45a8ff 1310 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1311 {
bogdanm 0:9b334a45a8ff 1312 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1313 {
bogdanm 0:9b334a45a8ff 1314 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1315 {
bogdanm 0:9b334a45a8ff 1316 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1317 }
bogdanm 0:9b334a45a8ff 1318
bogdanm 0:9b334a45a8ff 1319 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 1320 {
bogdanm 0:9b334a45a8ff 1321 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1322 }
bogdanm 0:9b334a45a8ff 1323
bogdanm 0:9b334a45a8ff 1324 /* Process Locked */
bogdanm 0:9b334a45a8ff 1325 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1326
bogdanm 0:9b334a45a8ff 1327 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
bogdanm 0:9b334a45a8ff 1328 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1329
bogdanm 0:9b334a45a8ff 1330 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1331 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1332 if(Size > 255)
bogdanm 0:9b334a45a8ff 1333 {
bogdanm 0:9b334a45a8ff 1334 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 1335 }
bogdanm 0:9b334a45a8ff 1336 else
bogdanm 0:9b334a45a8ff 1337 {
bogdanm 0:9b334a45a8ff 1338 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1339 }
bogdanm 0:9b334a45a8ff 1340
bogdanm 0:9b334a45a8ff 1341 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1342 hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
bogdanm 0:9b334a45a8ff 1343
bogdanm 0:9b334a45a8ff 1344 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1345 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1346
bogdanm 0:9b334a45a8ff 1347 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1348 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 1349
bogdanm 0:9b334a45a8ff 1350 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1351 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 1352 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 1353 {
bogdanm 0:9b334a45a8ff 1354 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1355 }
bogdanm 0:9b334a45a8ff 1356 else
bogdanm 0:9b334a45a8ff 1357 {
bogdanm 0:9b334a45a8ff 1358 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1359 }
bogdanm 0:9b334a45a8ff 1360
bogdanm 0:9b334a45a8ff 1361 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 1362 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1363 {
bogdanm 0:9b334a45a8ff 1364 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1365 }
bogdanm 0:9b334a45a8ff 1366
bogdanm 0:9b334a45a8ff 1367
bogdanm 0:9b334a45a8ff 1368 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1369 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 1370
bogdanm 0:9b334a45a8ff 1371 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1372 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1373
bogdanm 0:9b334a45a8ff 1374 return HAL_OK;
bogdanm 0:9b334a45a8ff 1375 }
bogdanm 0:9b334a45a8ff 1376 else
bogdanm 0:9b334a45a8ff 1377 {
bogdanm 0:9b334a45a8ff 1378 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1379 }
bogdanm 0:9b334a45a8ff 1380 }
bogdanm 0:9b334a45a8ff 1381
bogdanm 0:9b334a45a8ff 1382 /**
bogdanm 0:9b334a45a8ff 1383 * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1384 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1385 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1386 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1387 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1388 * @retval HAL status
bogdanm 0:9b334a45a8ff 1389 */
bogdanm 0:9b334a45a8ff 1390 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1391 {
bogdanm 0:9b334a45a8ff 1392 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1393 {
bogdanm 0:9b334a45a8ff 1394 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1395 {
bogdanm 0:9b334a45a8ff 1396 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1397 }
bogdanm 0:9b334a45a8ff 1398 /* Process Locked */
bogdanm 0:9b334a45a8ff 1399 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1400
bogdanm 0:9b334a45a8ff 1401 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1402 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1403
bogdanm 0:9b334a45a8ff 1404 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1405 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1406 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1407
bogdanm 0:9b334a45a8ff 1408 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1409 hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
bogdanm 0:9b334a45a8ff 1410
bogdanm 0:9b334a45a8ff 1411 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1412 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1413
bogdanm 0:9b334a45a8ff 1414 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1415 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 1416
bogdanm 0:9b334a45a8ff 1417 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1418 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1419
bogdanm 0:9b334a45a8ff 1420 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 1421 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm 0:9b334a45a8ff 1422 {
bogdanm 0:9b334a45a8ff 1423 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1424 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1425 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1426 }
bogdanm 0:9b334a45a8ff 1427
bogdanm 0:9b334a45a8ff 1428 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1429 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 1430
bogdanm 0:9b334a45a8ff 1431 /* If 10bits addressing mode is selected */
bogdanm 0:9b334a45a8ff 1432 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm 0:9b334a45a8ff 1433 {
bogdanm 0:9b334a45a8ff 1434 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 1435 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm 0:9b334a45a8ff 1436 {
bogdanm 0:9b334a45a8ff 1437 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1438 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1439 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1440 }
bogdanm 0:9b334a45a8ff 1441
bogdanm 0:9b334a45a8ff 1442 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1443 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 1444 }
bogdanm 0:9b334a45a8ff 1445
bogdanm 0:9b334a45a8ff 1446 /* Wait until DIR flag is set Transmitter mode */
bogdanm 0:9b334a45a8ff 1447 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm 0:9b334a45a8ff 1448 {
bogdanm 0:9b334a45a8ff 1449 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1450 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1451 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1452 }
bogdanm 0:9b334a45a8ff 1453
bogdanm 0:9b334a45a8ff 1454 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1455 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 1456
bogdanm 0:9b334a45a8ff 1457 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1458 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1459
bogdanm 0:9b334a45a8ff 1460 return HAL_OK;
bogdanm 0:9b334a45a8ff 1461 }
bogdanm 0:9b334a45a8ff 1462 else
bogdanm 0:9b334a45a8ff 1463 {
bogdanm 0:9b334a45a8ff 1464 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1465 }
bogdanm 0:9b334a45a8ff 1466 }
bogdanm 0:9b334a45a8ff 1467
bogdanm 0:9b334a45a8ff 1468 /**
bogdanm 0:9b334a45a8ff 1469 * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1470 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1471 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1472 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1473 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1474 * @retval HAL status
bogdanm 0:9b334a45a8ff 1475 */
bogdanm 0:9b334a45a8ff 1476 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1477 {
bogdanm 0:9b334a45a8ff 1478 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1479 {
bogdanm 0:9b334a45a8ff 1480 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1481 {
bogdanm 0:9b334a45a8ff 1482 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1483 }
bogdanm 0:9b334a45a8ff 1484 /* Process Locked */
bogdanm 0:9b334a45a8ff 1485 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1486
bogdanm 0:9b334a45a8ff 1487 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1488 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1489
bogdanm 0:9b334a45a8ff 1490 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1491 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1492 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1493
bogdanm 0:9b334a45a8ff 1494 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1495 hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
bogdanm 0:9b334a45a8ff 1496
bogdanm 0:9b334a45a8ff 1497 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1498 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1499
bogdanm 0:9b334a45a8ff 1500 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1501 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, Size);
bogdanm 0:9b334a45a8ff 1502
bogdanm 0:9b334a45a8ff 1503 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1504 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1505
bogdanm 0:9b334a45a8ff 1506 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 1507 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
bogdanm 0:9b334a45a8ff 1508 {
bogdanm 0:9b334a45a8ff 1509 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1510 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1511 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1512 }
bogdanm 0:9b334a45a8ff 1513
bogdanm 0:9b334a45a8ff 1514 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1515 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 1516
bogdanm 0:9b334a45a8ff 1517 /* Wait until DIR flag is set Receiver mode */
bogdanm 0:9b334a45a8ff 1518 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, I2C_TIMEOUT_DIR) != HAL_OK)
bogdanm 0:9b334a45a8ff 1519 {
bogdanm 0:9b334a45a8ff 1520 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1521 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 1522 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1523 }
bogdanm 0:9b334a45a8ff 1524
bogdanm 0:9b334a45a8ff 1525 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1526 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 1527
bogdanm 0:9b334a45a8ff 1528 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1529 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1530
bogdanm 0:9b334a45a8ff 1531 return HAL_OK;
bogdanm 0:9b334a45a8ff 1532 }
bogdanm 0:9b334a45a8ff 1533 else
bogdanm 0:9b334a45a8ff 1534 {
bogdanm 0:9b334a45a8ff 1535 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1536 }
bogdanm 0:9b334a45a8ff 1537 }
bogdanm 0:9b334a45a8ff 1538 /**
bogdanm 0:9b334a45a8ff 1539 * @brief Write an amount of data in blocking mode to a specific memory address
bogdanm 0:9b334a45a8ff 1540 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1541 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1542 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1543 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1544 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1545 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1546 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1547 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 1548 * @retval HAL status
bogdanm 0:9b334a45a8ff 1549 */
bogdanm 0:9b334a45a8ff 1550 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1551 {
bogdanm 0:9b334a45a8ff 1552 uint32_t Sizetmp = 0;
bogdanm 0:9b334a45a8ff 1553
bogdanm 0:9b334a45a8ff 1554 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1555 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1556
bogdanm 0:9b334a45a8ff 1557 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1558 {
bogdanm 0:9b334a45a8ff 1559 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1560 {
bogdanm 0:9b334a45a8ff 1561 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1562 }
bogdanm 0:9b334a45a8ff 1563
bogdanm 0:9b334a45a8ff 1564 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 1565 {
bogdanm 0:9b334a45a8ff 1566 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1567 }
bogdanm 0:9b334a45a8ff 1568
bogdanm 0:9b334a45a8ff 1569 /* Process Locked */
bogdanm 0:9b334a45a8ff 1570 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1571
bogdanm 0:9b334a45a8ff 1572 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm 0:9b334a45a8ff 1573 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1574
bogdanm 0:9b334a45a8ff 1575 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1576 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1577 {
bogdanm 0:9b334a45a8ff 1578 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1579 {
bogdanm 0:9b334a45a8ff 1580 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1581 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1582 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1583 }
bogdanm 0:9b334a45a8ff 1584 else
bogdanm 0:9b334a45a8ff 1585 {
bogdanm 0:9b334a45a8ff 1586 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1587 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1588 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1589 }
bogdanm 0:9b334a45a8ff 1590 }
bogdanm 0:9b334a45a8ff 1591
bogdanm 0:9b334a45a8ff 1592 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 1593 /* Size > 255, need to set RELOAD bit */
bogdanm 0:9b334a45a8ff 1594 if(Size > 255)
bogdanm 0:9b334a45a8ff 1595 {
bogdanm 0:9b334a45a8ff 1596 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1597 Sizetmp = 255;
bogdanm 0:9b334a45a8ff 1598 }
bogdanm 0:9b334a45a8ff 1599 else
bogdanm 0:9b334a45a8ff 1600 {
bogdanm 0:9b334a45a8ff 1601 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1602 Sizetmp = Size;
bogdanm 0:9b334a45a8ff 1603 }
bogdanm 0:9b334a45a8ff 1604
bogdanm 0:9b334a45a8ff 1605 do
bogdanm 0:9b334a45a8ff 1606 {
bogdanm 0:9b334a45a8ff 1607 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 1608 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1609 {
bogdanm 0:9b334a45a8ff 1610 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1611 {
bogdanm 0:9b334a45a8ff 1612 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1613 }
bogdanm 0:9b334a45a8ff 1614 else
bogdanm 0:9b334a45a8ff 1615 {
bogdanm 0:9b334a45a8ff 1616 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1617 }
bogdanm 0:9b334a45a8ff 1618 }
bogdanm 0:9b334a45a8ff 1619
bogdanm 0:9b334a45a8ff 1620 /* Write data to DR */
bogdanm 0:9b334a45a8ff 1621 hi2c->Instance->TXDR = (*pData++);
bogdanm 0:9b334a45a8ff 1622 Sizetmp--;
bogdanm 0:9b334a45a8ff 1623 Size--;
bogdanm 0:9b334a45a8ff 1624
bogdanm 0:9b334a45a8ff 1625 if((Sizetmp == 0)&&(Size!=0))
bogdanm 0:9b334a45a8ff 1626 {
bogdanm 0:9b334a45a8ff 1627 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 1628 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1629 {
bogdanm 0:9b334a45a8ff 1630 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1631 }
bogdanm 0:9b334a45a8ff 1632
bogdanm 0:9b334a45a8ff 1633
bogdanm 0:9b334a45a8ff 1634 if(Size > 255)
bogdanm 0:9b334a45a8ff 1635 {
bogdanm 0:9b334a45a8ff 1636 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1637 Sizetmp = 255;
bogdanm 0:9b334a45a8ff 1638 }
bogdanm 0:9b334a45a8ff 1639 else
bogdanm 0:9b334a45a8ff 1640 {
bogdanm 0:9b334a45a8ff 1641 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1642 Sizetmp = Size;
bogdanm 0:9b334a45a8ff 1643 }
bogdanm 0:9b334a45a8ff 1644 }
bogdanm 0:9b334a45a8ff 1645
bogdanm 0:9b334a45a8ff 1646 }while(Size > 0);
bogdanm 0:9b334a45a8ff 1647
bogdanm 0:9b334a45a8ff 1648 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 1649 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 1650 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 1651 {
bogdanm 0:9b334a45a8ff 1652 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1653 {
bogdanm 0:9b334a45a8ff 1654 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1655 }
bogdanm 0:9b334a45a8ff 1656 else
bogdanm 0:9b334a45a8ff 1657 {
bogdanm 0:9b334a45a8ff 1658 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1659 }
bogdanm 0:9b334a45a8ff 1660 }
bogdanm 0:9b334a45a8ff 1661
bogdanm 0:9b334a45a8ff 1662 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 1663 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 1664
bogdanm 0:9b334a45a8ff 1665 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 1666 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 1667
bogdanm 0:9b334a45a8ff 1668 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 1669
bogdanm 0:9b334a45a8ff 1670 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1671 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1672
bogdanm 0:9b334a45a8ff 1673 return HAL_OK;
bogdanm 0:9b334a45a8ff 1674 }
bogdanm 0:9b334a45a8ff 1675 else
bogdanm 0:9b334a45a8ff 1676 {
bogdanm 0:9b334a45a8ff 1677 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1678 }
bogdanm 0:9b334a45a8ff 1679 }
bogdanm 0:9b334a45a8ff 1680
bogdanm 0:9b334a45a8ff 1681 /**
bogdanm 0:9b334a45a8ff 1682 * @brief Read an amount of data in blocking mode from a specific memory address
bogdanm 0:9b334a45a8ff 1683 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1684 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1685 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1686 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1687 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1688 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1689 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1690 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 1691 * @retval HAL status
bogdanm 0:9b334a45a8ff 1692 */
bogdanm 0:9b334a45a8ff 1693 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1694 {
bogdanm 0:9b334a45a8ff 1695 uint32_t Sizetmp = 0;
bogdanm 0:9b334a45a8ff 1696
bogdanm 0:9b334a45a8ff 1697 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1698 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1699
bogdanm 0:9b334a45a8ff 1700 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1701 {
bogdanm 0:9b334a45a8ff 1702 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1703 {
bogdanm 0:9b334a45a8ff 1704 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1705 }
bogdanm 0:9b334a45a8ff 1706
bogdanm 0:9b334a45a8ff 1707 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 1708 {
bogdanm 0:9b334a45a8ff 1709 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1710 }
bogdanm 0:9b334a45a8ff 1711
bogdanm 0:9b334a45a8ff 1712 /* Process Locked */
bogdanm 0:9b334a45a8ff 1713 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1714
bogdanm 0:9b334a45a8ff 1715 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm 0:9b334a45a8ff 1716 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1717
bogdanm 0:9b334a45a8ff 1718 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1719 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1720 {
bogdanm 0:9b334a45a8ff 1721 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1722 {
bogdanm 0:9b334a45a8ff 1723 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1724 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1725 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1726 }
bogdanm 0:9b334a45a8ff 1727 else
bogdanm 0:9b334a45a8ff 1728 {
bogdanm 0:9b334a45a8ff 1729 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1730 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1731 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1732 }
bogdanm 0:9b334a45a8ff 1733 }
bogdanm 0:9b334a45a8ff 1734
bogdanm 0:9b334a45a8ff 1735 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1736 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 1737 /* Size > 255, need to set RELOAD bit */
bogdanm 0:9b334a45a8ff 1738 if(Size > 255)
bogdanm 0:9b334a45a8ff 1739 {
bogdanm 0:9b334a45a8ff 1740 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1741 Sizetmp = 255;
bogdanm 0:9b334a45a8ff 1742 }
bogdanm 0:9b334a45a8ff 1743 else
bogdanm 0:9b334a45a8ff 1744 {
bogdanm 0:9b334a45a8ff 1745 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1746 Sizetmp = Size;
bogdanm 0:9b334a45a8ff 1747 }
bogdanm 0:9b334a45a8ff 1748
bogdanm 0:9b334a45a8ff 1749 do
bogdanm 0:9b334a45a8ff 1750 {
bogdanm 0:9b334a45a8ff 1751 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 1752 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1753 {
bogdanm 0:9b334a45a8ff 1754 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1755 }
bogdanm 0:9b334a45a8ff 1756
bogdanm 0:9b334a45a8ff 1757 /* Read data from RXDR */
bogdanm 0:9b334a45a8ff 1758 (*pData++) = hi2c->Instance->RXDR;
bogdanm 0:9b334a45a8ff 1759
bogdanm 0:9b334a45a8ff 1760 /* Decrement the Size counter */
bogdanm 0:9b334a45a8ff 1761 Sizetmp--;
bogdanm 0:9b334a45a8ff 1762 Size--;
bogdanm 0:9b334a45a8ff 1763
bogdanm 0:9b334a45a8ff 1764 if((Sizetmp == 0)&&(Size!=0))
bogdanm 0:9b334a45a8ff 1765 {
bogdanm 0:9b334a45a8ff 1766 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 1767 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1768 {
bogdanm 0:9b334a45a8ff 1769 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1770 }
bogdanm 0:9b334a45a8ff 1771
bogdanm 0:9b334a45a8ff 1772 if(Size > 255)
bogdanm 0:9b334a45a8ff 1773 {
bogdanm 0:9b334a45a8ff 1774 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1775 Sizetmp = 255;
bogdanm 0:9b334a45a8ff 1776 }
bogdanm 0:9b334a45a8ff 1777 else
bogdanm 0:9b334a45a8ff 1778 {
bogdanm 0:9b334a45a8ff 1779 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1780 Sizetmp = Size;
bogdanm 0:9b334a45a8ff 1781 }
bogdanm 0:9b334a45a8ff 1782 }
bogdanm 0:9b334a45a8ff 1783
bogdanm 0:9b334a45a8ff 1784 }while(Size > 0);
bogdanm 0:9b334a45a8ff 1785
bogdanm 0:9b334a45a8ff 1786 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 1787 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 1788 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 1789 {
bogdanm 0:9b334a45a8ff 1790 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1791 {
bogdanm 0:9b334a45a8ff 1792 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1793 }
bogdanm 0:9b334a45a8ff 1794 else
bogdanm 0:9b334a45a8ff 1795 {
bogdanm 0:9b334a45a8ff 1796 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1797 }
bogdanm 0:9b334a45a8ff 1798 }
bogdanm 0:9b334a45a8ff 1799
bogdanm 0:9b334a45a8ff 1800 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 1801 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 1802
bogdanm 0:9b334a45a8ff 1803 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 1804 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 1805
bogdanm 0:9b334a45a8ff 1806 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 1807
bogdanm 0:9b334a45a8ff 1808 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1809 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1810
bogdanm 0:9b334a45a8ff 1811 return HAL_OK;
bogdanm 0:9b334a45a8ff 1812 }
bogdanm 0:9b334a45a8ff 1813 else
bogdanm 0:9b334a45a8ff 1814 {
bogdanm 0:9b334a45a8ff 1815 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1816 }
bogdanm 0:9b334a45a8ff 1817 }
bogdanm 0:9b334a45a8ff 1818 /**
bogdanm 0:9b334a45a8ff 1819 * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
bogdanm 0:9b334a45a8ff 1820 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1821 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1822 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1823 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1824 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1825 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1826 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1827 * @retval HAL status
bogdanm 0:9b334a45a8ff 1828 */
bogdanm 0:9b334a45a8ff 1829 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1830 {
bogdanm 0:9b334a45a8ff 1831 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1832 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1833
bogdanm 0:9b334a45a8ff 1834 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1835 {
bogdanm 0:9b334a45a8ff 1836 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1837 {
bogdanm 0:9b334a45a8ff 1838 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1839 }
bogdanm 0:9b334a45a8ff 1840
bogdanm 0:9b334a45a8ff 1841 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 1842 {
bogdanm 0:9b334a45a8ff 1843 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1844 }
bogdanm 0:9b334a45a8ff 1845
bogdanm 0:9b334a45a8ff 1846 /* Process Locked */
bogdanm 0:9b334a45a8ff 1847 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1848
bogdanm 0:9b334a45a8ff 1849 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm 0:9b334a45a8ff 1850 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1851
bogdanm 0:9b334a45a8ff 1852 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1853 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1854 if(Size > 255)
bogdanm 0:9b334a45a8ff 1855 {
bogdanm 0:9b334a45a8ff 1856 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 1857 }
bogdanm 0:9b334a45a8ff 1858 else
bogdanm 0:9b334a45a8ff 1859 {
bogdanm 0:9b334a45a8ff 1860 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1861 }
bogdanm 0:9b334a45a8ff 1862
bogdanm 0:9b334a45a8ff 1863 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1864 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1865 {
bogdanm 0:9b334a45a8ff 1866 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1867 {
bogdanm 0:9b334a45a8ff 1868 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1869 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1870 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1871 }
bogdanm 0:9b334a45a8ff 1872 else
bogdanm 0:9b334a45a8ff 1873 {
bogdanm 0:9b334a45a8ff 1874 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1875 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1876 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1877 }
bogdanm 0:9b334a45a8ff 1878 }
bogdanm 0:9b334a45a8ff 1879
bogdanm 0:9b334a45a8ff 1880 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 1881 /* Size > 255, need to set RELOAD bit */
bogdanm 0:9b334a45a8ff 1882 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 1883 {
bogdanm 0:9b334a45a8ff 1884 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1885 }
bogdanm 0:9b334a45a8ff 1886 else
bogdanm 0:9b334a45a8ff 1887 {
bogdanm 0:9b334a45a8ff 1888 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 1889 }
bogdanm 0:9b334a45a8ff 1890
bogdanm 0:9b334a45a8ff 1891 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1892 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1893
bogdanm 0:9b334a45a8ff 1894 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1895 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1896 process unlock */
bogdanm 0:9b334a45a8ff 1897
bogdanm 0:9b334a45a8ff 1898 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm 0:9b334a45a8ff 1899 /* possible to enable all of these */
bogdanm 0:9b334a45a8ff 1900 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
bogdanm 0:9b334a45a8ff 1901 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI );
bogdanm 0:9b334a45a8ff 1902
bogdanm 0:9b334a45a8ff 1903 return HAL_OK;
bogdanm 0:9b334a45a8ff 1904 }
bogdanm 0:9b334a45a8ff 1905 else
bogdanm 0:9b334a45a8ff 1906 {
bogdanm 0:9b334a45a8ff 1907 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1908 }
bogdanm 0:9b334a45a8ff 1909 }
bogdanm 0:9b334a45a8ff 1910
bogdanm 0:9b334a45a8ff 1911 /**
bogdanm 0:9b334a45a8ff 1912 * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
bogdanm 0:9b334a45a8ff 1913 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1914 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 1915 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1916 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1917 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1918 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1919 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1920 * @retval HAL status
bogdanm 0:9b334a45a8ff 1921 */
bogdanm 0:9b334a45a8ff 1922 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1923 {
bogdanm 0:9b334a45a8ff 1924 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1925 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1926
bogdanm 0:9b334a45a8ff 1927 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1928 {
bogdanm 0:9b334a45a8ff 1929 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1930 {
bogdanm 0:9b334a45a8ff 1931 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1932 }
bogdanm 0:9b334a45a8ff 1933
bogdanm 0:9b334a45a8ff 1934 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 1935 {
bogdanm 0:9b334a45a8ff 1936 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1937 }
bogdanm 0:9b334a45a8ff 1938
bogdanm 0:9b334a45a8ff 1939 /* Process Locked */
bogdanm 0:9b334a45a8ff 1940 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1941
bogdanm 0:9b334a45a8ff 1942 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm 0:9b334a45a8ff 1943
bogdanm 0:9b334a45a8ff 1944 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1945 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1946 if(Size > 255)
bogdanm 0:9b334a45a8ff 1947 {
bogdanm 0:9b334a45a8ff 1948 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 1949 }
bogdanm 0:9b334a45a8ff 1950 else
bogdanm 0:9b334a45a8ff 1951 {
bogdanm 0:9b334a45a8ff 1952 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1953 }
bogdanm 0:9b334a45a8ff 1954
bogdanm 0:9b334a45a8ff 1955 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1956 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1957 {
bogdanm 0:9b334a45a8ff 1958 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1959 {
bogdanm 0:9b334a45a8ff 1960 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1961 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1962 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1963 }
bogdanm 0:9b334a45a8ff 1964 else
bogdanm 0:9b334a45a8ff 1965 {
bogdanm 0:9b334a45a8ff 1966 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1967 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1968 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1969 }
bogdanm 0:9b334a45a8ff 1970 }
bogdanm 0:9b334a45a8ff 1971
bogdanm 0:9b334a45a8ff 1972 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 1973 /* Size > 255, need to set RELOAD bit */
bogdanm 0:9b334a45a8ff 1974 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 1975 {
bogdanm 0:9b334a45a8ff 1976 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1977 }
bogdanm 0:9b334a45a8ff 1978 else
bogdanm 0:9b334a45a8ff 1979 {
bogdanm 0:9b334a45a8ff 1980 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 1981 }
bogdanm 0:9b334a45a8ff 1982
bogdanm 0:9b334a45a8ff 1983 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1984 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1985
bogdanm 0:9b334a45a8ff 1986 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1987 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1988 process unlock */
bogdanm 0:9b334a45a8ff 1989
bogdanm 0:9b334a45a8ff 1990 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
bogdanm 0:9b334a45a8ff 1991 /* possible to enable all of these */
bogdanm 0:9b334a45a8ff 1992 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
bogdanm 0:9b334a45a8ff 1993 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI );
bogdanm 0:9b334a45a8ff 1994
bogdanm 0:9b334a45a8ff 1995 return HAL_OK;
bogdanm 0:9b334a45a8ff 1996 }
bogdanm 0:9b334a45a8ff 1997 else
bogdanm 0:9b334a45a8ff 1998 {
bogdanm 0:9b334a45a8ff 1999 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2000 }
bogdanm 0:9b334a45a8ff 2001 }
bogdanm 0:9b334a45a8ff 2002 /**
bogdanm 0:9b334a45a8ff 2003 * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
bogdanm 0:9b334a45a8ff 2004 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2005 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2006 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2007 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 2008 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 2009 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 2010 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 2011 * @retval HAL status
bogdanm 0:9b334a45a8ff 2012 */
bogdanm 0:9b334a45a8ff 2013 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 2014 {
bogdanm 0:9b334a45a8ff 2015 /* Check the parameters */
bogdanm 0:9b334a45a8ff 2016 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 2017
bogdanm 0:9b334a45a8ff 2018 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 2019 {
bogdanm 0:9b334a45a8ff 2020 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 2021 {
bogdanm 0:9b334a45a8ff 2022 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2023 }
bogdanm 0:9b334a45a8ff 2024
bogdanm 0:9b334a45a8ff 2025 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 2026 {
bogdanm 0:9b334a45a8ff 2027 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2028 }
bogdanm 0:9b334a45a8ff 2029
bogdanm 0:9b334a45a8ff 2030 /* Process Locked */
bogdanm 0:9b334a45a8ff 2031 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2032
bogdanm 0:9b334a45a8ff 2033 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm 0:9b334a45a8ff 2034 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 2035
bogdanm 0:9b334a45a8ff 2036 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 2037 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 2038 if(Size > 255)
bogdanm 0:9b334a45a8ff 2039 {
bogdanm 0:9b334a45a8ff 2040 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 2041 }
bogdanm 0:9b334a45a8ff 2042 else
bogdanm 0:9b334a45a8ff 2043 {
bogdanm 0:9b334a45a8ff 2044 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 2045 }
bogdanm 0:9b334a45a8ff 2046
bogdanm 0:9b334a45a8ff 2047 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 2048 hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
bogdanm 0:9b334a45a8ff 2049
bogdanm 0:9b334a45a8ff 2050 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 2051 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 2052
bogdanm 0:9b334a45a8ff 2053 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 2054 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 2055
bogdanm 0:9b334a45a8ff 2056 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 2057 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2058 {
bogdanm 0:9b334a45a8ff 2059 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2060 {
bogdanm 0:9b334a45a8ff 2061 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2062 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2063 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2064 }
bogdanm 0:9b334a45a8ff 2065 else
bogdanm 0:9b334a45a8ff 2066 {
bogdanm 0:9b334a45a8ff 2067 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2068 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2069 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2070 }
bogdanm 0:9b334a45a8ff 2071 }
bogdanm 0:9b334a45a8ff 2072
bogdanm 0:9b334a45a8ff 2073 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 2074 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 2075 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 2076 {
bogdanm 0:9b334a45a8ff 2077 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 2078 }
bogdanm 0:9b334a45a8ff 2079 else
bogdanm 0:9b334a45a8ff 2080 {
bogdanm 0:9b334a45a8ff 2081 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 2082 }
bogdanm 0:9b334a45a8ff 2083
bogdanm 0:9b334a45a8ff 2084 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 2085 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm 0:9b334a45a8ff 2086 {
bogdanm 0:9b334a45a8ff 2087 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2088 {
bogdanm 0:9b334a45a8ff 2089 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2090 }
bogdanm 0:9b334a45a8ff 2091 else
bogdanm 0:9b334a45a8ff 2092 {
bogdanm 0:9b334a45a8ff 2093 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2094 }
bogdanm 0:9b334a45a8ff 2095 }
bogdanm 0:9b334a45a8ff 2096
bogdanm 0:9b334a45a8ff 2097 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 2098 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 2099
bogdanm 0:9b334a45a8ff 2100 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2101 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2102
bogdanm 0:9b334a45a8ff 2103 return HAL_OK;
bogdanm 0:9b334a45a8ff 2104 }
bogdanm 0:9b334a45a8ff 2105 else
bogdanm 0:9b334a45a8ff 2106 {
bogdanm 0:9b334a45a8ff 2107 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2108 }
bogdanm 0:9b334a45a8ff 2109 }
bogdanm 0:9b334a45a8ff 2110
bogdanm 0:9b334a45a8ff 2111 /**
bogdanm 0:9b334a45a8ff 2112 * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
bogdanm 0:9b334a45a8ff 2113 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2114 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2115 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2116 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 2117 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 2118 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 2119 * @param Size: Amount of data to be read
bogdanm 0:9b334a45a8ff 2120 * @retval HAL status
bogdanm 0:9b334a45a8ff 2121 */
bogdanm 0:9b334a45a8ff 2122 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 2123 {
bogdanm 0:9b334a45a8ff 2124 /* Check the parameters */
bogdanm 0:9b334a45a8ff 2125 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 2126
bogdanm 0:9b334a45a8ff 2127 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 2128 {
bogdanm 0:9b334a45a8ff 2129 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 2130 {
bogdanm 0:9b334a45a8ff 2131 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2132 }
bogdanm 0:9b334a45a8ff 2133
bogdanm 0:9b334a45a8ff 2134 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 2135 {
bogdanm 0:9b334a45a8ff 2136 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2137 }
bogdanm 0:9b334a45a8ff 2138
bogdanm 0:9b334a45a8ff 2139 /* Process Locked */
bogdanm 0:9b334a45a8ff 2140 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2141
bogdanm 0:9b334a45a8ff 2142 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm 0:9b334a45a8ff 2143
bogdanm 0:9b334a45a8ff 2144 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 2145 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 2146 if(Size > 255)
bogdanm 0:9b334a45a8ff 2147 {
bogdanm 0:9b334a45a8ff 2148 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 2149 }
bogdanm 0:9b334a45a8ff 2150 else
bogdanm 0:9b334a45a8ff 2151 {
bogdanm 0:9b334a45a8ff 2152 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 2153 }
bogdanm 0:9b334a45a8ff 2154
bogdanm 0:9b334a45a8ff 2155 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 2156 hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
bogdanm 0:9b334a45a8ff 2157
bogdanm 0:9b334a45a8ff 2158 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 2159 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 2160
bogdanm 0:9b334a45a8ff 2161 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 2162 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 2163
bogdanm 0:9b334a45a8ff 2164 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 2165 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2166 {
bogdanm 0:9b334a45a8ff 2167 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2168 {
bogdanm 0:9b334a45a8ff 2169 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2170 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2171 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2172 }
bogdanm 0:9b334a45a8ff 2173 else
bogdanm 0:9b334a45a8ff 2174 {
bogdanm 0:9b334a45a8ff 2175 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2176 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2177 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2178 }
bogdanm 0:9b334a45a8ff 2179 }
bogdanm 0:9b334a45a8ff 2180
bogdanm 0:9b334a45a8ff 2181 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
bogdanm 0:9b334a45a8ff 2182 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 2183 {
bogdanm 0:9b334a45a8ff 2184 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 2185 }
bogdanm 0:9b334a45a8ff 2186 else
bogdanm 0:9b334a45a8ff 2187 {
bogdanm 0:9b334a45a8ff 2188 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
bogdanm 0:9b334a45a8ff 2189 }
bogdanm 0:9b334a45a8ff 2190
bogdanm 0:9b334a45a8ff 2191 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 2192 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm 0:9b334a45a8ff 2193 {
bogdanm 0:9b334a45a8ff 2194 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2195 }
bogdanm 0:9b334a45a8ff 2196
bogdanm 0:9b334a45a8ff 2197 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 2198 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 2199
bogdanm 0:9b334a45a8ff 2200 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2201 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2202
bogdanm 0:9b334a45a8ff 2203 return HAL_OK;
bogdanm 0:9b334a45a8ff 2204 }
bogdanm 0:9b334a45a8ff 2205 else
bogdanm 0:9b334a45a8ff 2206 {
bogdanm 0:9b334a45a8ff 2207 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2208 }
bogdanm 0:9b334a45a8ff 2209 }
bogdanm 0:9b334a45a8ff 2210
bogdanm 0:9b334a45a8ff 2211 /**
bogdanm 0:9b334a45a8ff 2212 * @brief Checks if target device is ready for communication.
bogdanm 0:9b334a45a8ff 2213 * @note This function is used with Memory devices
bogdanm 0:9b334a45a8ff 2214 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2215 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2216 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2217 * @param Trials: Number of trials
bogdanm 0:9b334a45a8ff 2218 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 2219 * @retval HAL status
bogdanm 0:9b334a45a8ff 2220 */
bogdanm 0:9b334a45a8ff 2221 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 2222 {
bogdanm 0:9b334a45a8ff 2223 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 2224
bogdanm 0:9b334a45a8ff 2225 __IO uint32_t I2C_Trials = 0;
bogdanm 0:9b334a45a8ff 2226
bogdanm 0:9b334a45a8ff 2227 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 2228 {
bogdanm 0:9b334a45a8ff 2229 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
bogdanm 0:9b334a45a8ff 2230 {
bogdanm 0:9b334a45a8ff 2231 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2232 }
bogdanm 0:9b334a45a8ff 2233
bogdanm 0:9b334a45a8ff 2234 /* Process Locked */
bogdanm 0:9b334a45a8ff 2235 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2236
bogdanm 0:9b334a45a8ff 2237 hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm 0:9b334a45a8ff 2238 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 2239
bogdanm 0:9b334a45a8ff 2240 do
bogdanm 0:9b334a45a8ff 2241 {
bogdanm 0:9b334a45a8ff 2242 /* Generate Start */
bogdanm 0:9b334a45a8ff 2243 hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode,DevAddress);
bogdanm 0:9b334a45a8ff 2244
bogdanm 0:9b334a45a8ff 2245 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 2246 /* Wait until STOPF flag is set or a NACK flag is set*/
bogdanm 0:9b334a45a8ff 2247 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 2248 while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT))
bogdanm 0:9b334a45a8ff 2249 {
bogdanm 0:9b334a45a8ff 2250 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 2251 {
bogdanm 0:9b334a45a8ff 2252 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 2253 {
bogdanm 0:9b334a45a8ff 2254 /* Device is ready */
bogdanm 0:9b334a45a8ff 2255 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2256 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2257 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2258 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2259 }
bogdanm 0:9b334a45a8ff 2260 }
bogdanm 0:9b334a45a8ff 2261 }
bogdanm 0:9b334a45a8ff 2262
bogdanm 0:9b334a45a8ff 2263 /* Check if the NACKF flag has not been set */
bogdanm 0:9b334a45a8ff 2264 if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)
bogdanm 0:9b334a45a8ff 2265 {
bogdanm 0:9b334a45a8ff 2266 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 2267 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2268 {
bogdanm 0:9b334a45a8ff 2269 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2270 }
bogdanm 0:9b334a45a8ff 2271
bogdanm 0:9b334a45a8ff 2272 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 2273 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2274
bogdanm 0:9b334a45a8ff 2275 /* Device is ready */
bogdanm 0:9b334a45a8ff 2276 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2277
bogdanm 0:9b334a45a8ff 2278 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2279 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2280
bogdanm 0:9b334a45a8ff 2281 return HAL_OK;
bogdanm 0:9b334a45a8ff 2282 }
bogdanm 0:9b334a45a8ff 2283 else
bogdanm 0:9b334a45a8ff 2284 {
bogdanm 0:9b334a45a8ff 2285 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 2286 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2287 {
bogdanm 0:9b334a45a8ff 2288 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2289 }
bogdanm 0:9b334a45a8ff 2290
bogdanm 0:9b334a45a8ff 2291 /* Clear NACK Flag */
bogdanm 0:9b334a45a8ff 2292 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2293
bogdanm 0:9b334a45a8ff 2294 /* Clear STOP Flag, auto generated with autoend*/
bogdanm 0:9b334a45a8ff 2295 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2296 }
bogdanm 0:9b334a45a8ff 2297
bogdanm 0:9b334a45a8ff 2298 /* Check if the maximum allowed number of trials has been reached */
bogdanm 0:9b334a45a8ff 2299 if (I2C_Trials++ == Trials)
bogdanm 0:9b334a45a8ff 2300 {
bogdanm 0:9b334a45a8ff 2301 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2302 hi2c->Instance->CR2 |= I2C_CR2_STOP;
bogdanm 0:9b334a45a8ff 2303
bogdanm 0:9b334a45a8ff 2304 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 2305 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2306 {
bogdanm 0:9b334a45a8ff 2307 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2308 }
bogdanm 0:9b334a45a8ff 2309
bogdanm 0:9b334a45a8ff 2310 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 2311 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2312 }
bogdanm 0:9b334a45a8ff 2313 }while(I2C_Trials < Trials);
bogdanm 0:9b334a45a8ff 2314
bogdanm 0:9b334a45a8ff 2315 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2316
bogdanm 0:9b334a45a8ff 2317 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2318 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2319
bogdanm 0:9b334a45a8ff 2320 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2321 }
bogdanm 0:9b334a45a8ff 2322 else
bogdanm 0:9b334a45a8ff 2323 {
bogdanm 0:9b334a45a8ff 2324 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2325 }
bogdanm 0:9b334a45a8ff 2326 }
bogdanm 0:9b334a45a8ff 2327 /**
bogdanm 0:9b334a45a8ff 2328 * @}
bogdanm 0:9b334a45a8ff 2329 */
bogdanm 0:9b334a45a8ff 2330
bogdanm 0:9b334a45a8ff 2331 /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
bogdanm 0:9b334a45a8ff 2332 * @{
bogdanm 0:9b334a45a8ff 2333 */
bogdanm 0:9b334a45a8ff 2334
bogdanm 0:9b334a45a8ff 2335 /**
bogdanm 0:9b334a45a8ff 2336 * @brief This function handles I2C event interrupt request.
bogdanm 0:9b334a45a8ff 2337 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2338 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2339 * @retval None
bogdanm 0:9b334a45a8ff 2340 */
bogdanm 0:9b334a45a8ff 2341 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2342 {
bogdanm 0:9b334a45a8ff 2343 /* I2C in mode Transmitter ---------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2344 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI | I2C_IT_ADDRI)) == SET))
bogdanm 0:9b334a45a8ff 2345 {
bogdanm 0:9b334a45a8ff 2346 /* Slave mode selected */
bogdanm 0:9b334a45a8ff 2347 if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX)
bogdanm 0:9b334a45a8ff 2348 {
bogdanm 0:9b334a45a8ff 2349 I2C_SlaveTransmit_ISR(hi2c);
bogdanm 0:9b334a45a8ff 2350 }
bogdanm 0:9b334a45a8ff 2351 }
bogdanm 0:9b334a45a8ff 2352
bogdanm 0:9b334a45a8ff 2353 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI)) == SET))
bogdanm 0:9b334a45a8ff 2354 {
bogdanm 0:9b334a45a8ff 2355 /* Master mode selected */
bogdanm 0:9b334a45a8ff 2356 if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX))
bogdanm 0:9b334a45a8ff 2357 {
bogdanm 0:9b334a45a8ff 2358 I2C_MasterTransmit_ISR(hi2c);
bogdanm 0:9b334a45a8ff 2359 }
bogdanm 0:9b334a45a8ff 2360 }
bogdanm 0:9b334a45a8ff 2361
bogdanm 0:9b334a45a8ff 2362 /* I2C in mode Receiver ----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2363 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI | I2C_IT_ADDRI)) == SET))
bogdanm 0:9b334a45a8ff 2364 {
bogdanm 0:9b334a45a8ff 2365 /* Slave mode selected */
bogdanm 0:9b334a45a8ff 2366 if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX)
bogdanm 0:9b334a45a8ff 2367 {
bogdanm 0:9b334a45a8ff 2368 I2C_SlaveReceive_ISR(hi2c);
bogdanm 0:9b334a45a8ff 2369 }
bogdanm 0:9b334a45a8ff 2370 }
bogdanm 0:9b334a45a8ff 2371 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI)) == SET))
bogdanm 0:9b334a45a8ff 2372 {
bogdanm 0:9b334a45a8ff 2373 /* Master mode selected */
bogdanm 0:9b334a45a8ff 2374 if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX))
bogdanm 0:9b334a45a8ff 2375 {
bogdanm 0:9b334a45a8ff 2376 I2C_MasterReceive_ISR(hi2c);
bogdanm 0:9b334a45a8ff 2377 }
bogdanm 0:9b334a45a8ff 2378 }
bogdanm 0:9b334a45a8ff 2379 }
bogdanm 0:9b334a45a8ff 2380
bogdanm 0:9b334a45a8ff 2381 /**
bogdanm 0:9b334a45a8ff 2382 * @brief This function handles I2C error interrupt request.
bogdanm 0:9b334a45a8ff 2383 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2384 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2385 * @retval None
bogdanm 0:9b334a45a8ff 2386 */
bogdanm 0:9b334a45a8ff 2387 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2388 {
bogdanm 0:9b334a45a8ff 2389 /* I2C Bus error interrupt occurred ------------------------------------*/
bogdanm 0:9b334a45a8ff 2390 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm 0:9b334a45a8ff 2391 {
bogdanm 0:9b334a45a8ff 2392 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
bogdanm 0:9b334a45a8ff 2393
bogdanm 0:9b334a45a8ff 2394 /* Clear BERR flag */
bogdanm 0:9b334a45a8ff 2395 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
bogdanm 0:9b334a45a8ff 2396 }
bogdanm 0:9b334a45a8ff 2397
bogdanm 0:9b334a45a8ff 2398 /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
bogdanm 0:9b334a45a8ff 2399 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm 0:9b334a45a8ff 2400 {
bogdanm 0:9b334a45a8ff 2401 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
bogdanm 0:9b334a45a8ff 2402
bogdanm 0:9b334a45a8ff 2403 /* Clear OVR flag */
bogdanm 0:9b334a45a8ff 2404 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
bogdanm 0:9b334a45a8ff 2405 }
bogdanm 0:9b334a45a8ff 2406
bogdanm 0:9b334a45a8ff 2407 /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
bogdanm 0:9b334a45a8ff 2408 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
bogdanm 0:9b334a45a8ff 2409 {
bogdanm 0:9b334a45a8ff 2410 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
bogdanm 0:9b334a45a8ff 2411
bogdanm 0:9b334a45a8ff 2412 /* Clear ARLO flag */
bogdanm 0:9b334a45a8ff 2413 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
bogdanm 0:9b334a45a8ff 2414 }
bogdanm 0:9b334a45a8ff 2415
bogdanm 0:9b334a45a8ff 2416 /* Call the Error Callback in case of Error detected */
bogdanm 0:9b334a45a8ff 2417 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 2418 {
bogdanm 0:9b334a45a8ff 2419 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2420
bogdanm 0:9b334a45a8ff 2421 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2422 }
bogdanm 0:9b334a45a8ff 2423 }
bogdanm 0:9b334a45a8ff 2424
bogdanm 0:9b334a45a8ff 2425 /**
bogdanm 0:9b334a45a8ff 2426 * @brief Master Tx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2427 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2428 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2429 * @retval None
bogdanm 0:9b334a45a8ff 2430 */
bogdanm 0:9b334a45a8ff 2431 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2432 {
bogdanm 0:9b334a45a8ff 2433 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2434 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2435 */
bogdanm 0:9b334a45a8ff 2436 }
bogdanm 0:9b334a45a8ff 2437
bogdanm 0:9b334a45a8ff 2438 /**
bogdanm 0:9b334a45a8ff 2439 * @brief Master Rx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2440 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2441 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2442 * @retval None
bogdanm 0:9b334a45a8ff 2443 */
bogdanm 0:9b334a45a8ff 2444 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2445 {
bogdanm 0:9b334a45a8ff 2446 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2447 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2448 */
bogdanm 0:9b334a45a8ff 2449 }
bogdanm 0:9b334a45a8ff 2450
bogdanm 0:9b334a45a8ff 2451 /** @brief Slave Tx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2452 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2453 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2454 * @retval None
bogdanm 0:9b334a45a8ff 2455 */
bogdanm 0:9b334a45a8ff 2456 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2457 {
bogdanm 0:9b334a45a8ff 2458 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2459 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2460 */
bogdanm 0:9b334a45a8ff 2461 }
bogdanm 0:9b334a45a8ff 2462
bogdanm 0:9b334a45a8ff 2463 /**
bogdanm 0:9b334a45a8ff 2464 * @brief Slave Rx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2465 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2466 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2467 * @retval None
bogdanm 0:9b334a45a8ff 2468 */
bogdanm 0:9b334a45a8ff 2469 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2470 {
bogdanm 0:9b334a45a8ff 2471 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2472 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2473 */
bogdanm 0:9b334a45a8ff 2474 }
bogdanm 0:9b334a45a8ff 2475
bogdanm 0:9b334a45a8ff 2476 /**
bogdanm 0:9b334a45a8ff 2477 * @brief Memory Tx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2478 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2479 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2480 * @retval None
bogdanm 0:9b334a45a8ff 2481 */
bogdanm 0:9b334a45a8ff 2482 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2483 {
bogdanm 0:9b334a45a8ff 2484 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2485 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2486 */
bogdanm 0:9b334a45a8ff 2487 }
bogdanm 0:9b334a45a8ff 2488
bogdanm 0:9b334a45a8ff 2489 /**
bogdanm 0:9b334a45a8ff 2490 * @brief Memory Rx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2491 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2492 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2493 * @retval None
bogdanm 0:9b334a45a8ff 2494 */
bogdanm 0:9b334a45a8ff 2495 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2496 {
bogdanm 0:9b334a45a8ff 2497 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2498 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2499 */
bogdanm 0:9b334a45a8ff 2500 }
bogdanm 0:9b334a45a8ff 2501
bogdanm 0:9b334a45a8ff 2502 /**
bogdanm 0:9b334a45a8ff 2503 * @brief I2C error callbacks.
bogdanm 0:9b334a45a8ff 2504 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2505 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2506 * @retval None
bogdanm 0:9b334a45a8ff 2507 */
bogdanm 0:9b334a45a8ff 2508 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2509 {
bogdanm 0:9b334a45a8ff 2510 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2511 the HAL_I2C_ErrorCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2512 */
bogdanm 0:9b334a45a8ff 2513 }
bogdanm 0:9b334a45a8ff 2514
bogdanm 0:9b334a45a8ff 2515 /**
bogdanm 0:9b334a45a8ff 2516 * @}
bogdanm 0:9b334a45a8ff 2517 */
bogdanm 0:9b334a45a8ff 2518
bogdanm 0:9b334a45a8ff 2519
bogdanm 0:9b334a45a8ff 2520 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 2521 * @brief Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 2522 *
bogdanm 0:9b334a45a8ff 2523 @verbatim
bogdanm 0:9b334a45a8ff 2524 ===============================================================================
bogdanm 0:9b334a45a8ff 2525 ##### Peripheral State and Errors functions #####
bogdanm 0:9b334a45a8ff 2526 ===============================================================================
bogdanm 0:9b334a45a8ff 2527 [..]
bogdanm 0:9b334a45a8ff 2528 This subsection permits to get in run-time the status of the peripheral
bogdanm 0:9b334a45a8ff 2529 and the data flow.
bogdanm 0:9b334a45a8ff 2530
bogdanm 0:9b334a45a8ff 2531 @endverbatim
bogdanm 0:9b334a45a8ff 2532 * @{
bogdanm 0:9b334a45a8ff 2533 */
bogdanm 0:9b334a45a8ff 2534
bogdanm 0:9b334a45a8ff 2535 /**
bogdanm 0:9b334a45a8ff 2536 * @brief Return the I2C handle state.
bogdanm 0:9b334a45a8ff 2537 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2538 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2539 * @retval HAL state
bogdanm 0:9b334a45a8ff 2540 */
bogdanm 0:9b334a45a8ff 2541 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2542 {
bogdanm 0:9b334a45a8ff 2543 /* Return I2C handle state */
bogdanm 0:9b334a45a8ff 2544 return hi2c->State;
bogdanm 0:9b334a45a8ff 2545 }
bogdanm 0:9b334a45a8ff 2546
bogdanm 0:9b334a45a8ff 2547 /**
bogdanm 0:9b334a45a8ff 2548 * @brief Return the I2C error code.
bogdanm 0:9b334a45a8ff 2549 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2550 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2551 * @retval I2C Error Code
bogdanm 0:9b334a45a8ff 2552 */
bogdanm 0:9b334a45a8ff 2553 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2554 {
bogdanm 0:9b334a45a8ff 2555 return hi2c->ErrorCode;
bogdanm 0:9b334a45a8ff 2556 }
bogdanm 0:9b334a45a8ff 2557
bogdanm 0:9b334a45a8ff 2558 /**
bogdanm 0:9b334a45a8ff 2559 * @}
bogdanm 0:9b334a45a8ff 2560 */
bogdanm 0:9b334a45a8ff 2561
bogdanm 0:9b334a45a8ff 2562 /**
bogdanm 0:9b334a45a8ff 2563 * @}
bogdanm 0:9b334a45a8ff 2564 */
bogdanm 0:9b334a45a8ff 2565
bogdanm 0:9b334a45a8ff 2566 /** @addtogroup I2C_Private_Functions
bogdanm 0:9b334a45a8ff 2567 * @{
bogdanm 0:9b334a45a8ff 2568 */
bogdanm 0:9b334a45a8ff 2569
bogdanm 0:9b334a45a8ff 2570 /**
bogdanm 0:9b334a45a8ff 2571 * @brief Handle Interrupt Flags Master Transmit Mode
bogdanm 0:9b334a45a8ff 2572 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2573 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2574 * @retval HAL status
bogdanm 0:9b334a45a8ff 2575 */
bogdanm 0:9b334a45a8ff 2576 static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2577 {
bogdanm 0:9b334a45a8ff 2578 uint16_t DevAddress;
bogdanm 0:9b334a45a8ff 2579
bogdanm 0:9b334a45a8ff 2580 /* Process Locked */
bogdanm 0:9b334a45a8ff 2581 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2582
bogdanm 0:9b334a45a8ff 2583 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
bogdanm 0:9b334a45a8ff 2584 {
bogdanm 0:9b334a45a8ff 2585 /* Write data to TXDR */
bogdanm 0:9b334a45a8ff 2586 hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
bogdanm 0:9b334a45a8ff 2587 hi2c->XferSize--;
bogdanm 0:9b334a45a8ff 2588 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2589 }
bogdanm 0:9b334a45a8ff 2590 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
bogdanm 0:9b334a45a8ff 2591 {
bogdanm 0:9b334a45a8ff 2592 if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
bogdanm 0:9b334a45a8ff 2593 {
bogdanm 0:9b334a45a8ff 2594 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 2595
bogdanm 0:9b334a45a8ff 2596 if(hi2c->XferCount > 255)
bogdanm 0:9b334a45a8ff 2597 {
bogdanm 0:9b334a45a8ff 2598 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 2599 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 2600 }
bogdanm 0:9b334a45a8ff 2601 else
bogdanm 0:9b334a45a8ff 2602 {
bogdanm 0:9b334a45a8ff 2603 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 2604 hi2c->XferSize = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 2605 }
bogdanm 0:9b334a45a8ff 2606 }
bogdanm 0:9b334a45a8ff 2607 else
bogdanm 0:9b334a45a8ff 2608 {
bogdanm 0:9b334a45a8ff 2609 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2610 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2611
bogdanm 0:9b334a45a8ff 2612 /* Wrong size Status regarding TCR flag event */
bogdanm 0:9b334a45a8ff 2613 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
bogdanm 0:9b334a45a8ff 2614 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2615 }
bogdanm 0:9b334a45a8ff 2616 }
bogdanm 0:9b334a45a8ff 2617 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
bogdanm 0:9b334a45a8ff 2618 {
bogdanm 0:9b334a45a8ff 2619 if(hi2c->XferCount == 0)
bogdanm 0:9b334a45a8ff 2620 {
bogdanm 0:9b334a45a8ff 2621 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2622 hi2c->Instance->CR2 |= I2C_CR2_STOP;
bogdanm 0:9b334a45a8ff 2623 }
bogdanm 0:9b334a45a8ff 2624 else
bogdanm 0:9b334a45a8ff 2625 {
bogdanm 0:9b334a45a8ff 2626 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2627 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2628
bogdanm 0:9b334a45a8ff 2629 /* Wrong size Status regarding TCR flag event */
bogdanm 0:9b334a45a8ff 2630 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
bogdanm 0:9b334a45a8ff 2631 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2632 }
bogdanm 0:9b334a45a8ff 2633 }
bogdanm 0:9b334a45a8ff 2634 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm 0:9b334a45a8ff 2635 {
bogdanm 0:9b334a45a8ff 2636 /* Disable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm 0:9b334a45a8ff 2637 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI );
bogdanm 0:9b334a45a8ff 2638
bogdanm 0:9b334a45a8ff 2639 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 2640 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2641
bogdanm 0:9b334a45a8ff 2642 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 2643 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 2644
bogdanm 0:9b334a45a8ff 2645 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2646
bogdanm 0:9b334a45a8ff 2647 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2648 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2649
bogdanm 0:9b334a45a8ff 2650 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
bogdanm 0:9b334a45a8ff 2651 {
bogdanm 0:9b334a45a8ff 2652 HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2653 }
bogdanm 0:9b334a45a8ff 2654 else
bogdanm 0:9b334a45a8ff 2655 {
bogdanm 0:9b334a45a8ff 2656 HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2657 }
bogdanm 0:9b334a45a8ff 2658 }
bogdanm 0:9b334a45a8ff 2659 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm 0:9b334a45a8ff 2660 {
bogdanm 0:9b334a45a8ff 2661 /* Clear NACK Flag */
bogdanm 0:9b334a45a8ff 2662 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2663
bogdanm 0:9b334a45a8ff 2664 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2665 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2666
bogdanm 0:9b334a45a8ff 2667 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 2668 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2669 }
bogdanm 0:9b334a45a8ff 2670
bogdanm 0:9b334a45a8ff 2671 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2672 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2673
bogdanm 0:9b334a45a8ff 2674 return HAL_OK;
bogdanm 0:9b334a45a8ff 2675 }
bogdanm 0:9b334a45a8ff 2676
bogdanm 0:9b334a45a8ff 2677 /**
bogdanm 0:9b334a45a8ff 2678 * @brief Handle Interrupt Flags Master Receive Mode
bogdanm 0:9b334a45a8ff 2679 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2680 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2681 * @retval HAL status
bogdanm 0:9b334a45a8ff 2682 */
bogdanm 0:9b334a45a8ff 2683 static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2684 {
bogdanm 0:9b334a45a8ff 2685 uint16_t DevAddress;
bogdanm 0:9b334a45a8ff 2686
bogdanm 0:9b334a45a8ff 2687 /* Process Locked */
bogdanm 0:9b334a45a8ff 2688 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2689
bogdanm 0:9b334a45a8ff 2690 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
bogdanm 0:9b334a45a8ff 2691 {
bogdanm 0:9b334a45a8ff 2692 /* Read data from RXDR */
bogdanm 0:9b334a45a8ff 2693 (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
bogdanm 0:9b334a45a8ff 2694 hi2c->XferSize--;
bogdanm 0:9b334a45a8ff 2695 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2696 }
bogdanm 0:9b334a45a8ff 2697 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
bogdanm 0:9b334a45a8ff 2698 {
bogdanm 0:9b334a45a8ff 2699 if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
bogdanm 0:9b334a45a8ff 2700 {
bogdanm 0:9b334a45a8ff 2701 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 2702
bogdanm 0:9b334a45a8ff 2703 if(hi2c->XferCount > 255)
bogdanm 0:9b334a45a8ff 2704 {
bogdanm 0:9b334a45a8ff 2705 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 2706 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 2707 }
bogdanm 0:9b334a45a8ff 2708 else
bogdanm 0:9b334a45a8ff 2709 {
bogdanm 0:9b334a45a8ff 2710 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 2711 hi2c->XferSize = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 2712 }
bogdanm 0:9b334a45a8ff 2713 }
bogdanm 0:9b334a45a8ff 2714 else
bogdanm 0:9b334a45a8ff 2715 {
bogdanm 0:9b334a45a8ff 2716 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2717 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2718
bogdanm 0:9b334a45a8ff 2719 /* Wrong size Status regarding TCR flag event */
bogdanm 0:9b334a45a8ff 2720 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
bogdanm 0:9b334a45a8ff 2721 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2722 }
bogdanm 0:9b334a45a8ff 2723 }
bogdanm 0:9b334a45a8ff 2724 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
bogdanm 0:9b334a45a8ff 2725 {
bogdanm 0:9b334a45a8ff 2726 if(hi2c->XferCount == 0)
bogdanm 0:9b334a45a8ff 2727 {
bogdanm 0:9b334a45a8ff 2728 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2729 hi2c->Instance->CR2 |= I2C_CR2_STOP;
bogdanm 0:9b334a45a8ff 2730 }
bogdanm 0:9b334a45a8ff 2731 else
bogdanm 0:9b334a45a8ff 2732 {
bogdanm 0:9b334a45a8ff 2733 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2734 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2735
bogdanm 0:9b334a45a8ff 2736 /* Wrong size Status regarding TCR flag event */
bogdanm 0:9b334a45a8ff 2737 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
bogdanm 0:9b334a45a8ff 2738 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2739 }
bogdanm 0:9b334a45a8ff 2740 }
bogdanm 0:9b334a45a8ff 2741 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm 0:9b334a45a8ff 2742 {
bogdanm 0:9b334a45a8ff 2743 /* Disable ERR, TC, STOP, NACK, TXI interrupt */
bogdanm 0:9b334a45a8ff 2744 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI );
bogdanm 0:9b334a45a8ff 2745
bogdanm 0:9b334a45a8ff 2746 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 2747 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2748
bogdanm 0:9b334a45a8ff 2749 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 2750 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 2751
bogdanm 0:9b334a45a8ff 2752 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2753
bogdanm 0:9b334a45a8ff 2754 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2755 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2756
bogdanm 0:9b334a45a8ff 2757 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
bogdanm 0:9b334a45a8ff 2758 {
bogdanm 0:9b334a45a8ff 2759 HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2760 }
bogdanm 0:9b334a45a8ff 2761 else
bogdanm 0:9b334a45a8ff 2762 {
bogdanm 0:9b334a45a8ff 2763 HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2764 }
bogdanm 0:9b334a45a8ff 2765 }
bogdanm 0:9b334a45a8ff 2766 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm 0:9b334a45a8ff 2767 {
bogdanm 0:9b334a45a8ff 2768 /* Clear NACK Flag */
bogdanm 0:9b334a45a8ff 2769 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2770
bogdanm 0:9b334a45a8ff 2771 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2772 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2773
bogdanm 0:9b334a45a8ff 2774 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 2775 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2776 }
bogdanm 0:9b334a45a8ff 2777
bogdanm 0:9b334a45a8ff 2778 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2779 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2780
bogdanm 0:9b334a45a8ff 2781 return HAL_OK;
bogdanm 0:9b334a45a8ff 2782
bogdanm 0:9b334a45a8ff 2783 }
bogdanm 0:9b334a45a8ff 2784
bogdanm 0:9b334a45a8ff 2785 /**
bogdanm 0:9b334a45a8ff 2786 * @brief Handle Interrupt Flags Slave Transmit Mode
bogdanm 0:9b334a45a8ff 2787 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2788 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2789 * @retval HAL status
bogdanm 0:9b334a45a8ff 2790 */
bogdanm 0:9b334a45a8ff 2791 static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2792 {
bogdanm 0:9b334a45a8ff 2793 /* Process locked */
bogdanm 0:9b334a45a8ff 2794 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2795
bogdanm 0:9b334a45a8ff 2796 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
bogdanm 0:9b334a45a8ff 2797 {
bogdanm 0:9b334a45a8ff 2798 /* Check that I2C transfer finished */
bogdanm 0:9b334a45a8ff 2799 /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
bogdanm 0:9b334a45a8ff 2800 /* Mean XferCount == 0*/
bogdanm 0:9b334a45a8ff 2801 /* So clear Flag NACKF only */
bogdanm 0:9b334a45a8ff 2802 if(hi2c->XferCount == 0)
bogdanm 0:9b334a45a8ff 2803 {
bogdanm 0:9b334a45a8ff 2804 /* Clear NACK Flag */
bogdanm 0:9b334a45a8ff 2805 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2806
bogdanm 0:9b334a45a8ff 2807 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2808 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2809 }
bogdanm 0:9b334a45a8ff 2810 else
bogdanm 0:9b334a45a8ff 2811 {
bogdanm 0:9b334a45a8ff 2812 /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
bogdanm 0:9b334a45a8ff 2813 /* Clear NACK Flag */
bogdanm 0:9b334a45a8ff 2814 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2815
bogdanm 0:9b334a45a8ff 2816 /* Set ErrorCode corresponding to a Non-Acknowledge */
bogdanm 0:9b334a45a8ff 2817 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 2818
bogdanm 0:9b334a45a8ff 2819 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2820 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2821
bogdanm 0:9b334a45a8ff 2822 /* Call the Error callback to prevent upper layer */
bogdanm 0:9b334a45a8ff 2823 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2824 }
bogdanm 0:9b334a45a8ff 2825 }
bogdanm 0:9b334a45a8ff 2826 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm 0:9b334a45a8ff 2827 {
bogdanm 0:9b334a45a8ff 2828 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 2829 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 2830 }
bogdanm 0:9b334a45a8ff 2831 /* Check first if STOPF is set */
bogdanm 0:9b334a45a8ff 2832 /* to prevent a Write Data in TX buffer */
bogdanm 0:9b334a45a8ff 2833 /* which is stuck in TXDR until next */
bogdanm 0:9b334a45a8ff 2834 /* communication with Master */
bogdanm 0:9b334a45a8ff 2835 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm 0:9b334a45a8ff 2836 {
bogdanm 0:9b334a45a8ff 2837 /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
bogdanm 0:9b334a45a8ff 2838 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI );
bogdanm 0:9b334a45a8ff 2839
bogdanm 0:9b334a45a8ff 2840 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 2841 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 2842
bogdanm 0:9b334a45a8ff 2843 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 2844 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2845
bogdanm 0:9b334a45a8ff 2846 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2847
bogdanm 0:9b334a45a8ff 2848 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2849 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2850
bogdanm 0:9b334a45a8ff 2851 HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2852 }
bogdanm 0:9b334a45a8ff 2853 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
bogdanm 0:9b334a45a8ff 2854 {
bogdanm 0:9b334a45a8ff 2855 /* Write data to TXDR only if XferCount not reach "0" */
bogdanm 0:9b334a45a8ff 2856 /* A TXIS flag can be set, during STOP treatment */
bogdanm 0:9b334a45a8ff 2857 if(hi2c->XferCount > 0)
bogdanm 0:9b334a45a8ff 2858 {
bogdanm 0:9b334a45a8ff 2859 /* Write data to TXDR */
bogdanm 0:9b334a45a8ff 2860 hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
bogdanm 0:9b334a45a8ff 2861 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2862 }
bogdanm 0:9b334a45a8ff 2863 }
bogdanm 0:9b334a45a8ff 2864
bogdanm 0:9b334a45a8ff 2865 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2866 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2867
bogdanm 0:9b334a45a8ff 2868 return HAL_OK;
bogdanm 0:9b334a45a8ff 2869 }
bogdanm 0:9b334a45a8ff 2870
bogdanm 0:9b334a45a8ff 2871 /**
bogdanm 0:9b334a45a8ff 2872 * @brief Handle Interrupt Flags Slave Receive Mode
bogdanm 0:9b334a45a8ff 2873 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2874 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2875 * @retval HAL status
bogdanm 0:9b334a45a8ff 2876 */
bogdanm 0:9b334a45a8ff 2877 static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2878 {
bogdanm 0:9b334a45a8ff 2879 /* Process Locked */
bogdanm 0:9b334a45a8ff 2880 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2881
bogdanm 0:9b334a45a8ff 2882 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
bogdanm 0:9b334a45a8ff 2883 {
bogdanm 0:9b334a45a8ff 2884 /* Clear NACK Flag */
bogdanm 0:9b334a45a8ff 2885 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2886
bogdanm 0:9b334a45a8ff 2887 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2888 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2889
bogdanm 0:9b334a45a8ff 2890 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 2891 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2892 }
bogdanm 0:9b334a45a8ff 2893 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm 0:9b334a45a8ff 2894 {
bogdanm 0:9b334a45a8ff 2895 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 2896 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 2897 }
bogdanm 0:9b334a45a8ff 2898 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
bogdanm 0:9b334a45a8ff 2899 {
bogdanm 0:9b334a45a8ff 2900 /* Read data from RXDR */
bogdanm 0:9b334a45a8ff 2901 (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
bogdanm 0:9b334a45a8ff 2902 hi2c->XferSize--;
bogdanm 0:9b334a45a8ff 2903 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2904 }
bogdanm 0:9b334a45a8ff 2905 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm 0:9b334a45a8ff 2906 {
bogdanm 0:9b334a45a8ff 2907 /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
bogdanm 0:9b334a45a8ff 2908 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_RXI );
bogdanm 0:9b334a45a8ff 2909
bogdanm 0:9b334a45a8ff 2910 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 2911 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 2912
bogdanm 0:9b334a45a8ff 2913 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 2914 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2915
bogdanm 0:9b334a45a8ff 2916 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2917
bogdanm 0:9b334a45a8ff 2918 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2919 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2920
bogdanm 0:9b334a45a8ff 2921 HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2922 }
bogdanm 0:9b334a45a8ff 2923
bogdanm 0:9b334a45a8ff 2924 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2925 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2926
bogdanm 0:9b334a45a8ff 2927 return HAL_OK;
bogdanm 0:9b334a45a8ff 2928 }
bogdanm 0:9b334a45a8ff 2929
bogdanm 0:9b334a45a8ff 2930 /**
bogdanm 0:9b334a45a8ff 2931 * @brief Master sends target device address followed by internal memory address for write request.
bogdanm 0:9b334a45a8ff 2932 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2933 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2934 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2935 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 2936 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 2937 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 2938 * @retval HAL status
bogdanm 0:9b334a45a8ff 2939 */
bogdanm 0:9b334a45a8ff 2940 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 2941 {
bogdanm 0:9b334a45a8ff 2942 I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 2943
bogdanm 0:9b334a45a8ff 2944 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 2945 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2946 {
bogdanm 0:9b334a45a8ff 2947 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2948 {
bogdanm 0:9b334a45a8ff 2949 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2950 }
bogdanm 0:9b334a45a8ff 2951 else
bogdanm 0:9b334a45a8ff 2952 {
bogdanm 0:9b334a45a8ff 2953 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2954 }
bogdanm 0:9b334a45a8ff 2955 }
bogdanm 0:9b334a45a8ff 2956
bogdanm 0:9b334a45a8ff 2957 /* If Memory address size is 8Bit */
bogdanm 0:9b334a45a8ff 2958 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm 0:9b334a45a8ff 2959 {
bogdanm 0:9b334a45a8ff 2960 /* Send Memory Address */
bogdanm 0:9b334a45a8ff 2961 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 2962 }
bogdanm 0:9b334a45a8ff 2963 /* If Memory address size is 16Bit */
bogdanm 0:9b334a45a8ff 2964 else
bogdanm 0:9b334a45a8ff 2965 {
bogdanm 0:9b334a45a8ff 2966 /* Send MSB of Memory Address */
bogdanm 0:9b334a45a8ff 2967 hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm 0:9b334a45a8ff 2968
bogdanm 0:9b334a45a8ff 2969 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 2970 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2971 {
bogdanm 0:9b334a45a8ff 2972 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2973 {
bogdanm 0:9b334a45a8ff 2974 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2975 }
bogdanm 0:9b334a45a8ff 2976 else
bogdanm 0:9b334a45a8ff 2977 {
bogdanm 0:9b334a45a8ff 2978 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2979 }
bogdanm 0:9b334a45a8ff 2980 }
bogdanm 0:9b334a45a8ff 2981
bogdanm 0:9b334a45a8ff 2982 /* Send LSB of Memory Address */
bogdanm 0:9b334a45a8ff 2983 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 2984 }
bogdanm 0:9b334a45a8ff 2985
bogdanm 0:9b334a45a8ff 2986 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 2987 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2988 {
bogdanm 0:9b334a45a8ff 2989 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2990 }
bogdanm 0:9b334a45a8ff 2991
bogdanm 0:9b334a45a8ff 2992 return HAL_OK;
bogdanm 0:9b334a45a8ff 2993 }
bogdanm 0:9b334a45a8ff 2994
bogdanm 0:9b334a45a8ff 2995 /**
bogdanm 0:9b334a45a8ff 2996 * @brief Master sends target device address followed by internal memory address for read request.
bogdanm 0:9b334a45a8ff 2997 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2998 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2999 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 3000 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 3001 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 3002 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3003 * @retval HAL status
bogdanm 0:9b334a45a8ff 3004 */
bogdanm 0:9b334a45a8ff 3005 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3006 {
bogdanm 0:9b334a45a8ff 3007 I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
bogdanm 0:9b334a45a8ff 3008
bogdanm 0:9b334a45a8ff 3009 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 3010 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3011 {
bogdanm 0:9b334a45a8ff 3012 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3013 {
bogdanm 0:9b334a45a8ff 3014 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3015 }
bogdanm 0:9b334a45a8ff 3016 else
bogdanm 0:9b334a45a8ff 3017 {
bogdanm 0:9b334a45a8ff 3018 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3019 }
bogdanm 0:9b334a45a8ff 3020 }
bogdanm 0:9b334a45a8ff 3021
bogdanm 0:9b334a45a8ff 3022 /* If Memory address size is 8Bit */
bogdanm 0:9b334a45a8ff 3023 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm 0:9b334a45a8ff 3024 {
bogdanm 0:9b334a45a8ff 3025 /* Send Memory Address */
bogdanm 0:9b334a45a8ff 3026 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 3027 }
bogdanm 0:9b334a45a8ff 3028 /* If Memory address size is 16Bit */
bogdanm 0:9b334a45a8ff 3029 else
bogdanm 0:9b334a45a8ff 3030 {
bogdanm 0:9b334a45a8ff 3031 /* Send MSB of Memory Address */
bogdanm 0:9b334a45a8ff 3032 hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm 0:9b334a45a8ff 3033
bogdanm 0:9b334a45a8ff 3034 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 3035 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3036 {
bogdanm 0:9b334a45a8ff 3037 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3038 {
bogdanm 0:9b334a45a8ff 3039 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3040 }
bogdanm 0:9b334a45a8ff 3041 else
bogdanm 0:9b334a45a8ff 3042 {
bogdanm 0:9b334a45a8ff 3043 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3044 }
bogdanm 0:9b334a45a8ff 3045 }
bogdanm 0:9b334a45a8ff 3046
bogdanm 0:9b334a45a8ff 3047 /* Send LSB of Memory Address */
bogdanm 0:9b334a45a8ff 3048 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 3049 }
bogdanm 0:9b334a45a8ff 3050
bogdanm 0:9b334a45a8ff 3051 /* Wait until TC flag is set */
bogdanm 0:9b334a45a8ff 3052 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3053 {
bogdanm 0:9b334a45a8ff 3054 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3055 }
bogdanm 0:9b334a45a8ff 3056
bogdanm 0:9b334a45a8ff 3057 return HAL_OK;
bogdanm 0:9b334a45a8ff 3058 }
bogdanm 0:9b334a45a8ff 3059
bogdanm 0:9b334a45a8ff 3060 /**
bogdanm 0:9b334a45a8ff 3061 * @brief DMA I2C master transmit process complete callback.
bogdanm 0:9b334a45a8ff 3062 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3063 * @retval None
bogdanm 0:9b334a45a8ff 3064 */
bogdanm 0:9b334a45a8ff 3065 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3066 {
bogdanm 0:9b334a45a8ff 3067 uint16_t DevAddress;
bogdanm 0:9b334a45a8ff 3068 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3069
bogdanm 0:9b334a45a8ff 3070 /* Check if last DMA request was done with RELOAD */
bogdanm 0:9b334a45a8ff 3071 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3072 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3073 {
bogdanm 0:9b334a45a8ff 3074 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 3075 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm 0:9b334a45a8ff 3076 {
bogdanm 0:9b334a45a8ff 3077 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3078 }
bogdanm 0:9b334a45a8ff 3079
bogdanm 0:9b334a45a8ff 3080 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3081 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 3082
bogdanm 0:9b334a45a8ff 3083 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3084 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3085 {
bogdanm 0:9b334a45a8ff 3086 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3087 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3088 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3089 {
bogdanm 0:9b334a45a8ff 3090 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3091 {
bogdanm 0:9b334a45a8ff 3092 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3093 }
bogdanm 0:9b334a45a8ff 3094 else
bogdanm 0:9b334a45a8ff 3095 {
bogdanm 0:9b334a45a8ff 3096 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3097 }
bogdanm 0:9b334a45a8ff 3098 }
bogdanm 0:9b334a45a8ff 3099
bogdanm 0:9b334a45a8ff 3100 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3101 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3102
bogdanm 0:9b334a45a8ff 3103 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3104 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3105
bogdanm 0:9b334a45a8ff 3106 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3107
bogdanm 0:9b334a45a8ff 3108 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3109 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3110 }
bogdanm 0:9b334a45a8ff 3111 else
bogdanm 0:9b334a45a8ff 3112 {
bogdanm 0:9b334a45a8ff 3113 hi2c->pBuffPtr += hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3114 hi2c->XferCount -= hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3115 if(hi2c->XferCount > 255)
bogdanm 0:9b334a45a8ff 3116 {
bogdanm 0:9b334a45a8ff 3117 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 3118 }
bogdanm 0:9b334a45a8ff 3119 else
bogdanm 0:9b334a45a8ff 3120 {
bogdanm 0:9b334a45a8ff 3121 hi2c->XferSize = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 3122 }
bogdanm 0:9b334a45a8ff 3123
bogdanm 0:9b334a45a8ff 3124 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 3125
bogdanm 0:9b334a45a8ff 3126 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 3127 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 3128
bogdanm 0:9b334a45a8ff 3129 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 3130 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3131 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3132 {
bogdanm 0:9b334a45a8ff 3133 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3134 }
bogdanm 0:9b334a45a8ff 3135 else
bogdanm 0:9b334a45a8ff 3136 {
bogdanm 0:9b334a45a8ff 3137 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3138 }
bogdanm 0:9b334a45a8ff 3139
bogdanm 0:9b334a45a8ff 3140 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 3141 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm 0:9b334a45a8ff 3142 {
bogdanm 0:9b334a45a8ff 3143 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3144 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3145 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3146 {
bogdanm 0:9b334a45a8ff 3147 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3148 {
bogdanm 0:9b334a45a8ff 3149 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3150 }
bogdanm 0:9b334a45a8ff 3151 else
bogdanm 0:9b334a45a8ff 3152 {
bogdanm 0:9b334a45a8ff 3153 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3154 }
bogdanm 0:9b334a45a8ff 3155 }
bogdanm 0:9b334a45a8ff 3156
bogdanm 0:9b334a45a8ff 3157 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3158 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3159
bogdanm 0:9b334a45a8ff 3160 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3161 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3162
bogdanm 0:9b334a45a8ff 3163 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3164
bogdanm 0:9b334a45a8ff 3165 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3166 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3167 }
bogdanm 0:9b334a45a8ff 3168 else
bogdanm 0:9b334a45a8ff 3169 {
bogdanm 0:9b334a45a8ff 3170 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 3171 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 3172 }
bogdanm 0:9b334a45a8ff 3173 }
bogdanm 0:9b334a45a8ff 3174 }
bogdanm 0:9b334a45a8ff 3175 else
bogdanm 0:9b334a45a8ff 3176 {
bogdanm 0:9b334a45a8ff 3177 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3178 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3179 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3180 {
bogdanm 0:9b334a45a8ff 3181 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3182 {
bogdanm 0:9b334a45a8ff 3183 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3184 }
bogdanm 0:9b334a45a8ff 3185 else
bogdanm 0:9b334a45a8ff 3186 {
bogdanm 0:9b334a45a8ff 3187 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3188 }
bogdanm 0:9b334a45a8ff 3189 }
bogdanm 0:9b334a45a8ff 3190
bogdanm 0:9b334a45a8ff 3191 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3192 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3193
bogdanm 0:9b334a45a8ff 3194 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3195 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3196
bogdanm 0:9b334a45a8ff 3197 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3198 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 3199
bogdanm 0:9b334a45a8ff 3200 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3201
bogdanm 0:9b334a45a8ff 3202 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3203
bogdanm 0:9b334a45a8ff 3204 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3205 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3206 {
bogdanm 0:9b334a45a8ff 3207 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3208 }
bogdanm 0:9b334a45a8ff 3209 else
bogdanm 0:9b334a45a8ff 3210 {
bogdanm 0:9b334a45a8ff 3211 HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3212 }
bogdanm 0:9b334a45a8ff 3213 }
bogdanm 0:9b334a45a8ff 3214 }
bogdanm 0:9b334a45a8ff 3215
bogdanm 0:9b334a45a8ff 3216 /**
bogdanm 0:9b334a45a8ff 3217 * @brief DMA I2C slave transmit process complete callback.
bogdanm 0:9b334a45a8ff 3218 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3219 * @retval None
bogdanm 0:9b334a45a8ff 3220 */
bogdanm 0:9b334a45a8ff 3221 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3222 {
bogdanm 0:9b334a45a8ff 3223 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3224
bogdanm 0:9b334a45a8ff 3225 /* Wait until STOP flag is set */
bogdanm 0:9b334a45a8ff 3226 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3227 {
bogdanm 0:9b334a45a8ff 3228 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3229 {
bogdanm 0:9b334a45a8ff 3230 /* Normal Use case, a AF is generated by master */
bogdanm 0:9b334a45a8ff 3231 /* to inform slave the end of transfer */
bogdanm 0:9b334a45a8ff 3232 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 3233 }
bogdanm 0:9b334a45a8ff 3234 else
bogdanm 0:9b334a45a8ff 3235 {
bogdanm 0:9b334a45a8ff 3236 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3237 }
bogdanm 0:9b334a45a8ff 3238 }
bogdanm 0:9b334a45a8ff 3239
bogdanm 0:9b334a45a8ff 3240 /* Clear STOP flag */
bogdanm 0:9b334a45a8ff 3241 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3242
bogdanm 0:9b334a45a8ff 3243 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 3244 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm 0:9b334a45a8ff 3245 {
bogdanm 0:9b334a45a8ff 3246 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3247 }
bogdanm 0:9b334a45a8ff 3248
bogdanm 0:9b334a45a8ff 3249 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3250 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 3251
bogdanm 0:9b334a45a8ff 3252 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3253
bogdanm 0:9b334a45a8ff 3254 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3255
bogdanm 0:9b334a45a8ff 3256 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3257 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3258 {
bogdanm 0:9b334a45a8ff 3259 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3260 }
bogdanm 0:9b334a45a8ff 3261 else
bogdanm 0:9b334a45a8ff 3262 {
bogdanm 0:9b334a45a8ff 3263 HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3264 }
bogdanm 0:9b334a45a8ff 3265 }
bogdanm 0:9b334a45a8ff 3266
bogdanm 0:9b334a45a8ff 3267 /**
bogdanm 0:9b334a45a8ff 3268 * @brief DMA I2C master receive process complete callback
bogdanm 0:9b334a45a8ff 3269 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3270 * @retval None
bogdanm 0:9b334a45a8ff 3271 */
bogdanm 0:9b334a45a8ff 3272 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3273 {
bogdanm 0:9b334a45a8ff 3274 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3275 uint16_t DevAddress;
bogdanm 0:9b334a45a8ff 3276
bogdanm 0:9b334a45a8ff 3277 /* Check if last DMA request was done with RELOAD */
bogdanm 0:9b334a45a8ff 3278 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3279 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3280 {
bogdanm 0:9b334a45a8ff 3281 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 3282 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm 0:9b334a45a8ff 3283 {
bogdanm 0:9b334a45a8ff 3284 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3285 }
bogdanm 0:9b334a45a8ff 3286
bogdanm 0:9b334a45a8ff 3287 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3288 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 3289
bogdanm 0:9b334a45a8ff 3290 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3291 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3292 {
bogdanm 0:9b334a45a8ff 3293 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3294 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3295 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3296 {
bogdanm 0:9b334a45a8ff 3297 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3298 {
bogdanm 0:9b334a45a8ff 3299 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3300 }
bogdanm 0:9b334a45a8ff 3301 else
bogdanm 0:9b334a45a8ff 3302 {
bogdanm 0:9b334a45a8ff 3303 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3304 }
bogdanm 0:9b334a45a8ff 3305 }
bogdanm 0:9b334a45a8ff 3306
bogdanm 0:9b334a45a8ff 3307 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3308 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3309
bogdanm 0:9b334a45a8ff 3310 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3311 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3312
bogdanm 0:9b334a45a8ff 3313 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3314
bogdanm 0:9b334a45a8ff 3315 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3316 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3317 }
bogdanm 0:9b334a45a8ff 3318 else
bogdanm 0:9b334a45a8ff 3319 {
bogdanm 0:9b334a45a8ff 3320 hi2c->pBuffPtr += hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3321 hi2c->XferCount -= hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3322 if(hi2c->XferCount > 255)
bogdanm 0:9b334a45a8ff 3323 {
bogdanm 0:9b334a45a8ff 3324 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 3325 }
bogdanm 0:9b334a45a8ff 3326 else
bogdanm 0:9b334a45a8ff 3327 {
bogdanm 0:9b334a45a8ff 3328 hi2c->XferSize = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 3329 }
bogdanm 0:9b334a45a8ff 3330
bogdanm 0:9b334a45a8ff 3331 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 3332
bogdanm 0:9b334a45a8ff 3333 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 3334 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 3335
bogdanm 0:9b334a45a8ff 3336 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 3337 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3338 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3339 {
bogdanm 0:9b334a45a8ff 3340 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3341 }
bogdanm 0:9b334a45a8ff 3342 else
bogdanm 0:9b334a45a8ff 3343 {
bogdanm 0:9b334a45a8ff 3344 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3345 }
bogdanm 0:9b334a45a8ff 3346
bogdanm 0:9b334a45a8ff 3347 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 3348 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm 0:9b334a45a8ff 3349 {
bogdanm 0:9b334a45a8ff 3350 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3351 }
bogdanm 0:9b334a45a8ff 3352
bogdanm 0:9b334a45a8ff 3353 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3354 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3355 {
bogdanm 0:9b334a45a8ff 3356 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3357 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3358 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3359 {
bogdanm 0:9b334a45a8ff 3360 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3361 {
bogdanm 0:9b334a45a8ff 3362 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3363 }
bogdanm 0:9b334a45a8ff 3364 else
bogdanm 0:9b334a45a8ff 3365 {
bogdanm 0:9b334a45a8ff 3366 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3367 }
bogdanm 0:9b334a45a8ff 3368 }
bogdanm 0:9b334a45a8ff 3369
bogdanm 0:9b334a45a8ff 3370 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3371 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3372
bogdanm 0:9b334a45a8ff 3373 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3374 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3375
bogdanm 0:9b334a45a8ff 3376 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3377
bogdanm 0:9b334a45a8ff 3378 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3379
bogdanm 0:9b334a45a8ff 3380 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3381 }
bogdanm 0:9b334a45a8ff 3382 else
bogdanm 0:9b334a45a8ff 3383 {
bogdanm 0:9b334a45a8ff 3384 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 3385 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 3386 }
bogdanm 0:9b334a45a8ff 3387 }
bogdanm 0:9b334a45a8ff 3388 }
bogdanm 0:9b334a45a8ff 3389 else
bogdanm 0:9b334a45a8ff 3390 {
bogdanm 0:9b334a45a8ff 3391 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3392 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3393 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3394 {
bogdanm 0:9b334a45a8ff 3395 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3396 {
bogdanm 0:9b334a45a8ff 3397 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3398 }
bogdanm 0:9b334a45a8ff 3399 else
bogdanm 0:9b334a45a8ff 3400 {
bogdanm 0:9b334a45a8ff 3401 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3402 }
bogdanm 0:9b334a45a8ff 3403 }
bogdanm 0:9b334a45a8ff 3404
bogdanm 0:9b334a45a8ff 3405 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3406 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3407
bogdanm 0:9b334a45a8ff 3408 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3409 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3410
bogdanm 0:9b334a45a8ff 3411 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3412 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 3413
bogdanm 0:9b334a45a8ff 3414 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3415
bogdanm 0:9b334a45a8ff 3416 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3417
bogdanm 0:9b334a45a8ff 3418 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3419 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3420 {
bogdanm 0:9b334a45a8ff 3421 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3422 }
bogdanm 0:9b334a45a8ff 3423 else
bogdanm 0:9b334a45a8ff 3424 {
bogdanm 0:9b334a45a8ff 3425 HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3426 }
bogdanm 0:9b334a45a8ff 3427 }
bogdanm 0:9b334a45a8ff 3428 }
bogdanm 0:9b334a45a8ff 3429
bogdanm 0:9b334a45a8ff 3430 /**
bogdanm 0:9b334a45a8ff 3431 * @brief DMA I2C slave receive process complete callback.
bogdanm 0:9b334a45a8ff 3432 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3433 * @retval None
bogdanm 0:9b334a45a8ff 3434 */
bogdanm 0:9b334a45a8ff 3435 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3436 {
bogdanm 0:9b334a45a8ff 3437 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3438
bogdanm 0:9b334a45a8ff 3439 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3440 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3441 {
bogdanm 0:9b334a45a8ff 3442 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3443 {
bogdanm 0:9b334a45a8ff 3444 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3445 }
bogdanm 0:9b334a45a8ff 3446 else
bogdanm 0:9b334a45a8ff 3447 {
bogdanm 0:9b334a45a8ff 3448 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3449 }
bogdanm 0:9b334a45a8ff 3450 }
bogdanm 0:9b334a45a8ff 3451
bogdanm 0:9b334a45a8ff 3452 /* Clear STOPF flag */
bogdanm 0:9b334a45a8ff 3453 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3454
bogdanm 0:9b334a45a8ff 3455 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 3456 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
bogdanm 0:9b334a45a8ff 3457 {
bogdanm 0:9b334a45a8ff 3458 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3459 }
bogdanm 0:9b334a45a8ff 3460
bogdanm 0:9b334a45a8ff 3461 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3462 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 3463
bogdanm 0:9b334a45a8ff 3464 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 3465 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 3466
bogdanm 0:9b334a45a8ff 3467 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3468
bogdanm 0:9b334a45a8ff 3469 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3470
bogdanm 0:9b334a45a8ff 3471 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3472 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3473 {
bogdanm 0:9b334a45a8ff 3474 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3475 }
bogdanm 0:9b334a45a8ff 3476 else
bogdanm 0:9b334a45a8ff 3477 {
bogdanm 0:9b334a45a8ff 3478 HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3479 }
bogdanm 0:9b334a45a8ff 3480 }
bogdanm 0:9b334a45a8ff 3481
bogdanm 0:9b334a45a8ff 3482 /**
bogdanm 0:9b334a45a8ff 3483 * @brief DMA I2C Memory Write process complete callback
bogdanm 0:9b334a45a8ff 3484 * @param hdma : DMA handle
bogdanm 0:9b334a45a8ff 3485 * @retval None
bogdanm 0:9b334a45a8ff 3486 */
bogdanm 0:9b334a45a8ff 3487 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3488 {
bogdanm 0:9b334a45a8ff 3489 uint16_t DevAddress;
bogdanm 0:9b334a45a8ff 3490 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 3491
bogdanm 0:9b334a45a8ff 3492 /* Check if last DMA request was done with RELOAD */
bogdanm 0:9b334a45a8ff 3493 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3494 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3495 {
bogdanm 0:9b334a45a8ff 3496 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 3497 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm 0:9b334a45a8ff 3498 {
bogdanm 0:9b334a45a8ff 3499 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3500 }
bogdanm 0:9b334a45a8ff 3501
bogdanm 0:9b334a45a8ff 3502 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3503 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 3504
bogdanm 0:9b334a45a8ff 3505 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3506 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3507 {
bogdanm 0:9b334a45a8ff 3508 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3509 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3510 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3511 {
bogdanm 0:9b334a45a8ff 3512 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3513 {
bogdanm 0:9b334a45a8ff 3514 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3515 }
bogdanm 0:9b334a45a8ff 3516 else
bogdanm 0:9b334a45a8ff 3517 {
bogdanm 0:9b334a45a8ff 3518 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3519 }
bogdanm 0:9b334a45a8ff 3520 }
bogdanm 0:9b334a45a8ff 3521
bogdanm 0:9b334a45a8ff 3522 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3523 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3524
bogdanm 0:9b334a45a8ff 3525 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3526 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3527
bogdanm 0:9b334a45a8ff 3528 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3529
bogdanm 0:9b334a45a8ff 3530 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3531 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3532 }
bogdanm 0:9b334a45a8ff 3533 else
bogdanm 0:9b334a45a8ff 3534 {
bogdanm 0:9b334a45a8ff 3535 hi2c->pBuffPtr += hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3536 hi2c->XferCount -= hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3537 if(hi2c->XferCount > 255)
bogdanm 0:9b334a45a8ff 3538 {
bogdanm 0:9b334a45a8ff 3539 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 3540 }
bogdanm 0:9b334a45a8ff 3541 else
bogdanm 0:9b334a45a8ff 3542 {
bogdanm 0:9b334a45a8ff 3543 hi2c->XferSize = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 3544 }
bogdanm 0:9b334a45a8ff 3545
bogdanm 0:9b334a45a8ff 3546 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 3547
bogdanm 0:9b334a45a8ff 3548 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 3549 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 3550
bogdanm 0:9b334a45a8ff 3551 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 3552 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3553 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3554 {
bogdanm 0:9b334a45a8ff 3555 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3556 }
bogdanm 0:9b334a45a8ff 3557 else
bogdanm 0:9b334a45a8ff 3558 {
bogdanm 0:9b334a45a8ff 3559 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3560 }
bogdanm 0:9b334a45a8ff 3561
bogdanm 0:9b334a45a8ff 3562 /* Wait until TXIS flag is set */
bogdanm 0:9b334a45a8ff 3563 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
bogdanm 0:9b334a45a8ff 3564 {
bogdanm 0:9b334a45a8ff 3565 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3566 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3567 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3568 {
bogdanm 0:9b334a45a8ff 3569 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3570 {
bogdanm 0:9b334a45a8ff 3571 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3572 }
bogdanm 0:9b334a45a8ff 3573 else
bogdanm 0:9b334a45a8ff 3574 {
bogdanm 0:9b334a45a8ff 3575 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3576 }
bogdanm 0:9b334a45a8ff 3577 }
bogdanm 0:9b334a45a8ff 3578
bogdanm 0:9b334a45a8ff 3579 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3580 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3581
bogdanm 0:9b334a45a8ff 3582 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3583 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3584
bogdanm 0:9b334a45a8ff 3585 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3586
bogdanm 0:9b334a45a8ff 3587 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3588 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3589 }
bogdanm 0:9b334a45a8ff 3590 else
bogdanm 0:9b334a45a8ff 3591 {
bogdanm 0:9b334a45a8ff 3592 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 3593 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 3594 }
bogdanm 0:9b334a45a8ff 3595 }
bogdanm 0:9b334a45a8ff 3596 }
bogdanm 0:9b334a45a8ff 3597 else
bogdanm 0:9b334a45a8ff 3598 {
bogdanm 0:9b334a45a8ff 3599 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3600 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3601 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3602 {
bogdanm 0:9b334a45a8ff 3603 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3604 {
bogdanm 0:9b334a45a8ff 3605 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3606 }
bogdanm 0:9b334a45a8ff 3607 else
bogdanm 0:9b334a45a8ff 3608 {
bogdanm 0:9b334a45a8ff 3609 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3610 }
bogdanm 0:9b334a45a8ff 3611 }
bogdanm 0:9b334a45a8ff 3612
bogdanm 0:9b334a45a8ff 3613 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3614 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3615
bogdanm 0:9b334a45a8ff 3616 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3617 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3618
bogdanm 0:9b334a45a8ff 3619 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3620 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
bogdanm 0:9b334a45a8ff 3621
bogdanm 0:9b334a45a8ff 3622 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3623
bogdanm 0:9b334a45a8ff 3624 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3625
bogdanm 0:9b334a45a8ff 3626 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3627 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3628 {
bogdanm 0:9b334a45a8ff 3629 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3630 }
bogdanm 0:9b334a45a8ff 3631 else
bogdanm 0:9b334a45a8ff 3632 {
bogdanm 0:9b334a45a8ff 3633 HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3634 }
bogdanm 0:9b334a45a8ff 3635 }
bogdanm 0:9b334a45a8ff 3636 }
bogdanm 0:9b334a45a8ff 3637
bogdanm 0:9b334a45a8ff 3638 /**
bogdanm 0:9b334a45a8ff 3639 * @brief DMA I2C Memory Read process complete callback
bogdanm 0:9b334a45a8ff 3640 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3641 * @retval None
bogdanm 0:9b334a45a8ff 3642 */
bogdanm 0:9b334a45a8ff 3643 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3644 {
bogdanm 0:9b334a45a8ff 3645 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 3646 uint16_t DevAddress;
bogdanm 0:9b334a45a8ff 3647
bogdanm 0:9b334a45a8ff 3648 /* Check if last DMA request was done with RELOAD */
bogdanm 0:9b334a45a8ff 3649 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3650 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3651 {
bogdanm 0:9b334a45a8ff 3652 /* Wait until TCR flag is set */
bogdanm 0:9b334a45a8ff 3653 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
bogdanm 0:9b334a45a8ff 3654 {
bogdanm 0:9b334a45a8ff 3655 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3656 }
bogdanm 0:9b334a45a8ff 3657
bogdanm 0:9b334a45a8ff 3658 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3659 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 3660
bogdanm 0:9b334a45a8ff 3661 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3662 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3663 {
bogdanm 0:9b334a45a8ff 3664 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3665 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3666 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3667 {
bogdanm 0:9b334a45a8ff 3668 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3669 {
bogdanm 0:9b334a45a8ff 3670 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3671 }
bogdanm 0:9b334a45a8ff 3672 else
bogdanm 0:9b334a45a8ff 3673 {
bogdanm 0:9b334a45a8ff 3674 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3675 }
bogdanm 0:9b334a45a8ff 3676 }
bogdanm 0:9b334a45a8ff 3677
bogdanm 0:9b334a45a8ff 3678 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3679 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3680
bogdanm 0:9b334a45a8ff 3681 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3682 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3683
bogdanm 0:9b334a45a8ff 3684 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3685
bogdanm 0:9b334a45a8ff 3686 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3687 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3688 }
bogdanm 0:9b334a45a8ff 3689 else
bogdanm 0:9b334a45a8ff 3690 {
bogdanm 0:9b334a45a8ff 3691 hi2c->pBuffPtr += hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3692 hi2c->XferCount -= hi2c->XferSize;
bogdanm 0:9b334a45a8ff 3693 if(hi2c->XferCount > 255)
bogdanm 0:9b334a45a8ff 3694 {
bogdanm 0:9b334a45a8ff 3695 hi2c->XferSize = 255;
bogdanm 0:9b334a45a8ff 3696 }
bogdanm 0:9b334a45a8ff 3697 else
bogdanm 0:9b334a45a8ff 3698 {
bogdanm 0:9b334a45a8ff 3699 hi2c->XferSize = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 3700 }
bogdanm 0:9b334a45a8ff 3701
bogdanm 0:9b334a45a8ff 3702 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
bogdanm 0:9b334a45a8ff 3703
bogdanm 0:9b334a45a8ff 3704 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 3705 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
bogdanm 0:9b334a45a8ff 3706
bogdanm 0:9b334a45a8ff 3707 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 3708 /* Set NBYTES to write and reload if size > 255 */
bogdanm 0:9b334a45a8ff 3709 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
bogdanm 0:9b334a45a8ff 3710 {
bogdanm 0:9b334a45a8ff 3711 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3712 }
bogdanm 0:9b334a45a8ff 3713 else
bogdanm 0:9b334a45a8ff 3714 {
bogdanm 0:9b334a45a8ff 3715 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
bogdanm 0:9b334a45a8ff 3716 }
bogdanm 0:9b334a45a8ff 3717
bogdanm 0:9b334a45a8ff 3718 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 3719 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
bogdanm 0:9b334a45a8ff 3720 {
bogdanm 0:9b334a45a8ff 3721 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3722 }
bogdanm 0:9b334a45a8ff 3723
bogdanm 0:9b334a45a8ff 3724 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3725 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3726 {
bogdanm 0:9b334a45a8ff 3727 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3728 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3729 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3730 {
bogdanm 0:9b334a45a8ff 3731 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3732 {
bogdanm 0:9b334a45a8ff 3733 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3734 }
bogdanm 0:9b334a45a8ff 3735 else
bogdanm 0:9b334a45a8ff 3736 {
bogdanm 0:9b334a45a8ff 3737 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3738 }
bogdanm 0:9b334a45a8ff 3739 }
bogdanm 0:9b334a45a8ff 3740
bogdanm 0:9b334a45a8ff 3741 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3742 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3743
bogdanm 0:9b334a45a8ff 3744 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3745 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3746
bogdanm 0:9b334a45a8ff 3747 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3748
bogdanm 0:9b334a45a8ff 3749 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3750 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3751 }
bogdanm 0:9b334a45a8ff 3752 else
bogdanm 0:9b334a45a8ff 3753 {
bogdanm 0:9b334a45a8ff 3754 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 3755 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 3756 }
bogdanm 0:9b334a45a8ff 3757 }
bogdanm 0:9b334a45a8ff 3758 }
bogdanm 0:9b334a45a8ff 3759 else
bogdanm 0:9b334a45a8ff 3760 {
bogdanm 0:9b334a45a8ff 3761 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
bogdanm 0:9b334a45a8ff 3762 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3763 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
bogdanm 0:9b334a45a8ff 3764 {
bogdanm 0:9b334a45a8ff 3765 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3766 {
bogdanm 0:9b334a45a8ff 3767 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3768 }
bogdanm 0:9b334a45a8ff 3769 else
bogdanm 0:9b334a45a8ff 3770 {
bogdanm 0:9b334a45a8ff 3771 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3772 }
bogdanm 0:9b334a45a8ff 3773 }
bogdanm 0:9b334a45a8ff 3774
bogdanm 0:9b334a45a8ff 3775 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3776 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3777
bogdanm 0:9b334a45a8ff 3778 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3779 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3780
bogdanm 0:9b334a45a8ff 3781 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3782 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
bogdanm 0:9b334a45a8ff 3783
bogdanm 0:9b334a45a8ff 3784 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3785
bogdanm 0:9b334a45a8ff 3786 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3787
bogdanm 0:9b334a45a8ff 3788 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3789 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3790 {
bogdanm 0:9b334a45a8ff 3791 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3792 }
bogdanm 0:9b334a45a8ff 3793 else
bogdanm 0:9b334a45a8ff 3794 {
bogdanm 0:9b334a45a8ff 3795 HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3796 }
bogdanm 0:9b334a45a8ff 3797 }
bogdanm 0:9b334a45a8ff 3798 }
bogdanm 0:9b334a45a8ff 3799
bogdanm 0:9b334a45a8ff 3800 /**
bogdanm 0:9b334a45a8ff 3801 * @brief DMA I2C communication error callback.
bogdanm 0:9b334a45a8ff 3802 * @param hdma : DMA handle
bogdanm 0:9b334a45a8ff 3803 * @retval None
bogdanm 0:9b334a45a8ff 3804 */
bogdanm 0:9b334a45a8ff 3805 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3806 {
bogdanm 0:9b334a45a8ff 3807 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 3808
bogdanm 0:9b334a45a8ff 3809 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 3810 hi2c->Instance->CR2 |= I2C_CR2_NACK;
bogdanm 0:9b334a45a8ff 3811
bogdanm 0:9b334a45a8ff 3812 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3813
bogdanm 0:9b334a45a8ff 3814 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3815
bogdanm 0:9b334a45a8ff 3816 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
bogdanm 0:9b334a45a8ff 3817
bogdanm 0:9b334a45a8ff 3818 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3819 }
bogdanm 0:9b334a45a8ff 3820
bogdanm 0:9b334a45a8ff 3821 /**
bogdanm 0:9b334a45a8ff 3822 * @brief This function handles I2C Communication Timeout.
bogdanm 0:9b334a45a8ff 3823 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3824 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 3825 * @param Flag: specifies the I2C flag to check.
bogdanm 0:9b334a45a8ff 3826 * @param Status: The new Flag status (SET or RESET).
bogdanm 0:9b334a45a8ff 3827 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3828 * @retval HAL status
bogdanm 0:9b334a45a8ff 3829 */
bogdanm 0:9b334a45a8ff 3830 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3831 {
bogdanm 0:9b334a45a8ff 3832 uint32_t tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 3833
bogdanm 0:9b334a45a8ff 3834 /* Wait until flag is set */
bogdanm 0:9b334a45a8ff 3835 if(Status == RESET)
bogdanm 0:9b334a45a8ff 3836 {
bogdanm 0:9b334a45a8ff 3837 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
bogdanm 0:9b334a45a8ff 3838 {
bogdanm 0:9b334a45a8ff 3839 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3840 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 3841 {
bogdanm 0:9b334a45a8ff 3842 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3843 {
bogdanm 0:9b334a45a8ff 3844 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3845 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3846 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3847 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3848 }
bogdanm 0:9b334a45a8ff 3849 }
bogdanm 0:9b334a45a8ff 3850 }
bogdanm 0:9b334a45a8ff 3851 }
bogdanm 0:9b334a45a8ff 3852 else
bogdanm 0:9b334a45a8ff 3853 {
bogdanm 0:9b334a45a8ff 3854 while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
bogdanm 0:9b334a45a8ff 3855 {
bogdanm 0:9b334a45a8ff 3856 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3857 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 3858 {
bogdanm 0:9b334a45a8ff 3859 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3860 {
bogdanm 0:9b334a45a8ff 3861 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3862 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3863 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3864 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3865 }
bogdanm 0:9b334a45a8ff 3866 }
bogdanm 0:9b334a45a8ff 3867 }
bogdanm 0:9b334a45a8ff 3868 }
bogdanm 0:9b334a45a8ff 3869 return HAL_OK;
bogdanm 0:9b334a45a8ff 3870 }
bogdanm 0:9b334a45a8ff 3871
bogdanm 0:9b334a45a8ff 3872 /**
bogdanm 0:9b334a45a8ff 3873 * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.
bogdanm 0:9b334a45a8ff 3874 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3875 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 3876 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3877 * @retval HAL status
bogdanm 0:9b334a45a8ff 3878 */
bogdanm 0:9b334a45a8ff 3879 static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3880 {
bogdanm 0:9b334a45a8ff 3881 uint32_t tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 3882
bogdanm 0:9b334a45a8ff 3883 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
bogdanm 0:9b334a45a8ff 3884 {
bogdanm 0:9b334a45a8ff 3885 /* Check if a NACK is detected */
bogdanm 0:9b334a45a8ff 3886 if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3887 {
bogdanm 0:9b334a45a8ff 3888 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3889 }
bogdanm 0:9b334a45a8ff 3890
bogdanm 0:9b334a45a8ff 3891 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3892 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 3893 {
bogdanm 0:9b334a45a8ff 3894 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3895 {
bogdanm 0:9b334a45a8ff 3896 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3897 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3898
bogdanm 0:9b334a45a8ff 3899 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3900 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3901
bogdanm 0:9b334a45a8ff 3902 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3903 }
bogdanm 0:9b334a45a8ff 3904 }
bogdanm 0:9b334a45a8ff 3905 }
bogdanm 0:9b334a45a8ff 3906 return HAL_OK;
bogdanm 0:9b334a45a8ff 3907 }
bogdanm 0:9b334a45a8ff 3908
bogdanm 0:9b334a45a8ff 3909 /**
bogdanm 0:9b334a45a8ff 3910 * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
bogdanm 0:9b334a45a8ff 3911 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3912 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 3913 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3914 * @retval HAL status
bogdanm 0:9b334a45a8ff 3915 */
bogdanm 0:9b334a45a8ff 3916 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3917 {
bogdanm 0:9b334a45a8ff 3918 uint32_t tickstart = 0x00;
bogdanm 0:9b334a45a8ff 3919 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 3920
bogdanm 0:9b334a45a8ff 3921 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
bogdanm 0:9b334a45a8ff 3922 {
bogdanm 0:9b334a45a8ff 3923 /* Check if a NACK is detected */
bogdanm 0:9b334a45a8ff 3924 if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3925 {
bogdanm 0:9b334a45a8ff 3926 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3927 }
bogdanm 0:9b334a45a8ff 3928
bogdanm 0:9b334a45a8ff 3929 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3930 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3931 {
bogdanm 0:9b334a45a8ff 3932 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3933 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3934
bogdanm 0:9b334a45a8ff 3935 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3936 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3937
bogdanm 0:9b334a45a8ff 3938 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3939 }
bogdanm 0:9b334a45a8ff 3940 }
bogdanm 0:9b334a45a8ff 3941 return HAL_OK;
bogdanm 0:9b334a45a8ff 3942 }
bogdanm 0:9b334a45a8ff 3943
bogdanm 0:9b334a45a8ff 3944 /**
bogdanm 0:9b334a45a8ff 3945 * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
bogdanm 0:9b334a45a8ff 3946 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3947 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 3948 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3949 * @retval HAL status
bogdanm 0:9b334a45a8ff 3950 */
bogdanm 0:9b334a45a8ff 3951 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3952 {
bogdanm 0:9b334a45a8ff 3953 uint32_t tickstart = 0x00;
bogdanm 0:9b334a45a8ff 3954 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 3955
bogdanm 0:9b334a45a8ff 3956 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
bogdanm 0:9b334a45a8ff 3957 {
bogdanm 0:9b334a45a8ff 3958 /* Check if a STOPF is detected */
bogdanm 0:9b334a45a8ff 3959 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
bogdanm 0:9b334a45a8ff 3960 {
bogdanm 0:9b334a45a8ff 3961 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 3962 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 3963
bogdanm 0:9b334a45a8ff 3964 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 3965 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 3966
bogdanm 0:9b334a45a8ff 3967 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 3968 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3969
bogdanm 0:9b334a45a8ff 3970 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3971 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3972
bogdanm 0:9b334a45a8ff 3973 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3974 }
bogdanm 0:9b334a45a8ff 3975
bogdanm 0:9b334a45a8ff 3976 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3977 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3978 {
bogdanm 0:9b334a45a8ff 3979 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3980 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3981
bogdanm 0:9b334a45a8ff 3982 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3983 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3984
bogdanm 0:9b334a45a8ff 3985 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3986 }
bogdanm 0:9b334a45a8ff 3987 }
bogdanm 0:9b334a45a8ff 3988 return HAL_OK;
bogdanm 0:9b334a45a8ff 3989 }
bogdanm 0:9b334a45a8ff 3990
bogdanm 0:9b334a45a8ff 3991 /**
bogdanm 0:9b334a45a8ff 3992 * @brief This function handles Acknowledge failed detection during an I2C Communication.
bogdanm 0:9b334a45a8ff 3993 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3994 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 3995 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3996 * @retval HAL status
bogdanm 0:9b334a45a8ff 3997 */
bogdanm 0:9b334a45a8ff 3998 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3999 {
bogdanm 0:9b334a45a8ff 4000 uint32_t tickstart = 0x00;
bogdanm 0:9b334a45a8ff 4001 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 4002
bogdanm 0:9b334a45a8ff 4003 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm 0:9b334a45a8ff 4004 {
bogdanm 0:9b334a45a8ff 4005 /* Generate stop if necessary only in case of I2C peripheral in MASTER mode */
bogdanm 0:9b334a45a8ff 4006 if((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
bogdanm 0:9b334a45a8ff 4007 || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX))
bogdanm 0:9b334a45a8ff 4008 {
bogdanm 0:9b334a45a8ff 4009 /* No need to generate the STOP condition if AUTOEND mode is enabled */
bogdanm 0:9b334a45a8ff 4010 /* Generate the STOP condition only in case of SOFTEND mode is enabled */
bogdanm 0:9b334a45a8ff 4011 if((hi2c->Instance->CR2 & I2C_AUTOEND_MODE) != I2C_AUTOEND_MODE)
bogdanm 0:9b334a45a8ff 4012 {
bogdanm 0:9b334a45a8ff 4013 /* Generate Stop */
bogdanm 0:9b334a45a8ff 4014 hi2c->Instance->CR2 |= I2C_CR2_STOP;
bogdanm 0:9b334a45a8ff 4015 }
bogdanm 0:9b334a45a8ff 4016 }
bogdanm 0:9b334a45a8ff 4017
bogdanm 0:9b334a45a8ff 4018 /* Wait until STOP Flag is reset */
bogdanm 0:9b334a45a8ff 4019 /* AutoEnd should be initiate after AF */
bogdanm 0:9b334a45a8ff 4020 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
bogdanm 0:9b334a45a8ff 4021 {
bogdanm 0:9b334a45a8ff 4022 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 4023 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 4024 {
bogdanm 0:9b334a45a8ff 4025 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 4026 {
bogdanm 0:9b334a45a8ff 4027 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 4028 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 4029 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 4030 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 4031 }
bogdanm 0:9b334a45a8ff 4032 }
bogdanm 0:9b334a45a8ff 4033 }
bogdanm 0:9b334a45a8ff 4034
bogdanm 0:9b334a45a8ff 4035 /* Clear NACKF Flag */
bogdanm 0:9b334a45a8ff 4036 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 4037
bogdanm 0:9b334a45a8ff 4038 /* Clear STOP Flag */
bogdanm 0:9b334a45a8ff 4039 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 4040
bogdanm 0:9b334a45a8ff 4041 /* Clear Configuration Register 2 */
bogdanm 0:9b334a45a8ff 4042 I2C_RESET_CR2(hi2c);
bogdanm 0:9b334a45a8ff 4043
bogdanm 0:9b334a45a8ff 4044 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 4045 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 4046
bogdanm 0:9b334a45a8ff 4047 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 4048 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 4049
bogdanm 0:9b334a45a8ff 4050 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 4051 }
bogdanm 0:9b334a45a8ff 4052 return HAL_OK;
bogdanm 0:9b334a45a8ff 4053 }
bogdanm 0:9b334a45a8ff 4054
bogdanm 0:9b334a45a8ff 4055 /**
bogdanm 0:9b334a45a8ff 4056 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
bogdanm 0:9b334a45a8ff 4057 * @param hi2c: I2C handle.
bogdanm 0:9b334a45a8ff 4058 * @param DevAddress: specifies the slave address to be programmed.
bogdanm 0:9b334a45a8ff 4059 * @param Size: specifies the number of bytes to be programmed.
bogdanm 0:9b334a45a8ff 4060 * This parameter must be a value between 0 and 255.
bogdanm 0:9b334a45a8ff 4061 * @param Mode: new state of the I2C START condition generation.
bogdanm 0:9b334a45a8ff 4062 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 4063 * @arg I2C_RELOAD_MODE: Enable Reload mode .
bogdanm 0:9b334a45a8ff 4064 * @arg I2C_AUTOEND_MODE: Enable Automatic end mode.
bogdanm 0:9b334a45a8ff 4065 * @arg I2C_SOFTEND_MODE: Enable Software end mode.
bogdanm 0:9b334a45a8ff 4066 * @param Request: new state of the I2C START condition generation.
bogdanm 0:9b334a45a8ff 4067 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 4068 * @arg I2C_NO_STARTSTOP: Don't Generate stop and start condition.
bogdanm 0:9b334a45a8ff 4069 * @arg I2C_GENERATE_STOP: Generate stop condition (Size should be set to 0).
bogdanm 0:9b334a45a8ff 4070 * @arg I2C_GENERATE_START_READ: Generate Restart for read request.
bogdanm 0:9b334a45a8ff 4071 * @arg I2C_GENERATE_START_WRITE: Generate Restart for write request.
bogdanm 0:9b334a45a8ff 4072 * @retval None
bogdanm 0:9b334a45a8ff 4073 */
bogdanm 0:9b334a45a8ff 4074 static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
bogdanm 0:9b334a45a8ff 4075 {
bogdanm 0:9b334a45a8ff 4076 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 4077
bogdanm 0:9b334a45a8ff 4078 /* Check the parameters */
bogdanm 0:9b334a45a8ff 4079 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm 0:9b334a45a8ff 4080 assert_param(IS_TRANSFER_MODE(Mode));
bogdanm 0:9b334a45a8ff 4081 assert_param(IS_TRANSFER_REQUEST(Request));
bogdanm 0:9b334a45a8ff 4082
bogdanm 0:9b334a45a8ff 4083 /* Get the CR2 register value */
bogdanm 0:9b334a45a8ff 4084 tmpreg = hi2c->Instance->CR2;
bogdanm 0:9b334a45a8ff 4085
bogdanm 0:9b334a45a8ff 4086 /* clear tmpreg specific bits */
bogdanm 0:9b334a45a8ff 4087 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
bogdanm 0:9b334a45a8ff 4088
bogdanm 0:9b334a45a8ff 4089 /* update tmpreg */
bogdanm 0:9b334a45a8ff 4090 tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
bogdanm 0:9b334a45a8ff 4091 (uint32_t)Mode | (uint32_t)Request);
bogdanm 0:9b334a45a8ff 4092
bogdanm 0:9b334a45a8ff 4093 /* update CR2 register */
bogdanm 0:9b334a45a8ff 4094 hi2c->Instance->CR2 = tmpreg;
bogdanm 0:9b334a45a8ff 4095 }
bogdanm 0:9b334a45a8ff 4096
bogdanm 0:9b334a45a8ff 4097 /**
bogdanm 0:9b334a45a8ff 4098 * @}
bogdanm 0:9b334a45a8ff 4099 */
bogdanm 0:9b334a45a8ff 4100
bogdanm 0:9b334a45a8ff 4101 #endif /* HAL_I2C_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 4102 /**
bogdanm 0:9b334a45a8ff 4103 * @}
bogdanm 0:9b334a45a8ff 4104 */
bogdanm 0:9b334a45a8ff 4105
bogdanm 0:9b334a45a8ff 4106 /**
bogdanm 0:9b334a45a8ff 4107 * @}
bogdanm 0:9b334a45a8ff 4108 */
bogdanm 0:9b334a45a8ff 4109
bogdanm 0:9b334a45a8ff 4110 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/