mbed-dev - fix LPC812 PWM

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fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_dfsdm.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 0:9b334a45a8ff

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32l4xx_hal_dfsdm.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.0.0
bogdanm	0:9b334a45a8ff	6	* @date 26-June-2015
bogdanm	0:9b334a45a8ff	7	* @brief This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	8	* functionalities of the Digital Filter for Sigma-Delta Modulators
bogdanm	0:9b334a45a8ff	9	* (DFSDM) peripherals:
bogdanm	0:9b334a45a8ff	10	* + Initialization and configuration of channels and filters
bogdanm	0:9b334a45a8ff	11	* + Regular channels configuration
bogdanm	0:9b334a45a8ff	12	* + Injected channels configuration
bogdanm	0:9b334a45a8ff	13	* + Regular/Injected Channels DMA Configuration
bogdanm	0:9b334a45a8ff	14	* + Interrupts and flags management
bogdanm	0:9b334a45a8ff	15	* + Analog watchdog feature
bogdanm	0:9b334a45a8ff	16	* + Short-circuit detector feature
bogdanm	0:9b334a45a8ff	17	* + Extremes detector feature
bogdanm	0:9b334a45a8ff	18	* + Clock absence detector feature
bogdanm	0:9b334a45a8ff	19	* + Break generation on analog watchdog or short-circuit event
bogdanm	0:9b334a45a8ff	20	*
bogdanm	0:9b334a45a8ff	21	@verbatim
bogdanm	0:9b334a45a8ff	22	==============================================================================
bogdanm	0:9b334a45a8ff	23	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	24	==============================================================================
bogdanm	0:9b334a45a8ff	25	[..]
bogdanm	0:9b334a45a8ff	26	* Channel initialization *
bogdanm	0:9b334a45a8ff	27	==============================
bogdanm	0:9b334a45a8ff	28	[..]
bogdanm	0:9b334a45a8ff	29	(#) User has first to initialize channels (before filters initialization).
bogdanm	0:9b334a45a8ff	30	(#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
bogdanm	0:9b334a45a8ff	31	(++) Enable DFSDM clock interface with __HAL_RCC_DFSDM_CLK_ENABLE().
bogdanm	0:9b334a45a8ff	32	(++) Enable the clocks for the DFSDM GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
bogdanm	0:9b334a45a8ff	33	(++) Configure these DFSDM pins in alternate mode using HAL_GPIO_Init().
bogdanm	0:9b334a45a8ff	34	(++) If interrupt mode is used, enable and configure DFSDM1 global
bogdanm	0:9b334a45a8ff	35	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
bogdanm	0:9b334a45a8ff	36	(#) Configure the output clock, input, serial interface, analog watchdog,
bogdanm	0:9b334a45a8ff	37	offset and data right bit shift parameters for this channel using the
bogdanm	0:9b334a45a8ff	38	HAL_DFSDM_ChannelInit() function.
bogdanm	0:9b334a45a8ff	39
bogdanm	0:9b334a45a8ff	40	* Channel clock absence detector *
bogdanm	0:9b334a45a8ff	41	======================================
bogdanm	0:9b334a45a8ff	42	[..]
bogdanm	0:9b334a45a8ff	43	(#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
bogdanm	0:9b334a45a8ff	44	HAL_DFSDM_ChannelCkabStart_IT().
bogdanm	0:9b334a45a8ff	45	(#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
bogdanm	0:9b334a45a8ff	46	absence.
bogdanm	0:9b334a45a8ff	47	(#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
bogdanm	0:9b334a45a8ff	48	clock absence is detected.
bogdanm	0:9b334a45a8ff	49	(#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
bogdanm	0:9b334a45a8ff	50	HAL_DFSDM_ChannelCkabStop_IT().
bogdanm	0:9b334a45a8ff	51	(#) Please note that the same mode (polling or interrupt) has to be used
bogdanm	0:9b334a45a8ff	52	for all channels because the channels are sharing the same interrupt.
bogdanm	0:9b334a45a8ff	53	(#) Please note also that in interrupt mode, if clock absence detector is
bogdanm	0:9b334a45a8ff	54	stopped for one channel, interrupt will be disabled for all channels.
bogdanm	0:9b334a45a8ff	55
bogdanm	0:9b334a45a8ff	56	* Channel short circuit detector *
bogdanm	0:9b334a45a8ff	57	======================================
bogdanm	0:9b334a45a8ff	58	[..]
bogdanm	0:9b334a45a8ff	59	(#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
bogdanm	0:9b334a45a8ff	60	or HAL_DFSDM_ChannelScdStart_IT().
bogdanm	0:9b334a45a8ff	61	(#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
bogdanm	0:9b334a45a8ff	62	circuit.
bogdanm	0:9b334a45a8ff	63	(#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
bogdanm	0:9b334a45a8ff	64	short circuit is detected.
bogdanm	0:9b334a45a8ff	65	(#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
bogdanm	0:9b334a45a8ff	66	or HAL_DFSDM_ChannelScdStop_IT().
bogdanm	0:9b334a45a8ff	67	(#) Please note that the same mode (polling or interrupt) has to be used
bogdanm	0:9b334a45a8ff	68	for all channels because the channels are sharing the same interrupt.
bogdanm	0:9b334a45a8ff	69	(#) Please note also that in interrupt mode, if short circuit detector is
bogdanm	0:9b334a45a8ff	70	stopped for one channel, interrupt will be disabled for all channels.
bogdanm	0:9b334a45a8ff	71
bogdanm	0:9b334a45a8ff	72	* Channel analog watchdog value *
bogdanm	0:9b334a45a8ff	73	=====================================
bogdanm	0:9b334a45a8ff	74	[..]
bogdanm	0:9b334a45a8ff	75	(#) Get analog watchdog filter value of a channel using
bogdanm	0:9b334a45a8ff	76	HAL_DFSDM_ChannelGetAwdValue().
bogdanm	0:9b334a45a8ff	77
bogdanm	0:9b334a45a8ff	78	* Channel offset value *
bogdanm	0:9b334a45a8ff	79	=====================================
bogdanm	0:9b334a45a8ff	80	[..]
bogdanm	0:9b334a45a8ff	81	(#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
bogdanm	0:9b334a45a8ff	82
bogdanm	0:9b334a45a8ff	83	* Filter initialization *
bogdanm	0:9b334a45a8ff	84	=============================
bogdanm	0:9b334a45a8ff	85	[..]
bogdanm	0:9b334a45a8ff	86	(#) After channel initialization, user has to init filters.
bogdanm	0:9b334a45a8ff	87	(#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
bogdanm	0:9b334a45a8ff	88	(++) If interrupt mode is used , enable and configure DFSDMx global
bogdanm	0:9b334a45a8ff	89	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
bogdanm	0:9b334a45a8ff	90	Please note that DFSDM0 global interrupt could be already
bogdanm	0:9b334a45a8ff	91	enabled if interrupt is used for channel.
bogdanm	0:9b334a45a8ff	92	(++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
bogdanm	0:9b334a45a8ff	93	with DFSDMx filter handle using __HAL_LINKDMA().
bogdanm	0:9b334a45a8ff	94	(#) Configure the regular conversion, injected conversion and filter
bogdanm	0:9b334a45a8ff	95	parameters for this filter using the HAL_DFSDM_FilterInit() function.
bogdanm	0:9b334a45a8ff	96
bogdanm	0:9b334a45a8ff	97	* Filter regular channel conversion *
bogdanm	0:9b334a45a8ff	98	=========================================
bogdanm	0:9b334a45a8ff	99	[..]
bogdanm	0:9b334a45a8ff	100	(#) Select regular channel and enable/disable continuous mode using
bogdanm	0:9b334a45a8ff	101	HAL_DFSDM_FilterConfigRegChannel().
bogdanm	0:9b334a45a8ff	102	(#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
bogdanm	0:9b334a45a8ff	103	HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
bogdanm	0:9b334a45a8ff	104	HAL_DFSDM_FilterRegularMsbStart_DMA().
bogdanm	0:9b334a45a8ff	105	(#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
bogdanm	0:9b334a45a8ff	106	the end of regular conversion.
bogdanm	0:9b334a45a8ff	107	(#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
bogdanm	0:9b334a45a8ff	108	at the end of regular conversion.
bogdanm	0:9b334a45a8ff	109	(#) Get value of regular conversion and corresponding channel using
bogdanm	0:9b334a45a8ff	110	HAL_DFSDM_FilterGetRegularValue().
bogdanm	0:9b334a45a8ff	111	(#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
bogdanm	0:9b334a45a8ff	112	HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
bogdanm	0:9b334a45a8ff	113	half transfer and at the transfer complete. Please note that
bogdanm	0:9b334a45a8ff	114	HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
bogdanm	0:9b334a45a8ff	115	circular mode.
bogdanm	0:9b334a45a8ff	116	(#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
bogdanm	0:9b334a45a8ff	117	HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
bogdanm	0:9b334a45a8ff	118
bogdanm	0:9b334a45a8ff	119	* Filter injected channels conversion *
bogdanm	0:9b334a45a8ff	120	===========================================
bogdanm	0:9b334a45a8ff	121	[..]
bogdanm	0:9b334a45a8ff	122	(#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
bogdanm	0:9b334a45a8ff	123	(#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
bogdanm	0:9b334a45a8ff	124	HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
bogdanm	0:9b334a45a8ff	125	HAL_DFSDM_FilterInjectedMsbStart_DMA().
bogdanm	0:9b334a45a8ff	126	(#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
bogdanm	0:9b334a45a8ff	127	the end of injected conversion.
bogdanm	0:9b334a45a8ff	128	(#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
bogdanm	0:9b334a45a8ff	129	at the end of injected conversion.
bogdanm	0:9b334a45a8ff	130	(#) Get value of injected conversion and corresponding channel using
bogdanm	0:9b334a45a8ff	131	HAL_DFSDM_FilterGetInjectedValue().
bogdanm	0:9b334a45a8ff	132	(#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
bogdanm	0:9b334a45a8ff	133	HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
bogdanm	0:9b334a45a8ff	134	half transfer and at the transfer complete. Please note that
bogdanm	0:9b334a45a8ff	135	HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
bogdanm	0:9b334a45a8ff	136	circular mode.
bogdanm	0:9b334a45a8ff	137	(#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
bogdanm	0:9b334a45a8ff	138	HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
bogdanm	0:9b334a45a8ff	139
bogdanm	0:9b334a45a8ff	140	* Filter analog watchdog *
bogdanm	0:9b334a45a8ff	141	==============================
bogdanm	0:9b334a45a8ff	142	[..]
bogdanm	0:9b334a45a8ff	143	(#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
bogdanm	0:9b334a45a8ff	144	(#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
bogdanm	0:9b334a45a8ff	145	(#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
bogdanm	0:9b334a45a8ff	146
bogdanm	0:9b334a45a8ff	147	* Filter extreme detector *
bogdanm	0:9b334a45a8ff	148	===============================
bogdanm	0:9b334a45a8ff	149	[..]
bogdanm	0:9b334a45a8ff	150	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
bogdanm	0:9b334a45a8ff	151	(#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
bogdanm	0:9b334a45a8ff	152	(#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
bogdanm	0:9b334a45a8ff	153	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
bogdanm	0:9b334a45a8ff	154
bogdanm	0:9b334a45a8ff	155	* Filter conversion time *
bogdanm	0:9b334a45a8ff	156	==============================
bogdanm	0:9b334a45a8ff	157	[..]
bogdanm	0:9b334a45a8ff	158	(#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
bogdanm	0:9b334a45a8ff	159
bogdanm	0:9b334a45a8ff	160	@endverbatim
bogdanm	0:9b334a45a8ff	161	******************************************************************************
bogdanm	0:9b334a45a8ff	162	* @attention
bogdanm	0:9b334a45a8ff	163	*
bogdanm	0:9b334a45a8ff	164	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	165	*
bogdanm	0:9b334a45a8ff	166	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	167	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	168	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	169	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	170	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	171	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	172	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	173	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	174	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	175	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	176	*
bogdanm	0:9b334a45a8ff	177	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	178	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	179	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	180	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	181	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	182	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	183	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	184	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	185	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	186	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	187	*
bogdanm	0:9b334a45a8ff	188	******************************************************************************
bogdanm	0:9b334a45a8ff	189	*/
bogdanm	0:9b334a45a8ff	190
bogdanm	0:9b334a45a8ff	191	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	192	#include "stm32l4xx_hal.h"
bogdanm	0:9b334a45a8ff	193
bogdanm	0:9b334a45a8ff	194	/** @addtogroup STM32L4xx_HAL_Driver
bogdanm	0:9b334a45a8ff	195	* @{
bogdanm	0:9b334a45a8ff	196	*/
bogdanm	0:9b334a45a8ff	197	#ifdef HAL_DFSDM_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	198	/** @defgroup DFSDM DFSDM
bogdanm	0:9b334a45a8ff	199	* @brief DFSDM HAL driver module
bogdanm	0:9b334a45a8ff	200	* @{
bogdanm	0:9b334a45a8ff	201	*/
bogdanm	0:9b334a45a8ff	202
bogdanm	0:9b334a45a8ff	203	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	204	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	205	/** @defgroup DFSDM_Private_Define DFSDM Private Define
bogdanm	0:9b334a45a8ff	206	* @{
bogdanm	0:9b334a45a8ff	207	*/
bogdanm	0:9b334a45a8ff	208	#define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
bogdanm	0:9b334a45a8ff	209	#define DFSDM_AWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_AWSCDR_BKSCD)
bogdanm	0:9b334a45a8ff	210	#define DFSDM_AWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_AWSCDR_AWFOSR)
bogdanm	0:9b334a45a8ff	211	#define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
bogdanm	0:9b334a45a8ff	212	#define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
bogdanm	0:9b334a45a8ff	213	#define DFSDM_FCR_FOSR_OFFSET POSITION_VAL(DFSDM_FCR_FOSR)
bogdanm	0:9b334a45a8ff	214	#define DFSDM_CR1_MSB_RCH_OFFSET 8
bogdanm	0:9b334a45a8ff	215	#define DFSDM_CR2_EXCH_OFFSET POSITION_VAL(DFSDM_CR2_EXCH)
bogdanm	0:9b334a45a8ff	216	#define DFSDM_CR2_AWDCH_OFFSET POSITION_VAL(DFSDM_CR2_AWDCH)
bogdanm	0:9b334a45a8ff	217	#define DFSDM_ISR_CKABF_OFFSET POSITION_VAL(DFSDM_ISR_CKABF)
bogdanm	0:9b334a45a8ff	218	#define DFSDM_ISR_SCDF_OFFSET POSITION_VAL(DFSDM_ISR_SCDF)
bogdanm	0:9b334a45a8ff	219	#define DFSDM_ICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_ICR_CLRCKABF)
bogdanm	0:9b334a45a8ff	220	#define DFSDM_ICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_ICR_CLRSCSDF)
bogdanm	0:9b334a45a8ff	221	#define DFSDM_RDATAR_DATA_OFFSET POSITION_VAL(DFSDM_RDATAR_RDATA)
bogdanm	0:9b334a45a8ff	222	#define DFSDM_JDATAR_DATA_OFFSET POSITION_VAL(DFSDM_JDATAR_JDATA)
bogdanm	0:9b334a45a8ff	223	#define DFSDM_AWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_AWHTR_AWHT)
bogdanm	0:9b334a45a8ff	224	#define DFSDM_AWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_AWLTR_AWLT)
bogdanm	0:9b334a45a8ff	225	#define DFSDM_EXMAX_DATA_OFFSET POSITION_VAL(DFSDM_EXMAX_EXMAX)
bogdanm	0:9b334a45a8ff	226	#define DFSDM_EXMIN_DATA_OFFSET POSITION_VAL(DFSDM_EXMIN_EXMIN)
bogdanm	0:9b334a45a8ff	227	#define DFSDM_CNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_CNVTIMR_CNVCNT)
bogdanm	0:9b334a45a8ff	228	#define DFSDM_AWSR_HIGH_OFFSET POSITION_VAL(DFSDM_AWSR_AWHTF)
bogdanm	0:9b334a45a8ff	229	#define DFSDM_MSB_MASK 0xFFFF0000
bogdanm	0:9b334a45a8ff	230	#define DFSDM_LSB_MASK 0x0000FFFF
bogdanm	0:9b334a45a8ff	231	#define DFSDM_CKAB_TIMEOUT 5000
bogdanm	0:9b334a45a8ff	232	#define DFSDM_CHANNEL_NUMBER 8
bogdanm	0:9b334a45a8ff	233	/**
bogdanm	0:9b334a45a8ff	234	* @}
bogdanm	0:9b334a45a8ff	235	*/
bogdanm	0:9b334a45a8ff	236
bogdanm	0:9b334a45a8ff	237	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	238	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	239	/** @defgroup DFSDM_Private_Variables DFSDM Private Variables
bogdanm	0:9b334a45a8ff	240	* @{
bogdanm	0:9b334a45a8ff	241	*/
bogdanm	0:9b334a45a8ff	242	__IO uint32_t v_dfsdmChannelCounter = 0;
bogdanm	0:9b334a45a8ff	243	DFSDM_Channel_HandleTypeDef* a_dfsdmChannelHandle[DFSDM_CHANNEL_NUMBER] = {(DFSDM_Channel_HandleTypeDef *) NULL};
bogdanm	0:9b334a45a8ff	244	/**
bogdanm	0:9b334a45a8ff	245	* @}
bogdanm	0:9b334a45a8ff	246	*/
bogdanm	0:9b334a45a8ff	247
bogdanm	0:9b334a45a8ff	248	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	249	/** @defgroup DFSDM_Private_Functions DFSDM Private Functions
bogdanm	0:9b334a45a8ff	250	* @{
bogdanm	0:9b334a45a8ff	251	*/
bogdanm	0:9b334a45a8ff	252	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
bogdanm	0:9b334a45a8ff	253	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
bogdanm	0:9b334a45a8ff	254	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
bogdanm	0:9b334a45a8ff	255	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
bogdanm	0:9b334a45a8ff	256	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
bogdanm	0:9b334a45a8ff	257	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
bogdanm	0:9b334a45a8ff	258	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	259	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	260	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	261	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	262	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	263	/**
bogdanm	0:9b334a45a8ff	264	* @}
bogdanm	0:9b334a45a8ff	265	*/
bogdanm	0:9b334a45a8ff	266
bogdanm	0:9b334a45a8ff	267	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	268	/** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
bogdanm	0:9b334a45a8ff	269	* @{
bogdanm	0:9b334a45a8ff	270	*/
bogdanm	0:9b334a45a8ff	271
bogdanm	0:9b334a45a8ff	272	/** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	273	* @brief Channel initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	274	*
bogdanm	0:9b334a45a8ff	275	@verbatim
bogdanm	0:9b334a45a8ff	276	==============================================================================
bogdanm	0:9b334a45a8ff	277	##### Channel initialization and de-initialization functions #####
bogdanm	0:9b334a45a8ff	278	==============================================================================
bogdanm	0:9b334a45a8ff	279	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	280	(+) Initialize the DFSDM channel.
bogdanm	0:9b334a45a8ff	281	(+) De-initialize the DFSDM channel.
bogdanm	0:9b334a45a8ff	282	@endverbatim
bogdanm	0:9b334a45a8ff	283	* @{
bogdanm	0:9b334a45a8ff	284	*/
bogdanm	0:9b334a45a8ff	285
bogdanm	0:9b334a45a8ff	286	/**
bogdanm	0:9b334a45a8ff	287	* @brief Initialize the DFSDM channel according to the specified parameters
bogdanm	0:9b334a45a8ff	288	* in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
bogdanm	0:9b334a45a8ff	289	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	290	* @retval HAL status.
bogdanm	0:9b334a45a8ff	291	*/
bogdanm	0:9b334a45a8ff	292	HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	293	{
bogdanm	0:9b334a45a8ff	294	/* Check parameters */
bogdanm	0:9b334a45a8ff	295	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	296	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
bogdanm	0:9b334a45a8ff	297	assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
bogdanm	0:9b334a45a8ff	298	assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
bogdanm	0:9b334a45a8ff	299	assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
bogdanm	0:9b334a45a8ff	300	assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
bogdanm	0:9b334a45a8ff	301	assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
bogdanm	0:9b334a45a8ff	302	assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
bogdanm	0:9b334a45a8ff	303	assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
bogdanm	0:9b334a45a8ff	304	assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
bogdanm	0:9b334a45a8ff	305	assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
bogdanm	0:9b334a45a8ff	306
bogdanm	0:9b334a45a8ff	307	/* Check DFSDM Channel handle */
bogdanm	0:9b334a45a8ff	308	if(hdfsdm_channel == NULL)
bogdanm	0:9b334a45a8ff	309	{
bogdanm	0:9b334a45a8ff	310	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	311	}
bogdanm	0:9b334a45a8ff	312	/* Check that channel has not been already initialized */
bogdanm	0:9b334a45a8ff	313	if(a_dfsdmChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
bogdanm	0:9b334a45a8ff	314	{
bogdanm	0:9b334a45a8ff	315	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	316	}
bogdanm	0:9b334a45a8ff	317
bogdanm	0:9b334a45a8ff	318	/* Call MSP init function */
bogdanm	0:9b334a45a8ff	319	HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
bogdanm	0:9b334a45a8ff	320
bogdanm	0:9b334a45a8ff	321	/* Update the channel counter */
bogdanm	0:9b334a45a8ff	322	v_dfsdmChannelCounter++;
bogdanm	0:9b334a45a8ff	323
bogdanm	0:9b334a45a8ff	324	/* Configure output serial clock and enable global DFSDM interface only for first channel */
bogdanm	0:9b334a45a8ff	325	if(v_dfsdmChannelCounter == 1)
bogdanm	0:9b334a45a8ff	326	{
bogdanm	0:9b334a45a8ff	327	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
bogdanm	0:9b334a45a8ff	328	/* Set the output serial clock source */
bogdanm	0:9b334a45a8ff	329	DFSDM_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
bogdanm	0:9b334a45a8ff	330	DFSDM_Channel0->CHCFGR1 \|= hdfsdm_channel->Init.OutputClock.Selection;
bogdanm	0:9b334a45a8ff	331
bogdanm	0:9b334a45a8ff	332	/* Reset clock divider */
bogdanm	0:9b334a45a8ff	333	DFSDM_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
bogdanm	0:9b334a45a8ff	334	if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
bogdanm	0:9b334a45a8ff	335	{
bogdanm	0:9b334a45a8ff	336	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
bogdanm	0:9b334a45a8ff	337	/* Set the output clock divider */
bogdanm	0:9b334a45a8ff	338	DFSDM_Channel0->CHCFGR1 \|= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
bogdanm	0:9b334a45a8ff	339	DFSDM_CHCFGR1_CLK_DIV_OFFSET);
bogdanm	0:9b334a45a8ff	340	}
bogdanm	0:9b334a45a8ff	341
bogdanm	0:9b334a45a8ff	342	/* enable the DFSDM global interface */
bogdanm	0:9b334a45a8ff	343	DFSDM_Channel0->CHCFGR1 \|= DFSDM_CHCFGR1_DFSDMEN;
bogdanm	0:9b334a45a8ff	344	}
bogdanm	0:9b334a45a8ff	345
bogdanm	0:9b334a45a8ff	346	/* Set channel input parameters */
bogdanm	0:9b334a45a8ff	347	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK \| DFSDM_CHCFGR1_DATMPX \|
bogdanm	0:9b334a45a8ff	348	DFSDM_CHCFGR1_CHINSEL);
bogdanm	0:9b334a45a8ff	349	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.Input.Multiplexer \|
bogdanm	0:9b334a45a8ff	350	hdfsdm_channel->Init.Input.DataPacking \|
bogdanm	0:9b334a45a8ff	351	hdfsdm_channel->Init.Input.Pins);
bogdanm	0:9b334a45a8ff	352
bogdanm	0:9b334a45a8ff	353	/* Set serial interface parameters */
bogdanm	0:9b334a45a8ff	354	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP \| DFSDM_CHCFGR1_SPICKSEL);
bogdanm	0:9b334a45a8ff	355	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.SerialInterface.Type \|
bogdanm	0:9b334a45a8ff	356	hdfsdm_channel->Init.SerialInterface.SpiClock);
bogdanm	0:9b334a45a8ff	357
bogdanm	0:9b334a45a8ff	358	/* Set analog watchdog parameters */
bogdanm	0:9b334a45a8ff	359	hdfsdm_channel->Instance->AWSCDR &= ~(DFSDM_AWSCDR_AWFORD \| DFSDM_AWSCDR_AWFOSR);
bogdanm	0:9b334a45a8ff	360	hdfsdm_channel->Instance->AWSCDR \|= (hdfsdm_channel->Init.Awd.FilterOrder \|
bogdanm	0:9b334a45a8ff	361	((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_AWSCDR_FOSR_OFFSET));
bogdanm	0:9b334a45a8ff	362
bogdanm	0:9b334a45a8ff	363	/* Set channel offset and right bit shift */
bogdanm	0:9b334a45a8ff	364	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET \| DFSDM_CHCFGR2_DTRBS);
bogdanm	0:9b334a45a8ff	365	hdfsdm_channel->Instance->CHCFGR2 \|= ((hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) \|
bogdanm	0:9b334a45a8ff	366	(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
bogdanm	0:9b334a45a8ff	367
bogdanm	0:9b334a45a8ff	368	/* Enable DFSDM channel */
bogdanm	0:9b334a45a8ff	369	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CHEN;
bogdanm	0:9b334a45a8ff	370
bogdanm	0:9b334a45a8ff	371	/* Set DFSDM Channel to ready state */
bogdanm	0:9b334a45a8ff	372	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
bogdanm	0:9b334a45a8ff	373
bogdanm	0:9b334a45a8ff	374	/* Store channel handle in DFSDM channel handle table */
bogdanm	0:9b334a45a8ff	375	a_dfsdmChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
bogdanm	0:9b334a45a8ff	376
bogdanm	0:9b334a45a8ff	377	return HAL_OK;
bogdanm	0:9b334a45a8ff	378	}
bogdanm	0:9b334a45a8ff	379
bogdanm	0:9b334a45a8ff	380	/**
bogdanm	0:9b334a45a8ff	381	* @brief De-initialize the DFSDM channel.
bogdanm	0:9b334a45a8ff	382	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	383	* @retval HAL status.
bogdanm	0:9b334a45a8ff	384	*/
bogdanm	0:9b334a45a8ff	385	HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	386	{
bogdanm	0:9b334a45a8ff	387	/* Check parameters */
bogdanm	0:9b334a45a8ff	388	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	389
bogdanm	0:9b334a45a8ff	390	/* Check DFSDM Channel handle */
bogdanm	0:9b334a45a8ff	391	if(hdfsdm_channel == NULL)
bogdanm	0:9b334a45a8ff	392	{
bogdanm	0:9b334a45a8ff	393	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	394	}
bogdanm	0:9b334a45a8ff	395	/* Check that channel has not been already deinitialized */
bogdanm	0:9b334a45a8ff	396	if(a_dfsdmChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
bogdanm	0:9b334a45a8ff	397	{
bogdanm	0:9b334a45a8ff	398	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	399	}
bogdanm	0:9b334a45a8ff	400
bogdanm	0:9b334a45a8ff	401	/* Disable the DFSDM channel */
bogdanm	0:9b334a45a8ff	402	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
bogdanm	0:9b334a45a8ff	403
bogdanm	0:9b334a45a8ff	404	/* Update the channel counter */
bogdanm	0:9b334a45a8ff	405	v_dfsdmChannelCounter--;
bogdanm	0:9b334a45a8ff	406
bogdanm	0:9b334a45a8ff	407	/* Disable global DFSDM at deinit of last channel */
bogdanm	0:9b334a45a8ff	408	if(v_dfsdmChannelCounter == 0)
bogdanm	0:9b334a45a8ff	409	{
bogdanm	0:9b334a45a8ff	410	DFSDM_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
bogdanm	0:9b334a45a8ff	411	}
bogdanm	0:9b334a45a8ff	412
bogdanm	0:9b334a45a8ff	413	/* Call MSP deinit function */
bogdanm	0:9b334a45a8ff	414	HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
bogdanm	0:9b334a45a8ff	415
bogdanm	0:9b334a45a8ff	416	/* Set DFSDM Channel in reset state */
bogdanm	0:9b334a45a8ff	417	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
bogdanm	0:9b334a45a8ff	418
bogdanm	0:9b334a45a8ff	419	/* Reset channel handle in DFSDM channel handle table */
bogdanm	0:9b334a45a8ff	420	a_dfsdmChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
bogdanm	0:9b334a45a8ff	421
bogdanm	0:9b334a45a8ff	422	return HAL_OK;
bogdanm	0:9b334a45a8ff	423	}
bogdanm	0:9b334a45a8ff	424
bogdanm	0:9b334a45a8ff	425	/**
bogdanm	0:9b334a45a8ff	426	* @brief Initialize the DFSDM channel MSP.
bogdanm	0:9b334a45a8ff	427	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	428	* @retval None
bogdanm	0:9b334a45a8ff	429	*/
bogdanm	0:9b334a45a8ff	430	__weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	431	{
bogdanm	0:9b334a45a8ff	432	/* NOTE : This function should not be modified, when the function is needed,
bogdanm	0:9b334a45a8ff	433	the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
bogdanm	0:9b334a45a8ff	434	*/
bogdanm	0:9b334a45a8ff	435	}
bogdanm	0:9b334a45a8ff	436
bogdanm	0:9b334a45a8ff	437	/**
bogdanm	0:9b334a45a8ff	438	* @brief De-initialize the DFSDM channel MSP.
bogdanm	0:9b334a45a8ff	439	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	440	* @retval None
bogdanm	0:9b334a45a8ff	441	*/
bogdanm	0:9b334a45a8ff	442	__weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	443	{
bogdanm	0:9b334a45a8ff	444	/* NOTE : This function should not be modified, when the function is needed,
bogdanm	0:9b334a45a8ff	445	the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
bogdanm	0:9b334a45a8ff	446	*/
bogdanm	0:9b334a45a8ff	447	}
bogdanm	0:9b334a45a8ff	448
bogdanm	0:9b334a45a8ff	449	/**
bogdanm	0:9b334a45a8ff	450	* @}
bogdanm	0:9b334a45a8ff	451	*/
bogdanm	0:9b334a45a8ff	452
bogdanm	0:9b334a45a8ff	453	/** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
bogdanm	0:9b334a45a8ff	454	* @brief Channel operation functions
bogdanm	0:9b334a45a8ff	455	*
bogdanm	0:9b334a45a8ff	456	@verbatim
bogdanm	0:9b334a45a8ff	457	==============================================================================
bogdanm	0:9b334a45a8ff	458	##### Channel operation functions #####
bogdanm	0:9b334a45a8ff	459	==============================================================================
bogdanm	0:9b334a45a8ff	460	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	461	(+) Manage clock absence detector feature.
bogdanm	0:9b334a45a8ff	462	(+) Manage short circuit detector feature.
bogdanm	0:9b334a45a8ff	463	(+) Get analog watchdog value.
bogdanm	0:9b334a45a8ff	464	(+) Modify offset value.
bogdanm	0:9b334a45a8ff	465	@endverbatim
bogdanm	0:9b334a45a8ff	466	* @{
bogdanm	0:9b334a45a8ff	467	*/
bogdanm	0:9b334a45a8ff	468
bogdanm	0:9b334a45a8ff	469	/**
bogdanm	0:9b334a45a8ff	470	* @brief This function allows to start clock absence detection in polling mode.
bogdanm	0:9b334a45a8ff	471	* @note Same mode has to be used for all channels.
bogdanm	0:9b334a45a8ff	472	* @note If clock is not available on this channel during 5 seconds,
bogdanm	0:9b334a45a8ff	473	* clock absence detection will not be activated and function
bogdanm	0:9b334a45a8ff	474	* will return HAL_TIMEOUT error.
bogdanm	0:9b334a45a8ff	475	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	476	* @retval HAL status
bogdanm	0:9b334a45a8ff	477	*/
bogdanm	0:9b334a45a8ff	478	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	479	{
bogdanm	0:9b334a45a8ff	480	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	481	uint32_t channel;
bogdanm	0:9b334a45a8ff	482	uint32_t tickstart;
bogdanm	0:9b334a45a8ff	483
bogdanm	0:9b334a45a8ff	484	/* Check parameters */
bogdanm	0:9b334a45a8ff	485	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	486
bogdanm	0:9b334a45a8ff	487	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	488	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	489	{
bogdanm	0:9b334a45a8ff	490	/* Return error status */
bogdanm	0:9b334a45a8ff	491	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	492	}
bogdanm	0:9b334a45a8ff	493	else
bogdanm	0:9b334a45a8ff	494	{
bogdanm	0:9b334a45a8ff	495	/* Get channel number from channel instance */
bogdanm	0:9b334a45a8ff	496	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	497
bogdanm	0:9b334a45a8ff	498	/* Get timeout */
bogdanm	0:9b334a45a8ff	499	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	500
bogdanm	0:9b334a45a8ff	501	/* Clear clock absence flag */
bogdanm	0:9b334a45a8ff	502	while((((DFSDM_Filter0->ISR & DFSDM_ISR_CKABF) >> (DFSDM_ISR_CKABF_OFFSET + channel)) & 1) != 0)
bogdanm	0:9b334a45a8ff	503	{
bogdanm	0:9b334a45a8ff	504	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRCKABF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	505
bogdanm	0:9b334a45a8ff	506	/* Check the Timeout */
bogdanm	0:9b334a45a8ff	507	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
bogdanm	0:9b334a45a8ff	508	{
bogdanm	0:9b334a45a8ff	509	/* Set timeout status */
bogdanm	0:9b334a45a8ff	510	status = HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	511	break;
bogdanm	0:9b334a45a8ff	512	}
bogdanm	0:9b334a45a8ff	513	}
bogdanm	0:9b334a45a8ff	514
bogdanm	0:9b334a45a8ff	515	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	516	{
bogdanm	0:9b334a45a8ff	517	/* Start clock absence detection */
bogdanm	0:9b334a45a8ff	518	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
bogdanm	0:9b334a45a8ff	519	}
bogdanm	0:9b334a45a8ff	520	}
bogdanm	0:9b334a45a8ff	521	/* Return function status */
bogdanm	0:9b334a45a8ff	522	return status;
bogdanm	0:9b334a45a8ff	523	}
bogdanm	0:9b334a45a8ff	524
bogdanm	0:9b334a45a8ff	525	/**
bogdanm	0:9b334a45a8ff	526	* @brief This function allows to poll for the clock absence detection.
bogdanm	0:9b334a45a8ff	527	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	528	* @param Timeout : Timeout value in milliseconds.
bogdanm	0:9b334a45a8ff	529	* @retval HAL status
bogdanm	0:9b334a45a8ff	530	*/
bogdanm	0:9b334a45a8ff	531	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
bogdanm	0:9b334a45a8ff	532	uint32_t Timeout)
bogdanm	0:9b334a45a8ff	533	{
bogdanm	0:9b334a45a8ff	534	uint32_t tickstart;
bogdanm	0:9b334a45a8ff	535	uint32_t channel;
bogdanm	0:9b334a45a8ff	536
bogdanm	0:9b334a45a8ff	537	/* Check parameters */
bogdanm	0:9b334a45a8ff	538	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	539
bogdanm	0:9b334a45a8ff	540	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	541	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	542	{
bogdanm	0:9b334a45a8ff	543	/* Return error status */
bogdanm	0:9b334a45a8ff	544	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	545	}
bogdanm	0:9b334a45a8ff	546	else
bogdanm	0:9b334a45a8ff	547	{
bogdanm	0:9b334a45a8ff	548	/* Get channel number from channel instance */
bogdanm	0:9b334a45a8ff	549	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	550
bogdanm	0:9b334a45a8ff	551	/* Get timeout */
bogdanm	0:9b334a45a8ff	552	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	553
bogdanm	0:9b334a45a8ff	554	/* Wait clock absence detection */
bogdanm	0:9b334a45a8ff	555	while((((DFSDM_Filter0->ISR & DFSDM_ISR_CKABF) >> (DFSDM_ISR_CKABF_OFFSET + channel)) & 1) == 0)
bogdanm	0:9b334a45a8ff	556	{
bogdanm	0:9b334a45a8ff	557	/* Check the Timeout */
bogdanm	0:9b334a45a8ff	558	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	559	{
bogdanm	0:9b334a45a8ff	560	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	561	{
bogdanm	0:9b334a45a8ff	562	/* Return timeout status */
bogdanm	0:9b334a45a8ff	563	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	564	}
bogdanm	0:9b334a45a8ff	565	}
bogdanm	0:9b334a45a8ff	566	}
bogdanm	0:9b334a45a8ff	567
bogdanm	0:9b334a45a8ff	568	/* Clear clock absence detection flag */
bogdanm	0:9b334a45a8ff	569	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRCKABF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	570
bogdanm	0:9b334a45a8ff	571	/* Return function status */
bogdanm	0:9b334a45a8ff	572	return HAL_OK;
bogdanm	0:9b334a45a8ff	573	}
bogdanm	0:9b334a45a8ff	574	}
bogdanm	0:9b334a45a8ff	575
bogdanm	0:9b334a45a8ff	576	/**
bogdanm	0:9b334a45a8ff	577	* @brief This function allows to stop clock absence detection in polling mode.
bogdanm	0:9b334a45a8ff	578	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	579	* @retval HAL status
bogdanm	0:9b334a45a8ff	580	*/
bogdanm	0:9b334a45a8ff	581	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	582	{
bogdanm	0:9b334a45a8ff	583	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	584	uint32_t channel;
bogdanm	0:9b334a45a8ff	585
bogdanm	0:9b334a45a8ff	586	/* Check parameters */
bogdanm	0:9b334a45a8ff	587	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	588
bogdanm	0:9b334a45a8ff	589	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	590	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	591	{
bogdanm	0:9b334a45a8ff	592	/* Return error status */
bogdanm	0:9b334a45a8ff	593	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	594	}
bogdanm	0:9b334a45a8ff	595	else
bogdanm	0:9b334a45a8ff	596	{
bogdanm	0:9b334a45a8ff	597	/* Stop clock absence detection */
bogdanm	0:9b334a45a8ff	598	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
bogdanm	0:9b334a45a8ff	599
bogdanm	0:9b334a45a8ff	600	/* Clear clock absence flag */
bogdanm	0:9b334a45a8ff	601	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	602	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRCKABF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	603	}
bogdanm	0:9b334a45a8ff	604	/* Return function status */
bogdanm	0:9b334a45a8ff	605	return status;
bogdanm	0:9b334a45a8ff	606	}
bogdanm	0:9b334a45a8ff	607
bogdanm	0:9b334a45a8ff	608	/**
bogdanm	0:9b334a45a8ff	609	* @brief This function allows to start clock absence detection in interrupt mode.
bogdanm	0:9b334a45a8ff	610	* @note Same mode has to be used for all channels.
bogdanm	0:9b334a45a8ff	611	* @note If clock is not available on this channel during 5 seconds,
bogdanm	0:9b334a45a8ff	612	* clock absence detection will not be activated and function
bogdanm	0:9b334a45a8ff	613	* will return HAL_TIMEOUT error.
bogdanm	0:9b334a45a8ff	614	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	615	* @retval HAL status
bogdanm	0:9b334a45a8ff	616	*/
bogdanm	0:9b334a45a8ff	617	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	618	{
bogdanm	0:9b334a45a8ff	619	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	620	uint32_t channel;
bogdanm	0:9b334a45a8ff	621	uint32_t tickstart;
bogdanm	0:9b334a45a8ff	622
bogdanm	0:9b334a45a8ff	623	/* Check parameters */
bogdanm	0:9b334a45a8ff	624	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	625
bogdanm	0:9b334a45a8ff	626	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	627	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	628	{
bogdanm	0:9b334a45a8ff	629	/* Return error status */
bogdanm	0:9b334a45a8ff	630	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	631	}
bogdanm	0:9b334a45a8ff	632	else
bogdanm	0:9b334a45a8ff	633	{
bogdanm	0:9b334a45a8ff	634	/* Get channel number from channel instance */
bogdanm	0:9b334a45a8ff	635	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	636
bogdanm	0:9b334a45a8ff	637	/* Get timeout */
bogdanm	0:9b334a45a8ff	638	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	639
bogdanm	0:9b334a45a8ff	640	/* Clear clock absence flag */
bogdanm	0:9b334a45a8ff	641	while((((DFSDM_Filter0->ISR & DFSDM_ISR_CKABF) >> (DFSDM_ISR_CKABF_OFFSET + channel)) & 1) != 0)
bogdanm	0:9b334a45a8ff	642	{
bogdanm	0:9b334a45a8ff	643	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRCKABF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	644
bogdanm	0:9b334a45a8ff	645	/* Check the Timeout */
bogdanm	0:9b334a45a8ff	646	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
bogdanm	0:9b334a45a8ff	647	{
bogdanm	0:9b334a45a8ff	648	/* Set timeout status */
bogdanm	0:9b334a45a8ff	649	status = HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	650	break;
bogdanm	0:9b334a45a8ff	651	}
bogdanm	0:9b334a45a8ff	652	}
bogdanm	0:9b334a45a8ff	653
bogdanm	0:9b334a45a8ff	654	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	655	{
bogdanm	0:9b334a45a8ff	656	/* Activate clock absence detection interrupt */
bogdanm	0:9b334a45a8ff	657	DFSDM_Filter0->CR2 \|= DFSDM_CR2_CKABIE;
bogdanm	0:9b334a45a8ff	658
bogdanm	0:9b334a45a8ff	659	/* Start clock absence detection */
bogdanm	0:9b334a45a8ff	660	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
bogdanm	0:9b334a45a8ff	661	}
bogdanm	0:9b334a45a8ff	662	}
bogdanm	0:9b334a45a8ff	663	/* Return function status */
bogdanm	0:9b334a45a8ff	664	return status;
bogdanm	0:9b334a45a8ff	665	}
bogdanm	0:9b334a45a8ff	666
bogdanm	0:9b334a45a8ff	667	/**
bogdanm	0:9b334a45a8ff	668	* @brief Clock absence detection callback.
bogdanm	0:9b334a45a8ff	669	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	670	* @retval None
bogdanm	0:9b334a45a8ff	671	*/
bogdanm	0:9b334a45a8ff	672	__weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	673	{
bogdanm	0:9b334a45a8ff	674	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	675	the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	676	*/
bogdanm	0:9b334a45a8ff	677	}
bogdanm	0:9b334a45a8ff	678
bogdanm	0:9b334a45a8ff	679	/**
bogdanm	0:9b334a45a8ff	680	* @brief This function allows to stop clock absence detection in interrupt mode.
bogdanm	0:9b334a45a8ff	681	* @note Interrupt will be disabled for all channels
bogdanm	0:9b334a45a8ff	682	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	683	* @retval HAL status
bogdanm	0:9b334a45a8ff	684	*/
bogdanm	0:9b334a45a8ff	685	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	686	{
bogdanm	0:9b334a45a8ff	687	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	688	uint32_t channel;
bogdanm	0:9b334a45a8ff	689
bogdanm	0:9b334a45a8ff	690	/* Check parameters */
bogdanm	0:9b334a45a8ff	691	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	692
bogdanm	0:9b334a45a8ff	693	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	694	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	695	{
bogdanm	0:9b334a45a8ff	696	/* Return error status */
bogdanm	0:9b334a45a8ff	697	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	698	}
bogdanm	0:9b334a45a8ff	699	else
bogdanm	0:9b334a45a8ff	700	{
bogdanm	0:9b334a45a8ff	701	/* Stop clock absence detection */
bogdanm	0:9b334a45a8ff	702	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
bogdanm	0:9b334a45a8ff	703
bogdanm	0:9b334a45a8ff	704	/* Clear clock absence flag */
bogdanm	0:9b334a45a8ff	705	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	706	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRCKABF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	707
bogdanm	0:9b334a45a8ff	708	/* Disable clock absence detection interrupt */
bogdanm	0:9b334a45a8ff	709	DFSDM_Filter0->CR2 &= ~(DFSDM_CR2_CKABIE);
bogdanm	0:9b334a45a8ff	710	}
bogdanm	0:9b334a45a8ff	711	/* Return function status */
bogdanm	0:9b334a45a8ff	712	return status;
bogdanm	0:9b334a45a8ff	713	}
bogdanm	0:9b334a45a8ff	714
bogdanm	0:9b334a45a8ff	715	/**
bogdanm	0:9b334a45a8ff	716	* @brief This function allows to start short circuit detection in polling mode.
bogdanm	0:9b334a45a8ff	717	* @note Same mode has to be used for all channels
bogdanm	0:9b334a45a8ff	718	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	719	* @param Threshold : Short circuit detector threshold.
bogdanm	0:9b334a45a8ff	720	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
bogdanm	0:9b334a45a8ff	721	* @param BreakSignal : Break signals assigned to short circuit event.
bogdanm	0:9b334a45a8ff	722	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
bogdanm	0:9b334a45a8ff	723	* @retval HAL status
bogdanm	0:9b334a45a8ff	724	*/
bogdanm	0:9b334a45a8ff	725	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
bogdanm	0:9b334a45a8ff	726	uint32_t Threshold,
bogdanm	0:9b334a45a8ff	727	uint32_t BreakSignal)
bogdanm	0:9b334a45a8ff	728	{
bogdanm	0:9b334a45a8ff	729	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	730
bogdanm	0:9b334a45a8ff	731	/* Check parameters */
bogdanm	0:9b334a45a8ff	732	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	733	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
bogdanm	0:9b334a45a8ff	734	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
bogdanm	0:9b334a45a8ff	735
bogdanm	0:9b334a45a8ff	736	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	737	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	738	{
bogdanm	0:9b334a45a8ff	739	/* Return error status */
bogdanm	0:9b334a45a8ff	740	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	741	}
bogdanm	0:9b334a45a8ff	742	else
bogdanm	0:9b334a45a8ff	743	{
bogdanm	0:9b334a45a8ff	744	/* Configure threshold and break signals */
bogdanm	0:9b334a45a8ff	745	hdfsdm_channel->Instance->AWSCDR &= ~(DFSDM_AWSCDR_BKSCD \| DFSDM_AWSCDR_SCDT);
bogdanm	0:9b334a45a8ff	746	hdfsdm_channel->Instance->AWSCDR \|= ((BreakSignal << DFSDM_AWSCDR_BKSCD_OFFSET) \| \
bogdanm	0:9b334a45a8ff	747	Threshold);
bogdanm	0:9b334a45a8ff	748
bogdanm	0:9b334a45a8ff	749	/* Start short circuit detection */
bogdanm	0:9b334a45a8ff	750	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
bogdanm	0:9b334a45a8ff	751	}
bogdanm	0:9b334a45a8ff	752	/* Return function status */
bogdanm	0:9b334a45a8ff	753	return status;
bogdanm	0:9b334a45a8ff	754	}
bogdanm	0:9b334a45a8ff	755
bogdanm	0:9b334a45a8ff	756	/**
bogdanm	0:9b334a45a8ff	757	* @brief This function allows to poll for the short circuit detection.
bogdanm	0:9b334a45a8ff	758	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	759	* @param Timeout : Timeout value in milliseconds.
bogdanm	0:9b334a45a8ff	760	* @retval HAL status
bogdanm	0:9b334a45a8ff	761	*/
bogdanm	0:9b334a45a8ff	762	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
bogdanm	0:9b334a45a8ff	763	uint32_t Timeout)
bogdanm	0:9b334a45a8ff	764	{
bogdanm	0:9b334a45a8ff	765	uint32_t tickstart;
bogdanm	0:9b334a45a8ff	766	uint32_t channel;
bogdanm	0:9b334a45a8ff	767
bogdanm	0:9b334a45a8ff	768	/* Check parameters */
bogdanm	0:9b334a45a8ff	769	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	770
bogdanm	0:9b334a45a8ff	771	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	772	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	773	{
bogdanm	0:9b334a45a8ff	774	/* Return error status */
bogdanm	0:9b334a45a8ff	775	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	776	}
bogdanm	0:9b334a45a8ff	777	else
bogdanm	0:9b334a45a8ff	778	{
bogdanm	0:9b334a45a8ff	779	/* Get channel number from channel instance */
bogdanm	0:9b334a45a8ff	780	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	781
bogdanm	0:9b334a45a8ff	782	/* Get timeout */
bogdanm	0:9b334a45a8ff	783	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	784
bogdanm	0:9b334a45a8ff	785	/* Wait short circuit detection */
bogdanm	0:9b334a45a8ff	786	while(((DFSDM_Filter0->ISR & DFSDM_ISR_SCDF) >> (DFSDM_ISR_SCDF_OFFSET + channel)) == 0)
bogdanm	0:9b334a45a8ff	787	{
bogdanm	0:9b334a45a8ff	788	/* Check the Timeout */
bogdanm	0:9b334a45a8ff	789	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	790	{
bogdanm	0:9b334a45a8ff	791	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	792	{
bogdanm	0:9b334a45a8ff	793	/* Return timeout status */
bogdanm	0:9b334a45a8ff	794	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	795	}
bogdanm	0:9b334a45a8ff	796	}
bogdanm	0:9b334a45a8ff	797	}
bogdanm	0:9b334a45a8ff	798
bogdanm	0:9b334a45a8ff	799	/* Clear short circuit detection flag */
bogdanm	0:9b334a45a8ff	800	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRSCDF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	801
bogdanm	0:9b334a45a8ff	802	/* Return function status */
bogdanm	0:9b334a45a8ff	803	return HAL_OK;
bogdanm	0:9b334a45a8ff	804	}
bogdanm	0:9b334a45a8ff	805	}
bogdanm	0:9b334a45a8ff	806
bogdanm	0:9b334a45a8ff	807	/**
bogdanm	0:9b334a45a8ff	808	* @brief This function allows to stop short circuit detection in polling mode.
bogdanm	0:9b334a45a8ff	809	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	810	* @retval HAL status
bogdanm	0:9b334a45a8ff	811	*/
bogdanm	0:9b334a45a8ff	812	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	813	{
bogdanm	0:9b334a45a8ff	814	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	815	uint32_t channel;
bogdanm	0:9b334a45a8ff	816
bogdanm	0:9b334a45a8ff	817	/* Check parameters */
bogdanm	0:9b334a45a8ff	818	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	819
bogdanm	0:9b334a45a8ff	820	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	821	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	822	{
bogdanm	0:9b334a45a8ff	823	/* Return error status */
bogdanm	0:9b334a45a8ff	824	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	825	}
bogdanm	0:9b334a45a8ff	826	else
bogdanm	0:9b334a45a8ff	827	{
bogdanm	0:9b334a45a8ff	828	/* Stop short circuit detection */
bogdanm	0:9b334a45a8ff	829	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
bogdanm	0:9b334a45a8ff	830
bogdanm	0:9b334a45a8ff	831	/* Clear short circuit detection flag */
bogdanm	0:9b334a45a8ff	832	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	833	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRSCDF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	834	}
bogdanm	0:9b334a45a8ff	835	/* Return function status */
bogdanm	0:9b334a45a8ff	836	return status;
bogdanm	0:9b334a45a8ff	837	}
bogdanm	0:9b334a45a8ff	838
bogdanm	0:9b334a45a8ff	839	/**
bogdanm	0:9b334a45a8ff	840	* @brief This function allows to start short circuit detection in interrupt mode.
bogdanm	0:9b334a45a8ff	841	* @note Same mode has to be used for all channels
bogdanm	0:9b334a45a8ff	842	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	843	* @param Threshold : Short circuit detector threshold.
bogdanm	0:9b334a45a8ff	844	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
bogdanm	0:9b334a45a8ff	845	* @param BreakSignal : Break signals assigned to short circuit event.
bogdanm	0:9b334a45a8ff	846	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
bogdanm	0:9b334a45a8ff	847	* @retval HAL status
bogdanm	0:9b334a45a8ff	848	*/
bogdanm	0:9b334a45a8ff	849	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
bogdanm	0:9b334a45a8ff	850	uint32_t Threshold,
bogdanm	0:9b334a45a8ff	851	uint32_t BreakSignal)
bogdanm	0:9b334a45a8ff	852	{
bogdanm	0:9b334a45a8ff	853	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	854
bogdanm	0:9b334a45a8ff	855	/* Check parameters */
bogdanm	0:9b334a45a8ff	856	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	857	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
bogdanm	0:9b334a45a8ff	858	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
bogdanm	0:9b334a45a8ff	859
bogdanm	0:9b334a45a8ff	860	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	861	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	862	{
bogdanm	0:9b334a45a8ff	863	/* Return error status */
bogdanm	0:9b334a45a8ff	864	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	865	}
bogdanm	0:9b334a45a8ff	866	else
bogdanm	0:9b334a45a8ff	867	{
bogdanm	0:9b334a45a8ff	868	/* Activate short circuit detection interrupt */
bogdanm	0:9b334a45a8ff	869	DFSDM_Filter0->CR2 \|= DFSDM_CR2_SCDIE;
bogdanm	0:9b334a45a8ff	870
bogdanm	0:9b334a45a8ff	871	/* Configure threshold and break signals */
bogdanm	0:9b334a45a8ff	872	hdfsdm_channel->Instance->AWSCDR &= ~(DFSDM_AWSCDR_BKSCD \| DFSDM_AWSCDR_SCDT);
bogdanm	0:9b334a45a8ff	873	hdfsdm_channel->Instance->AWSCDR \|= ((BreakSignal << DFSDM_AWSCDR_BKSCD_OFFSET) \| \
bogdanm	0:9b334a45a8ff	874	Threshold);
bogdanm	0:9b334a45a8ff	875
bogdanm	0:9b334a45a8ff	876	/* Start short circuit detection */
bogdanm	0:9b334a45a8ff	877	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
bogdanm	0:9b334a45a8ff	878	}
bogdanm	0:9b334a45a8ff	879	/* Return function status */
bogdanm	0:9b334a45a8ff	880	return status;
bogdanm	0:9b334a45a8ff	881	}
bogdanm	0:9b334a45a8ff	882
bogdanm	0:9b334a45a8ff	883	/**
bogdanm	0:9b334a45a8ff	884	* @brief Short circuit detection callback.
bogdanm	0:9b334a45a8ff	885	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	886	* @retval None
bogdanm	0:9b334a45a8ff	887	*/
bogdanm	0:9b334a45a8ff	888	__weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	889	{
bogdanm	0:9b334a45a8ff	890	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	891	the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	892	*/
bogdanm	0:9b334a45a8ff	893	}
bogdanm	0:9b334a45a8ff	894
bogdanm	0:9b334a45a8ff	895	/**
bogdanm	0:9b334a45a8ff	896	* @brief This function allows to stop short circuit detection in interrupt mode.
bogdanm	0:9b334a45a8ff	897	* @note Interrupt will be disabled for all channels
bogdanm	0:9b334a45a8ff	898	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	899	* @retval HAL status
bogdanm	0:9b334a45a8ff	900	*/
bogdanm	0:9b334a45a8ff	901	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	902	{
bogdanm	0:9b334a45a8ff	903	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	904	uint32_t channel;
bogdanm	0:9b334a45a8ff	905
bogdanm	0:9b334a45a8ff	906	/* Check parameters */
bogdanm	0:9b334a45a8ff	907	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	908
bogdanm	0:9b334a45a8ff	909	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	910	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	911	{
bogdanm	0:9b334a45a8ff	912	/* Return error status */
bogdanm	0:9b334a45a8ff	913	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	914	}
bogdanm	0:9b334a45a8ff	915	else
bogdanm	0:9b334a45a8ff	916	{
bogdanm	0:9b334a45a8ff	917	/* Stop short circuit detection */
bogdanm	0:9b334a45a8ff	918	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
bogdanm	0:9b334a45a8ff	919
bogdanm	0:9b334a45a8ff	920	/* Clear short circuit detection flag */
bogdanm	0:9b334a45a8ff	921	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
bogdanm	0:9b334a45a8ff	922	DFSDM_Filter0->ICR = (1 << (DFSDM_ICR_CLRSCDF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	923
bogdanm	0:9b334a45a8ff	924	/* Disable short circuit detection interrupt */
bogdanm	0:9b334a45a8ff	925	DFSDM_Filter0->CR2 &= ~(DFSDM_CR2_SCDIE);
bogdanm	0:9b334a45a8ff	926	}
bogdanm	0:9b334a45a8ff	927	/* Return function status */
bogdanm	0:9b334a45a8ff	928	return status;
bogdanm	0:9b334a45a8ff	929	}
bogdanm	0:9b334a45a8ff	930
bogdanm	0:9b334a45a8ff	931	/**
bogdanm	0:9b334a45a8ff	932	* @brief This function allows to get channel analog watchdog value.
bogdanm	0:9b334a45a8ff	933	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	934	* @retval Channel analog watchdog value.
bogdanm	0:9b334a45a8ff	935	*/
bogdanm	0:9b334a45a8ff	936	int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	937	{
bogdanm	0:9b334a45a8ff	938	return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
bogdanm	0:9b334a45a8ff	939	}
bogdanm	0:9b334a45a8ff	940
bogdanm	0:9b334a45a8ff	941	/**
bogdanm	0:9b334a45a8ff	942	* @brief This function allows to modify channel offset value.
bogdanm	0:9b334a45a8ff	943	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	944	* @param Offset : DFSDM channel offset.
bogdanm	0:9b334a45a8ff	945	* This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
bogdanm	0:9b334a45a8ff	946	* @retval HAL status.
bogdanm	0:9b334a45a8ff	947	*/
bogdanm	0:9b334a45a8ff	948	HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
bogdanm	0:9b334a45a8ff	949	int32_t Offset)
bogdanm	0:9b334a45a8ff	950	{
bogdanm	0:9b334a45a8ff	951	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/* Check parameters */
bogdanm	0:9b334a45a8ff	954	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
bogdanm	0:9b334a45a8ff	955	assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
bogdanm	0:9b334a45a8ff	956
bogdanm	0:9b334a45a8ff	957	/* Check DFSDM channel state */
bogdanm	0:9b334a45a8ff	958	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
bogdanm	0:9b334a45a8ff	959	{
bogdanm	0:9b334a45a8ff	960	/* Return error status */
bogdanm	0:9b334a45a8ff	961	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	962	}
bogdanm	0:9b334a45a8ff	963	else
bogdanm	0:9b334a45a8ff	964	{
bogdanm	0:9b334a45a8ff	965	/* Modify channel offset */
bogdanm	0:9b334a45a8ff	966	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
bogdanm	0:9b334a45a8ff	967	hdfsdm_channel->Instance->CHCFGR2 \|= (Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
bogdanm	0:9b334a45a8ff	968	}
bogdanm	0:9b334a45a8ff	969	/* Return function status */
bogdanm	0:9b334a45a8ff	970	return status;
bogdanm	0:9b334a45a8ff	971	}
bogdanm	0:9b334a45a8ff	972
bogdanm	0:9b334a45a8ff	973	/**
bogdanm	0:9b334a45a8ff	974	* @}
bogdanm	0:9b334a45a8ff	975	*/
bogdanm	0:9b334a45a8ff	976
bogdanm	0:9b334a45a8ff	977	/** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
bogdanm	0:9b334a45a8ff	978	* @brief Channel state function
bogdanm	0:9b334a45a8ff	979	*
bogdanm	0:9b334a45a8ff	980	@verbatim
bogdanm	0:9b334a45a8ff	981	==============================================================================
bogdanm	0:9b334a45a8ff	982	##### Channel state function #####
bogdanm	0:9b334a45a8ff	983	==============================================================================
bogdanm	0:9b334a45a8ff	984	[..] This section provides function allowing to:
bogdanm	0:9b334a45a8ff	985	(+) Get channel handle state.
bogdanm	0:9b334a45a8ff	986	@endverbatim
bogdanm	0:9b334a45a8ff	987	* @{
bogdanm	0:9b334a45a8ff	988	*/
bogdanm	0:9b334a45a8ff	989
bogdanm	0:9b334a45a8ff	990	/**
bogdanm	0:9b334a45a8ff	991	* @brief This function allows to get the current DFSDM channel handle state.
bogdanm	0:9b334a45a8ff	992	* @param hdfsdm_channel : DFSDM channel handle.
bogdanm	0:9b334a45a8ff	993	* @retval DFSDM channel state.
bogdanm	0:9b334a45a8ff	994	*/
bogdanm	0:9b334a45a8ff	995	HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
bogdanm	0:9b334a45a8ff	996	{
bogdanm	0:9b334a45a8ff	997	/* Return DFSDM channel handle state */
bogdanm	0:9b334a45a8ff	998	return hdfsdm_channel->State;
bogdanm	0:9b334a45a8ff	999	}
bogdanm	0:9b334a45a8ff	1000
bogdanm	0:9b334a45a8ff	1001	/**
bogdanm	0:9b334a45a8ff	1002	* @}
bogdanm	0:9b334a45a8ff	1003	*/
bogdanm	0:9b334a45a8ff	1004
bogdanm	0:9b334a45a8ff	1005	/** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	1006	* @brief Filter initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	1007	*
bogdanm	0:9b334a45a8ff	1008	@verbatim
bogdanm	0:9b334a45a8ff	1009	==============================================================================
bogdanm	0:9b334a45a8ff	1010	##### Filter initialization and de-initialization functions #####
bogdanm	0:9b334a45a8ff	1011	==============================================================================
bogdanm	0:9b334a45a8ff	1012	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	1013	(+) Initialize the DFSDM filter.
bogdanm	0:9b334a45a8ff	1014	(+) De-initialize the DFSDM filter.
bogdanm	0:9b334a45a8ff	1015	@endverbatim
bogdanm	0:9b334a45a8ff	1016	* @{
bogdanm	0:9b334a45a8ff	1017	*/
bogdanm	0:9b334a45a8ff	1018
bogdanm	0:9b334a45a8ff	1019	/**
bogdanm	0:9b334a45a8ff	1020	* @brief Initialize the DFSDM filter according to the specified parameters
bogdanm	0:9b334a45a8ff	1021	* in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
bogdanm	0:9b334a45a8ff	1022	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1023	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1024	*/
bogdanm	0:9b334a45a8ff	1025	HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1026	{
bogdanm	0:9b334a45a8ff	1027	/* Check parameters */
bogdanm	0:9b334a45a8ff	1028	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1029	assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
bogdanm	0:9b334a45a8ff	1030	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
bogdanm	0:9b334a45a8ff	1031	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
bogdanm	0:9b334a45a8ff	1032	assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
bogdanm	0:9b334a45a8ff	1033	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
bogdanm	0:9b334a45a8ff	1034	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
bogdanm	0:9b334a45a8ff	1035	assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
bogdanm	0:9b334a45a8ff	1036	assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
bogdanm	0:9b334a45a8ff	1037	assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
bogdanm	0:9b334a45a8ff	1038
bogdanm	0:9b334a45a8ff	1039	/* Check DFSDM Channel handle */
bogdanm	0:9b334a45a8ff	1040	if(hdfsdm_filter == NULL)
bogdanm	0:9b334a45a8ff	1041	{
bogdanm	0:9b334a45a8ff	1042	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1043	}
bogdanm	0:9b334a45a8ff	1044
bogdanm	0:9b334a45a8ff	1045	/* Check parameters compatibility */
bogdanm	0:9b334a45a8ff	1046	if((hdfsdm_filter->Instance == DFSDM_Filter0) &&
bogdanm	0:9b334a45a8ff	1047	((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) \|\|
bogdanm	0:9b334a45a8ff	1048	(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
bogdanm	0:9b334a45a8ff	1049	{
bogdanm	0:9b334a45a8ff	1050	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1051	}
bogdanm	0:9b334a45a8ff	1052
bogdanm	0:9b334a45a8ff	1053	/* Initialize DFSDM filter variables with default values */
bogdanm	0:9b334a45a8ff	1054	hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
bogdanm	0:9b334a45a8ff	1055	hdfsdm_filter->InjectedChannelsNbr = 1;
bogdanm	0:9b334a45a8ff	1056	hdfsdm_filter->InjConvRemaining = 1;
bogdanm	0:9b334a45a8ff	1057	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1058
bogdanm	0:9b334a45a8ff	1059	/* Call MSP init function */
bogdanm	0:9b334a45a8ff	1060	HAL_DFSDM_FilterMspInit(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1061
bogdanm	0:9b334a45a8ff	1062	/* Set regular parameters */
bogdanm	0:9b334a45a8ff	1063	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_RSYNC);
bogdanm	0:9b334a45a8ff	1064	if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
bogdanm	0:9b334a45a8ff	1065	{
bogdanm	0:9b334a45a8ff	1066	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_FAST;
bogdanm	0:9b334a45a8ff	1067	}
bogdanm	0:9b334a45a8ff	1068	else
bogdanm	0:9b334a45a8ff	1069	{
bogdanm	0:9b334a45a8ff	1070	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_FAST);
bogdanm	0:9b334a45a8ff	1071	}
bogdanm	0:9b334a45a8ff	1072
bogdanm	0:9b334a45a8ff	1073	if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
bogdanm	0:9b334a45a8ff	1074	{
bogdanm	0:9b334a45a8ff	1075	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_RDMAEN;
bogdanm	0:9b334a45a8ff	1076	}
bogdanm	0:9b334a45a8ff	1077	else
bogdanm	0:9b334a45a8ff	1078	{
bogdanm	0:9b334a45a8ff	1079	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_RDMAEN);
bogdanm	0:9b334a45a8ff	1080	}
bogdanm	0:9b334a45a8ff	1081
bogdanm	0:9b334a45a8ff	1082	/* Set injected parameters */
bogdanm	0:9b334a45a8ff	1083	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_JSYNC \| DFSDM_CR1_JEXTEN \| DFSDM_CR1_JEXTSEL);
bogdanm	0:9b334a45a8ff	1084	if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
bogdanm	0:9b334a45a8ff	1085	{
bogdanm	0:9b334a45a8ff	1086	assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
bogdanm	0:9b334a45a8ff	1087	assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
bogdanm	0:9b334a45a8ff	1088	hdfsdm_filter->Instance->CR1 \|= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
bogdanm	0:9b334a45a8ff	1089	}
bogdanm	0:9b334a45a8ff	1090
bogdanm	0:9b334a45a8ff	1091	if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
bogdanm	0:9b334a45a8ff	1092	{
bogdanm	0:9b334a45a8ff	1093	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_JSCAN;
bogdanm	0:9b334a45a8ff	1094	}
bogdanm	0:9b334a45a8ff	1095	else
bogdanm	0:9b334a45a8ff	1096	{
bogdanm	0:9b334a45a8ff	1097	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_JSCAN);
bogdanm	0:9b334a45a8ff	1098	}
bogdanm	0:9b334a45a8ff	1099
bogdanm	0:9b334a45a8ff	1100	if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
bogdanm	0:9b334a45a8ff	1101	{
bogdanm	0:9b334a45a8ff	1102	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_JDMAEN;
bogdanm	0:9b334a45a8ff	1103	}
bogdanm	0:9b334a45a8ff	1104	else
bogdanm	0:9b334a45a8ff	1105	{
bogdanm	0:9b334a45a8ff	1106	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_JDMAEN);
bogdanm	0:9b334a45a8ff	1107	}
bogdanm	0:9b334a45a8ff	1108
bogdanm	0:9b334a45a8ff	1109	/* Set filter parameters */
bogdanm	0:9b334a45a8ff	1110	hdfsdm_filter->Instance->FCR &= ~(DFSDM_FCR_FORD \| DFSDM_FCR_FOSR \| DFSDM_FCR_IOSR);
bogdanm	0:9b334a45a8ff	1111	hdfsdm_filter->Instance->FCR \|= (hdfsdm_filter->Init.FilterParam.SincOrder \|
bogdanm	0:9b334a45a8ff	1112	((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FCR_FOSR_OFFSET) \|
bogdanm	0:9b334a45a8ff	1113	(hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
bogdanm	0:9b334a45a8ff	1114
bogdanm	0:9b334a45a8ff	1115	/* Store regular and injected triggers and injected scan mode*/
bogdanm	0:9b334a45a8ff	1116	hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
bogdanm	0:9b334a45a8ff	1117	hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
bogdanm	0:9b334a45a8ff	1118	hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
bogdanm	0:9b334a45a8ff	1119	hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
bogdanm	0:9b334a45a8ff	1120
bogdanm	0:9b334a45a8ff	1121	/* Enable DFSDM filter */
bogdanm	0:9b334a45a8ff	1122	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_DFEN;
bogdanm	0:9b334a45a8ff	1123
bogdanm	0:9b334a45a8ff	1124	/* Set DFSDM filter to ready state */
bogdanm	0:9b334a45a8ff	1125	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
bogdanm	0:9b334a45a8ff	1126
bogdanm	0:9b334a45a8ff	1127	return HAL_OK;
bogdanm	0:9b334a45a8ff	1128	}
bogdanm	0:9b334a45a8ff	1129
bogdanm	0:9b334a45a8ff	1130	/**
bogdanm	0:9b334a45a8ff	1131	* @brief De-initializes the DFSDM filter.
bogdanm	0:9b334a45a8ff	1132	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1133	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1134	*/
bogdanm	0:9b334a45a8ff	1135	HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1136	{
bogdanm	0:9b334a45a8ff	1137	/* Check parameters */
bogdanm	0:9b334a45a8ff	1138	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1139
bogdanm	0:9b334a45a8ff	1140	/* Check DFSDM filter handle */
bogdanm	0:9b334a45a8ff	1141	if(hdfsdm_filter == NULL)
bogdanm	0:9b334a45a8ff	1142	{
bogdanm	0:9b334a45a8ff	1143	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1144	}
bogdanm	0:9b334a45a8ff	1145
bogdanm	0:9b334a45a8ff	1146	/* Disable the DFSDM filter */
bogdanm	0:9b334a45a8ff	1147	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_DFEN);
bogdanm	0:9b334a45a8ff	1148
bogdanm	0:9b334a45a8ff	1149	/* Call MSP deinit function */
bogdanm	0:9b334a45a8ff	1150	HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1151
bogdanm	0:9b334a45a8ff	1152	/* Set DFSDM filter in reset state */
bogdanm	0:9b334a45a8ff	1153	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
bogdanm	0:9b334a45a8ff	1154
bogdanm	0:9b334a45a8ff	1155	return HAL_OK;
bogdanm	0:9b334a45a8ff	1156	}
bogdanm	0:9b334a45a8ff	1157
bogdanm	0:9b334a45a8ff	1158	/**
bogdanm	0:9b334a45a8ff	1159	* @brief Initializes the DFSDM filter MSP.
bogdanm	0:9b334a45a8ff	1160	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1161	* @retval None
bogdanm	0:9b334a45a8ff	1162	*/
bogdanm	0:9b334a45a8ff	1163	__weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1164	{
bogdanm	0:9b334a45a8ff	1165	/* NOTE : This function should not be modified, when the function is needed,
bogdanm	0:9b334a45a8ff	1166	the HAL_DFSDM_FilterMspInit could be implemented in the user file.
bogdanm	0:9b334a45a8ff	1167	*/
bogdanm	0:9b334a45a8ff	1168	}
bogdanm	0:9b334a45a8ff	1169
bogdanm	0:9b334a45a8ff	1170	/**
bogdanm	0:9b334a45a8ff	1171	* @brief De-initializes the DFSDM filter MSP.
bogdanm	0:9b334a45a8ff	1172	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1173	* @retval None
bogdanm	0:9b334a45a8ff	1174	*/
bogdanm	0:9b334a45a8ff	1175	__weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1176	{
bogdanm	0:9b334a45a8ff	1177	/* NOTE : This function should not be modified, when the function is needed,
bogdanm	0:9b334a45a8ff	1178	the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
bogdanm	0:9b334a45a8ff	1179	*/
bogdanm	0:9b334a45a8ff	1180	}
bogdanm	0:9b334a45a8ff	1181
bogdanm	0:9b334a45a8ff	1182	/**
bogdanm	0:9b334a45a8ff	1183	* @}
bogdanm	0:9b334a45a8ff	1184	*/
bogdanm	0:9b334a45a8ff	1185
bogdanm	0:9b334a45a8ff	1186	/** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
bogdanm	0:9b334a45a8ff	1187	* @brief Filter control functions
bogdanm	0:9b334a45a8ff	1188	*
bogdanm	0:9b334a45a8ff	1189	@verbatim
bogdanm	0:9b334a45a8ff	1190	==============================================================================
bogdanm	0:9b334a45a8ff	1191	##### Filter control functions #####
bogdanm	0:9b334a45a8ff	1192	==============================================================================
bogdanm	0:9b334a45a8ff	1193	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	1194	(+) Select channel and enable/disable continuous mode for regular conversion.
bogdanm	0:9b334a45a8ff	1195	(+) Select channels for injected conversion.
bogdanm	0:9b334a45a8ff	1196	@endverbatim
bogdanm	0:9b334a45a8ff	1197	* @{
bogdanm	0:9b334a45a8ff	1198	*/
bogdanm	0:9b334a45a8ff	1199
bogdanm	0:9b334a45a8ff	1200	/**
bogdanm	0:9b334a45a8ff	1201	* @brief This function allows to select channel and to enable/disable
bogdanm	0:9b334a45a8ff	1202	* continuous mode for regular conversion.
bogdanm	0:9b334a45a8ff	1203	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1204	* @param Channel : Channel for regular conversion.
bogdanm	0:9b334a45a8ff	1205	* This parameter can be a value of @ref DFSDM_Channel_Selection.
bogdanm	0:9b334a45a8ff	1206	* @param ContinuousMode : Enable/disable continuous mode for regular conversion.
bogdanm	0:9b334a45a8ff	1207	* This parameter can be a value of @ref DFSDM_ContinuousMode.
bogdanm	0:9b334a45a8ff	1208	* @retval HAL status
bogdanm	0:9b334a45a8ff	1209	*/
bogdanm	0:9b334a45a8ff	1210	HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1211	uint32_t Channel,
bogdanm	0:9b334a45a8ff	1212	uint32_t ContinuousMode)
bogdanm	0:9b334a45a8ff	1213	{
bogdanm	0:9b334a45a8ff	1214	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1215
bogdanm	0:9b334a45a8ff	1216	/* Check parameters */
bogdanm	0:9b334a45a8ff	1217	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1218	assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
bogdanm	0:9b334a45a8ff	1219	assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
bogdanm	0:9b334a45a8ff	1220
bogdanm	0:9b334a45a8ff	1221	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1222	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
bogdanm	0:9b334a45a8ff	1223	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
bogdanm	0:9b334a45a8ff	1224	{
bogdanm	0:9b334a45a8ff	1225	/* Configure channel and continuous mode for regular conversion */
bogdanm	0:9b334a45a8ff	1226	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_RCH \| DFSDM_CR1_RCONT);
bogdanm	0:9b334a45a8ff	1227	if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
bogdanm	0:9b334a45a8ff	1228	{
bogdanm	0:9b334a45a8ff	1229	hdfsdm_filter->Instance->CR1 \|= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_CR1_MSB_RCH_OFFSET) \|
bogdanm	0:9b334a45a8ff	1230	DFSDM_CR1_RCONT);
bogdanm	0:9b334a45a8ff	1231	}
bogdanm	0:9b334a45a8ff	1232	else
bogdanm	0:9b334a45a8ff	1233	{
bogdanm	0:9b334a45a8ff	1234	hdfsdm_filter->Instance->CR1 \|= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_CR1_MSB_RCH_OFFSET);
bogdanm	0:9b334a45a8ff	1235	}
bogdanm	0:9b334a45a8ff	1236	/* Store continuous mode information */
bogdanm	0:9b334a45a8ff	1237	hdfsdm_filter->RegularContMode = ContinuousMode;
bogdanm	0:9b334a45a8ff	1238	}
bogdanm	0:9b334a45a8ff	1239	else
bogdanm	0:9b334a45a8ff	1240	{
bogdanm	0:9b334a45a8ff	1241	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1242	}
bogdanm	0:9b334a45a8ff	1243
bogdanm	0:9b334a45a8ff	1244	/* Return function status */
bogdanm	0:9b334a45a8ff	1245	return status;
bogdanm	0:9b334a45a8ff	1246	}
bogdanm	0:9b334a45a8ff	1247
bogdanm	0:9b334a45a8ff	1248	/**
bogdanm	0:9b334a45a8ff	1249	* @brief This function allows to select channels for injected conversion.
bogdanm	0:9b334a45a8ff	1250	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1251	* @param Channel : Channels for injected conversion.
bogdanm	0:9b334a45a8ff	1252	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
bogdanm	0:9b334a45a8ff	1253	* @retval HAL status
bogdanm	0:9b334a45a8ff	1254	*/
bogdanm	0:9b334a45a8ff	1255	HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1256	uint32_t Channel)
bogdanm	0:9b334a45a8ff	1257	{
bogdanm	0:9b334a45a8ff	1258	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1259
bogdanm	0:9b334a45a8ff	1260	/* Check parameters */
bogdanm	0:9b334a45a8ff	1261	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1262	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
bogdanm	0:9b334a45a8ff	1263
bogdanm	0:9b334a45a8ff	1264	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1265	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
bogdanm	0:9b334a45a8ff	1266	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
bogdanm	0:9b334a45a8ff	1267	{
bogdanm	0:9b334a45a8ff	1268	/* Configure channel for injected conversion */
bogdanm	0:9b334a45a8ff	1269	hdfsdm_filter->Instance->JCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
bogdanm	0:9b334a45a8ff	1270	/* Store number of injected channels */
bogdanm	0:9b334a45a8ff	1271	hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
bogdanm	0:9b334a45a8ff	1272	/* Update number of injected channels remaining */
bogdanm	0:9b334a45a8ff	1273	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
bogdanm	0:9b334a45a8ff	1274	hdfsdm_filter->InjectedChannelsNbr : 1;
bogdanm	0:9b334a45a8ff	1275	}
bogdanm	0:9b334a45a8ff	1276	else
bogdanm	0:9b334a45a8ff	1277	{
bogdanm	0:9b334a45a8ff	1278	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1279	}
bogdanm	0:9b334a45a8ff	1280	/* Return function status */
bogdanm	0:9b334a45a8ff	1281	return status;
bogdanm	0:9b334a45a8ff	1282	}
bogdanm	0:9b334a45a8ff	1283
bogdanm	0:9b334a45a8ff	1284	/**
bogdanm	0:9b334a45a8ff	1285	* @}
bogdanm	0:9b334a45a8ff	1286	*/
bogdanm	0:9b334a45a8ff	1287
bogdanm	0:9b334a45a8ff	1288	/** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
bogdanm	0:9b334a45a8ff	1289	* @brief Filter operation functions
bogdanm	0:9b334a45a8ff	1290	*
bogdanm	0:9b334a45a8ff	1291	@verbatim
bogdanm	0:9b334a45a8ff	1292	==============================================================================
bogdanm	0:9b334a45a8ff	1293	##### Filter operation functions #####
bogdanm	0:9b334a45a8ff	1294	==============================================================================
bogdanm	0:9b334a45a8ff	1295	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	1296	(+) Start conversion of regular/injected channel.
bogdanm	0:9b334a45a8ff	1297	(+) Poll for the end of regular/injected conversion.
bogdanm	0:9b334a45a8ff	1298	(+) Stop conversion of regular/injected channel.
bogdanm	0:9b334a45a8ff	1299	(+) Start conversion of regular/injected channel and enable interrupt.
bogdanm	0:9b334a45a8ff	1300	(+) Call the callback functions at the end of regular/injected conversions.
bogdanm	0:9b334a45a8ff	1301	(+) Stop conversion of regular/injected channel and disable interrupt.
bogdanm	0:9b334a45a8ff	1302	(+) Start conversion of regular/injected channel and enable DMA transfer.
bogdanm	0:9b334a45a8ff	1303	(+) Stop conversion of regular/injected channel and disable DMA transfer.
bogdanm	0:9b334a45a8ff	1304	(+) Start analog watchdog and enable interrupt.
bogdanm	0:9b334a45a8ff	1305	(+) Call the callback function when analog watchdog occurs.
bogdanm	0:9b334a45a8ff	1306	(+) Stop analog watchdog and disable interrupt.
bogdanm	0:9b334a45a8ff	1307	(+) Start extreme detector.
bogdanm	0:9b334a45a8ff	1308	(+) Stop extreme detector.
bogdanm	0:9b334a45a8ff	1309	(+) Get result of regular channel conversion.
bogdanm	0:9b334a45a8ff	1310	(+) Get result of injected channel conversion.
bogdanm	0:9b334a45a8ff	1311	(+) Get extreme detector maximum and minimum values.
bogdanm	0:9b334a45a8ff	1312	(+) Get conversion time.
bogdanm	0:9b334a45a8ff	1313	(+) Handle DFSDM interrupt request.
bogdanm	0:9b334a45a8ff	1314	@endverbatim
bogdanm	0:9b334a45a8ff	1315	* @{
bogdanm	0:9b334a45a8ff	1316	*/
bogdanm	0:9b334a45a8ff	1317
bogdanm	0:9b334a45a8ff	1318	/**
bogdanm	0:9b334a45a8ff	1319	* @brief This function allows to start regular conversion in polling mode.
bogdanm	0:9b334a45a8ff	1320	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1321	* in idle state or if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	1322	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1323	* @retval HAL status
bogdanm	0:9b334a45a8ff	1324	*/
bogdanm	0:9b334a45a8ff	1325	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1326	{
bogdanm	0:9b334a45a8ff	1327	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1328
bogdanm	0:9b334a45a8ff	1329	/* Check parameters */
bogdanm	0:9b334a45a8ff	1330	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1331
bogdanm	0:9b334a45a8ff	1332	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1333	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	1334	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
bogdanm	0:9b334a45a8ff	1335	{
bogdanm	0:9b334a45a8ff	1336	/* Start regular conversion */
bogdanm	0:9b334a45a8ff	1337	DFSDM_RegConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1338	}
bogdanm	0:9b334a45a8ff	1339	else
bogdanm	0:9b334a45a8ff	1340	{
bogdanm	0:9b334a45a8ff	1341	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1342	}
bogdanm	0:9b334a45a8ff	1343	/* Return function status */
bogdanm	0:9b334a45a8ff	1344	return status;
bogdanm	0:9b334a45a8ff	1345	}
bogdanm	0:9b334a45a8ff	1346
bogdanm	0:9b334a45a8ff	1347	/**
bogdanm	0:9b334a45a8ff	1348	* @brief This function allows to poll for the end of regular conversion.
bogdanm	0:9b334a45a8ff	1349	* @note This function should be called only if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1350	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1351	* @param Timeout : Timeout value in milliseconds.
bogdanm	0:9b334a45a8ff	1352	* @retval HAL status
bogdanm	0:9b334a45a8ff	1353	*/
bogdanm	0:9b334a45a8ff	1354	HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1355	uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1356	{
bogdanm	0:9b334a45a8ff	1357	uint32_t tickstart;
bogdanm	0:9b334a45a8ff	1358
bogdanm	0:9b334a45a8ff	1359	/* Check parameters */
bogdanm	0:9b334a45a8ff	1360	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1361
bogdanm	0:9b334a45a8ff	1362	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1363	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
bogdanm	0:9b334a45a8ff	1364	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	1365	{
bogdanm	0:9b334a45a8ff	1366	/* Return error status */
bogdanm	0:9b334a45a8ff	1367	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1368	}
bogdanm	0:9b334a45a8ff	1369	else
bogdanm	0:9b334a45a8ff	1370	{
bogdanm	0:9b334a45a8ff	1371	/* Get timeout */
bogdanm	0:9b334a45a8ff	1372	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1373
bogdanm	0:9b334a45a8ff	1374	/* Wait end of regular conversion */
bogdanm	0:9b334a45a8ff	1375	while((hdfsdm_filter->Instance->ISR & DFSDM_ISR_REOCF) != DFSDM_ISR_REOCF)
bogdanm	0:9b334a45a8ff	1376	{
bogdanm	0:9b334a45a8ff	1377	/* Check the Timeout */
bogdanm	0:9b334a45a8ff	1378	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1379	{
bogdanm	0:9b334a45a8ff	1380	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	1381	{
bogdanm	0:9b334a45a8ff	1382	/* Return timeout status */
bogdanm	0:9b334a45a8ff	1383	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1384	}
bogdanm	0:9b334a45a8ff	1385	}
bogdanm	0:9b334a45a8ff	1386	}
bogdanm	0:9b334a45a8ff	1387	/* Check if overrun occurs */
bogdanm	0:9b334a45a8ff	1388	if((hdfsdm_filter->Instance->ISR & DFSDM_ISR_ROVRF) == DFSDM_ISR_ROVRF)
bogdanm	0:9b334a45a8ff	1389	{
bogdanm	0:9b334a45a8ff	1390	/* Update error code and call error callback */
bogdanm	0:9b334a45a8ff	1391	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
bogdanm	0:9b334a45a8ff	1392	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1393
bogdanm	0:9b334a45a8ff	1394	/* Clear regular overrun flag */
bogdanm	0:9b334a45a8ff	1395	hdfsdm_filter->Instance->ICR = DFSDM_ICR_CLRROVRF;
bogdanm	0:9b334a45a8ff	1396	}
bogdanm	0:9b334a45a8ff	1397	/* Update DFSDM filter state only if not continuous conversion and SW trigger */
bogdanm	0:9b334a45a8ff	1398	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
bogdanm	0:9b334a45a8ff	1399	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
bogdanm	0:9b334a45a8ff	1400	{
bogdanm	0:9b334a45a8ff	1401	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
bogdanm	0:9b334a45a8ff	1402	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
bogdanm	0:9b334a45a8ff	1403	}
bogdanm	0:9b334a45a8ff	1404	/* Return function status */
bogdanm	0:9b334a45a8ff	1405	return HAL_OK;
bogdanm	0:9b334a45a8ff	1406	}
bogdanm	0:9b334a45a8ff	1407	}
bogdanm	0:9b334a45a8ff	1408
bogdanm	0:9b334a45a8ff	1409	/**
bogdanm	0:9b334a45a8ff	1410	* @brief This function allows to stop regular conversion in polling mode.
bogdanm	0:9b334a45a8ff	1411	* @note This function should be called only if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1412	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1413	* @retval HAL status
bogdanm	0:9b334a45a8ff	1414	*/
bogdanm	0:9b334a45a8ff	1415	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1416	{
bogdanm	0:9b334a45a8ff	1417	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1418
bogdanm	0:9b334a45a8ff	1419	/* Check parameters */
bogdanm	0:9b334a45a8ff	1420	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1421
bogdanm	0:9b334a45a8ff	1422	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1423	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
bogdanm	0:9b334a45a8ff	1424	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	1425	{
bogdanm	0:9b334a45a8ff	1426	/* Return error status */
bogdanm	0:9b334a45a8ff	1427	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1428	}
bogdanm	0:9b334a45a8ff	1429	else
bogdanm	0:9b334a45a8ff	1430	{
bogdanm	0:9b334a45a8ff	1431	/* Stop regular conversion */
bogdanm	0:9b334a45a8ff	1432	DFSDM_RegConvStop(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1433	}
bogdanm	0:9b334a45a8ff	1434	/* Return function status */
bogdanm	0:9b334a45a8ff	1435	return status;
bogdanm	0:9b334a45a8ff	1436	}
bogdanm	0:9b334a45a8ff	1437
bogdanm	0:9b334a45a8ff	1438	/**
bogdanm	0:9b334a45a8ff	1439	* @brief This function allows to start regular conversion in interrupt mode.
bogdanm	0:9b334a45a8ff	1440	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1441	* in idle state or if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	1442	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1443	* @retval HAL status
bogdanm	0:9b334a45a8ff	1444	*/
bogdanm	0:9b334a45a8ff	1445	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1446	{
bogdanm	0:9b334a45a8ff	1447	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1448
bogdanm	0:9b334a45a8ff	1449	/* Check parameters */
bogdanm	0:9b334a45a8ff	1450	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1451
bogdanm	0:9b334a45a8ff	1452	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1453	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	1454	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
bogdanm	0:9b334a45a8ff	1455	{
bogdanm	0:9b334a45a8ff	1456	/* Enable interrupts for regular conversions */
bogdanm	0:9b334a45a8ff	1457	hdfsdm_filter->Instance->CR2 \|= (DFSDM_CR2_REOCIE \| DFSDM_CR2_ROVRIE);
bogdanm	0:9b334a45a8ff	1458
bogdanm	0:9b334a45a8ff	1459	/* Start regular conversion */
bogdanm	0:9b334a45a8ff	1460	DFSDM_RegConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1461	}
bogdanm	0:9b334a45a8ff	1462	else
bogdanm	0:9b334a45a8ff	1463	{
bogdanm	0:9b334a45a8ff	1464	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1465	}
bogdanm	0:9b334a45a8ff	1466	/* Return function status */
bogdanm	0:9b334a45a8ff	1467	return status;
bogdanm	0:9b334a45a8ff	1468	}
bogdanm	0:9b334a45a8ff	1469
bogdanm	0:9b334a45a8ff	1470	/**
bogdanm	0:9b334a45a8ff	1471	* @brief This function allows to stop regular conversion in interrupt mode.
bogdanm	0:9b334a45a8ff	1472	* @note This function should be called only if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1473	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1474	* @retval HAL status
bogdanm	0:9b334a45a8ff	1475	*/
bogdanm	0:9b334a45a8ff	1476	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1477	{
bogdanm	0:9b334a45a8ff	1478	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1479
bogdanm	0:9b334a45a8ff	1480	/* Check parameters */
bogdanm	0:9b334a45a8ff	1481	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1482
bogdanm	0:9b334a45a8ff	1483	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1484	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
bogdanm	0:9b334a45a8ff	1485	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	1486	{
bogdanm	0:9b334a45a8ff	1487	/* Return error status */
bogdanm	0:9b334a45a8ff	1488	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1489	}
bogdanm	0:9b334a45a8ff	1490	else
bogdanm	0:9b334a45a8ff	1491	{
bogdanm	0:9b334a45a8ff	1492	/* Disable interrupts for regular conversions */
bogdanm	0:9b334a45a8ff	1493	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_REOCIE \| DFSDM_CR2_ROVRIE);
bogdanm	0:9b334a45a8ff	1494
bogdanm	0:9b334a45a8ff	1495	/* Stop regular conversion */
bogdanm	0:9b334a45a8ff	1496	DFSDM_RegConvStop(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1497	}
bogdanm	0:9b334a45a8ff	1498	/* Return function status */
bogdanm	0:9b334a45a8ff	1499	return status;
bogdanm	0:9b334a45a8ff	1500	}
bogdanm	0:9b334a45a8ff	1501
bogdanm	0:9b334a45a8ff	1502	/**
bogdanm	0:9b334a45a8ff	1503	* @brief This function allows to start regular conversion in DMA mode.
bogdanm	0:9b334a45a8ff	1504	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1505	* in idle state or if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	1506	* Please note that data on buffer will contain signed regular conversion
bogdanm	0:9b334a45a8ff	1507	* value on 24 most significant bits and corresponding channel on 3 least
bogdanm	0:9b334a45a8ff	1508	* significant bits.
bogdanm	0:9b334a45a8ff	1509	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1510	* @param pData : The destination buffer address.
bogdanm	0:9b334a45a8ff	1511	* @param Length : The length of data to be transferred from DFSDM filter to memory.
bogdanm	0:9b334a45a8ff	1512	* @retval HAL status
bogdanm	0:9b334a45a8ff	1513	*/
bogdanm	0:9b334a45a8ff	1514	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1515	int32_t *pData,
bogdanm	0:9b334a45a8ff	1516	uint32_t Length)
bogdanm	0:9b334a45a8ff	1517	{
bogdanm	0:9b334a45a8ff	1518	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1519
bogdanm	0:9b334a45a8ff	1520	/* Check parameters */
bogdanm	0:9b334a45a8ff	1521	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1522
bogdanm	0:9b334a45a8ff	1523	/* Check destination address and length */
bogdanm	0:9b334a45a8ff	1524	if((pData == NULL) \|\| (Length == 0))
bogdanm	0:9b334a45a8ff	1525	{
bogdanm	0:9b334a45a8ff	1526	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1527	}
bogdanm	0:9b334a45a8ff	1528	/* Check that DMA is enabled for regular conversion */
bogdanm	0:9b334a45a8ff	1529	else if((hdfsdm_filter->Instance->CR1 & DFSDM_CR1_RDMAEN) != DFSDM_CR1_RDMAEN)
bogdanm	0:9b334a45a8ff	1530	{
bogdanm	0:9b334a45a8ff	1531	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1532	}
bogdanm	0:9b334a45a8ff	1533	/* Check parameters compatibility */
bogdanm	0:9b334a45a8ff	1534	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	1535	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
bogdanm	0:9b334a45a8ff	1536	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
bogdanm	0:9b334a45a8ff	1537	(Length != 1))
bogdanm	0:9b334a45a8ff	1538	{
bogdanm	0:9b334a45a8ff	1539	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1540	}
bogdanm	0:9b334a45a8ff	1541	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	1542	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
bogdanm	0:9b334a45a8ff	1543	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
bogdanm	0:9b334a45a8ff	1544	{
bogdanm	0:9b334a45a8ff	1545	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1546	}
bogdanm	0:9b334a45a8ff	1547	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1548	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	1549	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
bogdanm	0:9b334a45a8ff	1550	{
bogdanm	0:9b334a45a8ff	1551	/* Set callbacks on DMA handler */
bogdanm	0:9b334a45a8ff	1552	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
bogdanm	0:9b334a45a8ff	1553	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
bogdanm	0:9b334a45a8ff	1554	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
bogdanm	0:9b334a45a8ff	1555	DFSDM_DMARegularHalfConvCplt : NULL;
bogdanm	0:9b334a45a8ff	1556
bogdanm	0:9b334a45a8ff	1557	/* Start DMA in interrupt mode */
bogdanm	0:9b334a45a8ff	1558	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->RDATAR, \
bogdanm	0:9b334a45a8ff	1559	(uint32_t) pData, Length) != HAL_OK)
bogdanm	0:9b334a45a8ff	1560	{
bogdanm	0:9b334a45a8ff	1561	/* Set DFSDM filter in error state */
bogdanm	0:9b334a45a8ff	1562	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
bogdanm	0:9b334a45a8ff	1563	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1564	}
bogdanm	0:9b334a45a8ff	1565	else
bogdanm	0:9b334a45a8ff	1566	{
bogdanm	0:9b334a45a8ff	1567	/* Start regular conversion */
bogdanm	0:9b334a45a8ff	1568	DFSDM_RegConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1569	}
bogdanm	0:9b334a45a8ff	1570	}
bogdanm	0:9b334a45a8ff	1571	else
bogdanm	0:9b334a45a8ff	1572	{
bogdanm	0:9b334a45a8ff	1573	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1574	}
bogdanm	0:9b334a45a8ff	1575	/* Return function status */
bogdanm	0:9b334a45a8ff	1576	return status;
bogdanm	0:9b334a45a8ff	1577	}
bogdanm	0:9b334a45a8ff	1578
bogdanm	0:9b334a45a8ff	1579	/**
bogdanm	0:9b334a45a8ff	1580	* @brief This function allows to start regular conversion in DMA mode and to get
bogdanm	0:9b334a45a8ff	1581	* only the 16 most significant bits of conversion.
bogdanm	0:9b334a45a8ff	1582	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1583	* in idle state or if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	1584	* Please note that data on buffer will contain signed 16 most significant
bogdanm	0:9b334a45a8ff	1585	* bits of regular conversion.
bogdanm	0:9b334a45a8ff	1586	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1587	* @param pData : The destination buffer address.
bogdanm	0:9b334a45a8ff	1588	* @param Length : The length of data to be transferred from DFSDM filter to memory.
bogdanm	0:9b334a45a8ff	1589	* @retval HAL status
bogdanm	0:9b334a45a8ff	1590	*/
bogdanm	0:9b334a45a8ff	1591	HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1592	int16_t *pData,
bogdanm	0:9b334a45a8ff	1593	uint32_t Length)
bogdanm	0:9b334a45a8ff	1594	{
bogdanm	0:9b334a45a8ff	1595	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1596
bogdanm	0:9b334a45a8ff	1597	/* Check parameters */
bogdanm	0:9b334a45a8ff	1598	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1599
bogdanm	0:9b334a45a8ff	1600	/* Check destination address and length */
bogdanm	0:9b334a45a8ff	1601	if((pData == NULL) \|\| (Length == 0))
bogdanm	0:9b334a45a8ff	1602	{
bogdanm	0:9b334a45a8ff	1603	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1604	}
bogdanm	0:9b334a45a8ff	1605	/* Check that DMA is enabled for regular conversion */
bogdanm	0:9b334a45a8ff	1606	else if((hdfsdm_filter->Instance->CR1 & DFSDM_CR1_RDMAEN) != DFSDM_CR1_RDMAEN)
bogdanm	0:9b334a45a8ff	1607	{
bogdanm	0:9b334a45a8ff	1608	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1609	}
bogdanm	0:9b334a45a8ff	1610	/* Check parameters compatibility */
bogdanm	0:9b334a45a8ff	1611	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	1612	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
bogdanm	0:9b334a45a8ff	1613	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
bogdanm	0:9b334a45a8ff	1614	(Length != 1))
bogdanm	0:9b334a45a8ff	1615	{
bogdanm	0:9b334a45a8ff	1616	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1617	}
bogdanm	0:9b334a45a8ff	1618	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	1619	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
bogdanm	0:9b334a45a8ff	1620	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
bogdanm	0:9b334a45a8ff	1621	{
bogdanm	0:9b334a45a8ff	1622	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1623	}
bogdanm	0:9b334a45a8ff	1624	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1625	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	1626	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
bogdanm	0:9b334a45a8ff	1627	{
bogdanm	0:9b334a45a8ff	1628	/* Set callbacks on DMA handler */
bogdanm	0:9b334a45a8ff	1629	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
bogdanm	0:9b334a45a8ff	1630	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
bogdanm	0:9b334a45a8ff	1631	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
bogdanm	0:9b334a45a8ff	1632	DFSDM_DMARegularHalfConvCplt : NULL;
bogdanm	0:9b334a45a8ff	1633
bogdanm	0:9b334a45a8ff	1634	/* Start DMA in interrupt mode */
bogdanm	0:9b334a45a8ff	1635	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->RDATAR) + 2, \
bogdanm	0:9b334a45a8ff	1636	(uint32_t) pData, Length) != HAL_OK)
bogdanm	0:9b334a45a8ff	1637	{
bogdanm	0:9b334a45a8ff	1638	/* Set DFSDM filter in error state */
bogdanm	0:9b334a45a8ff	1639	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
bogdanm	0:9b334a45a8ff	1640	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1641	}
bogdanm	0:9b334a45a8ff	1642	else
bogdanm	0:9b334a45a8ff	1643	{
bogdanm	0:9b334a45a8ff	1644	/* Start regular conversion */
bogdanm	0:9b334a45a8ff	1645	DFSDM_RegConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1646	}
bogdanm	0:9b334a45a8ff	1647	}
bogdanm	0:9b334a45a8ff	1648	else
bogdanm	0:9b334a45a8ff	1649	{
bogdanm	0:9b334a45a8ff	1650	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1651	}
bogdanm	0:9b334a45a8ff	1652	/* Return function status */
bogdanm	0:9b334a45a8ff	1653	return status;
bogdanm	0:9b334a45a8ff	1654	}
bogdanm	0:9b334a45a8ff	1655
bogdanm	0:9b334a45a8ff	1656	/**
bogdanm	0:9b334a45a8ff	1657	* @brief This function allows to stop regular conversion in DMA mode.
bogdanm	0:9b334a45a8ff	1658	* @note This function should be called only if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1659	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1660	* @retval HAL status
bogdanm	0:9b334a45a8ff	1661	*/
bogdanm	0:9b334a45a8ff	1662	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1663	{
bogdanm	0:9b334a45a8ff	1664	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1665
bogdanm	0:9b334a45a8ff	1666	/* Check parameters */
bogdanm	0:9b334a45a8ff	1667	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1668
bogdanm	0:9b334a45a8ff	1669	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1670	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
bogdanm	0:9b334a45a8ff	1671	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	1672	{
bogdanm	0:9b334a45a8ff	1673	/* Return error status */
bogdanm	0:9b334a45a8ff	1674	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1675	}
bogdanm	0:9b334a45a8ff	1676	else
bogdanm	0:9b334a45a8ff	1677	{
bogdanm	0:9b334a45a8ff	1678	/* Stop current DMA transfer */
bogdanm	0:9b334a45a8ff	1679	if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
bogdanm	0:9b334a45a8ff	1680	{
bogdanm	0:9b334a45a8ff	1681	/* Set DFSDM filter in error state */
bogdanm	0:9b334a45a8ff	1682	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
bogdanm	0:9b334a45a8ff	1683	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1684	}
bogdanm	0:9b334a45a8ff	1685	else
bogdanm	0:9b334a45a8ff	1686	{
bogdanm	0:9b334a45a8ff	1687	/* Stop regular conversion */
bogdanm	0:9b334a45a8ff	1688	DFSDM_RegConvStop(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1689	}
bogdanm	0:9b334a45a8ff	1690	}
bogdanm	0:9b334a45a8ff	1691	/* Return function status */
bogdanm	0:9b334a45a8ff	1692	return status;
bogdanm	0:9b334a45a8ff	1693	}
bogdanm	0:9b334a45a8ff	1694
bogdanm	0:9b334a45a8ff	1695	/**
bogdanm	0:9b334a45a8ff	1696	* @brief This function allows to get regular conversion value.
bogdanm	0:9b334a45a8ff	1697	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1698	* @param Channel : Corresponding channel of regular conversion.
bogdanm	0:9b334a45a8ff	1699	* @retval Regular conversion value
bogdanm	0:9b334a45a8ff	1700	*/
bogdanm	0:9b334a45a8ff	1701	int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1702	uint32_t *Channel)
bogdanm	0:9b334a45a8ff	1703	{
bogdanm	0:9b334a45a8ff	1704	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	1705	int32_t value = 0;
bogdanm	0:9b334a45a8ff	1706
bogdanm	0:9b334a45a8ff	1707	/* Check parameters */
bogdanm	0:9b334a45a8ff	1708	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1709	assert_param(Channel != NULL);
bogdanm	0:9b334a45a8ff	1710
bogdanm	0:9b334a45a8ff	1711	/* Get value of data register for regular channel */
bogdanm	0:9b334a45a8ff	1712	reg = hdfsdm_filter->Instance->RDATAR;
bogdanm	0:9b334a45a8ff	1713
bogdanm	0:9b334a45a8ff	1714	/* Extract channel and regular conversion value */
bogdanm	0:9b334a45a8ff	1715	*Channel = (reg & DFSDM_RDATAR_RDATACH);
bogdanm	0:9b334a45a8ff	1716	value = ((int32_t)(reg & DFSDM_RDATAR_RDATA) >> DFSDM_RDATAR_DATA_OFFSET);
bogdanm	0:9b334a45a8ff	1717
bogdanm	0:9b334a45a8ff	1718	/* return regular conversion value */
bogdanm	0:9b334a45a8ff	1719	return value;
bogdanm	0:9b334a45a8ff	1720	}
bogdanm	0:9b334a45a8ff	1721
bogdanm	0:9b334a45a8ff	1722	/**
bogdanm	0:9b334a45a8ff	1723	* @brief This function allows to start injected conversion in polling mode.
bogdanm	0:9b334a45a8ff	1724	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1725	* in idle state or if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1726	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1727	* @retval HAL status
bogdanm	0:9b334a45a8ff	1728	*/
bogdanm	0:9b334a45a8ff	1729	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1730	{
bogdanm	0:9b334a45a8ff	1731	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1732
bogdanm	0:9b334a45a8ff	1733	/* Check parameters */
bogdanm	0:9b334a45a8ff	1734	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1735
bogdanm	0:9b334a45a8ff	1736	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1737	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	1738	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
bogdanm	0:9b334a45a8ff	1739	{
bogdanm	0:9b334a45a8ff	1740	/* Start injected conversion */
bogdanm	0:9b334a45a8ff	1741	DFSDM_InjConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1742	}
bogdanm	0:9b334a45a8ff	1743	else
bogdanm	0:9b334a45a8ff	1744	{
bogdanm	0:9b334a45a8ff	1745	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1746	}
bogdanm	0:9b334a45a8ff	1747	/* Return function status */
bogdanm	0:9b334a45a8ff	1748	return status;
bogdanm	0:9b334a45a8ff	1749	}
bogdanm	0:9b334a45a8ff	1750
bogdanm	0:9b334a45a8ff	1751	/**
bogdanm	0:9b334a45a8ff	1752	* @brief This function allows to poll for the end of injected conversion.
bogdanm	0:9b334a45a8ff	1753	* @note This function should be called only if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	1754	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1755	* @param Timeout : Timeout value in milliseconds.
bogdanm	0:9b334a45a8ff	1756	* @retval HAL status
bogdanm	0:9b334a45a8ff	1757	*/
bogdanm	0:9b334a45a8ff	1758	HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1759	uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1760	{
bogdanm	0:9b334a45a8ff	1761	uint32_t tickstart;
bogdanm	0:9b334a45a8ff	1762
bogdanm	0:9b334a45a8ff	1763	/* Check parameters */
bogdanm	0:9b334a45a8ff	1764	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1765
bogdanm	0:9b334a45a8ff	1766	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1767	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
bogdanm	0:9b334a45a8ff	1768	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	1769	{
bogdanm	0:9b334a45a8ff	1770	/* Return error status */
bogdanm	0:9b334a45a8ff	1771	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1772	}
bogdanm	0:9b334a45a8ff	1773	else
bogdanm	0:9b334a45a8ff	1774	{
bogdanm	0:9b334a45a8ff	1775	/* Get timeout */
bogdanm	0:9b334a45a8ff	1776	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1777
bogdanm	0:9b334a45a8ff	1778	/* Wait end of injected conversions */
bogdanm	0:9b334a45a8ff	1779	while((hdfsdm_filter->Instance->ISR & DFSDM_ISR_JEOCF) != DFSDM_ISR_JEOCF)
bogdanm	0:9b334a45a8ff	1780	{
bogdanm	0:9b334a45a8ff	1781	/* Check the Timeout */
bogdanm	0:9b334a45a8ff	1782	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1783	{
bogdanm	0:9b334a45a8ff	1784	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	1785	{
bogdanm	0:9b334a45a8ff	1786	/* Return timeout status */
bogdanm	0:9b334a45a8ff	1787	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1788	}
bogdanm	0:9b334a45a8ff	1789	}
bogdanm	0:9b334a45a8ff	1790	}
bogdanm	0:9b334a45a8ff	1791	/* Check if overrun occurs */
bogdanm	0:9b334a45a8ff	1792	if((hdfsdm_filter->Instance->ISR & DFSDM_ISR_JOVRF) == DFSDM_ISR_JOVRF)
bogdanm	0:9b334a45a8ff	1793	{
bogdanm	0:9b334a45a8ff	1794	/* Update error code and call error callback */
bogdanm	0:9b334a45a8ff	1795	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
bogdanm	0:9b334a45a8ff	1796	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1797
bogdanm	0:9b334a45a8ff	1798	/* Clear injected overrun flag */
bogdanm	0:9b334a45a8ff	1799	hdfsdm_filter->Instance->ICR = DFSDM_ICR_CLRJOVRF;
bogdanm	0:9b334a45a8ff	1800	}
bogdanm	0:9b334a45a8ff	1801
bogdanm	0:9b334a45a8ff	1802	/* Update remaining injected conversions */
bogdanm	0:9b334a45a8ff	1803	hdfsdm_filter->InjConvRemaining--;
bogdanm	0:9b334a45a8ff	1804	if(hdfsdm_filter->InjConvRemaining == 0)
bogdanm	0:9b334a45a8ff	1805	{
bogdanm	0:9b334a45a8ff	1806	/* Update DFSDM filter state only if trigger is software */
bogdanm	0:9b334a45a8ff	1807	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
bogdanm	0:9b334a45a8ff	1808	{
bogdanm	0:9b334a45a8ff	1809	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
bogdanm	0:9b334a45a8ff	1810	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
bogdanm	0:9b334a45a8ff	1811	}
bogdanm	0:9b334a45a8ff	1812
bogdanm	0:9b334a45a8ff	1813	/* end of injected sequence, reset the value */
bogdanm	0:9b334a45a8ff	1814	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
bogdanm	0:9b334a45a8ff	1815	hdfsdm_filter->InjectedChannelsNbr : 1;
bogdanm	0:9b334a45a8ff	1816	}
bogdanm	0:9b334a45a8ff	1817
bogdanm	0:9b334a45a8ff	1818	/* Return function status */
bogdanm	0:9b334a45a8ff	1819	return HAL_OK;
bogdanm	0:9b334a45a8ff	1820	}
bogdanm	0:9b334a45a8ff	1821	}
bogdanm	0:9b334a45a8ff	1822
bogdanm	0:9b334a45a8ff	1823	/**
bogdanm	0:9b334a45a8ff	1824	* @brief This function allows to stop injected conversion in polling mode.
bogdanm	0:9b334a45a8ff	1825	* @note This function should be called only if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	1826	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1827	* @retval HAL status
bogdanm	0:9b334a45a8ff	1828	*/
bogdanm	0:9b334a45a8ff	1829	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1830	{
bogdanm	0:9b334a45a8ff	1831	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1832
bogdanm	0:9b334a45a8ff	1833	/* Check parameters */
bogdanm	0:9b334a45a8ff	1834	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1835
bogdanm	0:9b334a45a8ff	1836	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1837	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
bogdanm	0:9b334a45a8ff	1838	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	1839	{
bogdanm	0:9b334a45a8ff	1840	/* Return error status */
bogdanm	0:9b334a45a8ff	1841	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1842	}
bogdanm	0:9b334a45a8ff	1843	else
bogdanm	0:9b334a45a8ff	1844	{
bogdanm	0:9b334a45a8ff	1845	/* Stop injected conversion */
bogdanm	0:9b334a45a8ff	1846	DFSDM_InjConvStop(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1847	}
bogdanm	0:9b334a45a8ff	1848	/* Return function status */
bogdanm	0:9b334a45a8ff	1849	return status;
bogdanm	0:9b334a45a8ff	1850	}
bogdanm	0:9b334a45a8ff	1851
bogdanm	0:9b334a45a8ff	1852	/**
bogdanm	0:9b334a45a8ff	1853	* @brief This function allows to start injected conversion in interrupt mode.
bogdanm	0:9b334a45a8ff	1854	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1855	* in idle state or if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1856	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1857	* @retval HAL status
bogdanm	0:9b334a45a8ff	1858	*/
bogdanm	0:9b334a45a8ff	1859	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1860	{
bogdanm	0:9b334a45a8ff	1861	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1862
bogdanm	0:9b334a45a8ff	1863	/* Check parameters */
bogdanm	0:9b334a45a8ff	1864	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1865
bogdanm	0:9b334a45a8ff	1866	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1867	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	1868	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
bogdanm	0:9b334a45a8ff	1869	{
bogdanm	0:9b334a45a8ff	1870	/* Enable interrupts for injected conversions */
bogdanm	0:9b334a45a8ff	1871	hdfsdm_filter->Instance->CR2 \|= (DFSDM_CR2_JEOCIE \| DFSDM_CR2_JOVRIE);
bogdanm	0:9b334a45a8ff	1872
bogdanm	0:9b334a45a8ff	1873	/* Start injected conversion */
bogdanm	0:9b334a45a8ff	1874	DFSDM_InjConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1875	}
bogdanm	0:9b334a45a8ff	1876	else
bogdanm	0:9b334a45a8ff	1877	{
bogdanm	0:9b334a45a8ff	1878	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1879	}
bogdanm	0:9b334a45a8ff	1880	/* Return function status */
bogdanm	0:9b334a45a8ff	1881	return status;
bogdanm	0:9b334a45a8ff	1882	}
bogdanm	0:9b334a45a8ff	1883
bogdanm	0:9b334a45a8ff	1884	/**
bogdanm	0:9b334a45a8ff	1885	* @brief This function allows to stop injected conversion in interrupt mode.
bogdanm	0:9b334a45a8ff	1886	* @note This function should be called only if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	1887	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1888	* @retval HAL status
bogdanm	0:9b334a45a8ff	1889	*/
bogdanm	0:9b334a45a8ff	1890	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	1891	{
bogdanm	0:9b334a45a8ff	1892	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1893
bogdanm	0:9b334a45a8ff	1894	/* Check parameters */
bogdanm	0:9b334a45a8ff	1895	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1896
bogdanm	0:9b334a45a8ff	1897	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1898	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
bogdanm	0:9b334a45a8ff	1899	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	1900	{
bogdanm	0:9b334a45a8ff	1901	/* Return error status */
bogdanm	0:9b334a45a8ff	1902	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1903	}
bogdanm	0:9b334a45a8ff	1904	else
bogdanm	0:9b334a45a8ff	1905	{
bogdanm	0:9b334a45a8ff	1906	/* Disable interrupts for injected conversions */
bogdanm	0:9b334a45a8ff	1907	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_JEOCIE \| DFSDM_CR2_JOVRIE);
bogdanm	0:9b334a45a8ff	1908
bogdanm	0:9b334a45a8ff	1909	/* Stop injected conversion */
bogdanm	0:9b334a45a8ff	1910	DFSDM_InjConvStop(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1911	}
bogdanm	0:9b334a45a8ff	1912	/* Return function status */
bogdanm	0:9b334a45a8ff	1913	return status;
bogdanm	0:9b334a45a8ff	1914	}
bogdanm	0:9b334a45a8ff	1915
bogdanm	0:9b334a45a8ff	1916	/**
bogdanm	0:9b334a45a8ff	1917	* @brief This function allows to start injected conversion in DMA mode.
bogdanm	0:9b334a45a8ff	1918	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1919	* in idle state or if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1920	* Please note that data on buffer will contain signed injected conversion
bogdanm	0:9b334a45a8ff	1921	* value on 24 most significant bits and corresponding channel on 3 least
bogdanm	0:9b334a45a8ff	1922	* significant bits.
bogdanm	0:9b334a45a8ff	1923	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1924	* @param pData : The destination buffer address.
bogdanm	0:9b334a45a8ff	1925	* @param Length : The length of data to be transferred from DFSDM filter to memory.
bogdanm	0:9b334a45a8ff	1926	* @retval HAL status
bogdanm	0:9b334a45a8ff	1927	*/
bogdanm	0:9b334a45a8ff	1928	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	1929	int32_t *pData,
bogdanm	0:9b334a45a8ff	1930	uint32_t Length)
bogdanm	0:9b334a45a8ff	1931	{
bogdanm	0:9b334a45a8ff	1932	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1933
bogdanm	0:9b334a45a8ff	1934	/* Check parameters */
bogdanm	0:9b334a45a8ff	1935	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	1936
bogdanm	0:9b334a45a8ff	1937	/* Check destination address and length */
bogdanm	0:9b334a45a8ff	1938	if((pData == NULL) \|\| (Length == 0))
bogdanm	0:9b334a45a8ff	1939	{
bogdanm	0:9b334a45a8ff	1940	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1941	}
bogdanm	0:9b334a45a8ff	1942	/* Check that DMA is enabled for injected conversion */
bogdanm	0:9b334a45a8ff	1943	else if((hdfsdm_filter->Instance->CR1 & DFSDM_CR1_JDMAEN) != DFSDM_CR1_JDMAEN)
bogdanm	0:9b334a45a8ff	1944	{
bogdanm	0:9b334a45a8ff	1945	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1946	}
bogdanm	0:9b334a45a8ff	1947	/* Check parameters compatibility */
bogdanm	0:9b334a45a8ff	1948	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	1949	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
bogdanm	0:9b334a45a8ff	1950	(Length > hdfsdm_filter->InjConvRemaining))
bogdanm	0:9b334a45a8ff	1951	{
bogdanm	0:9b334a45a8ff	1952	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1953	}
bogdanm	0:9b334a45a8ff	1954	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	1955	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
bogdanm	0:9b334a45a8ff	1956	{
bogdanm	0:9b334a45a8ff	1957	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1958	}
bogdanm	0:9b334a45a8ff	1959	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	1960	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	1961	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
bogdanm	0:9b334a45a8ff	1962	{
bogdanm	0:9b334a45a8ff	1963	/* Set callbacks on DMA handler */
bogdanm	0:9b334a45a8ff	1964	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
bogdanm	0:9b334a45a8ff	1965	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
bogdanm	0:9b334a45a8ff	1966	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
bogdanm	0:9b334a45a8ff	1967	DFSDM_DMAInjectedHalfConvCplt : NULL;
bogdanm	0:9b334a45a8ff	1968
bogdanm	0:9b334a45a8ff	1969	/* Start DMA in interrupt mode */
bogdanm	0:9b334a45a8ff	1970	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->JDATAR, \
bogdanm	0:9b334a45a8ff	1971	(uint32_t) pData, Length) != HAL_OK)
bogdanm	0:9b334a45a8ff	1972	{
bogdanm	0:9b334a45a8ff	1973	/* Set DFSDM filter in error state */
bogdanm	0:9b334a45a8ff	1974	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
bogdanm	0:9b334a45a8ff	1975	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1976	}
bogdanm	0:9b334a45a8ff	1977	else
bogdanm	0:9b334a45a8ff	1978	{
bogdanm	0:9b334a45a8ff	1979	/* Start injected conversion */
bogdanm	0:9b334a45a8ff	1980	DFSDM_InjConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	1981	}
bogdanm	0:9b334a45a8ff	1982	}
bogdanm	0:9b334a45a8ff	1983	else
bogdanm	0:9b334a45a8ff	1984	{
bogdanm	0:9b334a45a8ff	1985	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1986	}
bogdanm	0:9b334a45a8ff	1987	/* Return function status */
bogdanm	0:9b334a45a8ff	1988	return status;
bogdanm	0:9b334a45a8ff	1989	}
bogdanm	0:9b334a45a8ff	1990
bogdanm	0:9b334a45a8ff	1991	/**
bogdanm	0:9b334a45a8ff	1992	* @brief This function allows to start injected conversion in DMA mode and to get
bogdanm	0:9b334a45a8ff	1993	* only the 16 most significant bits of conversion.
bogdanm	0:9b334a45a8ff	1994	* @note This function should be called only when DFSDM filter instance is
bogdanm	0:9b334a45a8ff	1995	* in idle state or if regular conversion is ongoing.
bogdanm	0:9b334a45a8ff	1996	* Please note that data on buffer will contain signed 16 most significant
bogdanm	0:9b334a45a8ff	1997	* bits of injected conversion.
bogdanm	0:9b334a45a8ff	1998	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	1999	* @param pData : The destination buffer address.
bogdanm	0:9b334a45a8ff	2000	* @param Length : The length of data to be transferred from DFSDM filter to memory.
bogdanm	0:9b334a45a8ff	2001	* @retval HAL status
bogdanm	0:9b334a45a8ff	2002	*/
bogdanm	0:9b334a45a8ff	2003	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	2004	int16_t *pData,
bogdanm	0:9b334a45a8ff	2005	uint32_t Length)
bogdanm	0:9b334a45a8ff	2006	{
bogdanm	0:9b334a45a8ff	2007	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	2008
bogdanm	0:9b334a45a8ff	2009	/* Check parameters */
bogdanm	0:9b334a45a8ff	2010	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2011
bogdanm	0:9b334a45a8ff	2012	/* Check destination address and length */
bogdanm	0:9b334a45a8ff	2013	if((pData == NULL) \|\| (Length == 0))
bogdanm	0:9b334a45a8ff	2014	{
bogdanm	0:9b334a45a8ff	2015	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2016	}
bogdanm	0:9b334a45a8ff	2017	/* Check that DMA is enabled for injected conversion */
bogdanm	0:9b334a45a8ff	2018	else if((hdfsdm_filter->Instance->CR1 & DFSDM_CR1_JDMAEN) != DFSDM_CR1_JDMAEN)
bogdanm	0:9b334a45a8ff	2019	{
bogdanm	0:9b334a45a8ff	2020	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2021	}
bogdanm	0:9b334a45a8ff	2022	/* Check parameters compatibility */
bogdanm	0:9b334a45a8ff	2023	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	2024	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
bogdanm	0:9b334a45a8ff	2025	(Length > hdfsdm_filter->InjConvRemaining))
bogdanm	0:9b334a45a8ff	2026	{
bogdanm	0:9b334a45a8ff	2027	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2028	}
bogdanm	0:9b334a45a8ff	2029	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
bogdanm	0:9b334a45a8ff	2030	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
bogdanm	0:9b334a45a8ff	2031	{
bogdanm	0:9b334a45a8ff	2032	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2033	}
bogdanm	0:9b334a45a8ff	2034	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	2035	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
bogdanm	0:9b334a45a8ff	2036	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
bogdanm	0:9b334a45a8ff	2037	{
bogdanm	0:9b334a45a8ff	2038	/* Set callbacks on DMA handler */
bogdanm	0:9b334a45a8ff	2039	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
bogdanm	0:9b334a45a8ff	2040	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
bogdanm	0:9b334a45a8ff	2041	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
bogdanm	0:9b334a45a8ff	2042	DFSDM_DMAInjectedHalfConvCplt : NULL;
bogdanm	0:9b334a45a8ff	2043
bogdanm	0:9b334a45a8ff	2044	/* Start DMA in interrupt mode */
bogdanm	0:9b334a45a8ff	2045	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->JDATAR) + 2, \
bogdanm	0:9b334a45a8ff	2046	(uint32_t) pData, Length) != HAL_OK)
bogdanm	0:9b334a45a8ff	2047	{
bogdanm	0:9b334a45a8ff	2048	/* Set DFSDM filter in error state */
bogdanm	0:9b334a45a8ff	2049	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
bogdanm	0:9b334a45a8ff	2050	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2051	}
bogdanm	0:9b334a45a8ff	2052	else
bogdanm	0:9b334a45a8ff	2053	{
bogdanm	0:9b334a45a8ff	2054	/* Start injected conversion */
bogdanm	0:9b334a45a8ff	2055	DFSDM_InjConvStart(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2056	}
bogdanm	0:9b334a45a8ff	2057	}
bogdanm	0:9b334a45a8ff	2058	else
bogdanm	0:9b334a45a8ff	2059	{
bogdanm	0:9b334a45a8ff	2060	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2061	}
bogdanm	0:9b334a45a8ff	2062	/* Return function status */
bogdanm	0:9b334a45a8ff	2063	return status;
bogdanm	0:9b334a45a8ff	2064	}
bogdanm	0:9b334a45a8ff	2065
bogdanm	0:9b334a45a8ff	2066	/**
bogdanm	0:9b334a45a8ff	2067	* @brief This function allows to stop injected conversion in DMA mode.
bogdanm	0:9b334a45a8ff	2068	* @note This function should be called only if injected conversion is ongoing.
bogdanm	0:9b334a45a8ff	2069	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2070	* @retval HAL status
bogdanm	0:9b334a45a8ff	2071	*/
bogdanm	0:9b334a45a8ff	2072	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2073	{
bogdanm	0:9b334a45a8ff	2074	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	2075
bogdanm	0:9b334a45a8ff	2076	/* Check parameters */
bogdanm	0:9b334a45a8ff	2077	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2078
bogdanm	0:9b334a45a8ff	2079	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	2080	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
bogdanm	0:9b334a45a8ff	2081	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
bogdanm	0:9b334a45a8ff	2082	{
bogdanm	0:9b334a45a8ff	2083	/* Return error status */
bogdanm	0:9b334a45a8ff	2084	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2085	}
bogdanm	0:9b334a45a8ff	2086	else
bogdanm	0:9b334a45a8ff	2087	{
bogdanm	0:9b334a45a8ff	2088	/* Stop current DMA transfer */
bogdanm	0:9b334a45a8ff	2089	if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
bogdanm	0:9b334a45a8ff	2090	{
bogdanm	0:9b334a45a8ff	2091	/* Set DFSDM filter in error state */
bogdanm	0:9b334a45a8ff	2092	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
bogdanm	0:9b334a45a8ff	2093	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2094	}
bogdanm	0:9b334a45a8ff	2095	else
bogdanm	0:9b334a45a8ff	2096	{
bogdanm	0:9b334a45a8ff	2097	/* Stop regular conversion */
bogdanm	0:9b334a45a8ff	2098	DFSDM_InjConvStop(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2099	}
bogdanm	0:9b334a45a8ff	2100	}
bogdanm	0:9b334a45a8ff	2101	/* Return function status */
bogdanm	0:9b334a45a8ff	2102	return status;
bogdanm	0:9b334a45a8ff	2103	}
bogdanm	0:9b334a45a8ff	2104
bogdanm	0:9b334a45a8ff	2105	/**
bogdanm	0:9b334a45a8ff	2106	* @brief This function allows to get injected conversion value.
bogdanm	0:9b334a45a8ff	2107	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2108	* @param Channel : Corresponding channel of injected conversion.
bogdanm	0:9b334a45a8ff	2109	* @retval Injected conversion value
bogdanm	0:9b334a45a8ff	2110	*/
bogdanm	0:9b334a45a8ff	2111	int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	2112	uint32_t *Channel)
bogdanm	0:9b334a45a8ff	2113	{
bogdanm	0:9b334a45a8ff	2114	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	2115	int32_t value = 0;
bogdanm	0:9b334a45a8ff	2116
bogdanm	0:9b334a45a8ff	2117	/* Check parameters */
bogdanm	0:9b334a45a8ff	2118	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2119	assert_param(Channel != NULL);
bogdanm	0:9b334a45a8ff	2120
bogdanm	0:9b334a45a8ff	2121	/* Get value of data register for injected channel */
bogdanm	0:9b334a45a8ff	2122	reg = hdfsdm_filter->Instance->JDATAR;
bogdanm	0:9b334a45a8ff	2123
bogdanm	0:9b334a45a8ff	2124	/* Extract channel and injected conversion value */
bogdanm	0:9b334a45a8ff	2125	*Channel = (reg & DFSDM_JDATAR_JDATACH);
bogdanm	0:9b334a45a8ff	2126	value = ((int32_t)(reg & DFSDM_JDATAR_JDATA) >> DFSDM_JDATAR_DATA_OFFSET);
bogdanm	0:9b334a45a8ff	2127
bogdanm	0:9b334a45a8ff	2128	/* return regular conversion value */
bogdanm	0:9b334a45a8ff	2129	return value;
bogdanm	0:9b334a45a8ff	2130	}
bogdanm	0:9b334a45a8ff	2131
bogdanm	0:9b334a45a8ff	2132	/**
bogdanm	0:9b334a45a8ff	2133	* @brief This function allows to start filter analog watchdog in interrupt mode.
bogdanm	0:9b334a45a8ff	2134	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2135	* @param awdParam : DFSDM filter analog watchdog parameters.
bogdanm	0:9b334a45a8ff	2136	* @retval HAL status
bogdanm	0:9b334a45a8ff	2137	*/
bogdanm	0:9b334a45a8ff	2138	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	2139	DFSDM_Filter_AwdParamTypeDef *awdParam)
bogdanm	0:9b334a45a8ff	2140	{
bogdanm	0:9b334a45a8ff	2141	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	2142
bogdanm	0:9b334a45a8ff	2143	/* Check parameters */
bogdanm	0:9b334a45a8ff	2144	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2145	assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
bogdanm	0:9b334a45a8ff	2146	assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
bogdanm	0:9b334a45a8ff	2147	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
bogdanm	0:9b334a45a8ff	2148	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
bogdanm	0:9b334a45a8ff	2149	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
bogdanm	0:9b334a45a8ff	2150	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
bogdanm	0:9b334a45a8ff	2151
bogdanm	0:9b334a45a8ff	2152	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	2153	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
bogdanm	0:9b334a45a8ff	2154	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
bogdanm	0:9b334a45a8ff	2155	{
bogdanm	0:9b334a45a8ff	2156	/* Return error status */
bogdanm	0:9b334a45a8ff	2157	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2158	}
bogdanm	0:9b334a45a8ff	2159	else
bogdanm	0:9b334a45a8ff	2160	{
bogdanm	0:9b334a45a8ff	2161	/* Set analog watchdog data source */
bogdanm	0:9b334a45a8ff	2162	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_AWFSEL);
bogdanm	0:9b334a45a8ff	2163	hdfsdm_filter->Instance->CR1 \|= awdParam->DataSource;
bogdanm	0:9b334a45a8ff	2164
bogdanm	0:9b334a45a8ff	2165	/* Set thresholds and break signals */
bogdanm	0:9b334a45a8ff	2166	hdfsdm_filter->Instance->AWHTR &= ~(DFSDM_AWHTR_AWHT \| DFSDM_AWHTR_BKAWH);
bogdanm	0:9b334a45a8ff	2167	hdfsdm_filter->Instance->AWHTR \|= ((awdParam->HighThreshold << DFSDM_AWHTR_THRESHOLD_OFFSET) \| \
bogdanm	0:9b334a45a8ff	2168	awdParam->HighBreakSignal);
bogdanm	0:9b334a45a8ff	2169	hdfsdm_filter->Instance->AWLTR &= ~(DFSDM_AWLTR_AWLT \| DFSDM_AWLTR_BKAWL);
bogdanm	0:9b334a45a8ff	2170	hdfsdm_filter->Instance->AWLTR \|= ((awdParam->LowThreshold << DFSDM_AWLTR_THRESHOLD_OFFSET) \| \
bogdanm	0:9b334a45a8ff	2171	awdParam->LowBreakSignal);
bogdanm	0:9b334a45a8ff	2172
bogdanm	0:9b334a45a8ff	2173	/* Set channels and interrupt for analog watchdog */
bogdanm	0:9b334a45a8ff	2174	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_AWDCH);
bogdanm	0:9b334a45a8ff	2175	hdfsdm_filter->Instance->CR2 \|= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_CR2_AWDCH_OFFSET) \| \
bogdanm	0:9b334a45a8ff	2176	DFSDM_CR2_AWDIE);
bogdanm	0:9b334a45a8ff	2177	}
bogdanm	0:9b334a45a8ff	2178	/* Return function status */
bogdanm	0:9b334a45a8ff	2179	return status;
bogdanm	0:9b334a45a8ff	2180	}
bogdanm	0:9b334a45a8ff	2181
bogdanm	0:9b334a45a8ff	2182	/**
bogdanm	0:9b334a45a8ff	2183	* @brief This function allows to stop filter analog watchdog in interrupt mode.
bogdanm	0:9b334a45a8ff	2184	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2185	* @retval HAL status
bogdanm	0:9b334a45a8ff	2186	*/
bogdanm	0:9b334a45a8ff	2187	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2188	{
bogdanm	0:9b334a45a8ff	2189	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	2190
bogdanm	0:9b334a45a8ff	2191	/* Check parameters */
bogdanm	0:9b334a45a8ff	2192	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2193
bogdanm	0:9b334a45a8ff	2194	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	2195	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
bogdanm	0:9b334a45a8ff	2196	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
bogdanm	0:9b334a45a8ff	2197	{
bogdanm	0:9b334a45a8ff	2198	/* Return error status */
bogdanm	0:9b334a45a8ff	2199	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2200	}
bogdanm	0:9b334a45a8ff	2201	else
bogdanm	0:9b334a45a8ff	2202	{
bogdanm	0:9b334a45a8ff	2203	/* Reset channels for analog watchdog and deactivate interrupt */
bogdanm	0:9b334a45a8ff	2204	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_AWDCH \| DFSDM_CR2_AWDIE);
bogdanm	0:9b334a45a8ff	2205
bogdanm	0:9b334a45a8ff	2206	/* Clear all analog watchdog flags */
bogdanm	0:9b334a45a8ff	2207	hdfsdm_filter->Instance->AWCFR = (DFSDM_AWCFR_CLRAWHTF \| DFSDM_AWCFR_CLRAWLTF);
bogdanm	0:9b334a45a8ff	2208
bogdanm	0:9b334a45a8ff	2209	/* Reset thresholds and break signals */
bogdanm	0:9b334a45a8ff	2210	hdfsdm_filter->Instance->AWHTR &= ~(DFSDM_AWHTR_AWHT \| DFSDM_AWHTR_BKAWH);
bogdanm	0:9b334a45a8ff	2211	hdfsdm_filter->Instance->AWLTR &= ~(DFSDM_AWLTR_AWLT \| DFSDM_AWLTR_BKAWL);
bogdanm	0:9b334a45a8ff	2212
bogdanm	0:9b334a45a8ff	2213	/* Reset analog watchdog data source */
bogdanm	0:9b334a45a8ff	2214	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_AWFSEL);
bogdanm	0:9b334a45a8ff	2215	}
bogdanm	0:9b334a45a8ff	2216	/* Return function status */
bogdanm	0:9b334a45a8ff	2217	return status;
bogdanm	0:9b334a45a8ff	2218	}
bogdanm	0:9b334a45a8ff	2219
bogdanm	0:9b334a45a8ff	2220	/**
bogdanm	0:9b334a45a8ff	2221	* @brief This function allows to start extreme detector feature.
bogdanm	0:9b334a45a8ff	2222	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2223	* @param Channel : Channels where extreme detector is enabled.
bogdanm	0:9b334a45a8ff	2224	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
bogdanm	0:9b334a45a8ff	2225	* @retval HAL status
bogdanm	0:9b334a45a8ff	2226	*/
bogdanm	0:9b334a45a8ff	2227	HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	2228	uint32_t Channel)
bogdanm	0:9b334a45a8ff	2229	{
bogdanm	0:9b334a45a8ff	2230	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	2231
bogdanm	0:9b334a45a8ff	2232	/* Check parameters */
bogdanm	0:9b334a45a8ff	2233	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2234	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
bogdanm	0:9b334a45a8ff	2235
bogdanm	0:9b334a45a8ff	2236	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	2237	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
bogdanm	0:9b334a45a8ff	2238	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
bogdanm	0:9b334a45a8ff	2239	{
bogdanm	0:9b334a45a8ff	2240	/* Return error status */
bogdanm	0:9b334a45a8ff	2241	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2242	}
bogdanm	0:9b334a45a8ff	2243	else
bogdanm	0:9b334a45a8ff	2244	{
bogdanm	0:9b334a45a8ff	2245	/* Set channels for extreme detector */
bogdanm	0:9b334a45a8ff	2246	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_EXCH);
bogdanm	0:9b334a45a8ff	2247	hdfsdm_filter->Instance->CR2 \|= ((Channel & DFSDM_LSB_MASK) << DFSDM_CR2_EXCH_OFFSET);
bogdanm	0:9b334a45a8ff	2248	}
bogdanm	0:9b334a45a8ff	2249	/* Return function status */
bogdanm	0:9b334a45a8ff	2250	return status;
bogdanm	0:9b334a45a8ff	2251	}
bogdanm	0:9b334a45a8ff	2252
bogdanm	0:9b334a45a8ff	2253	/**
bogdanm	0:9b334a45a8ff	2254	* @brief This function allows to stop extreme detector feature.
bogdanm	0:9b334a45a8ff	2255	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2256	* @retval HAL status
bogdanm	0:9b334a45a8ff	2257	*/
bogdanm	0:9b334a45a8ff	2258	HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2259	{
bogdanm	0:9b334a45a8ff	2260	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	2261	__IO uint32_t reg;
bogdanm	0:9b334a45a8ff	2262
bogdanm	0:9b334a45a8ff	2263	/* Check parameters */
bogdanm	0:9b334a45a8ff	2264	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2265
bogdanm	0:9b334a45a8ff	2266	/* Check DFSDM filter state */
bogdanm	0:9b334a45a8ff	2267	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
bogdanm	0:9b334a45a8ff	2268	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
bogdanm	0:9b334a45a8ff	2269	{
bogdanm	0:9b334a45a8ff	2270	/* Return error status */
bogdanm	0:9b334a45a8ff	2271	status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	2272	}
bogdanm	0:9b334a45a8ff	2273	else
bogdanm	0:9b334a45a8ff	2274	{
bogdanm	0:9b334a45a8ff	2275	/* Reset channels for extreme detector */
bogdanm	0:9b334a45a8ff	2276	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_EXCH);
bogdanm	0:9b334a45a8ff	2277
bogdanm	0:9b334a45a8ff	2278	/* Clear extreme detector values */
bogdanm	0:9b334a45a8ff	2279	reg = hdfsdm_filter->Instance->EXMAX;
bogdanm	0:9b334a45a8ff	2280	reg = hdfsdm_filter->Instance->EXMIN;
bogdanm	0:9b334a45a8ff	2281	UNUSED(reg); /* To avoid GCC warning */
bogdanm	0:9b334a45a8ff	2282	}
bogdanm	0:9b334a45a8ff	2283	/* Return function status */
bogdanm	0:9b334a45a8ff	2284	return status;
bogdanm	0:9b334a45a8ff	2285	}
bogdanm	0:9b334a45a8ff	2286
bogdanm	0:9b334a45a8ff	2287	/**
bogdanm	0:9b334a45a8ff	2288	* @brief This function allows to get extreme detector maximum value.
bogdanm	0:9b334a45a8ff	2289	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2290	* @param Channel : Corresponding channel.
bogdanm	0:9b334a45a8ff	2291	* @retval Extreme detector maximum value
bogdanm	0:9b334a45a8ff	2292	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
bogdanm	0:9b334a45a8ff	2293	*/
bogdanm	0:9b334a45a8ff	2294	int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	2295	uint32_t *Channel)
bogdanm	0:9b334a45a8ff	2296	{
bogdanm	0:9b334a45a8ff	2297	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	2298	int32_t value = 0;
bogdanm	0:9b334a45a8ff	2299
bogdanm	0:9b334a45a8ff	2300	/* Check parameters */
bogdanm	0:9b334a45a8ff	2301	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2302	assert_param(Channel != NULL);
bogdanm	0:9b334a45a8ff	2303
bogdanm	0:9b334a45a8ff	2304	/* Get value of extreme detector maximum register */
bogdanm	0:9b334a45a8ff	2305	reg = hdfsdm_filter->Instance->EXMAX;
bogdanm	0:9b334a45a8ff	2306
bogdanm	0:9b334a45a8ff	2307	/* Extract channel and extreme detector maximum value */
bogdanm	0:9b334a45a8ff	2308	*Channel = (reg & DFSDM_EXMAX_EXMAXCH);
bogdanm	0:9b334a45a8ff	2309	value = ((int32_t)(reg & DFSDM_EXMAX_EXMAX) >> DFSDM_EXMAX_DATA_OFFSET);
bogdanm	0:9b334a45a8ff	2310
bogdanm	0:9b334a45a8ff	2311	/* return extreme detector maximum value */
bogdanm	0:9b334a45a8ff	2312	return value;
bogdanm	0:9b334a45a8ff	2313	}
bogdanm	0:9b334a45a8ff	2314
bogdanm	0:9b334a45a8ff	2315	/**
bogdanm	0:9b334a45a8ff	2316	* @brief This function allows to get extreme detector minimum value.
bogdanm	0:9b334a45a8ff	2317	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2318	* @param Channel : Corresponding channel.
bogdanm	0:9b334a45a8ff	2319	* @retval Extreme detector minimum value
bogdanm	0:9b334a45a8ff	2320	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
bogdanm	0:9b334a45a8ff	2321	*/
bogdanm	0:9b334a45a8ff	2322	int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	2323	uint32_t *Channel)
bogdanm	0:9b334a45a8ff	2324	{
bogdanm	0:9b334a45a8ff	2325	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	2326	int32_t value = 0;
bogdanm	0:9b334a45a8ff	2327
bogdanm	0:9b334a45a8ff	2328	/* Check parameters */
bogdanm	0:9b334a45a8ff	2329	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2330	assert_param(Channel != NULL);
bogdanm	0:9b334a45a8ff	2331
bogdanm	0:9b334a45a8ff	2332	/* Get value of extreme detector minimum register */
bogdanm	0:9b334a45a8ff	2333	reg = hdfsdm_filter->Instance->EXMIN;
bogdanm	0:9b334a45a8ff	2334
bogdanm	0:9b334a45a8ff	2335	/* Extract channel and extreme detector minimum value */
bogdanm	0:9b334a45a8ff	2336	*Channel = (reg & DFSDM_EXMIN_EXMINCH);
bogdanm	0:9b334a45a8ff	2337	value = ((int32_t)(reg & DFSDM_EXMIN_EXMIN) >> DFSDM_EXMIN_DATA_OFFSET);
bogdanm	0:9b334a45a8ff	2338
bogdanm	0:9b334a45a8ff	2339	/* return extreme detector minimum value */
bogdanm	0:9b334a45a8ff	2340	return value;
bogdanm	0:9b334a45a8ff	2341	}
bogdanm	0:9b334a45a8ff	2342
bogdanm	0:9b334a45a8ff	2343	/**
bogdanm	0:9b334a45a8ff	2344	* @brief This function allows to get conversion time value.
bogdanm	0:9b334a45a8ff	2345	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2346	* @retval Conversion time value
bogdanm	0:9b334a45a8ff	2347	* @note To get time in second, this value has to be divided by DFSDM clock frequency.
bogdanm	0:9b334a45a8ff	2348	*/
bogdanm	0:9b334a45a8ff	2349	uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2350	{
bogdanm	0:9b334a45a8ff	2351	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	2352	uint32_t value = 0;
bogdanm	0:9b334a45a8ff	2353
bogdanm	0:9b334a45a8ff	2354	/* Check parameters */
bogdanm	0:9b334a45a8ff	2355	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
bogdanm	0:9b334a45a8ff	2356
bogdanm	0:9b334a45a8ff	2357	/* Get value of conversion timer register */
bogdanm	0:9b334a45a8ff	2358	reg = hdfsdm_filter->Instance->CNVTIMR;
bogdanm	0:9b334a45a8ff	2359
bogdanm	0:9b334a45a8ff	2360	/* Extract conversion time value */
bogdanm	0:9b334a45a8ff	2361	value = ((reg & DFSDM_CNVTIMR_CNVCNT) >> DFSDM_CNVTIMR_DATA_OFFSET);
bogdanm	0:9b334a45a8ff	2362
bogdanm	0:9b334a45a8ff	2363	/* return extreme detector minimum value */
bogdanm	0:9b334a45a8ff	2364	return value;
bogdanm	0:9b334a45a8ff	2365	}
bogdanm	0:9b334a45a8ff	2366
bogdanm	0:9b334a45a8ff	2367	/**
bogdanm	0:9b334a45a8ff	2368	* @brief This function handles the DFSDM interrupts.
bogdanm	0:9b334a45a8ff	2369	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2370	* @retval None
bogdanm	0:9b334a45a8ff	2371	*/
bogdanm	0:9b334a45a8ff	2372	void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2373	{
bogdanm	0:9b334a45a8ff	2374	/* Check if overrun occurs during regular conversion */
bogdanm	0:9b334a45a8ff	2375	if(((hdfsdm_filter->Instance->ISR & DFSDM_ISR_ROVRF) != 0) && \
bogdanm	0:9b334a45a8ff	2376	((hdfsdm_filter->Instance->CR2 & DFSDM_CR2_ROVRIE) != 0))
bogdanm	0:9b334a45a8ff	2377	{
bogdanm	0:9b334a45a8ff	2378	/* Clear regular overrun flag */
bogdanm	0:9b334a45a8ff	2379	hdfsdm_filter->Instance->ICR = DFSDM_ICR_CLRROVRF;
bogdanm	0:9b334a45a8ff	2380
bogdanm	0:9b334a45a8ff	2381	/* Update error code */
bogdanm	0:9b334a45a8ff	2382	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
bogdanm	0:9b334a45a8ff	2383
bogdanm	0:9b334a45a8ff	2384	/* Call error callback */
bogdanm	0:9b334a45a8ff	2385	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2386	}
bogdanm	0:9b334a45a8ff	2387	/* Check if overrun occurs during injected conversion */
bogdanm	0:9b334a45a8ff	2388	else if(((hdfsdm_filter->Instance->ISR & DFSDM_ISR_JOVRF) != 0) && \
bogdanm	0:9b334a45a8ff	2389	((hdfsdm_filter->Instance->CR2 & DFSDM_CR2_JOVRIE) != 0))
bogdanm	0:9b334a45a8ff	2390	{
bogdanm	0:9b334a45a8ff	2391	/* Clear injected overrun flag */
bogdanm	0:9b334a45a8ff	2392	hdfsdm_filter->Instance->ICR = DFSDM_ICR_CLRJOVRF;
bogdanm	0:9b334a45a8ff	2393
bogdanm	0:9b334a45a8ff	2394	/* Update error code */
bogdanm	0:9b334a45a8ff	2395	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
bogdanm	0:9b334a45a8ff	2396
bogdanm	0:9b334a45a8ff	2397	/* Call error callback */
bogdanm	0:9b334a45a8ff	2398	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2399	}
bogdanm	0:9b334a45a8ff	2400	/* Check if end of regular conversion */
bogdanm	0:9b334a45a8ff	2401	else if(((hdfsdm_filter->Instance->ISR & DFSDM_ISR_REOCF) != 0) && \
bogdanm	0:9b334a45a8ff	2402	((hdfsdm_filter->Instance->CR2 & DFSDM_CR2_REOCIE) != 0))
bogdanm	0:9b334a45a8ff	2403	{
bogdanm	0:9b334a45a8ff	2404	/* Call regular conversion complete callback */
bogdanm	0:9b334a45a8ff	2405	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2406
bogdanm	0:9b334a45a8ff	2407	/* End of conversion if mode is not continuous and software trigger */
bogdanm	0:9b334a45a8ff	2408	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
bogdanm	0:9b334a45a8ff	2409	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
bogdanm	0:9b334a45a8ff	2410	{
bogdanm	0:9b334a45a8ff	2411	/* Disable interrupts for regular conversions */
bogdanm	0:9b334a45a8ff	2412	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_REOCIE);
bogdanm	0:9b334a45a8ff	2413
bogdanm	0:9b334a45a8ff	2414	/* Update DFSDM filter state */
bogdanm	0:9b334a45a8ff	2415	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
bogdanm	0:9b334a45a8ff	2416	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
bogdanm	0:9b334a45a8ff	2417	}
bogdanm	0:9b334a45a8ff	2418	}
bogdanm	0:9b334a45a8ff	2419	/* Check if end of injected conversion */
bogdanm	0:9b334a45a8ff	2420	else if(((hdfsdm_filter->Instance->ISR & DFSDM_ISR_JEOCF) != 0) && \
bogdanm	0:9b334a45a8ff	2421	((hdfsdm_filter->Instance->CR2 & DFSDM_CR2_JEOCIE) != 0))
bogdanm	0:9b334a45a8ff	2422	{
bogdanm	0:9b334a45a8ff	2423	/* Call injected conversion complete callback */
bogdanm	0:9b334a45a8ff	2424	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2425
bogdanm	0:9b334a45a8ff	2426	/* Update remaining injected conversions */
bogdanm	0:9b334a45a8ff	2427	hdfsdm_filter->InjConvRemaining--;
bogdanm	0:9b334a45a8ff	2428	if(hdfsdm_filter->InjConvRemaining == 0)
bogdanm	0:9b334a45a8ff	2429	{
bogdanm	0:9b334a45a8ff	2430	/* End of conversion if trigger is software */
bogdanm	0:9b334a45a8ff	2431	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
bogdanm	0:9b334a45a8ff	2432	{
bogdanm	0:9b334a45a8ff	2433	/* Disable interrupts for injected conversions */
bogdanm	0:9b334a45a8ff	2434	hdfsdm_filter->Instance->CR2 &= ~(DFSDM_CR2_JEOCIE);
bogdanm	0:9b334a45a8ff	2435
bogdanm	0:9b334a45a8ff	2436	/* Update DFSDM filter state */
bogdanm	0:9b334a45a8ff	2437	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
bogdanm	0:9b334a45a8ff	2438	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
bogdanm	0:9b334a45a8ff	2439	}
bogdanm	0:9b334a45a8ff	2440	/* end of injected sequence, reset the value */
bogdanm	0:9b334a45a8ff	2441	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
bogdanm	0:9b334a45a8ff	2442	hdfsdm_filter->InjectedChannelsNbr : 1;
bogdanm	0:9b334a45a8ff	2443	}
bogdanm	0:9b334a45a8ff	2444	}
bogdanm	0:9b334a45a8ff	2445	/* Check if analog watchdog occurs */
bogdanm	0:9b334a45a8ff	2446	else if(((hdfsdm_filter->Instance->ISR & DFSDM_ISR_AWDF) != 0) && \
bogdanm	0:9b334a45a8ff	2447	((hdfsdm_filter->Instance->CR2 & DFSDM_CR2_AWDIE) != 0))
bogdanm	0:9b334a45a8ff	2448	{
bogdanm	0:9b334a45a8ff	2449	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	2450	uint32_t threshold = 0;
bogdanm	0:9b334a45a8ff	2451	uint32_t channel = 0;
bogdanm	0:9b334a45a8ff	2452
bogdanm	0:9b334a45a8ff	2453	/* Get channel and threshold */
bogdanm	0:9b334a45a8ff	2454	reg = hdfsdm_filter->Instance->AWSR;
bogdanm	0:9b334a45a8ff	2455	threshold = (reg & DFSDM_AWSR_AWLTF) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
bogdanm	0:9b334a45a8ff	2456	if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
bogdanm	0:9b334a45a8ff	2457	{
bogdanm	0:9b334a45a8ff	2458	reg = reg >> DFSDM_AWSR_HIGH_OFFSET;
bogdanm	0:9b334a45a8ff	2459	}
bogdanm	0:9b334a45a8ff	2460	while((reg & 1) == 0)
bogdanm	0:9b334a45a8ff	2461	{
bogdanm	0:9b334a45a8ff	2462	channel++;
bogdanm	0:9b334a45a8ff	2463	reg = reg >> 1;
bogdanm	0:9b334a45a8ff	2464	}
bogdanm	0:9b334a45a8ff	2465	/* Clear analog watchdog flag */
bogdanm	0:9b334a45a8ff	2466	hdfsdm_filter->Instance->AWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
bogdanm	0:9b334a45a8ff	2467	(1 << (DFSDM_AWSR_HIGH_OFFSET + channel)) : \
bogdanm	0:9b334a45a8ff	2468	(1 << channel);
bogdanm	0:9b334a45a8ff	2469
bogdanm	0:9b334a45a8ff	2470	/* Call analog watchdog callback */
bogdanm	0:9b334a45a8ff	2471	HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
bogdanm	0:9b334a45a8ff	2472	}
bogdanm	0:9b334a45a8ff	2473	/* Check if clock absence occurs */
bogdanm	0:9b334a45a8ff	2474	else if((hdfsdm_filter->Instance == DFSDM_Filter0) && \
bogdanm	0:9b334a45a8ff	2475	((hdfsdm_filter->Instance->ISR & DFSDM_ISR_CKABF) != 0) && \
bogdanm	0:9b334a45a8ff	2476	((hdfsdm_filter->Instance->CR2 & DFSDM_CR2_CKABIE) != 0))
bogdanm	0:9b334a45a8ff	2477	{
bogdanm	0:9b334a45a8ff	2478	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	2479	uint32_t channel = 0;
bogdanm	0:9b334a45a8ff	2480
bogdanm	0:9b334a45a8ff	2481	reg = ((hdfsdm_filter->Instance->ISR & DFSDM_ISR_CKABF) >> DFSDM_ISR_CKABF_OFFSET);
bogdanm	0:9b334a45a8ff	2482
bogdanm	0:9b334a45a8ff	2483	while(channel < DFSDM_CHANNEL_NUMBER)
bogdanm	0:9b334a45a8ff	2484	{
bogdanm	0:9b334a45a8ff	2485	/* Check if flag is set and corresponding channel is enabled */
bogdanm	0:9b334a45a8ff	2486	if((reg & 1) && (a_dfsdmChannelHandle[channel] != NULL))
bogdanm	0:9b334a45a8ff	2487	{
bogdanm	0:9b334a45a8ff	2488	/* Check clock absence has been enabled for this channel */
bogdanm	0:9b334a45a8ff	2489	if((a_dfsdmChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
bogdanm	0:9b334a45a8ff	2490	{
bogdanm	0:9b334a45a8ff	2491	/* Clear clock absence flag */
bogdanm	0:9b334a45a8ff	2492	hdfsdm_filter->Instance->ICR = (1 << (DFSDM_ICR_CLRCKABF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	2493
bogdanm	0:9b334a45a8ff	2494	/* Call clock absence callback */
bogdanm	0:9b334a45a8ff	2495	HAL_DFSDM_ChannelCkabCallback(a_dfsdmChannelHandle[channel]);
bogdanm	0:9b334a45a8ff	2496	}
bogdanm	0:9b334a45a8ff	2497	}
bogdanm	0:9b334a45a8ff	2498	channel++;
bogdanm	0:9b334a45a8ff	2499	reg = reg >> 1;
bogdanm	0:9b334a45a8ff	2500	}
bogdanm	0:9b334a45a8ff	2501	}
bogdanm	0:9b334a45a8ff	2502	/* Check if short circuit detection occurs */
bogdanm	0:9b334a45a8ff	2503	else if((hdfsdm_filter->Instance == DFSDM_Filter0) && \
bogdanm	0:9b334a45a8ff	2504	((hdfsdm_filter->Instance->ISR & DFSDM_ISR_SCDF) != 0) && \
bogdanm	0:9b334a45a8ff	2505	((hdfsdm_filter->Instance->CR2 & DFSDM_CR2_SCDIE) != 0))
bogdanm	0:9b334a45a8ff	2506	{
bogdanm	0:9b334a45a8ff	2507	uint32_t reg = 0;
bogdanm	0:9b334a45a8ff	2508	uint32_t channel = 0;
bogdanm	0:9b334a45a8ff	2509
bogdanm	0:9b334a45a8ff	2510	/* Get channel */
bogdanm	0:9b334a45a8ff	2511	reg = ((hdfsdm_filter->Instance->ISR & DFSDM_ISR_SCDF) >> DFSDM_ISR_SCDF_OFFSET);
bogdanm	0:9b334a45a8ff	2512	while((reg & 1) == 0)
bogdanm	0:9b334a45a8ff	2513	{
bogdanm	0:9b334a45a8ff	2514	channel++;
bogdanm	0:9b334a45a8ff	2515	reg = reg >> 1;
bogdanm	0:9b334a45a8ff	2516	}
bogdanm	0:9b334a45a8ff	2517
bogdanm	0:9b334a45a8ff	2518	/* Clear short circuit detection flag */
bogdanm	0:9b334a45a8ff	2519	hdfsdm_filter->Instance->ICR = (1 << (DFSDM_ICR_CLRSCDF_OFFSET + channel));
bogdanm	0:9b334a45a8ff	2520
bogdanm	0:9b334a45a8ff	2521	/* Call short circuit detection callback */
bogdanm	0:9b334a45a8ff	2522	HAL_DFSDM_ChannelScdCallback(a_dfsdmChannelHandle[channel]);
bogdanm	0:9b334a45a8ff	2523	}
bogdanm	0:9b334a45a8ff	2524	}
bogdanm	0:9b334a45a8ff	2525
bogdanm	0:9b334a45a8ff	2526	/**
bogdanm	0:9b334a45a8ff	2527	* @brief Regular conversion complete callback.
bogdanm	0:9b334a45a8ff	2528	* @note In interrupt mode, user has to read conversion value in this function
bogdanm	0:9b334a45a8ff	2529	* using HAL_DFSDM_FilterGetRegularValue.
bogdanm	0:9b334a45a8ff	2530	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2531	* @retval None
bogdanm	0:9b334a45a8ff	2532	*/
bogdanm	0:9b334a45a8ff	2533	__weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2534	{
bogdanm	0:9b334a45a8ff	2535	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2536	the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
bogdanm	0:9b334a45a8ff	2537	*/
bogdanm	0:9b334a45a8ff	2538	}
bogdanm	0:9b334a45a8ff	2539
bogdanm	0:9b334a45a8ff	2540	/**
bogdanm	0:9b334a45a8ff	2541	* @brief Half regular conversion complete callback.
bogdanm	0:9b334a45a8ff	2542	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2543	* @retval None
bogdanm	0:9b334a45a8ff	2544	*/
bogdanm	0:9b334a45a8ff	2545	__weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2546	{
bogdanm	0:9b334a45a8ff	2547	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2548	the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
bogdanm	0:9b334a45a8ff	2549	*/
bogdanm	0:9b334a45a8ff	2550	}
bogdanm	0:9b334a45a8ff	2551
bogdanm	0:9b334a45a8ff	2552	/**
bogdanm	0:9b334a45a8ff	2553	* @brief Injected conversion complete callback.
bogdanm	0:9b334a45a8ff	2554	* @note In interrupt mode, user has to read conversion value in this function
bogdanm	0:9b334a45a8ff	2555	* using HAL_DFSDM_FilterGetInjectedValue.
bogdanm	0:9b334a45a8ff	2556	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2557	* @retval None
bogdanm	0:9b334a45a8ff	2558	*/
bogdanm	0:9b334a45a8ff	2559	__weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2560	{
bogdanm	0:9b334a45a8ff	2561	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2562	the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
bogdanm	0:9b334a45a8ff	2563	*/
bogdanm	0:9b334a45a8ff	2564	}
bogdanm	0:9b334a45a8ff	2565
bogdanm	0:9b334a45a8ff	2566	/**
bogdanm	0:9b334a45a8ff	2567	* @brief Half injected conversion complete callback.
bogdanm	0:9b334a45a8ff	2568	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2569	* @retval None
bogdanm	0:9b334a45a8ff	2570	*/
bogdanm	0:9b334a45a8ff	2571	__weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2572	{
bogdanm	0:9b334a45a8ff	2573	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2574	the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
bogdanm	0:9b334a45a8ff	2575	*/
bogdanm	0:9b334a45a8ff	2576	}
bogdanm	0:9b334a45a8ff	2577
bogdanm	0:9b334a45a8ff	2578	/**
bogdanm	0:9b334a45a8ff	2579	* @brief Filter analog watchdog callback.
bogdanm	0:9b334a45a8ff	2580	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2581	* @param Channel : Corresponding channel.
bogdanm	0:9b334a45a8ff	2582	* @param Threshold : Low or high threshold has been reached.
bogdanm	0:9b334a45a8ff	2583	* @retval None
bogdanm	0:9b334a45a8ff	2584	*/
bogdanm	0:9b334a45a8ff	2585	__weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
bogdanm	0:9b334a45a8ff	2586	uint32_t Channel, uint32_t Threshold)
bogdanm	0:9b334a45a8ff	2587	{
bogdanm	0:9b334a45a8ff	2588	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2589	the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
bogdanm	0:9b334a45a8ff	2590	*/
bogdanm	0:9b334a45a8ff	2591	}
bogdanm	0:9b334a45a8ff	2592
bogdanm	0:9b334a45a8ff	2593	/**
bogdanm	0:9b334a45a8ff	2594	* @brief Error callback.
bogdanm	0:9b334a45a8ff	2595	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2596	* @retval None
bogdanm	0:9b334a45a8ff	2597	*/
bogdanm	0:9b334a45a8ff	2598	__weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2599	{
bogdanm	0:9b334a45a8ff	2600	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	2601	the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
bogdanm	0:9b334a45a8ff	2602	*/
bogdanm	0:9b334a45a8ff	2603	}
bogdanm	0:9b334a45a8ff	2604
bogdanm	0:9b334a45a8ff	2605	/**
bogdanm	0:9b334a45a8ff	2606	* @}
bogdanm	0:9b334a45a8ff	2607	*/
bogdanm	0:9b334a45a8ff	2608
bogdanm	0:9b334a45a8ff	2609	/** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
bogdanm	0:9b334a45a8ff	2610	* @brief Filter state functions
bogdanm	0:9b334a45a8ff	2611	*
bogdanm	0:9b334a45a8ff	2612	@verbatim
bogdanm	0:9b334a45a8ff	2613	==============================================================================
bogdanm	0:9b334a45a8ff	2614	##### Filter state functions #####
bogdanm	0:9b334a45a8ff	2615	==============================================================================
bogdanm	0:9b334a45a8ff	2616	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	2617	(+) Get the DFSDM filter state.
bogdanm	0:9b334a45a8ff	2618	(+) Get the DFSDM filter error.
bogdanm	0:9b334a45a8ff	2619	@endverbatim
bogdanm	0:9b334a45a8ff	2620	* @{
bogdanm	0:9b334a45a8ff	2621	*/
bogdanm	0:9b334a45a8ff	2622
bogdanm	0:9b334a45a8ff	2623	/**
bogdanm	0:9b334a45a8ff	2624	* @brief This function allows to get the current DFSDM filter handle state.
bogdanm	0:9b334a45a8ff	2625	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2626	* @retval DFSDM filter state.
bogdanm	0:9b334a45a8ff	2627	*/
bogdanm	0:9b334a45a8ff	2628	HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2629	{
bogdanm	0:9b334a45a8ff	2630	/* Return DFSDM filter handle state */
bogdanm	0:9b334a45a8ff	2631	return hdfsdm_filter->State;
bogdanm	0:9b334a45a8ff	2632	}
bogdanm	0:9b334a45a8ff	2633
bogdanm	0:9b334a45a8ff	2634	/**
bogdanm	0:9b334a45a8ff	2635	* @brief This function allows to get the current DFSDM filter error.
bogdanm	0:9b334a45a8ff	2636	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2637	* @retval DFSDM filter error code.
bogdanm	0:9b334a45a8ff	2638	*/
bogdanm	0:9b334a45a8ff	2639	uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2640	{
bogdanm	0:9b334a45a8ff	2641	return hdfsdm_filter->ErrorCode;
bogdanm	0:9b334a45a8ff	2642	}
bogdanm	0:9b334a45a8ff	2643
bogdanm	0:9b334a45a8ff	2644	/**
bogdanm	0:9b334a45a8ff	2645	* @}
bogdanm	0:9b334a45a8ff	2646	*/
bogdanm	0:9b334a45a8ff	2647
bogdanm	0:9b334a45a8ff	2648	/**
bogdanm	0:9b334a45a8ff	2649	* @}
bogdanm	0:9b334a45a8ff	2650	*/
bogdanm	0:9b334a45a8ff	2651	/* End of exported functions -------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2652
bogdanm	0:9b334a45a8ff	2653	/* Private functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2654	/** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
bogdanm	0:9b334a45a8ff	2655	* @{
bogdanm	0:9b334a45a8ff	2656	*/
bogdanm	0:9b334a45a8ff	2657
bogdanm	0:9b334a45a8ff	2658	/**
bogdanm	0:9b334a45a8ff	2659	* @brief DMA half transfer complete callback for regular conversion.
bogdanm	0:9b334a45a8ff	2660	* @param hdma : DMA handle.
bogdanm	0:9b334a45a8ff	2661	* @retval None
bogdanm	0:9b334a45a8ff	2662	*/
bogdanm	0:9b334a45a8ff	2663	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2664	{
bogdanm	0:9b334a45a8ff	2665	/* Get DFSDM filter handle */
bogdanm	0:9b334a45a8ff	2666	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	2667
bogdanm	0:9b334a45a8ff	2668	/* Call regular half conversion complete callback */
bogdanm	0:9b334a45a8ff	2669	HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2670	}
bogdanm	0:9b334a45a8ff	2671
bogdanm	0:9b334a45a8ff	2672	/**
bogdanm	0:9b334a45a8ff	2673	* @brief DMA transfer complete callback for regular conversion.
bogdanm	0:9b334a45a8ff	2674	* @param hdma : DMA handle.
bogdanm	0:9b334a45a8ff	2675	* @retval None
bogdanm	0:9b334a45a8ff	2676	*/
bogdanm	0:9b334a45a8ff	2677	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2678	{
bogdanm	0:9b334a45a8ff	2679	/* Get DFSDM filter handle */
bogdanm	0:9b334a45a8ff	2680	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	2681
bogdanm	0:9b334a45a8ff	2682	/* Call regular conversion complete callback */
bogdanm	0:9b334a45a8ff	2683	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2684	}
bogdanm	0:9b334a45a8ff	2685
bogdanm	0:9b334a45a8ff	2686	/**
bogdanm	0:9b334a45a8ff	2687	* @brief DMA half transfer complete callback for injected conversion.
bogdanm	0:9b334a45a8ff	2688	* @param hdma : DMA handle.
bogdanm	0:9b334a45a8ff	2689	* @retval None
bogdanm	0:9b334a45a8ff	2690	*/
bogdanm	0:9b334a45a8ff	2691	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2692	{
bogdanm	0:9b334a45a8ff	2693	/* Get DFSDM filter handle */
bogdanm	0:9b334a45a8ff	2694	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	2695
bogdanm	0:9b334a45a8ff	2696	/* Call injected half conversion complete callback */
bogdanm	0:9b334a45a8ff	2697	HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2698	}
bogdanm	0:9b334a45a8ff	2699
bogdanm	0:9b334a45a8ff	2700	/**
bogdanm	0:9b334a45a8ff	2701	* @brief DMA transfer complete callback for injected conversion.
bogdanm	0:9b334a45a8ff	2702	* @param hdma : DMA handle.
bogdanm	0:9b334a45a8ff	2703	* @retval None
bogdanm	0:9b334a45a8ff	2704	*/
bogdanm	0:9b334a45a8ff	2705	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2706	{
bogdanm	0:9b334a45a8ff	2707	/* Get DFSDM filter handle */
bogdanm	0:9b334a45a8ff	2708	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	2709
bogdanm	0:9b334a45a8ff	2710	/* Call injected conversion complete callback */
bogdanm	0:9b334a45a8ff	2711	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2712	}
bogdanm	0:9b334a45a8ff	2713
bogdanm	0:9b334a45a8ff	2714	/**
bogdanm	0:9b334a45a8ff	2715	* @brief DMA error callback.
bogdanm	0:9b334a45a8ff	2716	* @param hdma : DMA handle.
bogdanm	0:9b334a45a8ff	2717	* @retval None
bogdanm	0:9b334a45a8ff	2718	*/
bogdanm	0:9b334a45a8ff	2719	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2720	{
bogdanm	0:9b334a45a8ff	2721	/* Get DFSDM filter handle */
bogdanm	0:9b334a45a8ff	2722	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	2723
bogdanm	0:9b334a45a8ff	2724	/* Update error code */
bogdanm	0:9b334a45a8ff	2725	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
bogdanm	0:9b334a45a8ff	2726
bogdanm	0:9b334a45a8ff	2727	/* Call error callback */
bogdanm	0:9b334a45a8ff	2728	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
bogdanm	0:9b334a45a8ff	2729	}
bogdanm	0:9b334a45a8ff	2730
bogdanm	0:9b334a45a8ff	2731	/**
bogdanm	0:9b334a45a8ff	2732	* @brief This function allows to get the number of injected channels.
bogdanm	0:9b334a45a8ff	2733	* @param Channels : bitfield of injected channels.
bogdanm	0:9b334a45a8ff	2734	* @retval Number of injected channels.
bogdanm	0:9b334a45a8ff	2735	*/
bogdanm	0:9b334a45a8ff	2736	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
bogdanm	0:9b334a45a8ff	2737	{
bogdanm	0:9b334a45a8ff	2738	uint32_t nbChannels = 0;
bogdanm	0:9b334a45a8ff	2739	uint32_t tmp;
bogdanm	0:9b334a45a8ff	2740
bogdanm	0:9b334a45a8ff	2741	/* Get the number of channels from bitfield */
bogdanm	0:9b334a45a8ff	2742	tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
bogdanm	0:9b334a45a8ff	2743	while(tmp != 0)
bogdanm	0:9b334a45a8ff	2744	{
bogdanm	0:9b334a45a8ff	2745	if(tmp & 1)
bogdanm	0:9b334a45a8ff	2746	{
bogdanm	0:9b334a45a8ff	2747	nbChannels++;
bogdanm	0:9b334a45a8ff	2748	}
bogdanm	0:9b334a45a8ff	2749	tmp = (uint32_t) (tmp >> 1);
bogdanm	0:9b334a45a8ff	2750	}
bogdanm	0:9b334a45a8ff	2751	return nbChannels;
bogdanm	0:9b334a45a8ff	2752	}
bogdanm	0:9b334a45a8ff	2753
bogdanm	0:9b334a45a8ff	2754	/**
bogdanm	0:9b334a45a8ff	2755	* @brief This function allows to get the channel number from channel instance.
bogdanm	0:9b334a45a8ff	2756	* @param Instance : DFSDM channel instance.
bogdanm	0:9b334a45a8ff	2757	* @retval Channel number.
bogdanm	0:9b334a45a8ff	2758	*/
bogdanm	0:9b334a45a8ff	2759	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
bogdanm	0:9b334a45a8ff	2760	{
bogdanm	0:9b334a45a8ff	2761	uint32_t channel = 0;
bogdanm	0:9b334a45a8ff	2762
bogdanm	0:9b334a45a8ff	2763	/* Get channel from instance */
bogdanm	0:9b334a45a8ff	2764	if(Instance == DFSDM_Channel0)
bogdanm	0:9b334a45a8ff	2765	{
bogdanm	0:9b334a45a8ff	2766	channel = 0;
bogdanm	0:9b334a45a8ff	2767	}
bogdanm	0:9b334a45a8ff	2768	else if(Instance == DFSDM_Channel1)
bogdanm	0:9b334a45a8ff	2769	{
bogdanm	0:9b334a45a8ff	2770	channel = 1;
bogdanm	0:9b334a45a8ff	2771	}
bogdanm	0:9b334a45a8ff	2772	else if(Instance == DFSDM_Channel2)
bogdanm	0:9b334a45a8ff	2773	{
bogdanm	0:9b334a45a8ff	2774	channel = 2;
bogdanm	0:9b334a45a8ff	2775	}
bogdanm	0:9b334a45a8ff	2776	else if(Instance == DFSDM_Channel3)
bogdanm	0:9b334a45a8ff	2777	{
bogdanm	0:9b334a45a8ff	2778	channel = 3;
bogdanm	0:9b334a45a8ff	2779	}
bogdanm	0:9b334a45a8ff	2780	else if(Instance == DFSDM_Channel4)
bogdanm	0:9b334a45a8ff	2781	{
bogdanm	0:9b334a45a8ff	2782	channel = 4;
bogdanm	0:9b334a45a8ff	2783	}
bogdanm	0:9b334a45a8ff	2784	else if(Instance == DFSDM_Channel5)
bogdanm	0:9b334a45a8ff	2785	{
bogdanm	0:9b334a45a8ff	2786	channel = 5;
bogdanm	0:9b334a45a8ff	2787	}
bogdanm	0:9b334a45a8ff	2788	else if(Instance == DFSDM_Channel6)
bogdanm	0:9b334a45a8ff	2789	{
bogdanm	0:9b334a45a8ff	2790	channel = 6;
bogdanm	0:9b334a45a8ff	2791	}
bogdanm	0:9b334a45a8ff	2792	else if(Instance == DFSDM_Channel7)
bogdanm	0:9b334a45a8ff	2793	{
bogdanm	0:9b334a45a8ff	2794	channel = 7;
bogdanm	0:9b334a45a8ff	2795	}
bogdanm	0:9b334a45a8ff	2796
bogdanm	0:9b334a45a8ff	2797	return channel;
bogdanm	0:9b334a45a8ff	2798	}
bogdanm	0:9b334a45a8ff	2799
bogdanm	0:9b334a45a8ff	2800	/**
bogdanm	0:9b334a45a8ff	2801	* @brief This function allows to really start regular conversion.
bogdanm	0:9b334a45a8ff	2802	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2803	* @retval None
bogdanm	0:9b334a45a8ff	2804	*/
bogdanm	0:9b334a45a8ff	2805	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2806	{
bogdanm	0:9b334a45a8ff	2807	/* Check regular trigger */
bogdanm	0:9b334a45a8ff	2808	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
bogdanm	0:9b334a45a8ff	2809	{
bogdanm	0:9b334a45a8ff	2810	/* Software start of regular conversion */
bogdanm	0:9b334a45a8ff	2811	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_RSWSTART;
bogdanm	0:9b334a45a8ff	2812	}
bogdanm	0:9b334a45a8ff	2813	else /* synchronous trigger */
bogdanm	0:9b334a45a8ff	2814	{
bogdanm	0:9b334a45a8ff	2815	/* Disable DFSDM filter */
bogdanm	0:9b334a45a8ff	2816	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_DFEN);
bogdanm	0:9b334a45a8ff	2817
bogdanm	0:9b334a45a8ff	2818	/* Set RSYNC bit in DFSDM_CR1 register */
bogdanm	0:9b334a45a8ff	2819	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_RSYNC;
bogdanm	0:9b334a45a8ff	2820
bogdanm	0:9b334a45a8ff	2821	/* Enable DFSDM filter */
bogdanm	0:9b334a45a8ff	2822	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_DFEN;
bogdanm	0:9b334a45a8ff	2823
bogdanm	0:9b334a45a8ff	2824	/* If injected conversion was in progress, restart it */
bogdanm	0:9b334a45a8ff	2825	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
bogdanm	0:9b334a45a8ff	2826	{
bogdanm	0:9b334a45a8ff	2827	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
bogdanm	0:9b334a45a8ff	2828	{
bogdanm	0:9b334a45a8ff	2829	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_JSWSTART;
bogdanm	0:9b334a45a8ff	2830	}
bogdanm	0:9b334a45a8ff	2831	/* Update remaining injected conversions */
bogdanm	0:9b334a45a8ff	2832	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
bogdanm	0:9b334a45a8ff	2833	hdfsdm_filter->InjectedChannelsNbr : 1;
bogdanm	0:9b334a45a8ff	2834	}
bogdanm	0:9b334a45a8ff	2835	}
bogdanm	0:9b334a45a8ff	2836	/* Update DFSDM filter state */
bogdanm	0:9b334a45a8ff	2837	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
bogdanm	0:9b334a45a8ff	2838	HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
bogdanm	0:9b334a45a8ff	2839	}
bogdanm	0:9b334a45a8ff	2840
bogdanm	0:9b334a45a8ff	2841	/**
bogdanm	0:9b334a45a8ff	2842	* @brief This function allows to really stop regular conversion.
bogdanm	0:9b334a45a8ff	2843	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2844	* @retval None
bogdanm	0:9b334a45a8ff	2845	*/
bogdanm	0:9b334a45a8ff	2846	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2847	{
bogdanm	0:9b334a45a8ff	2848	/* Disable DFSDM filter */
bogdanm	0:9b334a45a8ff	2849	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_DFEN);
bogdanm	0:9b334a45a8ff	2850
bogdanm	0:9b334a45a8ff	2851	/* If regular trigger was synchronous, reset RSYNC bit in DFSDM_CR1 register */
bogdanm	0:9b334a45a8ff	2852	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
bogdanm	0:9b334a45a8ff	2853	{
bogdanm	0:9b334a45a8ff	2854	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_RSYNC);
bogdanm	0:9b334a45a8ff	2855	}
bogdanm	0:9b334a45a8ff	2856
bogdanm	0:9b334a45a8ff	2857	/* Enable DFSDM filter */
bogdanm	0:9b334a45a8ff	2858	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_DFEN;
bogdanm	0:9b334a45a8ff	2859
bogdanm	0:9b334a45a8ff	2860	/* If injected conversion was in progress, restart it */
bogdanm	0:9b334a45a8ff	2861	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
bogdanm	0:9b334a45a8ff	2862	{
bogdanm	0:9b334a45a8ff	2863	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
bogdanm	0:9b334a45a8ff	2864	{
bogdanm	0:9b334a45a8ff	2865	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_JSWSTART;
bogdanm	0:9b334a45a8ff	2866	}
bogdanm	0:9b334a45a8ff	2867	/* Update remaining injected conversions */
bogdanm	0:9b334a45a8ff	2868	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
bogdanm	0:9b334a45a8ff	2869	hdfsdm_filter->InjectedChannelsNbr : 1;
bogdanm	0:9b334a45a8ff	2870	}
bogdanm	0:9b334a45a8ff	2871
bogdanm	0:9b334a45a8ff	2872	/* Update DFSDM filter state */
bogdanm	0:9b334a45a8ff	2873	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
bogdanm	0:9b334a45a8ff	2874	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
bogdanm	0:9b334a45a8ff	2875	}
bogdanm	0:9b334a45a8ff	2876
bogdanm	0:9b334a45a8ff	2877	/**
bogdanm	0:9b334a45a8ff	2878	* @brief This function allows to really start injected conversion.
bogdanm	0:9b334a45a8ff	2879	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2880	* @retval None
bogdanm	0:9b334a45a8ff	2881	*/
bogdanm	0:9b334a45a8ff	2882	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2883	{
bogdanm	0:9b334a45a8ff	2884	/* Check injected trigger */
bogdanm	0:9b334a45a8ff	2885	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
bogdanm	0:9b334a45a8ff	2886	{
bogdanm	0:9b334a45a8ff	2887	/* Software start of injected conversion */
bogdanm	0:9b334a45a8ff	2888	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_JSWSTART;
bogdanm	0:9b334a45a8ff	2889	}
bogdanm	0:9b334a45a8ff	2890	else /* external or synchronous trigger */
bogdanm	0:9b334a45a8ff	2891	{
bogdanm	0:9b334a45a8ff	2892	/* Disable DFSDM filter */
bogdanm	0:9b334a45a8ff	2893	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_DFEN);
bogdanm	0:9b334a45a8ff	2894
bogdanm	0:9b334a45a8ff	2895	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
bogdanm	0:9b334a45a8ff	2896	{
bogdanm	0:9b334a45a8ff	2897	/* Set JSYNC bit in DFSDM_CR1 register */
bogdanm	0:9b334a45a8ff	2898	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_JSYNC;
bogdanm	0:9b334a45a8ff	2899	}
bogdanm	0:9b334a45a8ff	2900	else /* external trigger */
bogdanm	0:9b334a45a8ff	2901	{
bogdanm	0:9b334a45a8ff	2902	/* Set JEXTEN[1:0] bits in DFSDM_CR1 register */
bogdanm	0:9b334a45a8ff	2903	hdfsdm_filter->Instance->CR1 \|= hdfsdm_filter->ExtTriggerEdge;
bogdanm	0:9b334a45a8ff	2904	}
bogdanm	0:9b334a45a8ff	2905
bogdanm	0:9b334a45a8ff	2906	/* Enable DFSDM filter */
bogdanm	0:9b334a45a8ff	2907	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_DFEN;
bogdanm	0:9b334a45a8ff	2908
bogdanm	0:9b334a45a8ff	2909	/* If regular conversion was in progress, restart it */
bogdanm	0:9b334a45a8ff	2910	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
bogdanm	0:9b334a45a8ff	2911	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
bogdanm	0:9b334a45a8ff	2912	{
bogdanm	0:9b334a45a8ff	2913	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_RSWSTART;
bogdanm	0:9b334a45a8ff	2914	}
bogdanm	0:9b334a45a8ff	2915	}
bogdanm	0:9b334a45a8ff	2916	/* Update DFSDM filter state */
bogdanm	0:9b334a45a8ff	2917	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
bogdanm	0:9b334a45a8ff	2918	HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
bogdanm	0:9b334a45a8ff	2919	}
bogdanm	0:9b334a45a8ff	2920
bogdanm	0:9b334a45a8ff	2921	/**
bogdanm	0:9b334a45a8ff	2922	* @brief This function allows to really stop injected conversion.
bogdanm	0:9b334a45a8ff	2923	* @param hdfsdm_filter : DFSDM filter handle.
bogdanm	0:9b334a45a8ff	2924	* @retval None
bogdanm	0:9b334a45a8ff	2925	*/
bogdanm	0:9b334a45a8ff	2926	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
bogdanm	0:9b334a45a8ff	2927	{
bogdanm	0:9b334a45a8ff	2928	/* Disable DFSDM filter */
bogdanm	0:9b334a45a8ff	2929	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_DFEN);
bogdanm	0:9b334a45a8ff	2930
bogdanm	0:9b334a45a8ff	2931	/* If injected trigger was synchronous, reset JSYNC bit in DFSDM_CR1 register */
bogdanm	0:9b334a45a8ff	2932	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
bogdanm	0:9b334a45a8ff	2933	{
bogdanm	0:9b334a45a8ff	2934	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_JSYNC);
bogdanm	0:9b334a45a8ff	2935	}
bogdanm	0:9b334a45a8ff	2936	else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
bogdanm	0:9b334a45a8ff	2937	{
bogdanm	0:9b334a45a8ff	2938	/* Reset JEXTEN[1:0] bits in DFSDM_CR1 register */
bogdanm	0:9b334a45a8ff	2939	hdfsdm_filter->Instance->CR1 &= ~(DFSDM_CR1_JEXTEN);
bogdanm	0:9b334a45a8ff	2940	}
bogdanm	0:9b334a45a8ff	2941
bogdanm	0:9b334a45a8ff	2942	/* Enable DFSDM filter */
bogdanm	0:9b334a45a8ff	2943	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_DFEN;
bogdanm	0:9b334a45a8ff	2944
bogdanm	0:9b334a45a8ff	2945	/* If regular conversion was in progress, restart it */
bogdanm	0:9b334a45a8ff	2946	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
bogdanm	0:9b334a45a8ff	2947	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
bogdanm	0:9b334a45a8ff	2948	{
bogdanm	0:9b334a45a8ff	2949	hdfsdm_filter->Instance->CR1 \|= DFSDM_CR1_RSWSTART;
bogdanm	0:9b334a45a8ff	2950	}
bogdanm	0:9b334a45a8ff	2951
bogdanm	0:9b334a45a8ff	2952	/* Update remaining injected conversions */
bogdanm	0:9b334a45a8ff	2953	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
bogdanm	0:9b334a45a8ff	2954	hdfsdm_filter->InjectedChannelsNbr : 1;
bogdanm	0:9b334a45a8ff	2955
bogdanm	0:9b334a45a8ff	2956	/* Update DFSDM filter state */
bogdanm	0:9b334a45a8ff	2957	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
bogdanm	0:9b334a45a8ff	2958	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
bogdanm	0:9b334a45a8ff	2959	}
bogdanm	0:9b334a45a8ff	2960
bogdanm	0:9b334a45a8ff	2961	/**
bogdanm	0:9b334a45a8ff	2962	* @}
bogdanm	0:9b334a45a8ff	2963	*/
bogdanm	0:9b334a45a8ff	2964	/* End of private functions --------------------------------------------------*/
bogdanm	0:9b334a45a8ff	2965
bogdanm	0:9b334a45a8ff	2966	/**
bogdanm	0:9b334a45a8ff	2967	* @}
bogdanm	0:9b334a45a8ff	2968	*/
bogdanm	0:9b334a45a8ff	2969	#endif /* HAL_DFSDM_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	2970	/**
bogdanm	0:9b334a45a8ff	2971	* @}
bogdanm	0:9b334a45a8ff	2972	*/
bogdanm	0:9b334a45a8ff	2973
bogdanm	0:9b334a45a8ff	2974	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_dfsdm.c@129:2e517c56bcfb, 2016-05-16 (annotated)

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