en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_dac.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_dac.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief DAC HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Digital to Analog Converter (DAC) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + IO operation functions
bogdanm 0:9b334a45a8ff 12 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 13 * + Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 14 *
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 @verbatim
bogdanm 0:9b334a45a8ff 17 ==============================================================================
bogdanm 0:9b334a45a8ff 18 ##### DAC Peripheral features #####
bogdanm 0:9b334a45a8ff 19 ==============================================================================
bogdanm 0:9b334a45a8ff 20 [..]
bogdanm 0:9b334a45a8ff 21 *** DAC Channels ***
bogdanm 0:9b334a45a8ff 22 ====================
bogdanm 0:9b334a45a8ff 23 [..]
bogdanm 0:9b334a45a8ff 24 STM32L4 devices integrate two 12-bit Digital Analog Converters
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 The 2 converters (i.e. channel1 & channel2)
bogdanm 0:9b334a45a8ff 27 can be used independently or simultaneously (dual mode):
bogdanm 0:9b334a45a8ff 28 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
bogdanm 0:9b334a45a8ff 29 peripherals (ex. OPAMPs, comparators).
bogdanm 0:9b334a45a8ff 30 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
bogdanm 0:9b334a45a8ff 31 peripherals (ex. OPAMPs, comparators).
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 *** DAC Triggers ***
bogdanm 0:9b334a45a8ff 34 ====================
bogdanm 0:9b334a45a8ff 35 [..]
bogdanm 0:9b334a45a8ff 36 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
bogdanm 0:9b334a45a8ff 37 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
bogdanm 0:9b334a45a8ff 38 [..]
bogdanm 0:9b334a45a8ff 39 Digital to Analog conversion can be triggered by:
bogdanm 0:9b334a45a8ff 40 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
bogdanm 0:9b334a45a8ff 41 The used pin (GPIOx_PIN_9) must be configured in input mode.
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7
bogdanm 0:9b334a45a8ff 44 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 (#) Software using DAC_TRIGGER_SOFTWARE
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 *** DAC Buffer mode feature ***
bogdanm 0:9b334a45a8ff 49 ===============================
bogdanm 0:9b334a45a8ff 50 [..]
bogdanm 0:9b334a45a8ff 51 Each DAC channel integrates an output buffer that can be used to
bogdanm 0:9b334a45a8ff 52 reduce the output impedance, and to drive external loads directly
bogdanm 0:9b334a45a8ff 53 without having to add an external operational amplifier.
bogdanm 0:9b334a45a8ff 54 To enable, the output buffer use
bogdanm 0:9b334a45a8ff 55 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
bogdanm 0:9b334a45a8ff 56 [..]
bogdanm 0:9b334a45a8ff 57 (@) Refer to the device datasheet for more details about output
bogdanm 0:9b334a45a8ff 58 impedance value with and without output buffer.
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 *** DAC connect feature ***
bogdanm 0:9b334a45a8ff 61 ===============================
bogdanm 0:9b334a45a8ff 62 [..]
bogdanm 0:9b334a45a8ff 63 Each DAC channel can be connected internally.
bogdanm 0:9b334a45a8ff 64 To connect, use
bogdanm 0:9b334a45a8ff 65 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 *** GPIO configurations guidelines ***
bogdanm 0:9b334a45a8ff 68 =====================
bogdanm 0:9b334a45a8ff 69 [..]
bogdanm 0:9b334a45a8ff 70 When a DAC channel is used (ex channel1 on PA4) and the other is not
bogdanm 0:9b334a45a8ff 71 (ex channel1 on PA5 is configured in Analog and disabled).
bogdanm 0:9b334a45a8ff 72 Channel1 may disturb channel2 as coupling effect.
bogdanm 0:9b334a45a8ff 73 Note that there is no coupling on channel2 as soon as channel2 is turned on.
bogdanm 0:9b334a45a8ff 74 Coupling on adjacent channel could be avoided as follows:
bogdanm 0:9b334a45a8ff 75 when unused PA5 is configured as INPUT PULL-UP or DOWN.
bogdanm 0:9b334a45a8ff 76 PA5 is configured in ANALOG just before it is turned on.
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 *** DAC Sample and Hold feature ***
bogdanm 0:9b334a45a8ff 79 ========================
bogdanm 0:9b334a45a8ff 80 [..]
bogdanm 0:9b334a45a8ff 81 For each converter, 2 modes are supported: normal mode and
bogdanm 0:9b334a45a8ff 82 "sample and hold" mode (i.e. low power mode).
bogdanm 0:9b334a45a8ff 83 In the sample and hold mode, the DAC core converts data, then holds the
bogdanm 0:9b334a45a8ff 84 converted voltage on a capacitor. When not converting, the DAC cores and
bogdanm 0:9b334a45a8ff 85 buffer are completely turned off between samples and the DAC output is
bogdanm 0:9b334a45a8ff 86 tri-stated, therefore reducing the overall power consumption. A new
bogdanm 0:9b334a45a8ff 87 stabilization period is needed before each new conversion.
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 The sample and hold allow setting internal or external voltage @
bogdanm 0:9b334a45a8ff 90 low power consumption cost (output value can be at any given rate either
bogdanm 0:9b334a45a8ff 91 by CPU or DMA).
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 The Sample and hold block and registers uses either LSI & run in
bogdanm 0:9b334a45a8ff 94 several power modes: run mode, sleep mode, low power run, low power sleep
bogdanm 0:9b334a45a8ff 95 mode & stop1 mode.
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 Low power stop1 mode allows only static conversion.
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 To enable Sample and Hold mode
bogdanm 0:9b334a45a8ff 100 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
bogdanm 0:9b334a45a8ff 101 RCC_LSI_ON parameters.
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
bogdanm 0:9b334a45a8ff 104 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
bogdanm 0:9b334a45a8ff 105 DAC_HoldTime & DAC_RefreshTime;
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 *** DAC calibration feature ***
bogdanm 0:9b334a45a8ff 110 ===================================
bogdanm 0:9b334a45a8ff 111 [..]
bogdanm 0:9b334a45a8ff 112 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
bogdanm 0:9b334a45a8ff 113 (++) Calibration aims at correcting some offset of output buffer.
bogdanm 0:9b334a45a8ff 114 (++) The DAC uses either factory calibration settings OR user defined
bogdanm 0:9b334a45a8ff 115 calibration (trimming) settings (i.e. trimming mode).
bogdanm 0:9b334a45a8ff 116 (++) The user defined settings can be figured out using self calibration
bogdanm 0:9b334a45a8ff 117 handled by HAL_DACEx_SelfCalibrate.
bogdanm 0:9b334a45a8ff 118 (++) HAL_DACEx_SelfCalibrate:
bogdanm 0:9b334a45a8ff 119 (+++) Runs automatically the calibration.
bogdanm 0:9b334a45a8ff 120 (+++) Enables the user trimming mode
bogdanm 0:9b334a45a8ff 121 (+++) Updates a structure with trimming values with fresh calibration
bogdanm 0:9b334a45a8ff 122 results.
bogdanm 0:9b334a45a8ff 123 The user may store the calibration results for larger
bogdanm 0:9b334a45a8ff 124 (ex monitoring the trimming as a function of temperature
bogdanm 0:9b334a45a8ff 125 for instance)
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 *** DAC wave generation feature ***
bogdanm 0:9b334a45a8ff 128 ===================================
bogdanm 0:9b334a45a8ff 129 [..]
bogdanm 0:9b334a45a8ff 130 Both DAC channels can be used to generate
bogdanm 0:9b334a45a8ff 131 (#) Noise wave
bogdanm 0:9b334a45a8ff 132 (#) Triangle wave
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 *** DAC data format ***
bogdanm 0:9b334a45a8ff 135 =======================
bogdanm 0:9b334a45a8ff 136 [..]
bogdanm 0:9b334a45a8ff 137 The DAC data format can be:
bogdanm 0:9b334a45a8ff 138 (#) 8-bit right alignment using DAC_ALIGN_8B_R
bogdanm 0:9b334a45a8ff 139 (#) 12-bit left alignment using DAC_ALIGN_12B_L
bogdanm 0:9b334a45a8ff 140 (#) 12-bit right alignment using DAC_ALIGN_12B_R
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 *** DAC data value to voltage correspondence ***
bogdanm 0:9b334a45a8ff 143 ================================================
bogdanm 0:9b334a45a8ff 144 [..]
bogdanm 0:9b334a45a8ff 145 The analog output voltage on each DAC channel pin is determined
bogdanm 0:9b334a45a8ff 146 by the following equation:
bogdanm 0:9b334a45a8ff 147 [..]
bogdanm 0:9b334a45a8ff 148 DAC_OUTx = VREF+ * DOR / 4095
bogdanm 0:9b334a45a8ff 149 (+) with DOR is the Data Output Register
bogdanm 0:9b334a45a8ff 150 [..]
bogdanm 0:9b334a45a8ff 151 VEF+ is the input voltage reference (refer to the device datasheet)
bogdanm 0:9b334a45a8ff 152 [..]
bogdanm 0:9b334a45a8ff 153 e.g. To set DAC_OUT1 to 0.7V, use
bogdanm 0:9b334a45a8ff 154 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 *** DMA requests ***
bogdanm 0:9b334a45a8ff 157 =====================
bogdanm 0:9b334a45a8ff 158 [..]
bogdanm 0:9b334a45a8ff 159 A DMA1 request can be generated when an external trigger (but not a software trigger)
bogdanm 0:9b334a45a8ff 160 occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA().
bogdanm 0:9b334a45a8ff 161 DMA requests are mapped as following:
bogdanm 0:9b334a45a8ff 162 (#) DAC channel1: mapped either on
bogdanm 0:9b334a45a8ff 163 (++) DMA1 request 6 channel3
bogdanm 0:9b334a45a8ff 164 (++) or DMA2 request channel4 which must be already configured
bogdanm 0:9b334a45a8ff 165 (#) DAC channel2: mapped either on
bogdanm 0:9b334a45a8ff 166 (++) DMA1 request 5 channel4
bogdanm 0:9b334a45a8ff 167 (++) or DMA2 request 3 channel5 which must be already configured
bogdanm 0:9b334a45a8ff 168 [..]
bogdanm 0:9b334a45a8ff 169 (@) For Dual mode and specific signal (Triangle and noise) generation please
bogdanm 0:9b334a45a8ff 170 refer to Extended Features Driver description
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 173 ==============================================================================
bogdanm 0:9b334a45a8ff 174 [..]
bogdanm 0:9b334a45a8ff 175 (+) DAC APB clock must be enabled to get write access to DAC
bogdanm 0:9b334a45a8ff 176 registers using HAL_DAC_Init()
bogdanm 0:9b334a45a8ff 177 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
bogdanm 0:9b334a45a8ff 178 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
bogdanm 0:9b334a45a8ff 179 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 *** Calibration mode IO operation ***
bogdanm 0:9b334a45a8ff 182 ======================================
bogdanm 0:9b334a45a8ff 183 [..]
bogdanm 0:9b334a45a8ff 184 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
bogdanm 0:9b334a45a8ff 185 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
bogdanm 0:9b334a45a8ff 186 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 189 =================================
bogdanm 0:9b334a45a8ff 190 [..]
bogdanm 0:9b334a45a8ff 191 (+) Start the DAC peripheral using HAL_DAC_Start()
bogdanm 0:9b334a45a8ff 192 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
bogdanm 0:9b334a45a8ff 193 (+) Stop the DAC peripheral using HAL_DAC_Stop()
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 196 ==============================
bogdanm 0:9b334a45a8ff 197 [..]
bogdanm 0:9b334a45a8ff 198 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
bogdanm 0:9b334a45a8ff 199 of data to be transferred at each end of conversion
bogdanm 0:9b334a45a8ff 200 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
bogdanm 0:9b334a45a8ff 201 function is executed and user can add his own code by customization of function pointer
bogdanm 0:9b334a45a8ff 202 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
bogdanm 0:9b334a45a8ff 203 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
bogdanm 0:9b334a45a8ff 204 function is executed and user can add his own code by customization of function pointer
bogdanm 0:9b334a45a8ff 205 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
bogdanm 0:9b334a45a8ff 206 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
bogdanm 0:9b334a45a8ff 207 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
bogdanm 0:9b334a45a8ff 208 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
bogdanm 0:9b334a45a8ff 209 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
bogdanm 0:9b334a45a8ff 210 function is executed and user can add his own code by customization of function pointer
bogdanm 0:9b334a45a8ff 211 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
bogdanm 0:9b334a45a8ff 212 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
bogdanm 0:9b334a45a8ff 213 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 *** DAC HAL driver macros list ***
bogdanm 0:9b334a45a8ff 216 =============================================
bogdanm 0:9b334a45a8ff 217 [..]
bogdanm 0:9b334a45a8ff 218 Below the list of most used macros in DAC HAL driver.
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
bogdanm 0:9b334a45a8ff 221 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
bogdanm 0:9b334a45a8ff 222 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
bogdanm 0:9b334a45a8ff 223 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 [..]
bogdanm 0:9b334a45a8ff 226 (@) You can refer to the DAC HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 @endverbatim
bogdanm 0:9b334a45a8ff 229 ******************************************************************************
bogdanm 0:9b334a45a8ff 230 * @attention
bogdanm 0:9b334a45a8ff 231 *
bogdanm 0:9b334a45a8ff 232 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 233 *
bogdanm 0:9b334a45a8ff 234 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 235 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 236 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 237 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 238 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 239 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 240 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 241 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 242 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 243 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 244 *
bogdanm 0:9b334a45a8ff 245 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 246 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 247 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 248 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 249 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 250 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 251 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 252 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 253 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 254 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 255 *
bogdanm 0:9b334a45a8ff 256 ******************************************************************************
bogdanm 0:9b334a45a8ff 257 */
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 261 #include "stm32l4xx_hal.h"
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 264 * @{
bogdanm 0:9b334a45a8ff 265 */
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 /** @defgroup DAC DAC
bogdanm 0:9b334a45a8ff 268 * @brief DAC driver modules
bogdanm 0:9b334a45a8ff 269 * @{
bogdanm 0:9b334a45a8ff 270 */
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 #ifdef HAL_DAC_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 275 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 276 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 277 /** @addtogroup DAC_Private_Constants DAC Private Constants
bogdanm 0:9b334a45a8ff 278 * @{
bogdanm 0:9b334a45a8ff 279 */
bogdanm 0:9b334a45a8ff 280 #define TIMEOUT_DAC_CALIBCONFIG ((uint32_t)1) /* 1ms */
bogdanm 0:9b334a45a8ff 281 /**
bogdanm 0:9b334a45a8ff 282 * @}
bogdanm 0:9b334a45a8ff 283 */
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 286 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 287 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 288 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 289 /** @defgroup DAC_Private_Functions DAC Private Functions
bogdanm 0:9b334a45a8ff 290 * @{
bogdanm 0:9b334a45a8ff 291 */
bogdanm 0:9b334a45a8ff 292 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 293 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 294 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 295 /**
bogdanm 0:9b334a45a8ff 296 * @}
bogdanm 0:9b334a45a8ff 297 */
bogdanm 0:9b334a45a8ff 298 /* Exported functions -------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 /** @defgroup DAC_Exported_Functions DAC Exported Functions
bogdanm 0:9b334a45a8ff 301 * @{
bogdanm 0:9b334a45a8ff 302 */
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 305 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 306 *
bogdanm 0:9b334a45a8ff 307 @verbatim
bogdanm 0:9b334a45a8ff 308 ==============================================================================
bogdanm 0:9b334a45a8ff 309 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 310 ==============================================================================
bogdanm 0:9b334a45a8ff 311 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 312 (+) Initialize and configure the DAC.
bogdanm 0:9b334a45a8ff 313 (+) De-initialize the DAC.
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 @endverbatim
bogdanm 0:9b334a45a8ff 316 * @{
bogdanm 0:9b334a45a8ff 317 */
bogdanm 0:9b334a45a8ff 318
bogdanm 0:9b334a45a8ff 319 /**
bogdanm 0:9b334a45a8ff 320 * @brief Initialize the DAC peripheral according to the specified parameters
bogdanm 0:9b334a45a8ff 321 * in the DAC_InitStruct and initialize the associated handle.
bogdanm 0:9b334a45a8ff 322 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 323 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 324 * @retval HAL status
bogdanm 0:9b334a45a8ff 325 */
bogdanm 0:9b334a45a8ff 326 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 327 {
bogdanm 0:9b334a45a8ff 328 /* Check DAC handle */
bogdanm 0:9b334a45a8ff 329 if(hdac == NULL)
bogdanm 0:9b334a45a8ff 330 {
bogdanm 0:9b334a45a8ff 331 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 332 }
bogdanm 0:9b334a45a8ff 333 /* Check the parameters */
bogdanm 0:9b334a45a8ff 334 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 if(hdac->State == HAL_DAC_STATE_RESET)
bogdanm 0:9b334a45a8ff 337 {
bogdanm 0:9b334a45a8ff 338 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 339 hdac->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 342 HAL_DAC_MspInit(hdac);
bogdanm 0:9b334a45a8ff 343 }
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /* Initialize the DAC state*/
bogdanm 0:9b334a45a8ff 346 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 /* Set DAC error code to none */
bogdanm 0:9b334a45a8ff 349 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 /* Initialize the DAC state*/
bogdanm 0:9b334a45a8ff 352 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 /* Return function status */
bogdanm 0:9b334a45a8ff 355 return HAL_OK;
bogdanm 0:9b334a45a8ff 356 }
bogdanm 0:9b334a45a8ff 357
bogdanm 0:9b334a45a8ff 358 /**
bogdanm 0:9b334a45a8ff 359 * @brief Deinitialize the DAC peripheral registers to their default reset values.
bogdanm 0:9b334a45a8ff 360 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 361 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 362 * @retval HAL status
bogdanm 0:9b334a45a8ff 363 */
bogdanm 0:9b334a45a8ff 364 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 365 {
bogdanm 0:9b334a45a8ff 366 /* Check DAC handle */
bogdanm 0:9b334a45a8ff 367 if(hdac == NULL)
bogdanm 0:9b334a45a8ff 368 {
bogdanm 0:9b334a45a8ff 369 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 370 }
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 /* Check the parameters */
bogdanm 0:9b334a45a8ff 373 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /* Change DAC state */
bogdanm 0:9b334a45a8ff 376 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 377
bogdanm 0:9b334a45a8ff 378 /* DeInit the low level hardware */
bogdanm 0:9b334a45a8ff 379 HAL_DAC_MspDeInit(hdac);
bogdanm 0:9b334a45a8ff 380
bogdanm 0:9b334a45a8ff 381 /* Set DAC error code to none */
bogdanm 0:9b334a45a8ff 382 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 /* Change DAC state */
bogdanm 0:9b334a45a8ff 385 hdac->State = HAL_DAC_STATE_RESET;
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 /* Release Lock */
bogdanm 0:9b334a45a8ff 388 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 389
bogdanm 0:9b334a45a8ff 390 /* Return function status */
bogdanm 0:9b334a45a8ff 391 return HAL_OK;
bogdanm 0:9b334a45a8ff 392 }
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 /**
bogdanm 0:9b334a45a8ff 395 * @brief Initialize the DAC MSP.
bogdanm 0:9b334a45a8ff 396 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 397 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 398 * @retval None
bogdanm 0:9b334a45a8ff 399 */
bogdanm 0:9b334a45a8ff 400 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 401 {
bogdanm 0:9b334a45a8ff 402 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 403 the HAL_DAC_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 404 */
bogdanm 0:9b334a45a8ff 405 }
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 /**
bogdanm 0:9b334a45a8ff 408 * @brief DeInitialize the DAC MSP.
bogdanm 0:9b334a45a8ff 409 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 410 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 411 * @retval None
bogdanm 0:9b334a45a8ff 412 */
bogdanm 0:9b334a45a8ff 413 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 414 {
bogdanm 0:9b334a45a8ff 415 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 416 the HAL_DAC_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 417 */
bogdanm 0:9b334a45a8ff 418 }
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420 /**
bogdanm 0:9b334a45a8ff 421 * @}
bogdanm 0:9b334a45a8ff 422 */
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
bogdanm 0:9b334a45a8ff 425 * @brief IO operation functions
bogdanm 0:9b334a45a8ff 426 *
bogdanm 0:9b334a45a8ff 427 @verbatim
bogdanm 0:9b334a45a8ff 428 ==============================================================================
bogdanm 0:9b334a45a8ff 429 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 430 ==============================================================================
bogdanm 0:9b334a45a8ff 431 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 432 (+) Start conversion.
bogdanm 0:9b334a45a8ff 433 (+) Stop conversion.
bogdanm 0:9b334a45a8ff 434 (+) Start conversion and enable DMA transfer.
bogdanm 0:9b334a45a8ff 435 (+) Stop conversion and disable DMA transfer.
bogdanm 0:9b334a45a8ff 436 (+) Get result of conversion.
bogdanm 0:9b334a45a8ff 437
bogdanm 0:9b334a45a8ff 438 @endverbatim
bogdanm 0:9b334a45a8ff 439 * @{
bogdanm 0:9b334a45a8ff 440 */
bogdanm 0:9b334a45a8ff 441
bogdanm 0:9b334a45a8ff 442 /**
bogdanm 0:9b334a45a8ff 443 * @brief Enables DAC and starts conversion of channel.
bogdanm 0:9b334a45a8ff 444 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 445 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 446 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 447 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 448 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 449 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 450 * @retval HAL status
bogdanm 0:9b334a45a8ff 451 */
bogdanm 0:9b334a45a8ff 452 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 453 {
bogdanm 0:9b334a45a8ff 454 /* Check the parameters */
bogdanm 0:9b334a45a8ff 455 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 456
bogdanm 0:9b334a45a8ff 457 /* Process locked */
bogdanm 0:9b334a45a8ff 458 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 459
bogdanm 0:9b334a45a8ff 460 /* Change DAC state */
bogdanm 0:9b334a45a8ff 461 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 464 __HAL_DAC_ENABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 467 {
bogdanm 0:9b334a45a8ff 468 /* Check if software trigger enabled */
bogdanm 0:9b334a45a8ff 469 if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
bogdanm 0:9b334a45a8ff 470 {
bogdanm 0:9b334a45a8ff 471 /* Enable the selected DAC software conversion */
bogdanm 0:9b334a45a8ff 472 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
bogdanm 0:9b334a45a8ff 473 }
bogdanm 0:9b334a45a8ff 474 }
bogdanm 0:9b334a45a8ff 475 else
bogdanm 0:9b334a45a8ff 476 {
bogdanm 0:9b334a45a8ff 477 /* Check if software trigger enabled */
bogdanm 0:9b334a45a8ff 478 if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
bogdanm 0:9b334a45a8ff 479 {
bogdanm 0:9b334a45a8ff 480 /* Enable the selected DAC software conversion*/
bogdanm 0:9b334a45a8ff 481 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
bogdanm 0:9b334a45a8ff 482 }
bogdanm 0:9b334a45a8ff 483 }
bogdanm 0:9b334a45a8ff 484
bogdanm 0:9b334a45a8ff 485 /* Change DAC state */
bogdanm 0:9b334a45a8ff 486 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 /* Process unlocked */
bogdanm 0:9b334a45a8ff 489 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 /* Return function status */
bogdanm 0:9b334a45a8ff 492 return HAL_OK;
bogdanm 0:9b334a45a8ff 493 }
bogdanm 0:9b334a45a8ff 494
bogdanm 0:9b334a45a8ff 495 /**
bogdanm 0:9b334a45a8ff 496 * @brief Disables DAC and stop conversion of channel.
bogdanm 0:9b334a45a8ff 497 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 498 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 499 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 500 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 501 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 502 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 503 * @retval HAL status
bogdanm 0:9b334a45a8ff 504 */
bogdanm 0:9b334a45a8ff 505 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 506 {
bogdanm 0:9b334a45a8ff 507 /* Check the parameters */
bogdanm 0:9b334a45a8ff 508 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 509
bogdanm 0:9b334a45a8ff 510 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 511 __HAL_DAC_DISABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 512
bogdanm 0:9b334a45a8ff 513 /* Change DAC state */
bogdanm 0:9b334a45a8ff 514 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 515
bogdanm 0:9b334a45a8ff 516 /* Return function status */
bogdanm 0:9b334a45a8ff 517 return HAL_OK;
bogdanm 0:9b334a45a8ff 518 }
bogdanm 0:9b334a45a8ff 519
bogdanm 0:9b334a45a8ff 520 /**
bogdanm 0:9b334a45a8ff 521 * @brief Enables DAC and starts conversion of channel.
bogdanm 0:9b334a45a8ff 522 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 523 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 524 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 525 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 526 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 527 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 528 * @param pData: The destination peripheral Buffer address.
bogdanm 0:9b334a45a8ff 529 * @param Length: The length of data to be transferred from memory to DAC peripheral
bogdanm 0:9b334a45a8ff 530 * @param Alignment: Specifies the data alignment for DAC channel.
bogdanm 0:9b334a45a8ff 531 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 532 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 533 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 534 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 535 * @retval HAL status
bogdanm 0:9b334a45a8ff 536 */
bogdanm 0:9b334a45a8ff 537 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
bogdanm 0:9b334a45a8ff 538 {
bogdanm 0:9b334a45a8ff 539 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 540
bogdanm 0:9b334a45a8ff 541 /* Check the parameters */
bogdanm 0:9b334a45a8ff 542 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 543 assert_param(IS_DAC_ALIGN(Alignment));
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /* Process locked */
bogdanm 0:9b334a45a8ff 546 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 547
bogdanm 0:9b334a45a8ff 548 /* Change DAC state */
bogdanm 0:9b334a45a8ff 549 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 550
bogdanm 0:9b334a45a8ff 551 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 552 {
bogdanm 0:9b334a45a8ff 553 /* Set the DMA transfer complete callback for channel1 */
bogdanm 0:9b334a45a8ff 554 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
bogdanm 0:9b334a45a8ff 555
bogdanm 0:9b334a45a8ff 556 /* Set the DMA half transfer complete callback for channel1 */
bogdanm 0:9b334a45a8ff 557 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
bogdanm 0:9b334a45a8ff 558
bogdanm 0:9b334a45a8ff 559 /* Set the DMA error callback for channel1 */
bogdanm 0:9b334a45a8ff 560 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
bogdanm 0:9b334a45a8ff 561
bogdanm 0:9b334a45a8ff 562 /* Enable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 563 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 /* Case of use of channel 1 */
bogdanm 0:9b334a45a8ff 566 switch(Alignment)
bogdanm 0:9b334a45a8ff 567 {
bogdanm 0:9b334a45a8ff 568 case DAC_ALIGN_12B_R:
bogdanm 0:9b334a45a8ff 569 /* Get DHR12R1 address */
bogdanm 0:9b334a45a8ff 570 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
bogdanm 0:9b334a45a8ff 571 break;
bogdanm 0:9b334a45a8ff 572 case DAC_ALIGN_12B_L:
bogdanm 0:9b334a45a8ff 573 /* Get DHR12L1 address */
bogdanm 0:9b334a45a8ff 574 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
bogdanm 0:9b334a45a8ff 575 break;
bogdanm 0:9b334a45a8ff 576 case DAC_ALIGN_8B_R:
bogdanm 0:9b334a45a8ff 577 /* Get DHR8R1 address */
bogdanm 0:9b334a45a8ff 578 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
bogdanm 0:9b334a45a8ff 579 break;
bogdanm 0:9b334a45a8ff 580 default:
bogdanm 0:9b334a45a8ff 581 break;
bogdanm 0:9b334a45a8ff 582 }
bogdanm 0:9b334a45a8ff 583 }
bogdanm 0:9b334a45a8ff 584 else
bogdanm 0:9b334a45a8ff 585 {
bogdanm 0:9b334a45a8ff 586 /* Set the DMA transfer complete callback for channel2 */
bogdanm 0:9b334a45a8ff 587 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
bogdanm 0:9b334a45a8ff 588
bogdanm 0:9b334a45a8ff 589 /* Set the DMA half transfer complete callback for channel2 */
bogdanm 0:9b334a45a8ff 590 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
bogdanm 0:9b334a45a8ff 591
bogdanm 0:9b334a45a8ff 592 /* Set the DMA error callback for channel2 */
bogdanm 0:9b334a45a8ff 593 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
bogdanm 0:9b334a45a8ff 594
bogdanm 0:9b334a45a8ff 595 /* Enable the selected DAC channel2 DMA request */
bogdanm 0:9b334a45a8ff 596 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
bogdanm 0:9b334a45a8ff 597
bogdanm 0:9b334a45a8ff 598 /* Case of use of channel 2 */
bogdanm 0:9b334a45a8ff 599 switch(Alignment)
bogdanm 0:9b334a45a8ff 600 {
bogdanm 0:9b334a45a8ff 601 case DAC_ALIGN_12B_R:
bogdanm 0:9b334a45a8ff 602 /* Get DHR12R2 address */
bogdanm 0:9b334a45a8ff 603 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
bogdanm 0:9b334a45a8ff 604 break;
bogdanm 0:9b334a45a8ff 605 case DAC_ALIGN_12B_L:
bogdanm 0:9b334a45a8ff 606 /* Get DHR12L2 address */
bogdanm 0:9b334a45a8ff 607 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
bogdanm 0:9b334a45a8ff 608 break;
bogdanm 0:9b334a45a8ff 609 case DAC_ALIGN_8B_R:
bogdanm 0:9b334a45a8ff 610 /* Get DHR8R2 address */
bogdanm 0:9b334a45a8ff 611 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
bogdanm 0:9b334a45a8ff 612 break;
bogdanm 0:9b334a45a8ff 613 default:
bogdanm 0:9b334a45a8ff 614 break;
bogdanm 0:9b334a45a8ff 615 }
bogdanm 0:9b334a45a8ff 616 }
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 619 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 620 {
bogdanm 0:9b334a45a8ff 621 /* Enable the DAC DMA underrun interrupt */
bogdanm 0:9b334a45a8ff 622 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
bogdanm 0:9b334a45a8ff 623
bogdanm 0:9b334a45a8ff 624 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 625 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
bogdanm 0:9b334a45a8ff 626 }
bogdanm 0:9b334a45a8ff 627 else
bogdanm 0:9b334a45a8ff 628 {
bogdanm 0:9b334a45a8ff 629 /* Enable the DAC DMA underrun interrupt */
bogdanm 0:9b334a45a8ff 630 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
bogdanm 0:9b334a45a8ff 631
bogdanm 0:9b334a45a8ff 632 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 633 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
bogdanm 0:9b334a45a8ff 634 }
bogdanm 0:9b334a45a8ff 635
bogdanm 0:9b334a45a8ff 636 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 637 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 638
bogdanm 0:9b334a45a8ff 639 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 640 __HAL_DAC_ENABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 641
bogdanm 0:9b334a45a8ff 642 /* Return function status */
bogdanm 0:9b334a45a8ff 643 return HAL_OK;
bogdanm 0:9b334a45a8ff 644 }
bogdanm 0:9b334a45a8ff 645
bogdanm 0:9b334a45a8ff 646 /**
bogdanm 0:9b334a45a8ff 647 * @brief Disables DAC and stop conversion of channel.
bogdanm 0:9b334a45a8ff 648 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 649 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 650 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 651 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 652 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 653 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 654 * @retval HAL status
bogdanm 0:9b334a45a8ff 655 */
bogdanm 0:9b334a45a8ff 656 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 657 {
bogdanm 0:9b334a45a8ff 658 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 659
bogdanm 0:9b334a45a8ff 660 /* Check the parameters */
bogdanm 0:9b334a45a8ff 661 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 662
bogdanm 0:9b334a45a8ff 663 /* Disable the selected DAC channel DMA request */
bogdanm 0:9b334a45a8ff 664 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
bogdanm 0:9b334a45a8ff 665
bogdanm 0:9b334a45a8ff 666 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 667 __HAL_DAC_DISABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 668
bogdanm 0:9b334a45a8ff 669 /* Disable the DMA channel */
bogdanm 0:9b334a45a8ff 670 /* Channel1 is used */
bogdanm 0:9b334a45a8ff 671 if (Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 672 {
bogdanm 0:9b334a45a8ff 673 /* Disable the DMA channel */
bogdanm 0:9b334a45a8ff 674 status = HAL_DMA_Abort(hdac->DMA_Handle1);
bogdanm 0:9b334a45a8ff 675
bogdanm 0:9b334a45a8ff 676 /* Disable the DAC DMA underrun interrupt */
bogdanm 0:9b334a45a8ff 677 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
bogdanm 0:9b334a45a8ff 678 }
bogdanm 0:9b334a45a8ff 679 else /* Channel2 is used for */
bogdanm 0:9b334a45a8ff 680 {
bogdanm 0:9b334a45a8ff 681 /* Disable the DMA channel */
bogdanm 0:9b334a45a8ff 682 status = HAL_DMA_Abort(hdac->DMA_Handle2);
bogdanm 0:9b334a45a8ff 683
bogdanm 0:9b334a45a8ff 684 /* Disable the DAC DMA underrun interrupt */
bogdanm 0:9b334a45a8ff 685 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
bogdanm 0:9b334a45a8ff 686 }
bogdanm 0:9b334a45a8ff 687
bogdanm 0:9b334a45a8ff 688 /* Check if DMA Channel effectively disabled */
bogdanm 0:9b334a45a8ff 689 if (status != HAL_OK)
bogdanm 0:9b334a45a8ff 690 {
bogdanm 0:9b334a45a8ff 691 /* Update DAC state machine to error */
bogdanm 0:9b334a45a8ff 692 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 693 }
bogdanm 0:9b334a45a8ff 694 else
bogdanm 0:9b334a45a8ff 695 {
bogdanm 0:9b334a45a8ff 696 /* Change DAC state */
bogdanm 0:9b334a45a8ff 697 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 698 }
bogdanm 0:9b334a45a8ff 699
bogdanm 0:9b334a45a8ff 700 /* Return function status */
bogdanm 0:9b334a45a8ff 701 return status;
bogdanm 0:9b334a45a8ff 702 }
bogdanm 0:9b334a45a8ff 703
bogdanm 0:9b334a45a8ff 704 /* DAC channel 2 is available on top of DAC channel 1 */
bogdanm 0:9b334a45a8ff 705
bogdanm 0:9b334a45a8ff 706 /**
bogdanm 0:9b334a45a8ff 707 * @brief Handles DAC interrupt request
bogdanm 0:9b334a45a8ff 708 * This function uses the interruption of DMA
bogdanm 0:9b334a45a8ff 709 * underrun.
bogdanm 0:9b334a45a8ff 710 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 711 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 712 * @retval None
bogdanm 0:9b334a45a8ff 713 */
bogdanm 0:9b334a45a8ff 714 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 715 {
bogdanm 0:9b334a45a8ff 716 if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
bogdanm 0:9b334a45a8ff 717 {
bogdanm 0:9b334a45a8ff 718 /* Check underrun flag of DAC channel 1 */
bogdanm 0:9b334a45a8ff 719 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
bogdanm 0:9b334a45a8ff 720 {
bogdanm 0:9b334a45a8ff 721 /* Change DAC state to error state */
bogdanm 0:9b334a45a8ff 722 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 723
bogdanm 0:9b334a45a8ff 724 /* Set DAC error code to chanel1 DMA underrun error */
bogdanm 0:9b334a45a8ff 725 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
bogdanm 0:9b334a45a8ff 726
bogdanm 0:9b334a45a8ff 727 /* Clear the underrun flag */
bogdanm 0:9b334a45a8ff 728 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
bogdanm 0:9b334a45a8ff 729
bogdanm 0:9b334a45a8ff 730 /* Disable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 731 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
bogdanm 0:9b334a45a8ff 732
bogdanm 0:9b334a45a8ff 733 /* Error callback */
bogdanm 0:9b334a45a8ff 734 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 735 }
bogdanm 0:9b334a45a8ff 736 }
bogdanm 0:9b334a45a8ff 737 if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
bogdanm 0:9b334a45a8ff 738 {
bogdanm 0:9b334a45a8ff 739 /* Check underrun flag of DAC channel 1 */
bogdanm 0:9b334a45a8ff 740 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
bogdanm 0:9b334a45a8ff 741 {
bogdanm 0:9b334a45a8ff 742 /* Change DAC state to error state */
bogdanm 0:9b334a45a8ff 743 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 744
bogdanm 0:9b334a45a8ff 745 /* Set DAC error code to channel2 DMA underrun error */
bogdanm 0:9b334a45a8ff 746 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
bogdanm 0:9b334a45a8ff 747
bogdanm 0:9b334a45a8ff 748 /* Clear the underrun flag */
bogdanm 0:9b334a45a8ff 749 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
bogdanm 0:9b334a45a8ff 750
bogdanm 0:9b334a45a8ff 751 /* Disable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 752 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
bogdanm 0:9b334a45a8ff 753
bogdanm 0:9b334a45a8ff 754 /* Error callback */
bogdanm 0:9b334a45a8ff 755 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
bogdanm 0:9b334a45a8ff 756 }
bogdanm 0:9b334a45a8ff 757 }
bogdanm 0:9b334a45a8ff 758 }
bogdanm 0:9b334a45a8ff 759
bogdanm 0:9b334a45a8ff 760 /**
bogdanm 0:9b334a45a8ff 761 * @brief Set the specified data holding register value for DAC channel.
bogdanm 0:9b334a45a8ff 762 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 763 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 764 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 765 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 766 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 767 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 768 * @param Alignment: Specifies the data alignment.
bogdanm 0:9b334a45a8ff 769 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 770 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 771 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 772 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 773 * @param Data: Data to be loaded in the selected data holding register.
bogdanm 0:9b334a45a8ff 774 * @retval HAL status
bogdanm 0:9b334a45a8ff 775 */
bogdanm 0:9b334a45a8ff 776 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
bogdanm 0:9b334a45a8ff 777 {
bogdanm 0:9b334a45a8ff 778 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 779
bogdanm 0:9b334a45a8ff 780 /* Check the parameters */
bogdanm 0:9b334a45a8ff 781 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 782 assert_param(IS_DAC_ALIGN(Alignment));
bogdanm 0:9b334a45a8ff 783 assert_param(IS_DAC_DATA(Data));
bogdanm 0:9b334a45a8ff 784
bogdanm 0:9b334a45a8ff 785 tmp = (uint32_t)hdac->Instance;
bogdanm 0:9b334a45a8ff 786 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 787 {
bogdanm 0:9b334a45a8ff 788 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
bogdanm 0:9b334a45a8ff 789 }
bogdanm 0:9b334a45a8ff 790 else
bogdanm 0:9b334a45a8ff 791 {
bogdanm 0:9b334a45a8ff 792 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
bogdanm 0:9b334a45a8ff 793 }
bogdanm 0:9b334a45a8ff 794
bogdanm 0:9b334a45a8ff 795 /* Set the DAC channel selected data holding register */
bogdanm 0:9b334a45a8ff 796 *(__IO uint32_t *) tmp = Data;
bogdanm 0:9b334a45a8ff 797
bogdanm 0:9b334a45a8ff 798 /* Return function status */
bogdanm 0:9b334a45a8ff 799 return HAL_OK;
bogdanm 0:9b334a45a8ff 800 }
bogdanm 0:9b334a45a8ff 801
bogdanm 0:9b334a45a8ff 802 /**
bogdanm 0:9b334a45a8ff 803 * @brief Conversion complete callback in non-blocking mode for Channel1
bogdanm 0:9b334a45a8ff 804 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 805 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 806 * @retval None
bogdanm 0:9b334a45a8ff 807 */
bogdanm 0:9b334a45a8ff 808 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 809 {
bogdanm 0:9b334a45a8ff 810 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 811 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
bogdanm 0:9b334a45a8ff 812 */
bogdanm 0:9b334a45a8ff 813 }
bogdanm 0:9b334a45a8ff 814
bogdanm 0:9b334a45a8ff 815 /**
bogdanm 0:9b334a45a8ff 816 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
bogdanm 0:9b334a45a8ff 817 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 818 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 819 * @retval None
bogdanm 0:9b334a45a8ff 820 */
bogdanm 0:9b334a45a8ff 821 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 822 {
bogdanm 0:9b334a45a8ff 823 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 824 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
bogdanm 0:9b334a45a8ff 825 */
bogdanm 0:9b334a45a8ff 826 }
bogdanm 0:9b334a45a8ff 827
bogdanm 0:9b334a45a8ff 828 /**
bogdanm 0:9b334a45a8ff 829 * @brief Error DAC callback for Channel1.
bogdanm 0:9b334a45a8ff 830 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 831 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 832 * @retval None
bogdanm 0:9b334a45a8ff 833 */
bogdanm 0:9b334a45a8ff 834 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
bogdanm 0:9b334a45a8ff 835 {
bogdanm 0:9b334a45a8ff 836 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 837 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
bogdanm 0:9b334a45a8ff 838 */
bogdanm 0:9b334a45a8ff 839 }
bogdanm 0:9b334a45a8ff 840
bogdanm 0:9b334a45a8ff 841 /**
bogdanm 0:9b334a45a8ff 842 * @brief DMA underrun DAC callback for channel1.
bogdanm 0:9b334a45a8ff 843 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 844 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 845 * @retval None
bogdanm 0:9b334a45a8ff 846 */
bogdanm 0:9b334a45a8ff 847 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
bogdanm 0:9b334a45a8ff 848 {
bogdanm 0:9b334a45a8ff 849 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 850 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
bogdanm 0:9b334a45a8ff 851 */
bogdanm 0:9b334a45a8ff 852 }
bogdanm 0:9b334a45a8ff 853
bogdanm 0:9b334a45a8ff 854 /**
bogdanm 0:9b334a45a8ff 855 * @}
bogdanm 0:9b334a45a8ff 856 */
bogdanm 0:9b334a45a8ff 857
bogdanm 0:9b334a45a8ff 858 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 859 * @brief Peripheral Control functions
bogdanm 0:9b334a45a8ff 860 *
bogdanm 0:9b334a45a8ff 861 @verbatim
bogdanm 0:9b334a45a8ff 862 ==============================================================================
bogdanm 0:9b334a45a8ff 863 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 864 ==============================================================================
bogdanm 0:9b334a45a8ff 865 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 866 (+) Configure channels.
bogdanm 0:9b334a45a8ff 867 (+) Set the specified data holding register value for DAC channel.
bogdanm 0:9b334a45a8ff 868
bogdanm 0:9b334a45a8ff 869 @endverbatim
bogdanm 0:9b334a45a8ff 870 * @{
bogdanm 0:9b334a45a8ff 871 */
bogdanm 0:9b334a45a8ff 872
bogdanm 0:9b334a45a8ff 873 /**
bogdanm 0:9b334a45a8ff 874 * @brief Returns the last data output value of the selected DAC channel.
bogdanm 0:9b334a45a8ff 875 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 876 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 877 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 878 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 879 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 880 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 881 * @retval The selected DAC channel data output value.
bogdanm 0:9b334a45a8ff 882 */
bogdanm 0:9b334a45a8ff 883 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 884 {
bogdanm 0:9b334a45a8ff 885 /* Check the parameters */
bogdanm 0:9b334a45a8ff 886 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 887
bogdanm 0:9b334a45a8ff 888 /* Returns the DAC channel data output register value */
bogdanm 0:9b334a45a8ff 889 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 890 {
bogdanm 0:9b334a45a8ff 891 return hdac->Instance->DOR1;
bogdanm 0:9b334a45a8ff 892 }
bogdanm 0:9b334a45a8ff 893 else
bogdanm 0:9b334a45a8ff 894 {
bogdanm 0:9b334a45a8ff 895 return hdac->Instance->DOR2;
bogdanm 0:9b334a45a8ff 896 }
bogdanm 0:9b334a45a8ff 897 }
bogdanm 0:9b334a45a8ff 898
bogdanm 0:9b334a45a8ff 899 /**
bogdanm 0:9b334a45a8ff 900 * @brief Configures the selected DAC channel.
bogdanm 0:9b334a45a8ff 901 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 902 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 903 * @param sConfig: DAC configuration structure.
bogdanm 0:9b334a45a8ff 904 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 905 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 906 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 907 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 908 * @retval HAL status
bogdanm 0:9b334a45a8ff 909 */
bogdanm 0:9b334a45a8ff 910 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
bogdanm 0:9b334a45a8ff 911 {
bogdanm 0:9b334a45a8ff 912 uint32_t tmpreg1 = 0, tmpreg2 = 0;
bogdanm 0:9b334a45a8ff 913 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 914
bogdanm 0:9b334a45a8ff 915 /* Check the DAC parameters */
bogdanm 0:9b334a45a8ff 916 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
bogdanm 0:9b334a45a8ff 917 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
bogdanm 0:9b334a45a8ff 918 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
bogdanm 0:9b334a45a8ff 919 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
bogdanm 0:9b334a45a8ff 920 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
bogdanm 0:9b334a45a8ff 921 {
bogdanm 0:9b334a45a8ff 922 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
bogdanm 0:9b334a45a8ff 923 }
bogdanm 0:9b334a45a8ff 924 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
bogdanm 0:9b334a45a8ff 925 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
bogdanm 0:9b334a45a8ff 926 {
bogdanm 0:9b334a45a8ff 927 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
bogdanm 0:9b334a45a8ff 928 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
bogdanm 0:9b334a45a8ff 929 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
bogdanm 0:9b334a45a8ff 930 }
bogdanm 0:9b334a45a8ff 931 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 932
bogdanm 0:9b334a45a8ff 933 /* Process locked */
bogdanm 0:9b334a45a8ff 934 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 935
bogdanm 0:9b334a45a8ff 936 /* Change DAC state */
bogdanm 0:9b334a45a8ff 937 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 938
bogdanm 0:9b334a45a8ff 939 if(sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
bogdanm 0:9b334a45a8ff 940 /* Sample on old configuration */
bogdanm 0:9b334a45a8ff 941 {
bogdanm 0:9b334a45a8ff 942 /* SampleTime */
bogdanm 0:9b334a45a8ff 943 if (Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 944 {
bogdanm 0:9b334a45a8ff 945 /* Get timeout */
bogdanm 0:9b334a45a8ff 946 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 947
bogdanm 0:9b334a45a8ff 948 /* SHSR1 can be written when BWST1 equals RESET */
bogdanm 0:9b334a45a8ff 949 while (((hdac->Instance->SR) & DAC_SR_BWST1)!= RESET)
bogdanm 0:9b334a45a8ff 950 {
bogdanm 0:9b334a45a8ff 951 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 952 if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
bogdanm 0:9b334a45a8ff 953 {
bogdanm 0:9b334a45a8ff 954 /* Update error code */
bogdanm 0:9b334a45a8ff 955 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
bogdanm 0:9b334a45a8ff 956
bogdanm 0:9b334a45a8ff 957 /* Change the DMA state */
bogdanm 0:9b334a45a8ff 958 hdac->State = HAL_DAC_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 959
bogdanm 0:9b334a45a8ff 960 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 961 }
bogdanm 0:9b334a45a8ff 962 }
bogdanm 0:9b334a45a8ff 963 HAL_Delay(1);
bogdanm 0:9b334a45a8ff 964 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
bogdanm 0:9b334a45a8ff 965 }
bogdanm 0:9b334a45a8ff 966 else /* Channel 2 */
bogdanm 0:9b334a45a8ff 967 {
bogdanm 0:9b334a45a8ff 968 /* SHSR2 can be written when BWST2 equals RESET */
bogdanm 0:9b334a45a8ff 969
bogdanm 0:9b334a45a8ff 970 while (((hdac->Instance->SR) & DAC_SR_BWST2)!= RESET)
bogdanm 0:9b334a45a8ff 971 {
bogdanm 0:9b334a45a8ff 972 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 973 if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
bogdanm 0:9b334a45a8ff 974 {
bogdanm 0:9b334a45a8ff 975 /* Update error code */
bogdanm 0:9b334a45a8ff 976 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
bogdanm 0:9b334a45a8ff 977
bogdanm 0:9b334a45a8ff 978 /* Change the DMA state */
bogdanm 0:9b334a45a8ff 979 hdac->State = HAL_DAC_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 980
bogdanm 0:9b334a45a8ff 981 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 982 }
bogdanm 0:9b334a45a8ff 983 }
bogdanm 0:9b334a45a8ff 984 HAL_Delay(1);
bogdanm 0:9b334a45a8ff 985 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
bogdanm 0:9b334a45a8ff 986 }
bogdanm 0:9b334a45a8ff 987 /* HoldTime */
bogdanm 0:9b334a45a8ff 988 hdac->Instance->SHHR = (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)<<Channel;
bogdanm 0:9b334a45a8ff 989 /* RefreshTime */
bogdanm 0:9b334a45a8ff 990 hdac->Instance->SHRR = (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)<<Channel;
bogdanm 0:9b334a45a8ff 991 }
bogdanm 0:9b334a45a8ff 992
bogdanm 0:9b334a45a8ff 993 if(sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
bogdanm 0:9b334a45a8ff 994 /* USER TRIMMING */
bogdanm 0:9b334a45a8ff 995 {
bogdanm 0:9b334a45a8ff 996 /* Get the DAC CCR value */
bogdanm 0:9b334a45a8ff 997 tmpreg1 = hdac->Instance->CCR;
bogdanm 0:9b334a45a8ff 998 /* Clear trimming value */
bogdanm 0:9b334a45a8ff 999 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << Channel);
bogdanm 0:9b334a45a8ff 1000 /* Configure for the selected trimming offset */
bogdanm 0:9b334a45a8ff 1001 tmpreg2 = sConfig->DAC_TrimmingValue;
bogdanm 0:9b334a45a8ff 1002 /* Calculate CCR register value depending on DAC_Channel */
bogdanm 0:9b334a45a8ff 1003 tmpreg1 |= tmpreg2 << Channel;
bogdanm 0:9b334a45a8ff 1004 /* Write to DAC CCR */
bogdanm 0:9b334a45a8ff 1005 hdac->Instance->CCR = tmpreg1;
bogdanm 0:9b334a45a8ff 1006 }
bogdanm 0:9b334a45a8ff 1007 /* else factory trimming is used (factory setting are available at reset)*/
bogdanm 0:9b334a45a8ff 1008 /* SW Nothing has nothing to do */
bogdanm 0:9b334a45a8ff 1009
bogdanm 0:9b334a45a8ff 1010 /* Get the DAC MCR value */
bogdanm 0:9b334a45a8ff 1011 tmpreg1 = hdac->Instance->MCR;
bogdanm 0:9b334a45a8ff 1012 /* Clear DAC_MCR_MODE2_0, DAC_MCR_MODE2_1 and DAC_MCR_MODE2_2 bits */
bogdanm 0:9b334a45a8ff 1013 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << Channel);
bogdanm 0:9b334a45a8ff 1014 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
bogdanm 0:9b334a45a8ff 1015 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
bogdanm 0:9b334a45a8ff 1016 /* Calculate MCR register value depending on DAC_Channel */
bogdanm 0:9b334a45a8ff 1017 tmpreg1 |= tmpreg2 << Channel;
bogdanm 0:9b334a45a8ff 1018 /* Write to DAC MCR */
bogdanm 0:9b334a45a8ff 1019 hdac->Instance->MCR = tmpreg1;
bogdanm 0:9b334a45a8ff 1020
bogdanm 0:9b334a45a8ff 1021 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
bogdanm 0:9b334a45a8ff 1022 CLEAR_BIT (hdac->Instance->CR, DAC_CR_CEN1 << Channel);
bogdanm 0:9b334a45a8ff 1023
bogdanm 0:9b334a45a8ff 1024 /* Get the DAC CR value */
bogdanm 0:9b334a45a8ff 1025 tmpreg1 = hdac->Instance->CR;
bogdanm 0:9b334a45a8ff 1026 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
bogdanm 0:9b334a45a8ff 1027 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << Channel);
bogdanm 0:9b334a45a8ff 1028 /* Configure for the selected DAC channel: trigger */
bogdanm 0:9b334a45a8ff 1029 /* Set TSELx and TENx bits according to DAC_Trigger value */
bogdanm 0:9b334a45a8ff 1030 tmpreg2 = (sConfig->DAC_Trigger);
bogdanm 0:9b334a45a8ff 1031 /* Calculate CR register value depending on DAC_Channel */
bogdanm 0:9b334a45a8ff 1032 tmpreg1 |= tmpreg2 << Channel;
bogdanm 0:9b334a45a8ff 1033 /* Write to DAC CR */
bogdanm 0:9b334a45a8ff 1034 hdac->Instance->CR = tmpreg1;
bogdanm 0:9b334a45a8ff 1035
bogdanm 0:9b334a45a8ff 1036 /* Disable wave generation */
bogdanm 0:9b334a45a8ff 1037 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
bogdanm 0:9b334a45a8ff 1038
bogdanm 0:9b334a45a8ff 1039 /* Change DAC state */
bogdanm 0:9b334a45a8ff 1040 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 1041
bogdanm 0:9b334a45a8ff 1042 /* Process unlocked */
bogdanm 0:9b334a45a8ff 1043 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 1044
bogdanm 0:9b334a45a8ff 1045 /* Return function status */
bogdanm 0:9b334a45a8ff 1046 return HAL_OK;
bogdanm 0:9b334a45a8ff 1047 }
bogdanm 0:9b334a45a8ff 1048
bogdanm 0:9b334a45a8ff 1049 /**
bogdanm 0:9b334a45a8ff 1050 * @}
bogdanm 0:9b334a45a8ff 1051 */
bogdanm 0:9b334a45a8ff 1052
bogdanm 0:9b334a45a8ff 1053 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 1054 * @brief Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 1055 *
bogdanm 0:9b334a45a8ff 1056 @verbatim
bogdanm 0:9b334a45a8ff 1057 ==============================================================================
bogdanm 0:9b334a45a8ff 1058 ##### Peripheral State and Errors functions #####
bogdanm 0:9b334a45a8ff 1059 ==============================================================================
bogdanm 0:9b334a45a8ff 1060 [..]
bogdanm 0:9b334a45a8ff 1061 This subsection provides functions allowing to
bogdanm 0:9b334a45a8ff 1062 (+) Check the DAC state.
bogdanm 0:9b334a45a8ff 1063 (+) Check the DAC Errors.
bogdanm 0:9b334a45a8ff 1064
bogdanm 0:9b334a45a8ff 1065 @endverbatim
bogdanm 0:9b334a45a8ff 1066 * @{
bogdanm 0:9b334a45a8ff 1067 */
bogdanm 0:9b334a45a8ff 1068
bogdanm 0:9b334a45a8ff 1069 /**
bogdanm 0:9b334a45a8ff 1070 * @brief return the DAC handle state
bogdanm 0:9b334a45a8ff 1071 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1072 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 1073 * @retval HAL state
bogdanm 0:9b334a45a8ff 1074 */
bogdanm 0:9b334a45a8ff 1075 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 1076 {
bogdanm 0:9b334a45a8ff 1077 /* Return DAC handle state */
bogdanm 0:9b334a45a8ff 1078 return hdac->State;
bogdanm 0:9b334a45a8ff 1079 }
bogdanm 0:9b334a45a8ff 1080
bogdanm 0:9b334a45a8ff 1081
bogdanm 0:9b334a45a8ff 1082 /**
bogdanm 0:9b334a45a8ff 1083 * @brief Return the DAC error code
bogdanm 0:9b334a45a8ff 1084 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1085 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 1086 * @retval DAC Error Code
bogdanm 0:9b334a45a8ff 1087 */
bogdanm 0:9b334a45a8ff 1088 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
bogdanm 0:9b334a45a8ff 1089 {
bogdanm 0:9b334a45a8ff 1090 return hdac->ErrorCode;
bogdanm 0:9b334a45a8ff 1091 }
bogdanm 0:9b334a45a8ff 1092
bogdanm 0:9b334a45a8ff 1093 /**
bogdanm 0:9b334a45a8ff 1094 * @}
bogdanm 0:9b334a45a8ff 1095 */
bogdanm 0:9b334a45a8ff 1096
bogdanm 0:9b334a45a8ff 1097 /**
bogdanm 0:9b334a45a8ff 1098 * @}
bogdanm 0:9b334a45a8ff 1099 */
bogdanm 0:9b334a45a8ff 1100
bogdanm 0:9b334a45a8ff 1101 /** @addtogroup DAC_Private_Functions
bogdanm 0:9b334a45a8ff 1102 * @{
bogdanm 0:9b334a45a8ff 1103 */
bogdanm 0:9b334a45a8ff 1104
bogdanm 0:9b334a45a8ff 1105 /**
bogdanm 0:9b334a45a8ff 1106 * @brief DMA conversion complete callback.
bogdanm 0:9b334a45a8ff 1107 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1108 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1109 * @retval None
bogdanm 0:9b334a45a8ff 1110 */
bogdanm 0:9b334a45a8ff 1111 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1112 {
bogdanm 0:9b334a45a8ff 1113 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1114
bogdanm 0:9b334a45a8ff 1115 HAL_DAC_ConvCpltCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 1116
bogdanm 0:9b334a45a8ff 1117 hdac->State= HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 1118 }
bogdanm 0:9b334a45a8ff 1119
bogdanm 0:9b334a45a8ff 1120 /**
bogdanm 0:9b334a45a8ff 1121 * @brief DMA half transfer complete callback.
bogdanm 0:9b334a45a8ff 1122 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1123 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1124 * @retval None
bogdanm 0:9b334a45a8ff 1125 */
bogdanm 0:9b334a45a8ff 1126 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1127 {
bogdanm 0:9b334a45a8ff 1128 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1129 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 1130 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 1131 }
bogdanm 0:9b334a45a8ff 1132
bogdanm 0:9b334a45a8ff 1133 /**
bogdanm 0:9b334a45a8ff 1134 * @brief DMA error callback
bogdanm 0:9b334a45a8ff 1135 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1136 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1137 * @retval None
bogdanm 0:9b334a45a8ff 1138 */
bogdanm 0:9b334a45a8ff 1139 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1140 {
bogdanm 0:9b334a45a8ff 1141 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1142
bogdanm 0:9b334a45a8ff 1143 /* Set DAC error code to DMA error */
bogdanm 0:9b334a45a8ff 1144 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1145
bogdanm 0:9b334a45a8ff 1146 HAL_DAC_ErrorCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 1147
bogdanm 0:9b334a45a8ff 1148 hdac->State= HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 1149 }
bogdanm 0:9b334a45a8ff 1150
bogdanm 0:9b334a45a8ff 1151 /**
bogdanm 0:9b334a45a8ff 1152 * @}
bogdanm 0:9b334a45a8ff 1153 */
bogdanm 0:9b334a45a8ff 1154
bogdanm 0:9b334a45a8ff 1155 #endif /* HAL_DAC_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1156
bogdanm 0:9b334a45a8ff 1157 /**
bogdanm 0:9b334a45a8ff 1158 * @}
bogdanm 0:9b334a45a8ff 1159 */
bogdanm 0:9b334a45a8ff 1160
bogdanm 0:9b334a45a8ff 1161 /**
bogdanm 0:9b334a45a8ff 1162 * @}
bogdanm 0:9b334a45a8ff 1163 */
bogdanm 0:9b334a45a8ff 1164
bogdanm 0:9b334a45a8ff 1165 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/