en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_cortex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l4xx_hal_cortex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief CORTEX HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the CORTEX:
bogdanm 0:9b334a45a8ff 10 * + Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 11 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ==============================================================================
bogdanm 0:9b334a45a8ff 15 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17
bogdanm 0:9b334a45a8ff 18 [..]
bogdanm 0:9b334a45a8ff 19 *** How to configure Interrupts using CORTEX HAL driver ***
bogdanm 0:9b334a45a8ff 20 ===========================================================
bogdanm 0:9b334a45a8ff 21 [..]
bogdanm 0:9b334a45a8ff 22 This section provides functions allowing to configure the NVIC interrupts (IRQ).
bogdanm 0:9b334a45a8ff 23 The Cortex-M4 exceptions are managed by CMSIS functions.
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
bogdanm 0:9b334a45a8ff 26 function according to the following table.
bogdanm 0:9b334a45a8ff 27 The table below gives the allowed values of the pre-emption priority and subpriority according
bogdanm 0:9b334a45a8ff 28 to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function.
bogdanm 0:9b334a45a8ff 29 ==========================================================================================================================
bogdanm 0:9b334a45a8ff 30 NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
bogdanm 0:9b334a45a8ff 31 ==========================================================================================================================
bogdanm 0:9b334a45a8ff 32 NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bit for pre-emption priority
bogdanm 0:9b334a45a8ff 33 | | | 4 bits for subpriority
bogdanm 0:9b334a45a8ff 34 --------------------------------------------------------------------------------------------------------------------------
bogdanm 0:9b334a45a8ff 35 NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bit for pre-emption priority
bogdanm 0:9b334a45a8ff 36 | | | 3 bits for subpriority
bogdanm 0:9b334a45a8ff 37 --------------------------------------------------------------------------------------------------------------------------
bogdanm 0:9b334a45a8ff 38 NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
bogdanm 0:9b334a45a8ff 39 | | | 2 bits for subpriority
bogdanm 0:9b334a45a8ff 40 --------------------------------------------------------------------------------------------------------------------------
bogdanm 0:9b334a45a8ff 41 NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
bogdanm 0:9b334a45a8ff 42 | | | 1 bit for subpriority
bogdanm 0:9b334a45a8ff 43 --------------------------------------------------------------------------------------------------------------------------
bogdanm 0:9b334a45a8ff 44 NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority
bogdanm 0:9b334a45a8ff 45 | | | 0 bit for subpriority
bogdanm 0:9b334a45a8ff 46 ==========================================================================================================================
bogdanm 0:9b334a45a8ff 47 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
bogdanm 0:9b334a45a8ff 48 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible.
bogdanm 0:9b334a45a8ff 51 The pending IRQ priority will be managed only by the sub priority.
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 -@- IRQ priority order (sorted by highest to lowest priority):
bogdanm 0:9b334a45a8ff 54 (+@) Lowest pre-emption priority
bogdanm 0:9b334a45a8ff 55 (+@) Lowest sub priority
bogdanm 0:9b334a45a8ff 56 (+@) Lowest hardware priority (IRQ number)
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 [..]
bogdanm 0:9b334a45a8ff 59 *** How to configure SysTick using CORTEX HAL driver ***
bogdanm 0:9b334a45a8ff 60 ========================================================
bogdanm 0:9b334a45a8ff 61 [..]
bogdanm 0:9b334a45a8ff 62 Setup SysTick Timer for time base.
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
bogdanm 0:9b334a45a8ff 65 is a CMSIS function that:
bogdanm 0:9b334a45a8ff 66 (++) Configures the SysTick Reload register with value passed as function parameter.
bogdanm 0:9b334a45a8ff 67 (++) Configures the SysTick IRQ priority to the lowest value (0x0F).
bogdanm 0:9b334a45a8ff 68 (++) Resets the SysTick Counter register.
bogdanm 0:9b334a45a8ff 69 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
bogdanm 0:9b334a45a8ff 70 (++) Enables the SysTick Interrupt.
bogdanm 0:9b334a45a8ff 71 (++) Starts the SysTick Counter.
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
bogdanm 0:9b334a45a8ff 74 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
bogdanm 0:9b334a45a8ff 75 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
bogdanm 0:9b334a45a8ff 76 inside the stm32l4xx_hal_cortex.h file.
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 (+) You can change the SysTick IRQ priority by calling the
bogdanm 0:9b334a45a8ff 79 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
bogdanm 0:9b334a45a8ff 80 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 (+) To adjust the SysTick time base, use the following formula:
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
bogdanm 0:9b334a45a8ff 85 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
bogdanm 0:9b334a45a8ff 86 (++) Reload Value should not exceed 0xFFFFFF
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 @endverbatim
bogdanm 0:9b334a45a8ff 89 ******************************************************************************
bogdanm 0:9b334a45a8ff 90 * @attention
bogdanm 0:9b334a45a8ff 91 *
bogdanm 0:9b334a45a8ff 92 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 93 *
bogdanm 0:9b334a45a8ff 94 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 95 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 96 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 97 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 98 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 99 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 100 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 101 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 102 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 103 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 104 *
bogdanm 0:9b334a45a8ff 105 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 106 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 107 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 108 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 109 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 110 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 111 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 112 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 113 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 114 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 115 *
bogdanm 0:9b334a45a8ff 116 ******************************************************************************
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 120 #include "stm32l4xx_hal.h"
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 /** @addtogroup STM32L4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 123 * @{
bogdanm 0:9b334a45a8ff 124 */
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 /** @addtogroup CORTEX
bogdanm 0:9b334a45a8ff 127 * @{
bogdanm 0:9b334a45a8ff 128 */
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 #ifdef HAL_CORTEX_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 133 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 134 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 135 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 136 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 137 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 /** @addtogroup CORTEX_Exported_Functions
bogdanm 0:9b334a45a8ff 140 * @{
bogdanm 0:9b334a45a8ff 141 */
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 /** @addtogroup CORTEX_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 145 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 146 *
bogdanm 0:9b334a45a8ff 147 @verbatim
bogdanm 0:9b334a45a8ff 148 ==============================================================================
bogdanm 0:9b334a45a8ff 149 ##### Initialization and Configuration functions #####
bogdanm 0:9b334a45a8ff 150 ==============================================================================
bogdanm 0:9b334a45a8ff 151 [..]
bogdanm 0:9b334a45a8ff 152 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
bogdanm 0:9b334a45a8ff 153 SysTick functionalities
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 @endverbatim
bogdanm 0:9b334a45a8ff 156 * @{
bogdanm 0:9b334a45a8ff 157 */
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /**
bogdanm 0:9b334a45a8ff 161 * @brief Set the priority grouping field (pre-emption priority and subpriority)
bogdanm 0:9b334a45a8ff 162 * using the required unlock sequence.
bogdanm 0:9b334a45a8ff 163 * @param PriorityGroup: The priority grouping bits length.
bogdanm 0:9b334a45a8ff 164 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 165 * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority,
bogdanm 0:9b334a45a8ff 166 * 4 bits for subpriority
bogdanm 0:9b334a45a8ff 167 * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority,
bogdanm 0:9b334a45a8ff 168 * 3 bits for subpriority
bogdanm 0:9b334a45a8ff 169 * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority,
bogdanm 0:9b334a45a8ff 170 * 2 bits for subpriority
bogdanm 0:9b334a45a8ff 171 * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority,
bogdanm 0:9b334a45a8ff 172 * 1 bit for subpriority
bogdanm 0:9b334a45a8ff 173 * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority,
bogdanm 0:9b334a45a8ff 174 * 0 bit for subpriority
bogdanm 0:9b334a45a8ff 175 * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
bogdanm 0:9b334a45a8ff 176 * The pending IRQ priority will be managed only by the subpriority.
bogdanm 0:9b334a45a8ff 177 * @retval None
bogdanm 0:9b334a45a8ff 178 */
bogdanm 0:9b334a45a8ff 179 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
bogdanm 0:9b334a45a8ff 180 {
bogdanm 0:9b334a45a8ff 181 /* Check the parameters */
bogdanm 0:9b334a45a8ff 182 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
bogdanm 0:9b334a45a8ff 185 NVIC_SetPriorityGrouping(PriorityGroup);
bogdanm 0:9b334a45a8ff 186 }
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /**
bogdanm 0:9b334a45a8ff 189 * @brief Set the priority of an interrupt.
bogdanm 0:9b334a45a8ff 190 * @param IRQn: External interrupt number.
bogdanm 0:9b334a45a8ff 191 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 192 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 193 * @param PreemptPriority: The pre-emption priority for the IRQn channel.
bogdanm 0:9b334a45a8ff 194 * This parameter can be a value between 0 and 15
bogdanm 0:9b334a45a8ff 195 * A lower priority value indicates a higher priority
bogdanm 0:9b334a45a8ff 196 * @param SubPriority: the subpriority level for the IRQ channel.
bogdanm 0:9b334a45a8ff 197 * This parameter can be a value between 0 and 15
bogdanm 0:9b334a45a8ff 198 * A lower priority value indicates a higher priority.
bogdanm 0:9b334a45a8ff 199 * @retval None
bogdanm 0:9b334a45a8ff 200 */
bogdanm 0:9b334a45a8ff 201 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
bogdanm 0:9b334a45a8ff 202 {
bogdanm 0:9b334a45a8ff 203 uint32_t prioritygroup = 0x00;
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /* Check the parameters */
bogdanm 0:9b334a45a8ff 206 assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
bogdanm 0:9b334a45a8ff 207 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 prioritygroup = NVIC_GetPriorityGrouping();
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
bogdanm 0:9b334a45a8ff 212 }
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 /**
bogdanm 0:9b334a45a8ff 215 * @brief Enable a device specific interrupt in the NVIC interrupt controller.
bogdanm 0:9b334a45a8ff 216 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
bogdanm 0:9b334a45a8ff 217 * function should be called before.
bogdanm 0:9b334a45a8ff 218 * @param IRQn External interrupt number.
bogdanm 0:9b334a45a8ff 219 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 220 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 221 * @retval None
bogdanm 0:9b334a45a8ff 222 */
bogdanm 0:9b334a45a8ff 223 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 224 {
bogdanm 0:9b334a45a8ff 225 /* Check the parameters */
bogdanm 0:9b334a45a8ff 226 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 /* Enable interrupt */
bogdanm 0:9b334a45a8ff 229 NVIC_EnableIRQ(IRQn);
bogdanm 0:9b334a45a8ff 230 }
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 /**
bogdanm 0:9b334a45a8ff 233 * @brief Disable a device specific interrupt in the NVIC interrupt controller.
bogdanm 0:9b334a45a8ff 234 * @param IRQn External interrupt number.
bogdanm 0:9b334a45a8ff 235 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 236 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 237 * @retval None
bogdanm 0:9b334a45a8ff 238 */
bogdanm 0:9b334a45a8ff 239 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 240 {
bogdanm 0:9b334a45a8ff 241 /* Check the parameters */
bogdanm 0:9b334a45a8ff 242 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /* Disable interrupt */
bogdanm 0:9b334a45a8ff 245 NVIC_DisableIRQ(IRQn);
bogdanm 0:9b334a45a8ff 246 }
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /**
bogdanm 0:9b334a45a8ff 249 * @brief Initiate a system reset request to reset the MCU.
bogdanm 0:9b334a45a8ff 250 * @retval None
bogdanm 0:9b334a45a8ff 251 */
bogdanm 0:9b334a45a8ff 252 void HAL_NVIC_SystemReset(void)
bogdanm 0:9b334a45a8ff 253 {
bogdanm 0:9b334a45a8ff 254 /* System Reset */
bogdanm 0:9b334a45a8ff 255 NVIC_SystemReset();
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 /**
bogdanm 0:9b334a45a8ff 259 * @brief Initialize the System Timer with interrupt enabled and start the System Tick Timer (SysTick):
bogdanm 0:9b334a45a8ff 260 * Counter is in free running mode to generate periodic interrupts.
bogdanm 0:9b334a45a8ff 261 * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
bogdanm 0:9b334a45a8ff 262 * @retval status: - 0 Function succeeded.
bogdanm 0:9b334a45a8ff 263 * - 1 Function failed.
bogdanm 0:9b334a45a8ff 264 */
bogdanm 0:9b334a45a8ff 265 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
bogdanm 0:9b334a45a8ff 266 {
bogdanm 0:9b334a45a8ff 267 return SysTick_Config(TicksNumb);
bogdanm 0:9b334a45a8ff 268 }
bogdanm 0:9b334a45a8ff 269 /**
bogdanm 0:9b334a45a8ff 270 * @}
bogdanm 0:9b334a45a8ff 271 */
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 /** @addtogroup CORTEX_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 274 * @brief Cortex control functions
bogdanm 0:9b334a45a8ff 275 *
bogdanm 0:9b334a45a8ff 276 @verbatim
bogdanm 0:9b334a45a8ff 277 ==============================================================================
bogdanm 0:9b334a45a8ff 278 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 279 ==============================================================================
bogdanm 0:9b334a45a8ff 280 [..]
bogdanm 0:9b334a45a8ff 281 This subsection provides a set of functions allowing to control the CORTEX
bogdanm 0:9b334a45a8ff 282 (NVIC, SYSTICK, MPU) functionalities.
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 @endverbatim
bogdanm 0:9b334a45a8ff 286 * @{
bogdanm 0:9b334a45a8ff 287 */
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 /**
bogdanm 0:9b334a45a8ff 290 * @brief Get the priority grouping field from the NVIC Interrupt Controller.
bogdanm 0:9b334a45a8ff 291 * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
bogdanm 0:9b334a45a8ff 292 */
bogdanm 0:9b334a45a8ff 293 uint32_t HAL_NVIC_GetPriorityGrouping(void)
bogdanm 0:9b334a45a8ff 294 {
bogdanm 0:9b334a45a8ff 295 /* Get the PRIGROUP[10:8] field value */
bogdanm 0:9b334a45a8ff 296 return NVIC_GetPriorityGrouping();
bogdanm 0:9b334a45a8ff 297 }
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /**
bogdanm 0:9b334a45a8ff 300 * @brief Get the priority of an interrupt.
bogdanm 0:9b334a45a8ff 301 * @param IRQn: External interrupt number.
bogdanm 0:9b334a45a8ff 302 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 303 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 304 * @param PriorityGroup: the priority grouping bits length.
bogdanm 0:9b334a45a8ff 305 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 306 * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority,
bogdanm 0:9b334a45a8ff 307 * 4 bits for subpriority
bogdanm 0:9b334a45a8ff 308 * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority,
bogdanm 0:9b334a45a8ff 309 * 3 bits for subpriority
bogdanm 0:9b334a45a8ff 310 * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority,
bogdanm 0:9b334a45a8ff 311 * 2 bits for subpriority
bogdanm 0:9b334a45a8ff 312 * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority,
bogdanm 0:9b334a45a8ff 313 * 1 bit for subpriority
bogdanm 0:9b334a45a8ff 314 * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority,
bogdanm 0:9b334a45a8ff 315 * 0 bit for subpriority
bogdanm 0:9b334a45a8ff 316 * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
bogdanm 0:9b334a45a8ff 317 * @param pSubPriority: Pointer on the Subpriority value (starting from 0).
bogdanm 0:9b334a45a8ff 318 * @retval None
bogdanm 0:9b334a45a8ff 319 */
bogdanm 0:9b334a45a8ff 320 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
bogdanm 0:9b334a45a8ff 321 {
bogdanm 0:9b334a45a8ff 322 /* Check the parameters */
bogdanm 0:9b334a45a8ff 323 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
bogdanm 0:9b334a45a8ff 324 /* Get priority for Cortex-M system or device specific interrupts */
bogdanm 0:9b334a45a8ff 325 NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 /**
bogdanm 0:9b334a45a8ff 329 * @brief Set Pending bit of an external interrupt.
bogdanm 0:9b334a45a8ff 330 * @param IRQn External interrupt number
bogdanm 0:9b334a45a8ff 331 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 332 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 333 * @retval None
bogdanm 0:9b334a45a8ff 334 */
bogdanm 0:9b334a45a8ff 335 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 336 {
bogdanm 0:9b334a45a8ff 337 /* Set interrupt pending */
bogdanm 0:9b334a45a8ff 338 NVIC_SetPendingIRQ(IRQn);
bogdanm 0:9b334a45a8ff 339 }
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /**
bogdanm 0:9b334a45a8ff 342 * @brief Get Pending Interrupt (read the pending register in the NVIC
bogdanm 0:9b334a45a8ff 343 * and return the pending bit for the specified interrupt).
bogdanm 0:9b334a45a8ff 344 * @param IRQn External interrupt number.
bogdanm 0:9b334a45a8ff 345 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 346 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 347 * @retval status: - 0 Interrupt status is not pending.
bogdanm 0:9b334a45a8ff 348 * - 1 Interrupt status is pending.
bogdanm 0:9b334a45a8ff 349 */
bogdanm 0:9b334a45a8ff 350 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 351 {
bogdanm 0:9b334a45a8ff 352 /* Return 1 if pending else 0 */
bogdanm 0:9b334a45a8ff 353 return NVIC_GetPendingIRQ(IRQn);
bogdanm 0:9b334a45a8ff 354 }
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 /**
bogdanm 0:9b334a45a8ff 357 * @brief Clear the pending bit of an external interrupt.
bogdanm 0:9b334a45a8ff 358 * @param IRQn External interrupt number.
bogdanm 0:9b334a45a8ff 359 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 360 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 361 * @retval None
bogdanm 0:9b334a45a8ff 362 */
bogdanm 0:9b334a45a8ff 363 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 364 {
bogdanm 0:9b334a45a8ff 365 /* Clear pending interrupt */
bogdanm 0:9b334a45a8ff 366 NVIC_ClearPendingIRQ(IRQn);
bogdanm 0:9b334a45a8ff 367 }
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 /**
bogdanm 0:9b334a45a8ff 370 * @brief Get active interrupt (read the active register in NVIC and return the active bit).
bogdanm 0:9b334a45a8ff 371 * @param IRQn External interrupt number
bogdanm 0:9b334a45a8ff 372 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 373 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h))
bogdanm 0:9b334a45a8ff 374 * @retval status: - 0 Interrupt status is not pending.
bogdanm 0:9b334a45a8ff 375 * - 1 Interrupt status is pending.
bogdanm 0:9b334a45a8ff 376 */
bogdanm 0:9b334a45a8ff 377 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 378 {
bogdanm 0:9b334a45a8ff 379 /* Return 1 if active else 0 */
bogdanm 0:9b334a45a8ff 380 return NVIC_GetActive(IRQn);
bogdanm 0:9b334a45a8ff 381 }
bogdanm 0:9b334a45a8ff 382
bogdanm 0:9b334a45a8ff 383 /**
bogdanm 0:9b334a45a8ff 384 * @brief Configure the SysTick clock source.
bogdanm 0:9b334a45a8ff 385 * @param CLKSource: specifies the SysTick clock source.
bogdanm 0:9b334a45a8ff 386 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 387 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
bogdanm 0:9b334a45a8ff 388 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
bogdanm 0:9b334a45a8ff 389 * @retval None
bogdanm 0:9b334a45a8ff 390 */
bogdanm 0:9b334a45a8ff 391 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
bogdanm 0:9b334a45a8ff 392 {
bogdanm 0:9b334a45a8ff 393 /* Check the parameters */
bogdanm 0:9b334a45a8ff 394 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
bogdanm 0:9b334a45a8ff 395 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
bogdanm 0:9b334a45a8ff 396 {
bogdanm 0:9b334a45a8ff 397 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
bogdanm 0:9b334a45a8ff 398 }
bogdanm 0:9b334a45a8ff 399 else
bogdanm 0:9b334a45a8ff 400 {
bogdanm 0:9b334a45a8ff 401 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
bogdanm 0:9b334a45a8ff 402 }
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 /**
bogdanm 0:9b334a45a8ff 406 * @brief Handle SYSTICK interrupt request.
bogdanm 0:9b334a45a8ff 407 * @retval None
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409 void HAL_SYSTICK_IRQHandler(void)
bogdanm 0:9b334a45a8ff 410 {
bogdanm 0:9b334a45a8ff 411 HAL_SYSTICK_Callback();
bogdanm 0:9b334a45a8ff 412 }
bogdanm 0:9b334a45a8ff 413
bogdanm 0:9b334a45a8ff 414 /**
bogdanm 0:9b334a45a8ff 415 * @brief SYSTICK callback.
bogdanm 0:9b334a45a8ff 416 * @retval None
bogdanm 0:9b334a45a8ff 417 */
bogdanm 0:9b334a45a8ff 418 __weak void HAL_SYSTICK_Callback(void)
bogdanm 0:9b334a45a8ff 419 {
bogdanm 0:9b334a45a8ff 420 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 421 the HAL_SYSTICK_Callback could be implemented in the user file
bogdanm 0:9b334a45a8ff 422 */
bogdanm 0:9b334a45a8ff 423 }
bogdanm 0:9b334a45a8ff 424
bogdanm 0:9b334a45a8ff 425 #if (__MPU_PRESENT == 1)
bogdanm 0:9b334a45a8ff 426 /**
bogdanm 0:9b334a45a8ff 427 * @brief Initialize and configure the Region and the memory to be protected.
bogdanm 0:9b334a45a8ff 428 * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
bogdanm 0:9b334a45a8ff 429 * the initialization and configuration information.
bogdanm 0:9b334a45a8ff 430 * @retval None
bogdanm 0:9b334a45a8ff 431 */
bogdanm 0:9b334a45a8ff 432 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
bogdanm 0:9b334a45a8ff 433 {
bogdanm 0:9b334a45a8ff 434 /* Check the parameters */
bogdanm 0:9b334a45a8ff 435 assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
bogdanm 0:9b334a45a8ff 436 assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
bogdanm 0:9b334a45a8ff 437
bogdanm 0:9b334a45a8ff 438 /* Set the Region number */
bogdanm 0:9b334a45a8ff 439 MPU->RNR = MPU_Init->Number;
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 if ((MPU_Init->Enable) != RESET)
bogdanm 0:9b334a45a8ff 442 {
bogdanm 0:9b334a45a8ff 443 /* Check the parameters */
bogdanm 0:9b334a45a8ff 444 assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
bogdanm 0:9b334a45a8ff 445 assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
bogdanm 0:9b334a45a8ff 446 assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
bogdanm 0:9b334a45a8ff 447 assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
bogdanm 0:9b334a45a8ff 448 assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
bogdanm 0:9b334a45a8ff 449 assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
bogdanm 0:9b334a45a8ff 450 assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
bogdanm 0:9b334a45a8ff 451 assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 MPU->RBAR = MPU_Init->BaseAddress;
bogdanm 0:9b334a45a8ff 454 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
bogdanm 0:9b334a45a8ff 455 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
bogdanm 0:9b334a45a8ff 456 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
bogdanm 0:9b334a45a8ff 457 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
bogdanm 0:9b334a45a8ff 458 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
bogdanm 0:9b334a45a8ff 459 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
bogdanm 0:9b334a45a8ff 460 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
bogdanm 0:9b334a45a8ff 461 ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
bogdanm 0:9b334a45a8ff 462 ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
bogdanm 0:9b334a45a8ff 463 }
bogdanm 0:9b334a45a8ff 464 else
bogdanm 0:9b334a45a8ff 465 {
bogdanm 0:9b334a45a8ff 466 MPU->RBAR = 0x00;
bogdanm 0:9b334a45a8ff 467 MPU->RASR = 0x00;
bogdanm 0:9b334a45a8ff 468 }
bogdanm 0:9b334a45a8ff 469 }
bogdanm 0:9b334a45a8ff 470 #endif /* __MPU_PRESENT */
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 /**
bogdanm 0:9b334a45a8ff 473 * @}
bogdanm 0:9b334a45a8ff 474 */
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 /**
bogdanm 0:9b334a45a8ff 477 * @}
bogdanm 0:9b334a45a8ff 478 */
bogdanm 0:9b334a45a8ff 479
bogdanm 0:9b334a45a8ff 480 #endif /* HAL_CORTEX_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 481 /**
bogdanm 0:9b334a45a8ff 482 * @}
bogdanm 0:9b334a45a8ff 483 */
bogdanm 0:9b334a45a8ff 484
bogdanm 0:9b334a45a8ff 485 /**
bogdanm 0:9b334a45a8ff 486 * @}
bogdanm 0:9b334a45a8ff 487 */
bogdanm 0:9b334a45a8ff 488
bogdanm 0:9b334a45a8ff 489 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/