en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_sd.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l1xx_hal_sd.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 5-September-2014
bogdanm 0:9b334a45a8ff 7 * @brief Header file of SD HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32L1xx_HAL_SD_H
bogdanm 0:9b334a45a8ff 40 #define __STM32L1xx_HAL_SD_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 45 extern "C" {
bogdanm 0:9b334a45a8ff 46 #endif
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 49 #include "stm32l1xx_ll_sdmmc.h"
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /** @addtogroup STM32L1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 52 * @{
bogdanm 0:9b334a45a8ff 53 */
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 /** @addtogroup SD
bogdanm 0:9b334a45a8ff 56 * @{
bogdanm 0:9b334a45a8ff 57 */
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 60 /** @defgroup SD_Exported_Types SD Exported Types
bogdanm 0:9b334a45a8ff 61 * @{
bogdanm 0:9b334a45a8ff 62 */
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 #define SD_InitTypeDef SDIO_InitTypeDef
bogdanm 0:9b334a45a8ff 65 #define SD_TypeDef SDIO_TypeDef
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 /**
bogdanm 0:9b334a45a8ff 68 * @brief SDIO Handle Structure definition
bogdanm 0:9b334a45a8ff 69 */
bogdanm 0:9b334a45a8ff 70 typedef struct
bogdanm 0:9b334a45a8ff 71 {
bogdanm 0:9b334a45a8ff 72 SD_TypeDef *Instance; /*!< SDIO register base address */
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 SD_InitTypeDef Init; /*!< SD required parameters */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 HAL_LockTypeDef Lock; /*!< SD locking object */
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 uint32_t CardType; /*!< SD card type */
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 uint32_t RCA; /*!< SD relative card address */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 uint32_t CSD[4]; /*!< SD card specific data table */
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 uint32_t CID[4]; /*!< SD card identification number table */
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 }SD_HandleTypeDef;
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /**
bogdanm 0:9b334a45a8ff 101 * @brief Card Specific Data: CSD Register
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103 typedef struct
bogdanm 0:9b334a45a8ff 104 {
bogdanm 0:9b334a45a8ff 105 __IO uint8_t CSDStruct; /*!< CSD structure */
bogdanm 0:9b334a45a8ff 106 __IO uint8_t SysSpecVersion; /*!< System specification version */
bogdanm 0:9b334a45a8ff 107 __IO uint8_t Reserved1; /*!< Reserved */
bogdanm 0:9b334a45a8ff 108 __IO uint8_t TAAC; /*!< Data read access time 1 */
bogdanm 0:9b334a45a8ff 109 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
bogdanm 0:9b334a45a8ff 110 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
bogdanm 0:9b334a45a8ff 111 __IO uint16_t CardComdClasses; /*!< Card command classes */
bogdanm 0:9b334a45a8ff 112 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
bogdanm 0:9b334a45a8ff 113 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
bogdanm 0:9b334a45a8ff 114 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
bogdanm 0:9b334a45a8ff 115 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
bogdanm 0:9b334a45a8ff 116 __IO uint8_t DSRImpl; /*!< DSR implemented */
bogdanm 0:9b334a45a8ff 117 __IO uint8_t Reserved2; /*!< Reserved */
bogdanm 0:9b334a45a8ff 118 __IO uint32_t DeviceSize; /*!< Device Size */
bogdanm 0:9b334a45a8ff 119 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
bogdanm 0:9b334a45a8ff 120 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
bogdanm 0:9b334a45a8ff 121 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
bogdanm 0:9b334a45a8ff 122 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
bogdanm 0:9b334a45a8ff 123 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
bogdanm 0:9b334a45a8ff 124 __IO uint8_t EraseGrSize; /*!< Erase group size */
bogdanm 0:9b334a45a8ff 125 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
bogdanm 0:9b334a45a8ff 126 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
bogdanm 0:9b334a45a8ff 127 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
bogdanm 0:9b334a45a8ff 128 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
bogdanm 0:9b334a45a8ff 129 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
bogdanm 0:9b334a45a8ff 130 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
bogdanm 0:9b334a45a8ff 131 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
bogdanm 0:9b334a45a8ff 132 __IO uint8_t Reserved3; /*!< Reserved */
bogdanm 0:9b334a45a8ff 133 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
bogdanm 0:9b334a45a8ff 134 __IO uint8_t FileFormatGrouop; /*!< File format group */
bogdanm 0:9b334a45a8ff 135 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
bogdanm 0:9b334a45a8ff 136 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
bogdanm 0:9b334a45a8ff 137 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
bogdanm 0:9b334a45a8ff 138 __IO uint8_t FileFormat; /*!< File format */
bogdanm 0:9b334a45a8ff 139 __IO uint8_t ECC; /*!< ECC code */
bogdanm 0:9b334a45a8ff 140 __IO uint8_t CSD_CRC; /*!< CSD CRC */
bogdanm 0:9b334a45a8ff 141 __IO uint8_t Reserved4; /*!< Always 1 */
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 }HAL_SD_CSDTypedef;
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 /**
bogdanm 0:9b334a45a8ff 146 * @brief Card Identification Data: CID Register
bogdanm 0:9b334a45a8ff 147 */
bogdanm 0:9b334a45a8ff 148 typedef struct
bogdanm 0:9b334a45a8ff 149 {
bogdanm 0:9b334a45a8ff 150 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
bogdanm 0:9b334a45a8ff 151 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
bogdanm 0:9b334a45a8ff 152 __IO uint32_t ProdName1; /*!< Product Name part1 */
bogdanm 0:9b334a45a8ff 153 __IO uint8_t ProdName2; /*!< Product Name part2 */
bogdanm 0:9b334a45a8ff 154 __IO uint8_t ProdRev; /*!< Product Revision */
bogdanm 0:9b334a45a8ff 155 __IO uint32_t ProdSN; /*!< Product Serial Number */
bogdanm 0:9b334a45a8ff 156 __IO uint8_t Reserved1; /*!< Reserved1 */
bogdanm 0:9b334a45a8ff 157 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
bogdanm 0:9b334a45a8ff 158 __IO uint8_t CID_CRC; /*!< CID CRC */
bogdanm 0:9b334a45a8ff 159 __IO uint8_t Reserved2; /*!< Always 1 */
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 }HAL_SD_CIDTypedef;
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 /**
bogdanm 0:9b334a45a8ff 164 * @brief SD Card Status returned by ACMD13
bogdanm 0:9b334a45a8ff 165 */
bogdanm 0:9b334a45a8ff 166 typedef struct
bogdanm 0:9b334a45a8ff 167 {
bogdanm 0:9b334a45a8ff 168 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
bogdanm 0:9b334a45a8ff 169 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
bogdanm 0:9b334a45a8ff 170 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
bogdanm 0:9b334a45a8ff 171 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
bogdanm 0:9b334a45a8ff 172 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
bogdanm 0:9b334a45a8ff 173 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
bogdanm 0:9b334a45a8ff 174 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
bogdanm 0:9b334a45a8ff 175 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
bogdanm 0:9b334a45a8ff 176 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
bogdanm 0:9b334a45a8ff 177 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 }HAL_SD_CardStatusTypedef;
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /**
bogdanm 0:9b334a45a8ff 182 * @brief SD Card information structure
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184 typedef struct
bogdanm 0:9b334a45a8ff 185 {
bogdanm 0:9b334a45a8ff 186 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
bogdanm 0:9b334a45a8ff 187 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
bogdanm 0:9b334a45a8ff 188 uint64_t CardCapacity; /*!< Card capacity */
bogdanm 0:9b334a45a8ff 189 uint32_t CardBlockSize; /*!< Card block size */
bogdanm 0:9b334a45a8ff 190 uint16_t RCA; /*!< SD relative card address */
bogdanm 0:9b334a45a8ff 191 uint8_t CardType; /*!< SD card type */
bogdanm 0:9b334a45a8ff 192
bogdanm 0:9b334a45a8ff 193 }HAL_SD_CardInfoTypedef;
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /**
bogdanm 0:9b334a45a8ff 196 * @brief SD Error status enumeration Structure definition
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198 typedef enum
bogdanm 0:9b334a45a8ff 199 {
bogdanm 0:9b334a45a8ff 200 /**
bogdanm 0:9b334a45a8ff 201 * @brief SD specific error defines
bogdanm 0:9b334a45a8ff 202 */
bogdanm 0:9b334a45a8ff 203 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
bogdanm 0:9b334a45a8ff 204 SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
bogdanm 0:9b334a45a8ff 205 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
bogdanm 0:9b334a45a8ff 206 SD_DATA_TIMEOUT = (4), /*!< Data timeout */
bogdanm 0:9b334a45a8ff 207 SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
bogdanm 0:9b334a45a8ff 208 SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
bogdanm 0:9b334a45a8ff 209 SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
bogdanm 0:9b334a45a8ff 210 SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
bogdanm 0:9b334a45a8ff 211 SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
bogdanm 0:9b334a45a8ff 212 SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
bogdanm 0:9b334a45a8ff 213 SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
bogdanm 0:9b334a45a8ff 214 SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
bogdanm 0:9b334a45a8ff 215 SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
bogdanm 0:9b334a45a8ff 216 SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
bogdanm 0:9b334a45a8ff 217 SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
bogdanm 0:9b334a45a8ff 218 SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
bogdanm 0:9b334a45a8ff 219 SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
bogdanm 0:9b334a45a8ff 220 SD_CC_ERROR = (18), /*!< Internal card controller error */
bogdanm 0:9b334a45a8ff 221 SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
bogdanm 0:9b334a45a8ff 222 SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
bogdanm 0:9b334a45a8ff 223 SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
bogdanm 0:9b334a45a8ff 224 SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
bogdanm 0:9b334a45a8ff 225 SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
bogdanm 0:9b334a45a8ff 226 SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
bogdanm 0:9b334a45a8ff 227 SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
bogdanm 0:9b334a45a8ff 228 SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
bogdanm 0:9b334a45a8ff 229 SD_INVALID_VOLTRANGE = (27),
bogdanm 0:9b334a45a8ff 230 SD_ADDR_OUT_OF_RANGE = (28),
bogdanm 0:9b334a45a8ff 231 SD_SWITCH_ERROR = (29),
bogdanm 0:9b334a45a8ff 232 SD_SDIO_DISABLED = (30),
bogdanm 0:9b334a45a8ff 233 SD_SDIO_FUNCTION_BUSY = (31),
bogdanm 0:9b334a45a8ff 234 SD_SDIO_FUNCTION_FAILED = (32),
bogdanm 0:9b334a45a8ff 235 SD_SDIO_UNKNOWN_FUNCTION = (33),
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 /**
bogdanm 0:9b334a45a8ff 238 * @brief Standard error defines
bogdanm 0:9b334a45a8ff 239 */
bogdanm 0:9b334a45a8ff 240 SD_INTERNAL_ERROR = (34),
bogdanm 0:9b334a45a8ff 241 SD_NOT_CONFIGURED = (35),
bogdanm 0:9b334a45a8ff 242 SD_REQUEST_PENDING = (36),
bogdanm 0:9b334a45a8ff 243 SD_REQUEST_NOT_APPLICABLE = (37),
bogdanm 0:9b334a45a8ff 244 SD_INVALID_PARAMETER = (38),
bogdanm 0:9b334a45a8ff 245 SD_UNSUPPORTED_FEATURE = (39),
bogdanm 0:9b334a45a8ff 246 SD_UNSUPPORTED_HW = (40),
bogdanm 0:9b334a45a8ff 247 SD_ERROR = (41),
bogdanm 0:9b334a45a8ff 248 SD_OK = (0)
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 }HAL_SD_ErrorTypedef;
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 /**
bogdanm 0:9b334a45a8ff 253 * @brief SD Transfer state enumeration structure
bogdanm 0:9b334a45a8ff 254 */
bogdanm 0:9b334a45a8ff 255 typedef enum
bogdanm 0:9b334a45a8ff 256 {
bogdanm 0:9b334a45a8ff 257 SD_TRANSFER_OK = 0, /*!< Transfer success */
bogdanm 0:9b334a45a8ff 258 SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
bogdanm 0:9b334a45a8ff 259 SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 }HAL_SD_TransferStateTypedef;
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /**
bogdanm 0:9b334a45a8ff 264 * @brief SD Card State enumeration structure
bogdanm 0:9b334a45a8ff 265 */
bogdanm 0:9b334a45a8ff 266 typedef enum
bogdanm 0:9b334a45a8ff 267 {
bogdanm 0:9b334a45a8ff 268 SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
bogdanm 0:9b334a45a8ff 269 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
bogdanm 0:9b334a45a8ff 270 SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
bogdanm 0:9b334a45a8ff 271 SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
bogdanm 0:9b334a45a8ff 272 SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
bogdanm 0:9b334a45a8ff 273 SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
bogdanm 0:9b334a45a8ff 274 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
bogdanm 0:9b334a45a8ff 275 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
bogdanm 0:9b334a45a8ff 276 SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 }HAL_SD_CardStateTypedef;
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 /**
bogdanm 0:9b334a45a8ff 281 * @brief SD Operation enumeration structure
bogdanm 0:9b334a45a8ff 282 */
bogdanm 0:9b334a45a8ff 283 typedef enum
bogdanm 0:9b334a45a8ff 284 {
bogdanm 0:9b334a45a8ff 285 SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
bogdanm 0:9b334a45a8ff 286 SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
bogdanm 0:9b334a45a8ff 287 SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
bogdanm 0:9b334a45a8ff 288 SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
bogdanm 0:9b334a45a8ff 289
bogdanm 0:9b334a45a8ff 290 }HAL_SD_OperationTypedef;
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 /**
bogdanm 0:9b334a45a8ff 293 * @}
bogdanm 0:9b334a45a8ff 294 */
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 297 /** @defgroup SD_Exported_Constants SD Exported Constants
bogdanm 0:9b334a45a8ff 298 * @{
bogdanm 0:9b334a45a8ff 299 */
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 /**
bogdanm 0:9b334a45a8ff 302 * @brief SD Commands Index
bogdanm 0:9b334a45a8ff 303 */
bogdanm 0:9b334a45a8ff 304 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
bogdanm 0:9b334a45a8ff 305 #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
bogdanm 0:9b334a45a8ff 306 #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
bogdanm 0:9b334a45a8ff 307 #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
bogdanm 0:9b334a45a8ff 308 #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
bogdanm 0:9b334a45a8ff 309 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
bogdanm 0:9b334a45a8ff 310 operating condition register (OCR) content in the response on the CMD line. */
bogdanm 0:9b334a45a8ff 311 #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
bogdanm 0:9b334a45a8ff 312 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
bogdanm 0:9b334a45a8ff 313 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
bogdanm 0:9b334a45a8ff 314 and asks the card whether card supports voltage. */
bogdanm 0:9b334a45a8ff 315 #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
bogdanm 0:9b334a45a8ff 316 #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
bogdanm 0:9b334a45a8ff 317 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
bogdanm 0:9b334a45a8ff 318 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
bogdanm 0:9b334a45a8ff 319 #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
bogdanm 0:9b334a45a8ff 320 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
bogdanm 0:9b334a45a8ff 321 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
bogdanm 0:9b334a45a8ff 322 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
bogdanm 0:9b334a45a8ff 323 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
bogdanm 0:9b334a45a8ff 324 for SDHS and SDXC. */
bogdanm 0:9b334a45a8ff 325 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
bogdanm 0:9b334a45a8ff 326 fixed 512 bytes in case of SDHC and SDXC. */
bogdanm 0:9b334a45a8ff 327 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
bogdanm 0:9b334a45a8ff 328 STOP_TRANSMISSION command. */
bogdanm 0:9b334a45a8ff 329 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
bogdanm 0:9b334a45a8ff 330 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
bogdanm 0:9b334a45a8ff 331 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
bogdanm 0:9b334a45a8ff 332 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
bogdanm 0:9b334a45a8ff 333 fixed 512 bytes in case of SDHC and SDXC. */
bogdanm 0:9b334a45a8ff 334 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
bogdanm 0:9b334a45a8ff 335 #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
bogdanm 0:9b334a45a8ff 336 #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
bogdanm 0:9b334a45a8ff 337 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
bogdanm 0:9b334a45a8ff 338 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
bogdanm 0:9b334a45a8ff 339 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
bogdanm 0:9b334a45a8ff 340 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
bogdanm 0:9b334a45a8ff 341 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
bogdanm 0:9b334a45a8ff 342 #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
bogdanm 0:9b334a45a8ff 343 system set by switch function command (CMD6). */
bogdanm 0:9b334a45a8ff 344 #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
bogdanm 0:9b334a45a8ff 345 Reserved for each command system set by switch function command (CMD6). */
bogdanm 0:9b334a45a8ff 346 #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
bogdanm 0:9b334a45a8ff 347 #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
bogdanm 0:9b334a45a8ff 348 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
bogdanm 0:9b334a45a8ff 349 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
bogdanm 0:9b334a45a8ff 350 the SET_BLOCK_LEN command. */
bogdanm 0:9b334a45a8ff 351 #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
bogdanm 0:9b334a45a8ff 352 than a standard command. */
bogdanm 0:9b334a45a8ff 353 #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
bogdanm 0:9b334a45a8ff 354 for general purpose/application specific commands. */
bogdanm 0:9b334a45a8ff 355 #define SD_CMD_NO_CMD ((uint8_t)64)
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /**
bogdanm 0:9b334a45a8ff 358 * @brief Following commands are SD Card Specific commands.
bogdanm 0:9b334a45a8ff 359 * SDIO_APP_CMD should be sent before sending these commands.
bogdanm 0:9b334a45a8ff 360 */
bogdanm 0:9b334a45a8ff 361 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
bogdanm 0:9b334a45a8ff 362 widths are given in SCR register. */
bogdanm 0:9b334a45a8ff 363 #define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
bogdanm 0:9b334a45a8ff 364 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
bogdanm 0:9b334a45a8ff 365 32bit+CRC data block. */
bogdanm 0:9b334a45a8ff 366 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
bogdanm 0:9b334a45a8ff 367 send its operating condition register (OCR) content in the response on the CMD line. */
bogdanm 0:9b334a45a8ff 368 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
bogdanm 0:9b334a45a8ff 369 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
bogdanm 0:9b334a45a8ff 370 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
bogdanm 0:9b334a45a8ff 371 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
bogdanm 0:9b334a45a8ff 372
bogdanm 0:9b334a45a8ff 373 /**
bogdanm 0:9b334a45a8ff 374 * @brief Following commands are SD Card Specific security commands.
bogdanm 0:9b334a45a8ff 375 * SD_CMD_APP_CMD should be sent before sending these commands.
bogdanm 0:9b334a45a8ff 376 */
bogdanm 0:9b334a45a8ff 377 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 378 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 379 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 380 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 381 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 382 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 383 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 384 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 385 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 386 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 387 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 /**
bogdanm 0:9b334a45a8ff 390 * @brief Supported SD Memory Cards
bogdanm 0:9b334a45a8ff 391 */
bogdanm 0:9b334a45a8ff 392 #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 393 #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 394 #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
bogdanm 0:9b334a45a8ff 395 #define MULTIMEDIA_CARD ((uint32_t)0x00000003)
bogdanm 0:9b334a45a8ff 396 #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
bogdanm 0:9b334a45a8ff 397 #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
bogdanm 0:9b334a45a8ff 398 #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
bogdanm 0:9b334a45a8ff 399 #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
bogdanm 0:9b334a45a8ff 400 /**
bogdanm 0:9b334a45a8ff 401 * @}
bogdanm 0:9b334a45a8ff 402 */
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 405 /** @defgroup SD_Exported_macros SD Exported Macros
bogdanm 0:9b334a45a8ff 406 * @brief macros to handle interrupts and specific clock configurations
bogdanm 0:9b334a45a8ff 407 * @{
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409
bogdanm 0:9b334a45a8ff 410 /**
bogdanm 0:9b334a45a8ff 411 * @brief Enable the SD device.
bogdanm 0:9b334a45a8ff 412 * @retval None
bogdanm 0:9b334a45a8ff 413 */
bogdanm 0:9b334a45a8ff 414 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 /**
bogdanm 0:9b334a45a8ff 417 * @brief Disable the SD device.
bogdanm 0:9b334a45a8ff 418 * @retval None
bogdanm 0:9b334a45a8ff 419 */
bogdanm 0:9b334a45a8ff 420 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
bogdanm 0:9b334a45a8ff 421
bogdanm 0:9b334a45a8ff 422 /**
bogdanm 0:9b334a45a8ff 423 * @brief Enable the SDIO DMA transfer.
bogdanm 0:9b334a45a8ff 424 * @retval None
bogdanm 0:9b334a45a8ff 425 */
bogdanm 0:9b334a45a8ff 426 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 /**
bogdanm 0:9b334a45a8ff 429 * @brief Disable the SDIO DMA transfer.
bogdanm 0:9b334a45a8ff 430 * @retval None
bogdanm 0:9b334a45a8ff 431 */
bogdanm 0:9b334a45a8ff 432 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434 /**
bogdanm 0:9b334a45a8ff 435 * @brief Enable the SD device interrupt.
bogdanm 0:9b334a45a8ff 436 * @param __HANDLE__: SD Handle
bogdanm 0:9b334a45a8ff 437 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
bogdanm 0:9b334a45a8ff 438 * This parameter can be one or a combination of the following values:
bogdanm 0:9b334a45a8ff 439 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 440 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 441 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 0:9b334a45a8ff 442 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 0:9b334a45a8ff 443 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 0:9b334a45a8ff 444 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 0:9b334a45a8ff 445 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 0:9b334a45a8ff 446 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 0:9b334a45a8ff 447 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 0:9b334a45a8ff 448 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 0:9b334a45a8ff 449 * bus mode interrupt
bogdanm 0:9b334a45a8ff 450 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 0:9b334a45a8ff 451 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 0:9b334a45a8ff 452 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 0:9b334a45a8ff 453 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 0:9b334a45a8ff 454 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 0:9b334a45a8ff 455 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 0:9b334a45a8ff 456 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 0:9b334a45a8ff 457 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 0:9b334a45a8ff 458 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 0:9b334a45a8ff 459 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 0:9b334a45a8ff 460 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 0:9b334a45a8ff 461 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 0:9b334a45a8ff 462 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 0:9b334a45a8ff 463 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 0:9b334a45a8ff 464 * @retval None
bogdanm 0:9b334a45a8ff 465 */
bogdanm 0:9b334a45a8ff 466 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 467
bogdanm 0:9b334a45a8ff 468 /**
bogdanm 0:9b334a45a8ff 469 * @brief Disable the SD device interrupt.
bogdanm 0:9b334a45a8ff 470 * @param __HANDLE__: SD Handle
bogdanm 0:9b334a45a8ff 471 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
bogdanm 0:9b334a45a8ff 472 * This parameter can be one or a combination of the following values:
bogdanm 0:9b334a45a8ff 473 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 474 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 475 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 0:9b334a45a8ff 476 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 0:9b334a45a8ff 477 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 0:9b334a45a8ff 478 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 0:9b334a45a8ff 479 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 0:9b334a45a8ff 480 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 0:9b334a45a8ff 481 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 0:9b334a45a8ff 482 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 0:9b334a45a8ff 483 * bus mode interrupt
bogdanm 0:9b334a45a8ff 484 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 0:9b334a45a8ff 485 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 0:9b334a45a8ff 486 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 0:9b334a45a8ff 487 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 0:9b334a45a8ff 488 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 0:9b334a45a8ff 489 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 0:9b334a45a8ff 490 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 0:9b334a45a8ff 491 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 0:9b334a45a8ff 492 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 0:9b334a45a8ff 493 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 0:9b334a45a8ff 494 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 0:9b334a45a8ff 495 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 0:9b334a45a8ff 496 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 0:9b334a45a8ff 497 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 0:9b334a45a8ff 498 * @retval None
bogdanm 0:9b334a45a8ff 499 */
bogdanm 0:9b334a45a8ff 500 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 501
bogdanm 0:9b334a45a8ff 502 /**
bogdanm 0:9b334a45a8ff 503 * @brief Check whether the specified SD flag is set or not.
bogdanm 0:9b334a45a8ff 504 * @param __HANDLE__: SD Handle
bogdanm 0:9b334a45a8ff 505 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 506 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 507 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 0:9b334a45a8ff 508 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 0:9b334a45a8ff 509 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 0:9b334a45a8ff 510 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 0:9b334a45a8ff 511 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 0:9b334a45a8ff 512 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 0:9b334a45a8ff 513 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 0:9b334a45a8ff 514 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 0:9b334a45a8ff 515 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 0:9b334a45a8ff 516 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
bogdanm 0:9b334a45a8ff 517 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 0:9b334a45a8ff 518 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
bogdanm 0:9b334a45a8ff 519 * @arg SDIO_FLAG_TXACT: Data transmit in progress
bogdanm 0:9b334a45a8ff 520 * @arg SDIO_FLAG_RXACT: Data receive in progress
bogdanm 0:9b334a45a8ff 521 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
bogdanm 0:9b334a45a8ff 522 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
bogdanm 0:9b334a45a8ff 523 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
bogdanm 0:9b334a45a8ff 524 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
bogdanm 0:9b334a45a8ff 525 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
bogdanm 0:9b334a45a8ff 526 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
bogdanm 0:9b334a45a8ff 527 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
bogdanm 0:9b334a45a8ff 528 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
bogdanm 0:9b334a45a8ff 529 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 0:9b334a45a8ff 530 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 0:9b334a45a8ff 531 * @retval The new state of SD FLAG (SET or RESET).
bogdanm 0:9b334a45a8ff 532 */
bogdanm 0:9b334a45a8ff 533 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 0:9b334a45a8ff 534
bogdanm 0:9b334a45a8ff 535 /**
bogdanm 0:9b334a45a8ff 536 * @brief Clear the SD's pending flags.
bogdanm 0:9b334a45a8ff 537 * @param __HANDLE__: SD Handle
bogdanm 0:9b334a45a8ff 538 * @param __FLAG__: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 539 * This parameter can be one or a combination of the following values:
bogdanm 0:9b334a45a8ff 540 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 0:9b334a45a8ff 541 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 0:9b334a45a8ff 542 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 0:9b334a45a8ff 543 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 0:9b334a45a8ff 544 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 0:9b334a45a8ff 545 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 0:9b334a45a8ff 546 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 0:9b334a45a8ff 547 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 0:9b334a45a8ff 548 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 0:9b334a45a8ff 549 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
bogdanm 0:9b334a45a8ff 550 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 0:9b334a45a8ff 551 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 0:9b334a45a8ff 552 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 0:9b334a45a8ff 553 * @retval None
bogdanm 0:9b334a45a8ff 554 */
bogdanm 0:9b334a45a8ff 555 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 0:9b334a45a8ff 556
bogdanm 0:9b334a45a8ff 557 /**
bogdanm 0:9b334a45a8ff 558 * @brief Check whether the specified SD interrupt has occurred or not.
bogdanm 0:9b334a45a8ff 559 * @param __HANDLE__: SD Handle
bogdanm 0:9b334a45a8ff 560 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
bogdanm 0:9b334a45a8ff 561 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 562 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 563 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 564 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 0:9b334a45a8ff 565 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 0:9b334a45a8ff 566 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 0:9b334a45a8ff 567 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 0:9b334a45a8ff 568 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 0:9b334a45a8ff 569 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 0:9b334a45a8ff 570 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 0:9b334a45a8ff 571 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 0:9b334a45a8ff 572 * bus mode interrupt
bogdanm 0:9b334a45a8ff 573 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 0:9b334a45a8ff 574 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 0:9b334a45a8ff 575 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 0:9b334a45a8ff 576 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 0:9b334a45a8ff 577 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 0:9b334a45a8ff 578 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 0:9b334a45a8ff 579 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 0:9b334a45a8ff 580 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 0:9b334a45a8ff 581 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 0:9b334a45a8ff 582 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 0:9b334a45a8ff 583 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 0:9b334a45a8ff 584 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 0:9b334a45a8ff 585 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 0:9b334a45a8ff 586 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 0:9b334a45a8ff 587 * @retval The new state of SD IT (SET or RESET).
bogdanm 0:9b334a45a8ff 588 */
bogdanm 0:9b334a45a8ff 589 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
bogdanm 0:9b334a45a8ff 590
bogdanm 0:9b334a45a8ff 591 /**
bogdanm 0:9b334a45a8ff 592 * @brief Clear the SD's interrupt pending bits.
bogdanm 0:9b334a45a8ff 593 * @param __HANDLE__ : SD Handle
bogdanm 0:9b334a45a8ff 594 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
bogdanm 0:9b334a45a8ff 595 * This parameter can be one or a combination of the following values:
bogdanm 0:9b334a45a8ff 596 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 597 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 0:9b334a45a8ff 598 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 0:9b334a45a8ff 599 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 0:9b334a45a8ff 600 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 0:9b334a45a8ff 601 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 0:9b334a45a8ff 602 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 0:9b334a45a8ff 603 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 0:9b334a45a8ff 604 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
bogdanm 0:9b334a45a8ff 605 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 0:9b334a45a8ff 606 * bus mode interrupt
bogdanm 0:9b334a45a8ff 607 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 0:9b334a45a8ff 608 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 0:9b334a45a8ff 609 * @retval None
bogdanm 0:9b334a45a8ff 610 */
bogdanm 0:9b334a45a8ff 611 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 612 /**
bogdanm 0:9b334a45a8ff 613 * @}
bogdanm 0:9b334a45a8ff 614 */
bogdanm 0:9b334a45a8ff 615
bogdanm 0:9b334a45a8ff 616 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 617 /** @addtogroup SD_Exported_Functions
bogdanm 0:9b334a45a8ff 618 * @{
bogdanm 0:9b334a45a8ff 619 */
bogdanm 0:9b334a45a8ff 620
bogdanm 0:9b334a45a8ff 621 /* Initialization and de-initialization functions **********************************/
bogdanm 0:9b334a45a8ff 622 /** @addtogroup SD_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 623 * @{
bogdanm 0:9b334a45a8ff 624 */
bogdanm 0:9b334a45a8ff 625 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
bogdanm 0:9b334a45a8ff 626 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 627 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 628 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 629 /**
bogdanm 0:9b334a45a8ff 630 * @}
bogdanm 0:9b334a45a8ff 631 */
bogdanm 0:9b334a45a8ff 632
bogdanm 0:9b334a45a8ff 633 /* I/O operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 634 /** @addtogroup SD_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 635 * @{
bogdanm 0:9b334a45a8ff 636 */
bogdanm 0:9b334a45a8ff 637 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 638 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 0:9b334a45a8ff 639 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 0:9b334a45a8ff 640 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
bogdanm 0:9b334a45a8ff 641
bogdanm 0:9b334a45a8ff 642 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 643 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 644
bogdanm 0:9b334a45a8ff 645 /* Callback in non blocking modes (DMA) */
bogdanm 0:9b334a45a8ff 646 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 647 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 648 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 649 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 650 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 651 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 652
bogdanm 0:9b334a45a8ff 653 /* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 654 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 0:9b334a45a8ff 655 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 0:9b334a45a8ff 656 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 657 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 658 /**
bogdanm 0:9b334a45a8ff 659 * @}
bogdanm 0:9b334a45a8ff 660 */
bogdanm 0:9b334a45a8ff 661
bogdanm 0:9b334a45a8ff 662 /* Peripheral Control functions ************************************************/
bogdanm 0:9b334a45a8ff 663 /** @addtogroup SD_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 664 * @{
bogdanm 0:9b334a45a8ff 665 */
bogdanm 0:9b334a45a8ff 666 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
bogdanm 0:9b334a45a8ff 667 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
bogdanm 0:9b334a45a8ff 668 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 669 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 670 /**
bogdanm 0:9b334a45a8ff 671 * @}
bogdanm 0:9b334a45a8ff 672 */
bogdanm 0:9b334a45a8ff 673
bogdanm 0:9b334a45a8ff 674 /* Peripheral State functions **************************************************/
bogdanm 0:9b334a45a8ff 675 /** @addtogroup SD_Exported_Functions_Group4
bogdanm 0:9b334a45a8ff 676 * @{
bogdanm 0:9b334a45a8ff 677 */
bogdanm 0:9b334a45a8ff 678 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
bogdanm 0:9b334a45a8ff 679 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
bogdanm 0:9b334a45a8ff 680 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
bogdanm 0:9b334a45a8ff 681 /**
bogdanm 0:9b334a45a8ff 682 * @}
bogdanm 0:9b334a45a8ff 683 */
bogdanm 0:9b334a45a8ff 684
bogdanm 0:9b334a45a8ff 685 /**
bogdanm 0:9b334a45a8ff 686 * @}
bogdanm 0:9b334a45a8ff 687 */
bogdanm 0:9b334a45a8ff 688
bogdanm 0:9b334a45a8ff 689 /**
bogdanm 0:9b334a45a8ff 690 * @}
bogdanm 0:9b334a45a8ff 691 */
bogdanm 0:9b334a45a8ff 692
bogdanm 0:9b334a45a8ff 693 /**
bogdanm 0:9b334a45a8ff 694 * @}
bogdanm 0:9b334a45a8ff 695 */
bogdanm 0:9b334a45a8ff 696
bogdanm 0:9b334a45a8ff 697 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 698 }
bogdanm 0:9b334a45a8ff 699 #endif
bogdanm 0:9b334a45a8ff 700
bogdanm 0:9b334a45a8ff 701 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
bogdanm 0:9b334a45a8ff 702
bogdanm 0:9b334a45a8ff 703 #endif /* __STM32L1xx_HAL_SD_H */
bogdanm 0:9b334a45a8ff 704
bogdanm 0:9b334a45a8ff 705 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/