en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_pwr.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l1xx_hal_pwr.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 5-September-2014
bogdanm 0:9b334a45a8ff 7 * @brief PWR HAL module driver.
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 10 * functionalities of the Power Controller (PWR) peripheral:
bogdanm 0:9b334a45a8ff 11 * + Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 12 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 ******************************************************************************
bogdanm 0:9b334a45a8ff 15 * @attention
bogdanm 0:9b334a45a8ff 16 *
bogdanm 0:9b334a45a8ff 17 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 18 *
bogdanm 0:9b334a45a8ff 19 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 20 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 21 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 22 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 23 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 24 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 25 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 26 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 27 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 28 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 29 *
bogdanm 0:9b334a45a8ff 30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 33 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 36 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 37 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 38 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 40 *
bogdanm 0:9b334a45a8ff 41 ******************************************************************************
bogdanm 0:9b334a45a8ff 42 */
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 45 #include "stm32l1xx_hal.h"
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 /** @addtogroup STM32L1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 48 * @{
bogdanm 0:9b334a45a8ff 49 */
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /** @defgroup PWR PWR
bogdanm 0:9b334a45a8ff 52 * @brief PWR HAL module driver
bogdanm 0:9b334a45a8ff 53 * @{
bogdanm 0:9b334a45a8ff 54 */
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 #ifdef HAL_PWR_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 60 #define PVD_MODE_IT ((uint32_t)0x00010000)
bogdanm 0:9b334a45a8ff 61 #define PVD_MODE_EVT ((uint32_t)0x00020000)
bogdanm 0:9b334a45a8ff 62 #define PVD_RISING_EDGE ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 63 #define PVD_FALLING_EDGE ((uint32_t)0x00000002)
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 66 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 67 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 68 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 /** @defgroup PWR_Exported_Functions PWR Exported Functions
bogdanm 0:9b334a45a8ff 71 * @{
bogdanm 0:9b334a45a8ff 72 */
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 75 * @brief Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 76 *
bogdanm 0:9b334a45a8ff 77 @verbatim
bogdanm 0:9b334a45a8ff 78 ===============================================================================
bogdanm 0:9b334a45a8ff 79 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 80 ===============================================================================
bogdanm 0:9b334a45a8ff 81 [..]
bogdanm 0:9b334a45a8ff 82 After reset, the backup domain (RTC registers, RTC backup data
bogdanm 0:9b334a45a8ff 83 registers) is protected against possible unwanted
bogdanm 0:9b334a45a8ff 84 write accesses.
bogdanm 0:9b334a45a8ff 85 To enable access to the RTC Domain and RTC registers, proceed as follows:
bogdanm 0:9b334a45a8ff 86 (+) Enable the Power Controller (PWR) APB1 interface clock using the
bogdanm 0:9b334a45a8ff 87 __PWR_CLK_ENABLE() macro.
bogdanm 0:9b334a45a8ff 88 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 @endverbatim
bogdanm 0:9b334a45a8ff 91 * @{
bogdanm 0:9b334a45a8ff 92 */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 /**
bogdanm 0:9b334a45a8ff 95 * @brief Deinitializes the PWR peripheral registers to their default reset values.
bogdanm 0:9b334a45a8ff 96 * @note Before calling this function, the VOS[1:0] bits should be configured
bogdanm 0:9b334a45a8ff 97 * to "10" and the system frequency has to be configured accordingly.
bogdanm 0:9b334a45a8ff 98 * To configure the VOS[1:0] bits, use the PWR_VoltageScalingConfig()
bogdanm 0:9b334a45a8ff 99 * function.
bogdanm 0:9b334a45a8ff 100 * @note ULP and FWU bits are not reset by this function.
bogdanm 0:9b334a45a8ff 101 * @retval None
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103 void HAL_PWR_DeInit(void)
bogdanm 0:9b334a45a8ff 104 {
bogdanm 0:9b334a45a8ff 105 __PWR_FORCE_RESET();
bogdanm 0:9b334a45a8ff 106 __PWR_RELEASE_RESET();
bogdanm 0:9b334a45a8ff 107 }
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 /**
bogdanm 0:9b334a45a8ff 110 * @brief Enables access to the backup domain (RTC registers, RTC
bogdanm 0:9b334a45a8ff 111 * backup data registers ).
bogdanm 0:9b334a45a8ff 112 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
bogdanm 0:9b334a45a8ff 113 * Backup Domain Access should be kept enabled.
bogdanm 0:9b334a45a8ff 114 * @retval None
bogdanm 0:9b334a45a8ff 115 */
bogdanm 0:9b334a45a8ff 116 void HAL_PWR_EnableBkUpAccess(void)
bogdanm 0:9b334a45a8ff 117 {
bogdanm 0:9b334a45a8ff 118 /* Enable access to RTC and backup registers */
bogdanm 0:9b334a45a8ff 119 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
bogdanm 0:9b334a45a8ff 120 }
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 /**
bogdanm 0:9b334a45a8ff 123 * @brief Disables access to the backup domain (RTC registers, RTC
bogdanm 0:9b334a45a8ff 124 * backup data registers).
bogdanm 0:9b334a45a8ff 125 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
bogdanm 0:9b334a45a8ff 126 * Backup Domain Access should be kept enabled.
bogdanm 0:9b334a45a8ff 127 * @retval None
bogdanm 0:9b334a45a8ff 128 */
bogdanm 0:9b334a45a8ff 129 void HAL_PWR_DisableBkUpAccess(void)
bogdanm 0:9b334a45a8ff 130 {
bogdanm 0:9b334a45a8ff 131 /* Disable access to RTC and backup registers */
bogdanm 0:9b334a45a8ff 132 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
bogdanm 0:9b334a45a8ff 133 }
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135 /**
bogdanm 0:9b334a45a8ff 136 * @}
bogdanm 0:9b334a45a8ff 137 */
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
bogdanm 0:9b334a45a8ff 140 * @brief Low Power modes configuration functions
bogdanm 0:9b334a45a8ff 141 *
bogdanm 0:9b334a45a8ff 142 @verbatim
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 ===============================================================================
bogdanm 0:9b334a45a8ff 145 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 146 ===============================================================================
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 *** PVD configuration ***
bogdanm 0:9b334a45a8ff 149 =========================
bogdanm 0:9b334a45a8ff 150 [..]
bogdanm 0:9b334a45a8ff 151 (+) The PVD is used to monitor the VDD power supply by comparing it to a
bogdanm 0:9b334a45a8ff 152 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
bogdanm 0:9b334a45a8ff 153 (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
bogdanm 0:9b334a45a8ff 154 internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
bogdanm 0:9b334a45a8ff 155 when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
bogdanm 0:9b334a45a8ff 158 than the PVD threshold. This event is internally connected to the EXTI
bogdanm 0:9b334a45a8ff 159 line16 and can generate an interrupt if enabled. This is done through
bogdanm 0:9b334a45a8ff 160 __HAL_PVD_EXTI_ENABLE_IT() macro.
bogdanm 0:9b334a45a8ff 161 (+) The PVD is stopped in Standby mode.
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 *** WakeUp pin configuration ***
bogdanm 0:9b334a45a8ff 164 ================================
bogdanm 0:9b334a45a8ff 165 [..]
bogdanm 0:9b334a45a8ff 166 (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
bogdanm 0:9b334a45a8ff 167 forced in input pull-down configuration and is active on rising edges.
bogdanm 0:9b334a45a8ff 168 (+) There are two or three WakeUp pins:
bogdanm 0:9b334a45a8ff 169 WakeUp Pin 1 on PA.00.
bogdanm 0:9b334a45a8ff 170 WakeUp Pin 2 on PC.13.
bogdanm 0:9b334a45a8ff 171 WakeUp Pin 3 on PE.06. : Only on product with GPIOE available
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 [..]
bogdanm 0:9b334a45a8ff 174 *** Main and Backup Regulators configuration ***
bogdanm 0:9b334a45a8ff 175 ================================================
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 (+) The main internal regulator can be configured to have a tradeoff between
bogdanm 0:9b334a45a8ff 178 performance and power consumption when the device does not operate at
bogdanm 0:9b334a45a8ff 179 the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
bogdanm 0:9b334a45a8ff 180 macro which configure VOS bit in PWR_CR register:
bogdanm 0:9b334a45a8ff 181 (++) When this bit is set (Regulator voltage output Scale 1 mode selected)
bogdanm 0:9b334a45a8ff 182 the System frequency can go up to 32 MHz.
bogdanm 0:9b334a45a8ff 183 (++) When this bit is reset (Regulator voltage output Scale 2 mode selected)
bogdanm 0:9b334a45a8ff 184 the System frequency can go up to 16 MHz.
bogdanm 0:9b334a45a8ff 185 (++) When this bit is reset (Regulator voltage output Scale 3 mode selected)
bogdanm 0:9b334a45a8ff 186 the System frequency can go up to 4.2 MHz.
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 Refer to the datasheets for more details.
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 *** Low Power modes configuration ***
bogdanm 0:9b334a45a8ff 191 =====================================
bogdanm 0:9b334a45a8ff 192 [..]
bogdanm 0:9b334a45a8ff 193 The device features 5 low-power modes:
bogdanm 0:9b334a45a8ff 194 (+) Low power run mode: regulator in low power mode, limited clock frequency,
bogdanm 0:9b334a45a8ff 195 limited number of peripherals running.
bogdanm 0:9b334a45a8ff 196 (+) Sleep mode: Cortex-M3 core stopped, peripherals kept running.
bogdanm 0:9b334a45a8ff 197 (+) Low power sleep mode: Cortex-M3 core stopped, limited clock frequency,
bogdanm 0:9b334a45a8ff 198 limited number of peripherals running, regulator in low power mode.
bogdanm 0:9b334a45a8ff 199 (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
bogdanm 0:9b334a45a8ff 200 (+) Standby mode: VCORE domain powered off
bogdanm 0:9b334a45a8ff 201
bogdanm 0:9b334a45a8ff 202 *** Low power run mode ***
bogdanm 0:9b334a45a8ff 203 =========================
bogdanm 0:9b334a45a8ff 204 [..]
bogdanm 0:9b334a45a8ff 205 To further reduce the consumption when the system is in Run mode, the regulator can be
bogdanm 0:9b334a45a8ff 206 configured in low power mode. In this mode, the system frequency should not exceed
bogdanm 0:9b334a45a8ff 207 MSI frequency range1.
bogdanm 0:9b334a45a8ff 208 In Low power run mode, all I/O pins keep the same state as in Run mode.
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 (+) Entry:
bogdanm 0:9b334a45a8ff 211 (++) VCORE in range2
bogdanm 0:9b334a45a8ff 212 (++) Decrease the system frequency tonot exceed the frequency of MSI frequency range1.
bogdanm 0:9b334a45a8ff 213 (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
bogdanm 0:9b334a45a8ff 214 function.
bogdanm 0:9b334a45a8ff 215 (+) Exit:
bogdanm 0:9b334a45a8ff 216 (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
bogdanm 0:9b334a45a8ff 217 function.
bogdanm 0:9b334a45a8ff 218 (++) Increase the system frequency if needed.
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 *** Sleep mode ***
bogdanm 0:9b334a45a8ff 221 ==================
bogdanm 0:9b334a45a8ff 222 [..]
bogdanm 0:9b334a45a8ff 223 (+) Entry:
bogdanm 0:9b334a45a8ff 224 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
bogdanm 0:9b334a45a8ff 225 functions with
bogdanm 0:9b334a45a8ff 226 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
bogdanm 0:9b334a45a8ff 227 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 (+) Exit:
bogdanm 0:9b334a45a8ff 230 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
bogdanm 0:9b334a45a8ff 231 controller (NVIC) can wake up the device from Sleep mode.
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 *** Low power sleep mode ***
bogdanm 0:9b334a45a8ff 234 ============================
bogdanm 0:9b334a45a8ff 235 [..]
bogdanm 0:9b334a45a8ff 236 (+) Entry:
bogdanm 0:9b334a45a8ff 237 The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
bogdanm 0:9b334a45a8ff 238 functions with
bogdanm 0:9b334a45a8ff 239 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
bogdanm 0:9b334a45a8ff 240 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
bogdanm 0:9b334a45a8ff 241 (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
bogdanm 0:9b334a45a8ff 242 This reduces power consumption but increases the wake-up time.
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 (+) Exit:
bogdanm 0:9b334a45a8ff 245 (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
bogdanm 0:9b334a45a8ff 246 acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
bogdanm 0:9b334a45a8ff 247 from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
bogdanm 0:9b334a45a8ff 248 the MCU exits Sleep mode as soon as an event occurs.
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 *** Stop mode ***
bogdanm 0:9b334a45a8ff 251 =================
bogdanm 0:9b334a45a8ff 252 [..]
bogdanm 0:9b334a45a8ff 253 The Stop mode is based on the Cortex-M3 deepsleep mode combined with peripheral
bogdanm 0:9b334a45a8ff 254 clock gating. The voltage regulator can be configured either in normal or low-power mode.
bogdanm 0:9b334a45a8ff 255 In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
bogdanm 0:9b334a45a8ff 256 the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
bogdanm 0:9b334a45a8ff 257 To get the lowest consumption in Stop mode, the internal Flash memory also enters low
bogdanm 0:9b334a45a8ff 258 power mode. When the Flash memory is in power-down mode, an additional startup delay is
bogdanm 0:9b334a45a8ff 259 incurred when waking up from Stop mode.
bogdanm 0:9b334a45a8ff 260 To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
bogdanm 0:9b334a45a8ff 261 sensor can be switched off before entering Stop mode. They can be switched on again by
bogdanm 0:9b334a45a8ff 262 software after exiting Stop mode using the ULP bit in the PWR_CR register.
bogdanm 0:9b334a45a8ff 263 In Stop mode, all I/O pins keep the same state as in Run mode.
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 (+) Entry:
bogdanm 0:9b334a45a8ff 266 The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI )
bogdanm 0:9b334a45a8ff 267 function with:
bogdanm 0:9b334a45a8ff 268 (++) Main regulator ON.
bogdanm 0:9b334a45a8ff 269 (++) Low Power regulator ON.
bogdanm 0:9b334a45a8ff 270 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
bogdanm 0:9b334a45a8ff 271 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
bogdanm 0:9b334a45a8ff 272 (+) Exit:
bogdanm 0:9b334a45a8ff 273 (++) By issuing an interrupt or a wakeup event, the MSI RC oscillator is selected as system clock.
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275 *** Standby mode ***
bogdanm 0:9b334a45a8ff 276 ====================
bogdanm 0:9b334a45a8ff 277 [..]
bogdanm 0:9b334a45a8ff 278 The Standby mode allows to achieve the lowest power consumption. It is based on the
bogdanm 0:9b334a45a8ff 279 Cortex-M3 deepsleep mode, with the voltage regulator disabled. The VCORE domain is
bogdanm 0:9b334a45a8ff 280 consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
bogdanm 0:9b334a45a8ff 281 also switched off. SRAM and register contents are lost except for the RTC registers, RTC
bogdanm 0:9b334a45a8ff 282 backup registers and Standby circuitry.
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
bogdanm 0:9b334a45a8ff 285 sensor can be switched off before entering the Standby mode. They can be switched
bogdanm 0:9b334a45a8ff 286 on again by software after exiting the Standby mode.
bogdanm 0:9b334a45a8ff 287 function.
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 (+) Entry:
bogdanm 0:9b334a45a8ff 290 (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
bogdanm 0:9b334a45a8ff 291 (+) Exit:
bogdanm 0:9b334a45a8ff 292 (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
bogdanm 0:9b334a45a8ff 293 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 *** Auto-wakeup (AWU) from low-power mode ***
bogdanm 0:9b334a45a8ff 296 =============================================
bogdanm 0:9b334a45a8ff 297 [..]
bogdanm 0:9b334a45a8ff 298 The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
bogdanm 0:9b334a45a8ff 299 Wakeup event, a tamper event, a time-stamp event, or a comparator event,
bogdanm 0:9b334a45a8ff 300 without depending on an external interrupt (Auto-wakeup mode).
bogdanm 0:9b334a45a8ff 301
bogdanm 0:9b334a45a8ff 302 (+) RTC auto-wakeup (AWU) from the Stop mode
bogdanm 0:9b334a45a8ff 303 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
bogdanm 0:9b334a45a8ff 304 (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
bogdanm 0:9b334a45a8ff 305 or Event modes) and Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT()
bogdanm 0:9b334a45a8ff 306 function
bogdanm 0:9b334a45a8ff 307 (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init()
bogdanm 0:9b334a45a8ff 308 and HAL_RTC_SetTime() functions.
bogdanm 0:9b334a45a8ff 309 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
bogdanm 0:9b334a45a8ff 310 is necessary to:
bogdanm 0:9b334a45a8ff 311 (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt or Event modes) and
bogdanm 0:9b334a45a8ff 312 Enable the RTC Tamper or time stamp Interrupt using the HAL_RTCEx_SetTamper_IT()
bogdanm 0:9b334a45a8ff 313 or HAL_RTCEx_SetTimeStamp_IT() functions.
bogdanm 0:9b334a45a8ff 314 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
bogdanm 0:9b334a45a8ff 315 (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt or Event modes) and
bogdanm 0:9b334a45a8ff 316 Enable the RTC WakeUp Interrupt using the HAL_RTCEx_SetWakeUpTimer_IT() function.
bogdanm 0:9b334a45a8ff 317 (+++) Configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer()
bogdanm 0:9b334a45a8ff 318 function.
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 (+) RTC auto-wakeup (AWU) from the Standby mode
bogdanm 0:9b334a45a8ff 321 (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
bogdanm 0:9b334a45a8ff 322 (+++) Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT() function.
bogdanm 0:9b334a45a8ff 323 (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init()
bogdanm 0:9b334a45a8ff 324 and HAL_RTC_SetTime() functions.
bogdanm 0:9b334a45a8ff 325 (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
bogdanm 0:9b334a45a8ff 326 is necessary to:
bogdanm 0:9b334a45a8ff 327 (+++) Enable the RTC Tamper or time stamp Interrupt and Configure the RTC to
bogdanm 0:9b334a45a8ff 328 detect the tamper or time stamp event using the HAL_RTCEx_SetTimeStamp_IT()
bogdanm 0:9b334a45a8ff 329 or HAL_RTCEx_SetTamper_IT()functions.
bogdanm 0:9b334a45a8ff 330 (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
bogdanm 0:9b334a45a8ff 331 (+++) Enable the RTC WakeUp Interrupt and Configure the RTC to generate the RTC WakeUp event
bogdanm 0:9b334a45a8ff 332 using the HAL_RTCEx_SetWakeUpTimer_IT() and HAL_RTCEx_SetWakeUpTimer() functions.
bogdanm 0:9b334a45a8ff 333
bogdanm 0:9b334a45a8ff 334 (+) Comparator auto-wakeup (AWU) from the Stop mode
bogdanm 0:9b334a45a8ff 335 (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
bogdanm 0:9b334a45a8ff 336 event, it is necessary to:
bogdanm 0:9b334a45a8ff 337 (+++) Configure the EXTI Line 21 or EXTI Line 22 for comparator to be sensitive to to the
bogdanm 0:9b334a45a8ff 338 selected edges (falling, rising or falling and rising) (Interrupt or Event modes) using
bogdanm 0:9b334a45a8ff 339 the COMP functions.
bogdanm 0:9b334a45a8ff 340 (+++) Configure the comparator to generate the event.
bogdanm 0:9b334a45a8ff 341
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 @endverbatim
bogdanm 0:9b334a45a8ff 345 * @{
bogdanm 0:9b334a45a8ff 346 */
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 /**
bogdanm 0:9b334a45a8ff 349 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
bogdanm 0:9b334a45a8ff 350 * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
bogdanm 0:9b334a45a8ff 351 * information for the PVD.
bogdanm 0:9b334a45a8ff 352 * @note Refer to the electrical characteristics of your device datasheet for
bogdanm 0:9b334a45a8ff 353 * more details about the voltage threshold corresponding to each
bogdanm 0:9b334a45a8ff 354 * detection level.
bogdanm 0:9b334a45a8ff 355 * @retval None
bogdanm 0:9b334a45a8ff 356 */
bogdanm 0:9b334a45a8ff 357 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD)
bogdanm 0:9b334a45a8ff 358 {
bogdanm 0:9b334a45a8ff 359 /* Check the parameters */
bogdanm 0:9b334a45a8ff 360 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
bogdanm 0:9b334a45a8ff 361 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /* Set PLS[7:5] bits according to PVDLevel value */
bogdanm 0:9b334a45a8ff 364 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
bogdanm 0:9b334a45a8ff 367 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
bogdanm 0:9b334a45a8ff 368 __HAL_PWR_PVD_EXTI_DISABLE_IT();
bogdanm 0:9b334a45a8ff 369 __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER();
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 /* Configure interrupt mode */
bogdanm 0:9b334a45a8ff 372 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
bogdanm 0:9b334a45a8ff 373 {
bogdanm 0:9b334a45a8ff 374 __HAL_PWR_PVD_EXTI_ENABLE_IT();
bogdanm 0:9b334a45a8ff 375 }
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 /* Configure event mode */
bogdanm 0:9b334a45a8ff 378 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
bogdanm 0:9b334a45a8ff 379 {
bogdanm 0:9b334a45a8ff 380 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
bogdanm 0:9b334a45a8ff 381 }
bogdanm 0:9b334a45a8ff 382
bogdanm 0:9b334a45a8ff 383 /* Configure the edge */
bogdanm 0:9b334a45a8ff 384 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
bogdanm 0:9b334a45a8ff 385 {
bogdanm 0:9b334a45a8ff 386 __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER();
bogdanm 0:9b334a45a8ff 387 }
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
bogdanm 0:9b334a45a8ff 390 {
bogdanm 0:9b334a45a8ff 391 __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER();
bogdanm 0:9b334a45a8ff 392 }
bogdanm 0:9b334a45a8ff 393 }
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /**
bogdanm 0:9b334a45a8ff 396 * @brief Enables the Power Voltage Detector(PVD).
bogdanm 0:9b334a45a8ff 397 * @retval None
bogdanm 0:9b334a45a8ff 398 */
bogdanm 0:9b334a45a8ff 399 void HAL_PWR_EnablePVD(void)
bogdanm 0:9b334a45a8ff 400 {
bogdanm 0:9b334a45a8ff 401 /* Enable the power voltage detector */
bogdanm 0:9b334a45a8ff 402 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 /**
bogdanm 0:9b334a45a8ff 406 * @brief Disables the Power Voltage Detector(PVD).
bogdanm 0:9b334a45a8ff 407 * @retval None
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409 void HAL_PWR_DisablePVD(void)
bogdanm 0:9b334a45a8ff 410 {
bogdanm 0:9b334a45a8ff 411 /* Disable the power voltage detector */
bogdanm 0:9b334a45a8ff 412 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
bogdanm 0:9b334a45a8ff 413 }
bogdanm 0:9b334a45a8ff 414
bogdanm 0:9b334a45a8ff 415 /**
bogdanm 0:9b334a45a8ff 416 * @brief Enables the WakeUp PINx functionality.
bogdanm 0:9b334a45a8ff 417 * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
bogdanm 0:9b334a45a8ff 418 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 419 * @arg PWR_WAKEUP_PIN1
bogdanm 0:9b334a45a8ff 420 * @arg PWR_WAKEUP_PIN2
bogdanm 0:9b334a45a8ff 421 * @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available
bogdanm 0:9b334a45a8ff 422 * @retval None
bogdanm 0:9b334a45a8ff 423 */
bogdanm 0:9b334a45a8ff 424 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
bogdanm 0:9b334a45a8ff 425 {
bogdanm 0:9b334a45a8ff 426 /* Check the parameter */
bogdanm 0:9b334a45a8ff 427 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
bogdanm 0:9b334a45a8ff 428 /* Enable the EWUPx pin */
bogdanm 0:9b334a45a8ff 429 *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)ENABLE;
bogdanm 0:9b334a45a8ff 430 }
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 /**
bogdanm 0:9b334a45a8ff 433 * @brief Disables the WakeUp PINx functionality.
bogdanm 0:9b334a45a8ff 434 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
bogdanm 0:9b334a45a8ff 435 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 436 * @arg PWR_WAKEUP_PIN1
bogdanm 0:9b334a45a8ff 437 * @arg PWR_WAKEUP_PIN2
bogdanm 0:9b334a45a8ff 438 * @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available
bogdanm 0:9b334a45a8ff 439 * @retval None
bogdanm 0:9b334a45a8ff 440 */
bogdanm 0:9b334a45a8ff 441 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
bogdanm 0:9b334a45a8ff 442 {
bogdanm 0:9b334a45a8ff 443 /* Check the parameter */
bogdanm 0:9b334a45a8ff 444 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
bogdanm 0:9b334a45a8ff 445 /* Disable the EWUPx pin */
bogdanm 0:9b334a45a8ff 446 *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)DISABLE;
bogdanm 0:9b334a45a8ff 447 }
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 /**
bogdanm 0:9b334a45a8ff 450 * @brief Enters Sleep mode.
bogdanm 0:9b334a45a8ff 451 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
bogdanm 0:9b334a45a8ff 452 * @param Regulator: Specifies the regulator state in SLEEP mode.
bogdanm 0:9b334a45a8ff 453 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 454 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
bogdanm 0:9b334a45a8ff 455 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
bogdanm 0:9b334a45a8ff 456 * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
bogdanm 0:9b334a45a8ff 457 * When WFI entry is used, tick interrupt have to be disabled if not desired as
bogdanm 0:9b334a45a8ff 458 * the interrupt wake up source.
bogdanm 0:9b334a45a8ff 459 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 460 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
bogdanm 0:9b334a45a8ff 461 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
bogdanm 0:9b334a45a8ff 462 * @retval None
bogdanm 0:9b334a45a8ff 463 */
bogdanm 0:9b334a45a8ff 464 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
bogdanm 0:9b334a45a8ff 465 {
bogdanm 0:9b334a45a8ff 466 /* Check the parameters */
bogdanm 0:9b334a45a8ff 467 assert_param(IS_PWR_REGULATOR(Regulator));
bogdanm 0:9b334a45a8ff 468 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
bogdanm 0:9b334a45a8ff 469
bogdanm 0:9b334a45a8ff 470 /* Select the regulator state in Sleep mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
bogdanm 0:9b334a45a8ff 471 MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator);
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473 /* Clear SLEEPDEEP bit of Cortex System Control Register */
bogdanm 0:9b334a45a8ff 474 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 /* Select SLEEP mode entry -------------------------------------------------*/
bogdanm 0:9b334a45a8ff 477 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
bogdanm 0:9b334a45a8ff 478 {
bogdanm 0:9b334a45a8ff 479 /* Request Wait For Interrupt */
bogdanm 0:9b334a45a8ff 480 __WFI();
bogdanm 0:9b334a45a8ff 481 }
bogdanm 0:9b334a45a8ff 482 else
bogdanm 0:9b334a45a8ff 483 {
bogdanm 0:9b334a45a8ff 484 /* Request Wait For Event */
bogdanm 0:9b334a45a8ff 485 __SEV();
bogdanm 0:9b334a45a8ff 486 __WFE();
bogdanm 0:9b334a45a8ff 487 __WFE();
bogdanm 0:9b334a45a8ff 488 }
bogdanm 0:9b334a45a8ff 489 }
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 /**
bogdanm 0:9b334a45a8ff 492 * @brief Enters Stop mode.
bogdanm 0:9b334a45a8ff 493 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
bogdanm 0:9b334a45a8ff 494 * @note When exiting Stop mode by using an interrupt or a wakeup event,
bogdanm 0:9b334a45a8ff 495 * MSI RC oscillator is selected as system clock.
bogdanm 0:9b334a45a8ff 496 * @note When the voltage regulator operates in low power mode, an additional
bogdanm 0:9b334a45a8ff 497 * startup delay is incurred when waking up from Stop mode.
bogdanm 0:9b334a45a8ff 498 * By keeping the internal regulator ON during Stop mode, the consumption
bogdanm 0:9b334a45a8ff 499 * is higher although the startup time is reduced.
bogdanm 0:9b334a45a8ff 500 * @param Regulator: Specifies the regulator state in Stop mode.
bogdanm 0:9b334a45a8ff 501 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 502 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
bogdanm 0:9b334a45a8ff 503 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
bogdanm 0:9b334a45a8ff 504 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
bogdanm 0:9b334a45a8ff 505 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 506 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
bogdanm 0:9b334a45a8ff 507 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
bogdanm 0:9b334a45a8ff 508 * @retval None
bogdanm 0:9b334a45a8ff 509 */
bogdanm 0:9b334a45a8ff 510 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
bogdanm 0:9b334a45a8ff 511 {
bogdanm 0:9b334a45a8ff 512 /* Check the parameters */
bogdanm 0:9b334a45a8ff 513 assert_param(IS_PWR_REGULATOR(Regulator));
bogdanm 0:9b334a45a8ff 514 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
bogdanm 0:9b334a45a8ff 515
bogdanm 0:9b334a45a8ff 516 /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
bogdanm 0:9b334a45a8ff 517 MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator);
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 /* Set SLEEPDEEP bit of Cortex System Control Register */
bogdanm 0:9b334a45a8ff 520 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
bogdanm 0:9b334a45a8ff 521
bogdanm 0:9b334a45a8ff 522 /* Select Stop mode entry --------------------------------------------------*/
bogdanm 0:9b334a45a8ff 523 if(STOPEntry == PWR_STOPENTRY_WFI)
bogdanm 0:9b334a45a8ff 524 {
bogdanm 0:9b334a45a8ff 525 /* Request Wait For Interrupt */
bogdanm 0:9b334a45a8ff 526 __WFI();
bogdanm 0:9b334a45a8ff 527 }
bogdanm 0:9b334a45a8ff 528 else
bogdanm 0:9b334a45a8ff 529 {
bogdanm 0:9b334a45a8ff 530 /* Request Wait For Event */
bogdanm 0:9b334a45a8ff 531 __SEV();
bogdanm 0:9b334a45a8ff 532 __WFE();
bogdanm 0:9b334a45a8ff 533 __WFE();
bogdanm 0:9b334a45a8ff 534 }
bogdanm 0:9b334a45a8ff 535 /* Reset SLEEPDEEP bit of Cortex System Control Register */
bogdanm 0:9b334a45a8ff 536 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
bogdanm 0:9b334a45a8ff 537 }
bogdanm 0:9b334a45a8ff 538
bogdanm 0:9b334a45a8ff 539 /**
bogdanm 0:9b334a45a8ff 540 * @brief Enters Standby mode.
bogdanm 0:9b334a45a8ff 541 * @note In Standby mode, all I/O pins are high impedance except for:
bogdanm 0:9b334a45a8ff 542 * - Reset pad (still available)
bogdanm 0:9b334a45a8ff 543 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
bogdanm 0:9b334a45a8ff 544 * Alarm out, or RTC clock calibration out.
bogdanm 0:9b334a45a8ff 545 * - WKUP pin 1 (PA0) if enabled.
bogdanm 0:9b334a45a8ff 546 * - WKUP pin 2 (PC13) if enabled.
bogdanm 0:9b334a45a8ff 547 * - WKUP pin 3 (PE6) if enabled.
bogdanm 0:9b334a45a8ff 548 * @retval None
bogdanm 0:9b334a45a8ff 549 */
bogdanm 0:9b334a45a8ff 550 void HAL_PWR_EnterSTANDBYMode(void)
bogdanm 0:9b334a45a8ff 551 {
bogdanm 0:9b334a45a8ff 552 /* Select Standby mode */
bogdanm 0:9b334a45a8ff 553 SET_BIT(PWR->CR, PWR_CR_PDDS);
bogdanm 0:9b334a45a8ff 554
bogdanm 0:9b334a45a8ff 555 /* Set SLEEPDEEP bit of Cortex System Control Register */
bogdanm 0:9b334a45a8ff 556 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
bogdanm 0:9b334a45a8ff 557
bogdanm 0:9b334a45a8ff 558 /* This option is used to ensure that store operations are completed */
bogdanm 0:9b334a45a8ff 559 #if defined ( __CC_ARM)
bogdanm 0:9b334a45a8ff 560 __force_stores();
bogdanm 0:9b334a45a8ff 561 #endif
bogdanm 0:9b334a45a8ff 562 /* Request Wait For Interrupt */
bogdanm 0:9b334a45a8ff 563 __WFI();
bogdanm 0:9b334a45a8ff 564 }
bogdanm 0:9b334a45a8ff 565
bogdanm 0:9b334a45a8ff 566 /**
bogdanm 0:9b334a45a8ff 567 * @brief This function handles the PWR PVD interrupt request.
bogdanm 0:9b334a45a8ff 568 * @note This API should be called under the PVD_IRQHandler().
bogdanm 0:9b334a45a8ff 569 * @retval None
bogdanm 0:9b334a45a8ff 570 */
bogdanm 0:9b334a45a8ff 571 void HAL_PWR_PVD_IRQHandler(void)
bogdanm 0:9b334a45a8ff 572 {
bogdanm 0:9b334a45a8ff 573 /* Check PWR exti flag */
bogdanm 0:9b334a45a8ff 574 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
bogdanm 0:9b334a45a8ff 575 {
bogdanm 0:9b334a45a8ff 576 /* PWR PVD interrupt user callback */
bogdanm 0:9b334a45a8ff 577 HAL_PWR_PVDCallback();
bogdanm 0:9b334a45a8ff 578
bogdanm 0:9b334a45a8ff 579 /* Clear PWR Exti pending bit */
bogdanm 0:9b334a45a8ff 580 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
bogdanm 0:9b334a45a8ff 581 }
bogdanm 0:9b334a45a8ff 582 }
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 /**
bogdanm 0:9b334a45a8ff 585 * @brief PWR PVD interrupt callback
bogdanm 0:9b334a45a8ff 586 * @retval None
bogdanm 0:9b334a45a8ff 587 */
bogdanm 0:9b334a45a8ff 588 __weak void HAL_PWR_PVDCallback(void)
bogdanm 0:9b334a45a8ff 589 {
bogdanm 0:9b334a45a8ff 590 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 591 the HAL_PWR_PVDCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 592 */
bogdanm 0:9b334a45a8ff 593 }
bogdanm 0:9b334a45a8ff 594
bogdanm 0:9b334a45a8ff 595 /**
bogdanm 0:9b334a45a8ff 596 * @}
bogdanm 0:9b334a45a8ff 597 */
bogdanm 0:9b334a45a8ff 598
bogdanm 0:9b334a45a8ff 599 /**
bogdanm 0:9b334a45a8ff 600 * @}
bogdanm 0:9b334a45a8ff 601 */
bogdanm 0:9b334a45a8ff 602
bogdanm 0:9b334a45a8ff 603 #endif /* HAL_PWR_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 604 /**
bogdanm 0:9b334a45a8ff 605 * @}
bogdanm 0:9b334a45a8ff 606 */
bogdanm 0:9b334a45a8ff 607
bogdanm 0:9b334a45a8ff 608 /**
bogdanm 0:9b334a45a8ff 609 * @}
bogdanm 0:9b334a45a8ff 610 */
bogdanm 0:9b334a45a8ff 611
bogdanm 0:9b334a45a8ff 612 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/