en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_flash_ramfunc.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l1xx_hal_flash_ramfunc.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 5-September-2014
bogdanm 0:9b334a45a8ff 7 * @brief FLASH RAMFUNC driver.
bogdanm 0:9b334a45a8ff 8 * This file provides a Flash firmware functions which should be
bogdanm 0:9b334a45a8ff 9 * executed from internal SRAM
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * @verbatim
bogdanm 0:9b334a45a8ff 12
bogdanm 0:9b334a45a8ff 13 *** ARM Compiler ***
bogdanm 0:9b334a45a8ff 14 --------------------
bogdanm 0:9b334a45a8ff 15 [..] RAM functions are defined using the toolchain options.
bogdanm 0:9b334a45a8ff 16 Functions that are be executed in RAM should reside in a separate
bogdanm 0:9b334a45a8ff 17 source module. Using the 'Options for File' dialog you can simply change
bogdanm 0:9b334a45a8ff 18 the 'Code / Const' area of a module to a memory space in physical RAM.
bogdanm 0:9b334a45a8ff 19 Available memory areas are declared in the 'Target' tab of the
bogdanm 0:9b334a45a8ff 20 Options for Target' dialog.
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 *** ICCARM Compiler ***
bogdanm 0:9b334a45a8ff 23 -----------------------
bogdanm 0:9b334a45a8ff 24 [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 *** GNU Compiler ***
bogdanm 0:9b334a45a8ff 27 --------------------
bogdanm 0:9b334a45a8ff 28 [..] RAM functions are defined using a specific toolchain attribute
bogdanm 0:9b334a45a8ff 29 "__attribute__((section(".RamFunc")))".
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 @endverbatim
bogdanm 0:9b334a45a8ff 32 ******************************************************************************
bogdanm 0:9b334a45a8ff 33 * @attention
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 36 *
bogdanm 0:9b334a45a8ff 37 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 38 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 39 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 40 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 41 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 42 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 43 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 44 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 45 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 46 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 47 *
bogdanm 0:9b334a45a8ff 48 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 49 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 51 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 54 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 55 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 56 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 57 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 58 *
bogdanm 0:9b334a45a8ff 59 ******************************************************************************
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 63 #include "stm32l1xx_hal.h"
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 /** @addtogroup STM32L1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 66 * @{
bogdanm 0:9b334a45a8ff 67 */
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 /** @defgroup FLASHRamfunc FLASHRamfunc
bogdanm 0:9b334a45a8ff 70 * @brief FLASH functions executed from RAM
bogdanm 0:9b334a45a8ff 71 * @{
bogdanm 0:9b334a45a8ff 72 */
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 #ifdef HAL_FLASH_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 77 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 78 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 79 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 80 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 81 static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout);
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 /** @defgroup FLASHRamfunc_Exported_Functions FLASH RAM Exported Functions
bogdanm 0:9b334a45a8ff 86 *
bogdanm 0:9b334a45a8ff 87 @verbatim
bogdanm 0:9b334a45a8ff 88 ===============================================================================
bogdanm 0:9b334a45a8ff 89 ##### ramfunc functions #####
bogdanm 0:9b334a45a8ff 90 ===============================================================================
bogdanm 0:9b334a45a8ff 91 [..]
bogdanm 0:9b334a45a8ff 92 This subsection provides a set of functions that should be executed from RAM
bogdanm 0:9b334a45a8ff 93 transfers.
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 @endverbatim
bogdanm 0:9b334a45a8ff 96 * @{
bogdanm 0:9b334a45a8ff 97 */
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /** @defgroup FLASHRamfunc_Exported_Functions_Group1 FLASH RAM Peripheral features functions
bogdanm 0:9b334a45a8ff 100 * @{
bogdanm 0:9b334a45a8ff 101 */
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 /**
bogdanm 0:9b334a45a8ff 104 * @brief Enable the power down mode during RUN mode.
bogdanm 0:9b334a45a8ff 105 * @note This function can be used only when the user code is running from Internal SRAM.
bogdanm 0:9b334a45a8ff 106 * @retval None
bogdanm 0:9b334a45a8ff 107 */
bogdanm 0:9b334a45a8ff 108 __RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void)
bogdanm 0:9b334a45a8ff 109 {
bogdanm 0:9b334a45a8ff 110 /* Enable the Power Down in Run mode*/
bogdanm 0:9b334a45a8ff 111 __HAL_FLASH_POWER_DOWN_ENABLE();
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 return HAL_OK;
bogdanm 0:9b334a45a8ff 114 }
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 /**
bogdanm 0:9b334a45a8ff 118 * @brief Disable the power down mode during RUN mode.
bogdanm 0:9b334a45a8ff 119 * @note This function can be used only when the user code is running from Internal SRAM.
bogdanm 0:9b334a45a8ff 120 * @retval None
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122 __RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void)
bogdanm 0:9b334a45a8ff 123 {
bogdanm 0:9b334a45a8ff 124 /* Disable the Power Down in Run mode*/
bogdanm 0:9b334a45a8ff 125 __HAL_FLASH_POWER_DOWN_DISABLE();
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 return HAL_OK;
bogdanm 0:9b334a45a8ff 128 }
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /**
bogdanm 0:9b334a45a8ff 131 * @}
bogdanm 0:9b334a45a8ff 132 */
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 /** @defgroup FLASHRamfunc_Exported_Functions_Group2 FLASH RAM Programming and erasing operation functions
bogdanm 0:9b334a45a8ff 135 *
bogdanm 0:9b334a45a8ff 136 @verbatim
bogdanm 0:9b334a45a8ff 137 @endverbatim
bogdanm 0:9b334a45a8ff 138 * @{
bogdanm 0:9b334a45a8ff 139 */
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \
bogdanm 0:9b334a45a8ff 142 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
bogdanm 0:9b334a45a8ff 143 /**
bogdanm 0:9b334a45a8ff 144 * @brief Erases a specified 2 page in program memory in parallel.
bogdanm 0:9b334a45a8ff 145 * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices.
bogdanm 0:9b334a45a8ff 146 * To correctly run this function, the HAL_FLASH_Unlock() function
bogdanm 0:9b334a45a8ff 147 * must be called before.
bogdanm 0:9b334a45a8ff 148 * Call the HAL_FLASH_Lock() to disable the flash memory access
bogdanm 0:9b334a45a8ff 149 * (recommended to protect the FLASH memory against possible unwanted operation).
bogdanm 0:9b334a45a8ff 150 * @param Page_Address1: The page address in program memory to be erased in
bogdanm 0:9b334a45a8ff 151 * the first Bank (BANK1). This parameter should be between FLASH_BASE
bogdanm 0:9b334a45a8ff 152 * and FLASH_BANK1_END.
bogdanm 0:9b334a45a8ff 153 * @param Page_Address2: The page address in program memory to be erased in
bogdanm 0:9b334a45a8ff 154 * the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE
bogdanm 0:9b334a45a8ff 155 * and FLASH_BANK2_END.
bogdanm 0:9b334a45a8ff 156 * @note A Page is erased in the Program memory only if the address to load
bogdanm 0:9b334a45a8ff 157 * is the start address of a page (multiple of 256 bytes).
bogdanm 0:9b334a45a8ff 158 * @retval HAL Status: The returned value can be:
bogdanm 0:9b334a45a8ff 159 * HAL_ERROR, HAL_OK or HAL_TIMEOUT.
bogdanm 0:9b334a45a8ff 160 */
bogdanm 0:9b334a45a8ff 161 __RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2)
bogdanm 0:9b334a45a8ff 162 {
bogdanm 0:9b334a45a8ff 163 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 166 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 169 {
bogdanm 0:9b334a45a8ff 170 /* If the previous operation is completed, proceed to erase the page */
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 /* Set the PARALLBANK bit */
bogdanm 0:9b334a45a8ff 173 FLASH->PECR |= FLASH_PECR_PARALLBANK;
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 /* Set the ERASE bit */
bogdanm 0:9b334a45a8ff 176 FLASH->PECR |= FLASH_PECR_ERASE;
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 /* Set PROG bit */
bogdanm 0:9b334a45a8ff 179 FLASH->PECR |= FLASH_PECR_PROG;
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /* Write 00000000h to the first word of the first program page to erase */
bogdanm 0:9b334a45a8ff 182 *(__IO uint32_t *)Page_Address1 = 0x00000000;
bogdanm 0:9b334a45a8ff 183 /* Write 00000000h to the first word of the second program page to erase */
bogdanm 0:9b334a45a8ff 184 *(__IO uint32_t *)Page_Address2 = 0x00000000;
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 187 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */
bogdanm 0:9b334a45a8ff 190 FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG);
bogdanm 0:9b334a45a8ff 191 FLASH->PECR &= (uint32_t)(~FLASH_PECR_ERASE);
bogdanm 0:9b334a45a8ff 192 FLASH->PECR &= (uint32_t)(~FLASH_PECR_PARALLBANK);
bogdanm 0:9b334a45a8ff 193 }
bogdanm 0:9b334a45a8ff 194 /* Return the Erase Status */
bogdanm 0:9b334a45a8ff 195 return status;
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 /**
bogdanm 0:9b334a45a8ff 199 * @brief Programs 2 half page in program memory in parallel.
bogdanm 0:9b334a45a8ff 200 * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices.
bogdanm 0:9b334a45a8ff 201 * @param Address1: specifies the first address to be written in the first bank
bogdanm 0:9b334a45a8ff 202 * (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE).
bogdanm 0:9b334a45a8ff 203 * @param pBuffer1: pointer to the buffer containing the data to be written
bogdanm 0:9b334a45a8ff 204 * to the first half page in the first bank.
bogdanm 0:9b334a45a8ff 205 * @param Address2: specifies the second address to be written in the second bank
bogdanm 0:9b334a45a8ff 206 * (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE).
bogdanm 0:9b334a45a8ff 207 * @param pBuffer2: pointer to the buffer containing the data to be written
bogdanm 0:9b334a45a8ff 208 * to the second half page in the second bank.
bogdanm 0:9b334a45a8ff 209 * @note To correctly run this function, the HAL_FLASH_Unlock() function
bogdanm 0:9b334a45a8ff 210 * must be called before.
bogdanm 0:9b334a45a8ff 211 * Call the HAL_FLASH_Lock() to disable the flash memory access
bogdanm 0:9b334a45a8ff 212 * (recommended to protect the FLASH memory against possible unwanted operation).
bogdanm 0:9b334a45a8ff 213 * @note Half page write is possible only from SRAM.
bogdanm 0:9b334a45a8ff 214 * @note If there are more than 32 words to write, after 32 words another
bogdanm 0:9b334a45a8ff 215 * Half Page programming operation starts and has to be finished.
bogdanm 0:9b334a45a8ff 216 * @note A half page is written to the program memory only if the first
bogdanm 0:9b334a45a8ff 217 * address to load is the start address of a half page (multiple of 128
bogdanm 0:9b334a45a8ff 218 * bytes) and the 31 remaining words to load are in the same half page.
bogdanm 0:9b334a45a8ff 219 * @note During the Program memory half page write all read operations are
bogdanm 0:9b334a45a8ff 220 * forbidden (this includes DMA read operations and debugger read
bogdanm 0:9b334a45a8ff 221 * operations such as breakpoints, periodic updates, etc.).
bogdanm 0:9b334a45a8ff 222 * @note If a PGAERR is set during a Program memory half page write, the
bogdanm 0:9b334a45a8ff 223 * complete write operation is aborted. Software should then reset the
bogdanm 0:9b334a45a8ff 224 * FPRG and PROG/DATA bits and restart the write operation from the
bogdanm 0:9b334a45a8ff 225 * beginning.
bogdanm 0:9b334a45a8ff 226 * @retval HAL Status: The returned value can be:
bogdanm 0:9b334a45a8ff 227 * HAL_ERROR, HAL_OK or HAL_TIMEOUT.
bogdanm 0:9b334a45a8ff 228 */
bogdanm 0:9b334a45a8ff 229 __RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2)
bogdanm 0:9b334a45a8ff 230 {
bogdanm 0:9b334a45a8ff 231 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
bogdanm 0:9b334a45a8ff 236 This bit prevents the interruption of multicycle instructions and therefore
bogdanm 0:9b334a45a8ff 237 will increase the interrupt latency. of Cortex-M3. */
bogdanm 0:9b334a45a8ff 238 SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 241 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 244 {
bogdanm 0:9b334a45a8ff 245 /* If the previous operation is completed, proceed to program the new
bogdanm 0:9b334a45a8ff 246 half page */
bogdanm 0:9b334a45a8ff 247 FLASH->PECR |= FLASH_PECR_PARALLBANK;
bogdanm 0:9b334a45a8ff 248 FLASH->PECR |= FLASH_PECR_FPRG;
bogdanm 0:9b334a45a8ff 249 FLASH->PECR |= FLASH_PECR_PROG;
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 252 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 253 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 254 {
bogdanm 0:9b334a45a8ff 255 /* Write the first half page directly with 32 different words */
bogdanm 0:9b334a45a8ff 256 while(count < 32)
bogdanm 0:9b334a45a8ff 257 {
bogdanm 0:9b334a45a8ff 258 *(__IO uint32_t*) ((uint32_t)(Address1 + (4 * count))) = *(pBuffer1++);
bogdanm 0:9b334a45a8ff 259 count ++;
bogdanm 0:9b334a45a8ff 260 }
bogdanm 0:9b334a45a8ff 261 count = 0;
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /* Write the second half page directly with 32 different words */
bogdanm 0:9b334a45a8ff 264 while(count < 32)
bogdanm 0:9b334a45a8ff 265 {
bogdanm 0:9b334a45a8ff 266 *(__IO uint32_t*) ((uint32_t)(Address2 + (4 * count))) = *(pBuffer2++);
bogdanm 0:9b334a45a8ff 267 count ++;
bogdanm 0:9b334a45a8ff 268 }
bogdanm 0:9b334a45a8ff 269 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 270 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 271 }
bogdanm 0:9b334a45a8ff 272 /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */
bogdanm 0:9b334a45a8ff 273 FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG);
bogdanm 0:9b334a45a8ff 274 FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG);
bogdanm 0:9b334a45a8ff 275 FLASH->PECR &= (uint32_t)(~FLASH_PECR_PARALLBANK);
bogdanm 0:9b334a45a8ff 276 }
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 /* Return the Write Status */
bogdanm 0:9b334a45a8ff 281 return status;
bogdanm 0:9b334a45a8ff 282 }
bogdanm 0:9b334a45a8ff 283 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /**
bogdanm 0:9b334a45a8ff 286 * @brief Programs a half page in program memory.
bogdanm 0:9b334a45a8ff 287 * @param Address: specifies the address to be written.
bogdanm 0:9b334a45a8ff 288 * @param pBuffer: pointer to the buffer containing the data to be written to
bogdanm 0:9b334a45a8ff 289 * the half page.
bogdanm 0:9b334a45a8ff 290 * @note To correctly run this function, the HAL_FLASH_Unlock() function
bogdanm 0:9b334a45a8ff 291 * must be called before.
bogdanm 0:9b334a45a8ff 292 * Call the HAL_FLASH_Lock() to disable the flash memory access
bogdanm 0:9b334a45a8ff 293 * (recommended to protect the FLASH memory against possible unwanted operation)
bogdanm 0:9b334a45a8ff 294 * @note Half page write is possible only from SRAM.
bogdanm 0:9b334a45a8ff 295 * @note If there are more than 32 words to write, after 32 words another
bogdanm 0:9b334a45a8ff 296 * Half Page programming operation starts and has to be finished.
bogdanm 0:9b334a45a8ff 297 * @note A half page is written to the program memory only if the first
bogdanm 0:9b334a45a8ff 298 * address to load is the start address of a half page (multiple of 128
bogdanm 0:9b334a45a8ff 299 * bytes) and the 31 remaining words to load are in the same half page.
bogdanm 0:9b334a45a8ff 300 * @note During the Program memory half page write all read operations are
bogdanm 0:9b334a45a8ff 301 * forbidden (this includes DMA read operations and debugger read
bogdanm 0:9b334a45a8ff 302 * operations such as breakpoints, periodic updates, etc.).
bogdanm 0:9b334a45a8ff 303 * @note If a PGAERR is set during a Program memory half page write, the
bogdanm 0:9b334a45a8ff 304 * complete write operation is aborted. Software should then reset the
bogdanm 0:9b334a45a8ff 305 * FPRG and PROG/DATA bits and restart the write operation from the
bogdanm 0:9b334a45a8ff 306 * beginning.
bogdanm 0:9b334a45a8ff 307 * @retval HAL Status: The returned value can be:
bogdanm 0:9b334a45a8ff 308 * HAL_ERROR, HAL_OK or HAL_TIMEOUT.
bogdanm 0:9b334a45a8ff 309 */
bogdanm 0:9b334a45a8ff 310 __RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
bogdanm 0:9b334a45a8ff 311 {
bogdanm 0:9b334a45a8ff 312 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 313
bogdanm 0:9b334a45a8ff 314 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
bogdanm 0:9b334a45a8ff 317 This bit prevents the interruption of multicycle instructions and therefore
bogdanm 0:9b334a45a8ff 318 will increase the interrupt latency. of Cortex-M3. */
bogdanm 0:9b334a45a8ff 319 SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 322 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 325 {
bogdanm 0:9b334a45a8ff 326 /* if the previous operation is completed, proceed to program the new
bogdanm 0:9b334a45a8ff 327 half page */
bogdanm 0:9b334a45a8ff 328 FLASH->PECR |= FLASH_PECR_FPRG;
bogdanm 0:9b334a45a8ff 329 FLASH->PECR |= FLASH_PECR_PROG;
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 /* Write one half page directly with 32 different words */
bogdanm 0:9b334a45a8ff 332 while(count < 32)
bogdanm 0:9b334a45a8ff 333 {
bogdanm 0:9b334a45a8ff 334 *(__IO uint32_t*) ((uint32_t)(Address + (4 * count))) = *(pBuffer++);
bogdanm 0:9b334a45a8ff 335 count ++;
bogdanm 0:9b334a45a8ff 336 }
bogdanm 0:9b334a45a8ff 337 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 338 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 /* if the write operation is completed, disable the PROG and FPRG bits */
bogdanm 0:9b334a45a8ff 341 FLASH->PECR &= (uint32_t)(~FLASH_PECR_PROG);
bogdanm 0:9b334a45a8ff 342 FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG);
bogdanm 0:9b334a45a8ff 343 }
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 /* Return the Write Status */
bogdanm 0:9b334a45a8ff 348 return status;
bogdanm 0:9b334a45a8ff 349 }
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 /**
bogdanm 0:9b334a45a8ff 352 * @}
bogdanm 0:9b334a45a8ff 353 */
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355 /** @defgroup FLASHRamfunc_Exported_Functions_Group3 FLASH RAM DATA EEPROM functions
bogdanm 0:9b334a45a8ff 356 *
bogdanm 0:9b334a45a8ff 357 @verbatim
bogdanm 0:9b334a45a8ff 358 @endverbatim
bogdanm 0:9b334a45a8ff 359 * @{
bogdanm 0:9b334a45a8ff 360 */
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 /**
bogdanm 0:9b334a45a8ff 363 * @brief Erase a double word in data memory.
bogdanm 0:9b334a45a8ff 364 * @param Address: specifies the address to be erased.
bogdanm 0:9b334a45a8ff 365 * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function
bogdanm 0:9b334a45a8ff 366 * must be called before.
bogdanm 0:9b334a45a8ff 367 * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access
bogdanm 0:9b334a45a8ff 368 * and Flash program erase control register access(recommended to protect
bogdanm 0:9b334a45a8ff 369 * the DATA_EEPROM against possible unwanted operation).
bogdanm 0:9b334a45a8ff 370 * @note Data memory double word erase is possible only from SRAM.
bogdanm 0:9b334a45a8ff 371 * @note A double word is erased to the data memory only if the first address
bogdanm 0:9b334a45a8ff 372 * to load is the start address of a double word (multiple of 8 bytes).
bogdanm 0:9b334a45a8ff 373 * @note During the Data memory double word erase, all read operations are
bogdanm 0:9b334a45a8ff 374 * forbidden (this includes DMA read operations and debugger read
bogdanm 0:9b334a45a8ff 375 * operations such as breakpoints, periodic updates, etc.).
bogdanm 0:9b334a45a8ff 376 * @retval HAL Status: The returned value can be:
bogdanm 0:9b334a45a8ff 377 * HAL_ERROR, HAL_OK or HAL_TIMEOUT.
bogdanm 0:9b334a45a8ff 378 */
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 __RAM_FUNC HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address)
bogdanm 0:9b334a45a8ff 381 {
bogdanm 0:9b334a45a8ff 382 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
bogdanm 0:9b334a45a8ff 385 This bit prevents the interruption of multicycle instructions and therefore
bogdanm 0:9b334a45a8ff 386 will increase the interrupt latency. of Cortex-M3. */
bogdanm 0:9b334a45a8ff 387 SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 390 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 393 {
bogdanm 0:9b334a45a8ff 394 /* If the previous operation is completed, proceed to erase the next double word */
bogdanm 0:9b334a45a8ff 395 /* Set the ERASE bit */
bogdanm 0:9b334a45a8ff 396 FLASH->PECR |= FLASH_PECR_ERASE;
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 /* Set DATA bit */
bogdanm 0:9b334a45a8ff 399 FLASH->PECR |= FLASH_PECR_DATA;
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 /* Write 00000000h to the 2 words to erase */
bogdanm 0:9b334a45a8ff 402 *(__IO uint32_t *)Address = 0x00000000;
bogdanm 0:9b334a45a8ff 403 Address += 4;
bogdanm 0:9b334a45a8ff 404 *(__IO uint32_t *)Address = 0x00000000;
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 407 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 /* If the erase operation is completed, disable the ERASE and DATA bits */
bogdanm 0:9b334a45a8ff 410 FLASH->PECR &= (uint32_t)(~FLASH_PECR_ERASE);
bogdanm 0:9b334a45a8ff 411 FLASH->PECR &= (uint32_t)(~FLASH_PECR_DATA);
bogdanm 0:9b334a45a8ff 412 }
bogdanm 0:9b334a45a8ff 413
bogdanm 0:9b334a45a8ff 414 SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 /* Return the erase status */
bogdanm 0:9b334a45a8ff 417 return status;
bogdanm 0:9b334a45a8ff 418 }
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420 /**
bogdanm 0:9b334a45a8ff 421 * @brief Write a double word in data memory without erase.
bogdanm 0:9b334a45a8ff 422 * @param Address: specifies the address to be written.
bogdanm 0:9b334a45a8ff 423 * @param Data: specifies the data to be written.
bogdanm 0:9b334a45a8ff 424 * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function
bogdanm 0:9b334a45a8ff 425 * must be called before.
bogdanm 0:9b334a45a8ff 426 * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access
bogdanm 0:9b334a45a8ff 427 * and Flash program erase control register access(recommended to protect
bogdanm 0:9b334a45a8ff 428 * the DATA_EEPROM against possible unwanted operation).
bogdanm 0:9b334a45a8ff 429 * @note Data memory double word write is possible only from SRAM.
bogdanm 0:9b334a45a8ff 430 * @note A data memory double word is written to the data memory only if the
bogdanm 0:9b334a45a8ff 431 * first address to load is the start address of a double word (multiple
bogdanm 0:9b334a45a8ff 432 * of double word).
bogdanm 0:9b334a45a8ff 433 * @note During the Data memory double word write, all read operations are
bogdanm 0:9b334a45a8ff 434 * forbidden (this includes DMA read operations and debugger read
bogdanm 0:9b334a45a8ff 435 * operations such as breakpoints, periodic updates, etc.).
bogdanm 0:9b334a45a8ff 436 * @retval HAL Status: The returned value can be:
bogdanm 0:9b334a45a8ff 437 * HAL_ERROR, HAL_OK or HAL_TIMEOUT.
bogdanm 0:9b334a45a8ff 438 */
bogdanm 0:9b334a45a8ff 439 __RAM_FUNC HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data)
bogdanm 0:9b334a45a8ff 440 {
bogdanm 0:9b334a45a8ff 441 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 442
bogdanm 0:9b334a45a8ff 443 /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008)
bogdanm 0:9b334a45a8ff 444 This bit prevents the interruption of multicycle instructions and therefore
bogdanm 0:9b334a45a8ff 445 will increase the interrupt latency. of Cortex-M3. */
bogdanm 0:9b334a45a8ff 446 SCnSCB->ACTLR |= SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 447
bogdanm 0:9b334a45a8ff 448 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 449 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 450
bogdanm 0:9b334a45a8ff 451 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 452 {
bogdanm 0:9b334a45a8ff 453 /* If the previous operation is completed, proceed to program the new data*/
bogdanm 0:9b334a45a8ff 454 FLASH->PECR |= FLASH_PECR_FPRG;
bogdanm 0:9b334a45a8ff 455 FLASH->PECR |= FLASH_PECR_DATA;
bogdanm 0:9b334a45a8ff 456
bogdanm 0:9b334a45a8ff 457 /* Write the 2 words */
bogdanm 0:9b334a45a8ff 458 *(__IO uint32_t *)Address = (uint32_t) Data;
bogdanm 0:9b334a45a8ff 459 Address += 4;
bogdanm 0:9b334a45a8ff 460 *(__IO uint32_t *)Address = (uint32_t) (Data >> 32);
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 463 status = FLASHRAM_WaitForLastOperation(HAL_FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 464
bogdanm 0:9b334a45a8ff 465 /* If the write operation is completed, disable the FPRG and DATA bits */
bogdanm 0:9b334a45a8ff 466 FLASH->PECR &= (uint32_t)(~FLASH_PECR_FPRG);
bogdanm 0:9b334a45a8ff 467 FLASH->PECR &= (uint32_t)(~FLASH_PECR_DATA);
bogdanm 0:9b334a45a8ff 468 }
bogdanm 0:9b334a45a8ff 469
bogdanm 0:9b334a45a8ff 470 SCnSCB->ACTLR &= ~SCnSCB_ACTLR_DISMCYCINT_Msk;
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 /* Return the Write Status */
bogdanm 0:9b334a45a8ff 473 return status;
bogdanm 0:9b334a45a8ff 474 }
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 /**
bogdanm 0:9b334a45a8ff 477 * @}
bogdanm 0:9b334a45a8ff 478 */
bogdanm 0:9b334a45a8ff 479
bogdanm 0:9b334a45a8ff 480 /**
bogdanm 0:9b334a45a8ff 481 * @}
bogdanm 0:9b334a45a8ff 482 */
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 /** @defgroup FLASHRamfunc_Private_Functions FLASH RAM Private Functions
bogdanm 0:9b334a45a8ff 485 * @{
bogdanm 0:9b334a45a8ff 486 */
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 /**
bogdanm 0:9b334a45a8ff 489 * @brief Wait for a FLASH operation to complete.
bogdanm 0:9b334a45a8ff 490 * @param Timeout: maximum flash operationtimeout
bogdanm 0:9b334a45a8ff 491 * @retval HAL status
bogdanm 0:9b334a45a8ff 492 */
bogdanm 0:9b334a45a8ff 493 static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout)
bogdanm 0:9b334a45a8ff 494 {
bogdanm 0:9b334a45a8ff 495 /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
bogdanm 0:9b334a45a8ff 496 Even if the FLASH operation fails, the BUSY flag will be reset and an error
bogdanm 0:9b334a45a8ff 497 flag will be set */
bogdanm 0:9b334a45a8ff 498
bogdanm 0:9b334a45a8ff 499 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00))
bogdanm 0:9b334a45a8ff 500 {
bogdanm 0:9b334a45a8ff 501 Timeout--;
bogdanm 0:9b334a45a8ff 502 }
bogdanm 0:9b334a45a8ff 503
bogdanm 0:9b334a45a8ff 504 if(Timeout == 0x00 )
bogdanm 0:9b334a45a8ff 505 {
bogdanm 0:9b334a45a8ff 506 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 507 }
bogdanm 0:9b334a45a8ff 508
bogdanm 0:9b334a45a8ff 509 if( (__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) != RESET) ||
bogdanm 0:9b334a45a8ff 510 (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) != RESET) ||
bogdanm 0:9b334a45a8ff 511 (__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) != RESET) ||
bogdanm 0:9b334a45a8ff 512 #if defined (STM32L151xBA) || defined (STM32L152xBA) || \
bogdanm 0:9b334a45a8ff 513 defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC)
bogdanm 0:9b334a45a8ff 514 (__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) != RESET) ||
bogdanm 0:9b334a45a8ff 515 #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
bogdanm 0:9b334a45a8ff 516 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
bogdanm 0:9b334a45a8ff 517 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
bogdanm 0:9b334a45a8ff 518 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
bogdanm 0:9b334a45a8ff 519 (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR) != RESET) ||
bogdanm 0:9b334a45a8ff 520 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
bogdanm 0:9b334a45a8ff 521 (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) != RESET) )
bogdanm 0:9b334a45a8ff 522 {
bogdanm 0:9b334a45a8ff 523 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 524 }
bogdanm 0:9b334a45a8ff 525
bogdanm 0:9b334a45a8ff 526 /* If there is an error flag set */
bogdanm 0:9b334a45a8ff 527 return HAL_OK;
bogdanm 0:9b334a45a8ff 528 }
bogdanm 0:9b334a45a8ff 529
bogdanm 0:9b334a45a8ff 530 #endif /* HAL_FLASH_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /**
bogdanm 0:9b334a45a8ff 533 * @}
bogdanm 0:9b334a45a8ff 534 */
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 /**
bogdanm 0:9b334a45a8ff 537 * @}
bogdanm 0:9b334a45a8ff 538 */
bogdanm 0:9b334a45a8ff 539
bogdanm 0:9b334a45a8ff 540 /**
bogdanm 0:9b334a45a8ff 541 * @}
bogdanm 0:9b334a45a8ff 542 */
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/