en 129
fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_flash_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l1xx_hal_flash.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 5-September-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of Flash HAL module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32L1xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32L1xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32l1xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32L1xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup FLASHEx |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | |
| bogdanm | 0:9b334a45a8ff | 59 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
| bogdanm | 0:9b334a45a8ff | 60 | * @{ |
| bogdanm | 0:9b334a45a8ff | 61 | */ |
| bogdanm | 0:9b334a45a8ff | 62 | |
| bogdanm | 0:9b334a45a8ff | 63 | /** |
| bogdanm | 0:9b334a45a8ff | 64 | * @brief FLASH Erase structure definition |
| bogdanm | 0:9b334a45a8ff | 65 | */ |
| bogdanm | 0:9b334a45a8ff | 66 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 67 | { |
| bogdanm | 0:9b334a45a8ff | 68 | uint32_t TypeErase; /*!< TypeErase: Page Erase only. |
| bogdanm | 0:9b334a45a8ff | 69 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| bogdanm | 0:9b334a45a8ff | 70 | |
| bogdanm | 0:9b334a45a8ff | 71 | uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased |
| bogdanm | 0:9b334a45a8ff | 72 | This parameter must be a value belonging to FLASH Programm address (depending on the devices) */ |
| bogdanm | 0:9b334a45a8ff | 73 | |
| bogdanm | 0:9b334a45a8ff | 74 | uint32_t NbPages; /*!< NbPages: Number of pages to be erased. |
| bogdanm | 0:9b334a45a8ff | 75 | This parameter must be a value between 1 and (max number of pages - value of Initial page)*/ |
| bogdanm | 0:9b334a45a8ff | 76 | |
| bogdanm | 0:9b334a45a8ff | 77 | } FLASH_EraseInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 78 | |
| bogdanm | 0:9b334a45a8ff | 79 | /** |
| bogdanm | 0:9b334a45a8ff | 80 | * @brief FLASH Option Bytes PROGRAM structure definition |
| bogdanm | 0:9b334a45a8ff | 81 | */ |
| bogdanm | 0:9b334a45a8ff | 82 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 83 | { |
| bogdanm | 0:9b334a45a8ff | 84 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
| bogdanm | 0:9b334a45a8ff | 85 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
| bogdanm | 0:9b334a45a8ff | 86 | |
| bogdanm | 0:9b334a45a8ff | 87 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
| bogdanm | 0:9b334a45a8ff | 88 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
| bogdanm | 0:9b334a45a8ff | 89 | |
| bogdanm | 0:9b334a45a8ff | 90 | uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31 |
| bogdanm | 0:9b334a45a8ff | 91 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */ |
| bogdanm | 0:9b334a45a8ff | 92 | |
| bogdanm | 0:9b334a45a8ff | 93 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \ |
| bogdanm | 0:9b334a45a8ff | 94 | defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 95 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 96 | uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63 |
| bogdanm | 0:9b334a45a8ff | 97 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */ |
| bogdanm | 0:9b334a45a8ff | 98 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 99 | |
| bogdanm | 0:9b334a45a8ff | 100 | #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 101 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 102 | uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95 |
| bogdanm | 0:9b334a45a8ff | 103 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */ |
| bogdanm | 0:9b334a45a8ff | 104 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 105 | |
| bogdanm | 0:9b334a45a8ff | 106 | #if defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 107 | uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127 |
| bogdanm | 0:9b334a45a8ff | 108 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */ |
| bogdanm | 0:9b334a45a8ff | 109 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 110 | |
| bogdanm | 0:9b334a45a8ff | 111 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
| bogdanm | 0:9b334a45a8ff | 112 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
| bogdanm | 0:9b334a45a8ff | 113 | |
| bogdanm | 0:9b334a45a8ff | 114 | uint8_t BORLevel; /*!< BORLevel: Set the BOR Level. |
| bogdanm | 0:9b334a45a8ff | 115 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */ |
| bogdanm | 0:9b334a45a8ff | 116 | |
| bogdanm | 0:9b334a45a8ff | 117 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
| bogdanm | 0:9b334a45a8ff | 118 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/ |
| bogdanm | 0:9b334a45a8ff | 119 | } FLASH_OBProgramInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 120 | |
| bogdanm | 0:9b334a45a8ff | 121 | /** |
| bogdanm | 0:9b334a45a8ff | 122 | * @brief FLASH Advanced Option Bytes Program structure definition |
| bogdanm | 0:9b334a45a8ff | 123 | */ |
| bogdanm | 0:9b334a45a8ff | 124 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 125 | { |
| bogdanm | 0:9b334a45a8ff | 126 | uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension . |
| bogdanm | 0:9b334a45a8ff | 127 | This parameter can be a value of @ref FLASHEx_OptionAdv_Type */ |
| bogdanm | 0:9b334a45a8ff | 128 | |
| bogdanm | 0:9b334a45a8ff | 129 | #if defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
| bogdanm | 0:9b334a45a8ff | 130 | defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 131 | uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation. |
| bogdanm | 0:9b334a45a8ff | 132 | This parameter can be a value of @ref FLASHEx_PCROP_State */ |
| bogdanm | 0:9b334a45a8ff | 133 | |
| bogdanm | 0:9b334a45a8ff | 134 | uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP |
| bogdanm | 0:9b334a45a8ff | 135 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */ |
| bogdanm | 0:9b334a45a8ff | 136 | |
| bogdanm | 0:9b334a45a8ff | 137 | #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 138 | uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP |
| bogdanm | 0:9b334a45a8ff | 139 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */ |
| bogdanm | 0:9b334a45a8ff | 140 | #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 141 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 142 | |
| bogdanm | 0:9b334a45a8ff | 143 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 144 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 145 | uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config |
| bogdanm | 0:9b334a45a8ff | 146 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */ |
| bogdanm | 0:9b334a45a8ff | 147 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/ |
| bogdanm | 0:9b334a45a8ff | 148 | } FLASH_AdvOBProgramInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 149 | |
| bogdanm | 0:9b334a45a8ff | 150 | /** |
| bogdanm | 0:9b334a45a8ff | 151 | * @} |
| bogdanm | 0:9b334a45a8ff | 152 | */ |
| bogdanm | 0:9b334a45a8ff | 153 | |
| bogdanm | 0:9b334a45a8ff | 154 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 155 | |
| bogdanm | 0:9b334a45a8ff | 156 | |
| bogdanm | 0:9b334a45a8ff | 157 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
| bogdanm | 0:9b334a45a8ff | 158 | * @{ |
| bogdanm | 0:9b334a45a8ff | 159 | */ |
| bogdanm | 0:9b334a45a8ff | 160 | |
| bogdanm | 0:9b334a45a8ff | 161 | /** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase |
| bogdanm | 0:9b334a45a8ff | 162 | * @{ |
| bogdanm | 0:9b334a45a8ff | 163 | */ |
| bogdanm | 0:9b334a45a8ff | 164 | #define TYPEERASE_PAGES ((uint32_t)0x00) /*!<Page erase only*/ |
| bogdanm | 0:9b334a45a8ff | 165 | |
| bogdanm | 0:9b334a45a8ff | 166 | #define IS_TYPEERASE(__VALUE__) (((__VALUE__) == TYPEERASE_PAGES)) |
| bogdanm | 0:9b334a45a8ff | 167 | /** |
| bogdanm | 0:9b334a45a8ff | 168 | * @} |
| bogdanm | 0:9b334a45a8ff | 169 | */ |
| bogdanm | 0:9b334a45a8ff | 170 | |
| bogdanm | 0:9b334a45a8ff | 171 | /** @defgroup FLASHEx_Option_Type FLASHEx Option Type |
| bogdanm | 0:9b334a45a8ff | 172 | * @{ |
| bogdanm | 0:9b334a45a8ff | 173 | */ |
| bogdanm | 0:9b334a45a8ff | 174 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 175 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 176 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 177 | #define OPTIONBYTE_BOR ((uint32_t)0x08) /*!<BOR option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 178 | |
| bogdanm | 0:9b334a45a8ff | 179 | #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) < (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) |
| bogdanm | 0:9b334a45a8ff | 180 | /** |
| bogdanm | 0:9b334a45a8ff | 181 | * @} |
| bogdanm | 0:9b334a45a8ff | 182 | */ |
| bogdanm | 0:9b334a45a8ff | 183 | |
| bogdanm | 0:9b334a45a8ff | 184 | /** @defgroup FLASHEx_WRP_State FLASHEx WRP State |
| bogdanm | 0:9b334a45a8ff | 185 | * @{ |
| bogdanm | 0:9b334a45a8ff | 186 | */ |
| bogdanm | 0:9b334a45a8ff | 187 | #define WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired bank 1 sectors*/ |
| bogdanm | 0:9b334a45a8ff | 188 | #define WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired bank 1 sectors*/ |
| bogdanm | 0:9b334a45a8ff | 189 | |
| bogdanm | 0:9b334a45a8ff | 190 | #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == WRPSTATE_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 191 | ((__VALUE__) == WRPSTATE_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 192 | /** |
| bogdanm | 0:9b334a45a8ff | 193 | * @} |
| bogdanm | 0:9b334a45a8ff | 194 | */ |
| bogdanm | 0:9b334a45a8ff | 195 | |
| bogdanm | 0:9b334a45a8ff | 196 | /** @defgroup FLASHEx_Option_Bytes_Write_Mask FLASHEx Option Bytes Write Mask |
| bogdanm | 0:9b334a45a8ff | 197 | * @{ |
| bogdanm | 0:9b334a45a8ff | 198 | */ |
| bogdanm | 0:9b334a45a8ff | 199 | #define WRP_MASK_LOW ((uint32_t)0x0000FFFF) |
| bogdanm | 0:9b334a45a8ff | 200 | #define WRP_MASK_HIGH ((uint32_t)0xFFFF0000) |
| bogdanm | 0:9b334a45a8ff | 201 | |
| bogdanm | 0:9b334a45a8ff | 202 | /** |
| bogdanm | 0:9b334a45a8ff | 203 | * @} |
| bogdanm | 0:9b334a45a8ff | 204 | */ |
| bogdanm | 0:9b334a45a8ff | 205 | |
| bogdanm | 0:9b334a45a8ff | 206 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1 |
| bogdanm | 0:9b334a45a8ff | 207 | * @{ |
| bogdanm | 0:9b334a45a8ff | 208 | */ |
| bogdanm | 0:9b334a45a8ff | 209 | |
| bogdanm | 0:9b334a45a8ff | 210 | /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ |
| bogdanm | 0:9b334a45a8ff | 211 | #define OB_WRP1_PAGES0TO15 ((uint32_t)0x00000001) /* Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 212 | #define OB_WRP1_PAGES16TO31 ((uint32_t)0x00000002) /* Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 213 | #define OB_WRP1_PAGES32TO47 ((uint32_t)0x00000004) /* Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 214 | #define OB_WRP1_PAGES48TO63 ((uint32_t)0x00000008) /* Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 215 | #define OB_WRP1_PAGES64TO79 ((uint32_t)0x00000010) /* Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 216 | #define OB_WRP1_PAGES80TO95 ((uint32_t)0x00000020) /* Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 217 | #define OB_WRP1_PAGES96TO111 ((uint32_t)0x00000040) /* Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 218 | #define OB_WRP1_PAGES112TO127 ((uint32_t)0x00000080) /* Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 219 | #define OB_WRP1_PAGES128TO143 ((uint32_t)0x00000100) /* Write protection of Sector8 */ |
| bogdanm | 0:9b334a45a8ff | 220 | #define OB_WRP1_PAGES144TO159 ((uint32_t)0x00000200) /* Write protection of Sector9 */ |
| bogdanm | 0:9b334a45a8ff | 221 | #define OB_WRP1_PAGES160TO175 ((uint32_t)0x00000400) /* Write protection of Sector10 */ |
| bogdanm | 0:9b334a45a8ff | 222 | #define OB_WRP1_PAGES176TO191 ((uint32_t)0x00000800) /* Write protection of Sector11 */ |
| bogdanm | 0:9b334a45a8ff | 223 | #define OB_WRP1_PAGES192TO207 ((uint32_t)0x00001000) /* Write protection of Sector12 */ |
| bogdanm | 0:9b334a45a8ff | 224 | #define OB_WRP1_PAGES208TO223 ((uint32_t)0x00002000) /* Write protection of Sector13 */ |
| bogdanm | 0:9b334a45a8ff | 225 | #define OB_WRP1_PAGES224TO239 ((uint32_t)0x00004000) /* Write protection of Sector14 */ |
| bogdanm | 0:9b334a45a8ff | 226 | #define OB_WRP1_PAGES240TO255 ((uint32_t)0x00008000) /* Write protection of Sector15 */ |
| bogdanm | 0:9b334a45a8ff | 227 | #define OB_WRP1_PAGES256TO271 ((uint32_t)0x00010000) /* Write protection of Sector16 */ |
| bogdanm | 0:9b334a45a8ff | 228 | #define OB_WRP1_PAGES272TO287 ((uint32_t)0x00020000) /* Write protection of Sector17 */ |
| bogdanm | 0:9b334a45a8ff | 229 | #define OB_WRP1_PAGES288TO303 ((uint32_t)0x00040000) /* Write protection of Sector18 */ |
| bogdanm | 0:9b334a45a8ff | 230 | #define OB_WRP1_PAGES304TO319 ((uint32_t)0x00080000) /* Write protection of Sector19 */ |
| bogdanm | 0:9b334a45a8ff | 231 | #define OB_WRP1_PAGES320TO335 ((uint32_t)0x00100000) /* Write protection of Sector20 */ |
| bogdanm | 0:9b334a45a8ff | 232 | #define OB_WRP1_PAGES336TO351 ((uint32_t)0x00200000) /* Write protection of Sector21 */ |
| bogdanm | 0:9b334a45a8ff | 233 | #define OB_WRP1_PAGES352TO367 ((uint32_t)0x00400000) /* Write protection of Sector22 */ |
| bogdanm | 0:9b334a45a8ff | 234 | #define OB_WRP1_PAGES368TO383 ((uint32_t)0x00800000) /* Write protection of Sector23 */ |
| bogdanm | 0:9b334a45a8ff | 235 | #define OB_WRP1_PAGES384TO399 ((uint32_t)0x01000000) /* Write protection of Sector24 */ |
| bogdanm | 0:9b334a45a8ff | 236 | #define OB_WRP1_PAGES400TO415 ((uint32_t)0x02000000) /* Write protection of Sector25 */ |
| bogdanm | 0:9b334a45a8ff | 237 | #define OB_WRP1_PAGES416TO431 ((uint32_t)0x04000000) /* Write protection of Sector26 */ |
| bogdanm | 0:9b334a45a8ff | 238 | #define OB_WRP1_PAGES432TO447 ((uint32_t)0x08000000) /* Write protection of Sector27 */ |
| bogdanm | 0:9b334a45a8ff | 239 | #define OB_WRP1_PAGES448TO463 ((uint32_t)0x10000000) /* Write protection of Sector28 */ |
| bogdanm | 0:9b334a45a8ff | 240 | #define OB_WRP1_PAGES464TO479 ((uint32_t)0x20000000) /* Write protection of Sector29 */ |
| bogdanm | 0:9b334a45a8ff | 241 | #define OB_WRP1_PAGES480TO495 ((uint32_t)0x40000000) /* Write protection of Sector30 */ |
| bogdanm | 0:9b334a45a8ff | 242 | #define OB_WRP1_PAGES496TO511 ((uint32_t)0x80000000) /* Write protection of Sector31 */ |
| bogdanm | 0:9b334a45a8ff | 243 | |
| bogdanm | 0:9b334a45a8ff | 244 | #define OB_WRP1_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 245 | |
| bogdanm | 0:9b334a45a8ff | 246 | /** |
| bogdanm | 0:9b334a45a8ff | 247 | * @} |
| bogdanm | 0:9b334a45a8ff | 248 | */ |
| bogdanm | 0:9b334a45a8ff | 249 | |
| bogdanm | 0:9b334a45a8ff | 250 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \ |
| bogdanm | 0:9b334a45a8ff | 251 | defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 252 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 253 | |
| bogdanm | 0:9b334a45a8ff | 254 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2 |
| bogdanm | 0:9b334a45a8ff | 255 | * @{ |
| bogdanm | 0:9b334a45a8ff | 256 | */ |
| bogdanm | 0:9b334a45a8ff | 257 | |
| bogdanm | 0:9b334a45a8ff | 258 | /* Pages for Cat3, Cat4 & Cat5 devices*/ |
| bogdanm | 0:9b334a45a8ff | 259 | #define OB_WRP2_PAGES512TO527 ((uint32_t)0x00000001) /* Write protection of Sector32 */ |
| bogdanm | 0:9b334a45a8ff | 260 | #define OB_WRP2_PAGES528TO543 ((uint32_t)0x00000002) /* Write protection of Sector33 */ |
| bogdanm | 0:9b334a45a8ff | 261 | #define OB_WRP2_PAGES544TO559 ((uint32_t)0x00000004) /* Write protection of Sector34 */ |
| bogdanm | 0:9b334a45a8ff | 262 | #define OB_WRP2_PAGES560TO575 ((uint32_t)0x00000008) /* Write protection of Sector35 */ |
| bogdanm | 0:9b334a45a8ff | 263 | #define OB_WRP2_PAGES576TO591 ((uint32_t)0x00000010) /* Write protection of Sector36 */ |
| bogdanm | 0:9b334a45a8ff | 264 | #define OB_WRP2_PAGES592TO607 ((uint32_t)0x00000020) /* Write protection of Sector37 */ |
| bogdanm | 0:9b334a45a8ff | 265 | #define OB_WRP2_PAGES608TO623 ((uint32_t)0x00000040) /* Write protection of Sector38 */ |
| bogdanm | 0:9b334a45a8ff | 266 | #define OB_WRP2_PAGES624TO639 ((uint32_t)0x00000080) /* Write protection of Sector39 */ |
| bogdanm | 0:9b334a45a8ff | 267 | #define OB_WRP2_PAGES640TO655 ((uint32_t)0x00000100) /* Write protection of Sector40 */ |
| bogdanm | 0:9b334a45a8ff | 268 | #define OB_WRP2_PAGES656TO671 ((uint32_t)0x00000200) /* Write protection of Sector41 */ |
| bogdanm | 0:9b334a45a8ff | 269 | #define OB_WRP2_PAGES672TO687 ((uint32_t)0x00000400) /* Write protection of Sector42 */ |
| bogdanm | 0:9b334a45a8ff | 270 | #define OB_WRP2_PAGES688TO703 ((uint32_t)0x00000800) /* Write protection of Sector43 */ |
| bogdanm | 0:9b334a45a8ff | 271 | #define OB_WRP2_PAGES704TO719 ((uint32_t)0x00001000) /* Write protection of Sector44 */ |
| bogdanm | 0:9b334a45a8ff | 272 | #define OB_WRP2_PAGES720TO735 ((uint32_t)0x00002000) /* Write protection of Sector45 */ |
| bogdanm | 0:9b334a45a8ff | 273 | #define OB_WRP2_PAGES736TO751 ((uint32_t)0x00004000) /* Write protection of Sector46 */ |
| bogdanm | 0:9b334a45a8ff | 274 | #define OB_WRP2_PAGES752TO767 ((uint32_t)0x00008000) /* Write protection of Sector47 */ |
| bogdanm | 0:9b334a45a8ff | 275 | #define OB_WRP2_PAGES768TO783 ((uint32_t)0x00010000) /* Write protection of Sector48 */ |
| bogdanm | 0:9b334a45a8ff | 276 | #define OB_WRP2_PAGES784TO799 ((uint32_t)0x00020000) /* Write protection of Sector49 */ |
| bogdanm | 0:9b334a45a8ff | 277 | #define OB_WRP2_PAGES800TO815 ((uint32_t)0x00040000) /* Write protection of Sector50 */ |
| bogdanm | 0:9b334a45a8ff | 278 | #define OB_WRP2_PAGES816TO831 ((uint32_t)0x00080000) /* Write protection of Sector51 */ |
| bogdanm | 0:9b334a45a8ff | 279 | #define OB_WRP2_PAGES832TO847 ((uint32_t)0x00100000) /* Write protection of Sector52 */ |
| bogdanm | 0:9b334a45a8ff | 280 | #define OB_WRP2_PAGES848TO863 ((uint32_t)0x00200000) /* Write protection of Sector53 */ |
| bogdanm | 0:9b334a45a8ff | 281 | #define OB_WRP2_PAGES864TO879 ((uint32_t)0x00400000) /* Write protection of Sector54 */ |
| bogdanm | 0:9b334a45a8ff | 282 | #define OB_WRP2_PAGES880TO895 ((uint32_t)0x00800000) /* Write protection of Sector55 */ |
| bogdanm | 0:9b334a45a8ff | 283 | #define OB_WRP2_PAGES896TO911 ((uint32_t)0x01000000) /* Write protection of Sector56 */ |
| bogdanm | 0:9b334a45a8ff | 284 | #define OB_WRP2_PAGES912TO927 ((uint32_t)0x02000000) /* Write protection of Sector57 */ |
| bogdanm | 0:9b334a45a8ff | 285 | #define OB_WRP2_PAGES928TO943 ((uint32_t)0x04000000) /* Write protection of Sector58 */ |
| bogdanm | 0:9b334a45a8ff | 286 | #define OB_WRP2_PAGES944TO959 ((uint32_t)0x08000000) /* Write protection of Sector59 */ |
| bogdanm | 0:9b334a45a8ff | 287 | #define OB_WRP2_PAGES960TO975 ((uint32_t)0x10000000) /* Write protection of Sector60 */ |
| bogdanm | 0:9b334a45a8ff | 288 | #define OB_WRP2_PAGES976TO991 ((uint32_t)0x20000000) /* Write protection of Sector61 */ |
| bogdanm | 0:9b334a45a8ff | 289 | #define OB_WRP2_PAGES992TO1007 ((uint32_t)0x40000000) /* Write protection of Sector62 */ |
| bogdanm | 0:9b334a45a8ff | 290 | #define OB_WRP2_PAGES1008TO1023 ((uint32_t)0x80000000) /* Write protection of Sector63 */ |
| bogdanm | 0:9b334a45a8ff | 291 | |
| bogdanm | 0:9b334a45a8ff | 292 | #define OB_WRP2_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 293 | |
| bogdanm | 0:9b334a45a8ff | 294 | /** |
| bogdanm | 0:9b334a45a8ff | 295 | * @} |
| bogdanm | 0:9b334a45a8ff | 296 | */ |
| bogdanm | 0:9b334a45a8ff | 297 | |
| bogdanm | 0:9b334a45a8ff | 298 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 301 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 302 | |
| bogdanm | 0:9b334a45a8ff | 303 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3 |
| bogdanm | 0:9b334a45a8ff | 304 | * @{ |
| bogdanm | 0:9b334a45a8ff | 305 | */ |
| bogdanm | 0:9b334a45a8ff | 306 | |
| bogdanm | 0:9b334a45a8ff | 307 | /* Pages for devices with FLASH >= 256KB*/ |
| bogdanm | 0:9b334a45a8ff | 308 | #define OB_WRP3_PAGES1024TO1039 ((uint32_t)0x00000001) /* Write protection of Sector64 */ |
| bogdanm | 0:9b334a45a8ff | 309 | #define OB_WRP3_PAGES1040TO1055 ((uint32_t)0x00000002) /* Write protection of Sector65 */ |
| bogdanm | 0:9b334a45a8ff | 310 | #define OB_WRP3_PAGES1056TO1071 ((uint32_t)0x00000004) /* Write protection of Sector66 */ |
| bogdanm | 0:9b334a45a8ff | 311 | #define OB_WRP3_PAGES1072TO1087 ((uint32_t)0x00000008) /* Write protection of Sector67 */ |
| bogdanm | 0:9b334a45a8ff | 312 | #define OB_WRP3_PAGES1088TO1103 ((uint32_t)0x00000010) /* Write protection of Sector68 */ |
| bogdanm | 0:9b334a45a8ff | 313 | #define OB_WRP3_PAGES1104TO1119 ((uint32_t)0x00000020) /* Write protection of Sector69 */ |
| bogdanm | 0:9b334a45a8ff | 314 | #define OB_WRP3_PAGES1120TO1135 ((uint32_t)0x00000040) /* Write protection of Sector70 */ |
| bogdanm | 0:9b334a45a8ff | 315 | #define OB_WRP3_PAGES1136TO1151 ((uint32_t)0x00000080) /* Write protection of Sector71 */ |
| bogdanm | 0:9b334a45a8ff | 316 | #define OB_WRP3_PAGES1152TO1167 ((uint32_t)0x00000100) /* Write protection of Sector72 */ |
| bogdanm | 0:9b334a45a8ff | 317 | #define OB_WRP3_PAGES1168TO1183 ((uint32_t)0x00000200) /* Write protection of Sector73 */ |
| bogdanm | 0:9b334a45a8ff | 318 | #define OB_WRP3_PAGES1184TO1199 ((uint32_t)0x00000400) /* Write protection of Sector74 */ |
| bogdanm | 0:9b334a45a8ff | 319 | #define OB_WRP3_PAGES1200TO1215 ((uint32_t)0x00000800) /* Write protection of Sector75 */ |
| bogdanm | 0:9b334a45a8ff | 320 | #define OB_WRP3_PAGES1216TO1231 ((uint32_t)0x00001000) /* Write protection of Sector76 */ |
| bogdanm | 0:9b334a45a8ff | 321 | #define OB_WRP3_PAGES1232TO1247 ((uint32_t)0x00002000) /* Write protection of Sector77 */ |
| bogdanm | 0:9b334a45a8ff | 322 | #define OB_WRP3_PAGES1248TO1263 ((uint32_t)0x00004000) /* Write protection of Sector78 */ |
| bogdanm | 0:9b334a45a8ff | 323 | #define OB_WRP3_PAGES1264TO1279 ((uint32_t)0x00008000) /* Write protection of Sector79 */ |
| bogdanm | 0:9b334a45a8ff | 324 | #define OB_WRP3_PAGES1280TO1295 ((uint32_t)0x00010000) /* Write protection of Sector80 */ |
| bogdanm | 0:9b334a45a8ff | 325 | #define OB_WRP3_PAGES1296TO1311 ((uint32_t)0x00020000) /* Write protection of Sector81 */ |
| bogdanm | 0:9b334a45a8ff | 326 | #define OB_WRP3_PAGES1312TO1327 ((uint32_t)0x00040000) /* Write protection of Sector82 */ |
| bogdanm | 0:9b334a45a8ff | 327 | #define OB_WRP3_PAGES1328TO1343 ((uint32_t)0x00080000) /* Write protection of Sector83 */ |
| bogdanm | 0:9b334a45a8ff | 328 | #define OB_WRP3_PAGES1344TO1359 ((uint32_t)0x00100000) /* Write protection of Sector84 */ |
| bogdanm | 0:9b334a45a8ff | 329 | #define OB_WRP3_PAGES1360TO1375 ((uint32_t)0x00200000) /* Write protection of Sector85 */ |
| bogdanm | 0:9b334a45a8ff | 330 | #define OB_WRP3_PAGES1376TO1391 ((uint32_t)0x00400000) /* Write protection of Sector86 */ |
| bogdanm | 0:9b334a45a8ff | 331 | #define OB_WRP3_PAGES1392TO1407 ((uint32_t)0x00800000) /* Write protection of Sector87 */ |
| bogdanm | 0:9b334a45a8ff | 332 | #define OB_WRP3_PAGES1408TO1423 ((uint32_t)0x01000000) /* Write protection of Sector88 */ |
| bogdanm | 0:9b334a45a8ff | 333 | #define OB_WRP3_PAGES1424TO1439 ((uint32_t)0x02000000) /* Write protection of Sector89 */ |
| bogdanm | 0:9b334a45a8ff | 334 | #define OB_WRP3_PAGES1440TO1455 ((uint32_t)0x04000000) /* Write protection of Sector90 */ |
| bogdanm | 0:9b334a45a8ff | 335 | #define OB_WRP3_PAGES1456TO1471 ((uint32_t)0x08000000) /* Write protection of Sector91 */ |
| bogdanm | 0:9b334a45a8ff | 336 | #define OB_WRP3_PAGES1472TO1487 ((uint32_t)0x10000000) /* Write protection of Sector92 */ |
| bogdanm | 0:9b334a45a8ff | 337 | #define OB_WRP3_PAGES1488TO1503 ((uint32_t)0x20000000) /* Write protection of Sector93 */ |
| bogdanm | 0:9b334a45a8ff | 338 | #define OB_WRP3_PAGES1504TO1519 ((uint32_t)0x40000000) /* Write protection of Sector94 */ |
| bogdanm | 0:9b334a45a8ff | 339 | #define OB_WRP3_PAGES1520TO1535 ((uint32_t)0x80000000) /* Write protection of Sector95 */ |
| bogdanm | 0:9b334a45a8ff | 340 | |
| bogdanm | 0:9b334a45a8ff | 341 | #define OB_WRP3_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 342 | |
| bogdanm | 0:9b334a45a8ff | 343 | /** |
| bogdanm | 0:9b334a45a8ff | 344 | * @} |
| bogdanm | 0:9b334a45a8ff | 345 | */ |
| bogdanm | 0:9b334a45a8ff | 346 | |
| bogdanm | 0:9b334a45a8ff | 347 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/ |
| bogdanm | 0:9b334a45a8ff | 348 | |
| bogdanm | 0:9b334a45a8ff | 349 | #if defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 350 | |
| bogdanm | 0:9b334a45a8ff | 351 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4 |
| bogdanm | 0:9b334a45a8ff | 352 | * @{ |
| bogdanm | 0:9b334a45a8ff | 353 | */ |
| bogdanm | 0:9b334a45a8ff | 354 | |
| bogdanm | 0:9b334a45a8ff | 355 | /* Pages for Cat5 devices*/ |
| bogdanm | 0:9b334a45a8ff | 356 | #define OB_WRP4_PAGES1536TO1551 ((uint32_t)0x00000001)/* Write protection of Sector96*/ |
| bogdanm | 0:9b334a45a8ff | 357 | #define OB_WRP4_PAGES1552TO1567 ((uint32_t)0x00000002)/* Write protection of Sector97*/ |
| bogdanm | 0:9b334a45a8ff | 358 | #define OB_WRP4_PAGES1568TO1583 ((uint32_t)0x00000004)/* Write protection of Sector98*/ |
| bogdanm | 0:9b334a45a8ff | 359 | #define OB_WRP4_PAGES1584TO1599 ((uint32_t)0x00000008)/* Write protection of Sector99*/ |
| bogdanm | 0:9b334a45a8ff | 360 | #define OB_WRP4_PAGES1600TO1615 ((uint32_t)0x00000010) /* Write protection of Sector100*/ |
| bogdanm | 0:9b334a45a8ff | 361 | #define OB_WRP4_PAGES1616TO1631 ((uint32_t)0x00000020) /* Write protection of Sector101*/ |
| bogdanm | 0:9b334a45a8ff | 362 | #define OB_WRP4_PAGES1632TO1647 ((uint32_t)0x00000040) /* Write protection of Sector102*/ |
| bogdanm | 0:9b334a45a8ff | 363 | #define OB_WRP4_PAGES1648TO1663 ((uint32_t)0x00000080) /* Write protection of Sector103*/ |
| bogdanm | 0:9b334a45a8ff | 364 | #define OB_WRP4_PAGES1664TO1679 ((uint32_t)0x00000100) /* Write protection of Sector104*/ |
| bogdanm | 0:9b334a45a8ff | 365 | #define OB_WRP4_PAGES1680TO1695 ((uint32_t)0x00000200) /* Write protection of Sector105*/ |
| bogdanm | 0:9b334a45a8ff | 366 | #define OB_WRP4_PAGES1696TO1711 ((uint32_t)0x00000400) /* Write protection of Sector106*/ |
| bogdanm | 0:9b334a45a8ff | 367 | #define OB_WRP4_PAGES1712TO1727 ((uint32_t)0x00000800) /* Write protection of Sector107*/ |
| bogdanm | 0:9b334a45a8ff | 368 | #define OB_WRP4_PAGES1728TO1743 ((uint32_t)0x00001000) /* Write protection of Sector108*/ |
| bogdanm | 0:9b334a45a8ff | 369 | #define OB_WRP4_PAGES1744TO1759 ((uint32_t)0x00002000) /* Write protection of Sector109*/ |
| bogdanm | 0:9b334a45a8ff | 370 | #define OB_WRP4_PAGES1760TO1775 ((uint32_t)0x00004000) /* Write protection of Sector110*/ |
| bogdanm | 0:9b334a45a8ff | 371 | #define OB_WRP4_PAGES1776TO1791 ((uint32_t)0x00008000) /* Write protection of Sector111*/ |
| bogdanm | 0:9b334a45a8ff | 372 | #define OB_WRP4_PAGES1792TO1807 ((uint32_t)0x00010000) /* Write protection of Sector112*/ |
| bogdanm | 0:9b334a45a8ff | 373 | #define OB_WRP4_PAGES1808TO1823 ((uint32_t)0x00020000) /* Write protection of Sector113*/ |
| bogdanm | 0:9b334a45a8ff | 374 | #define OB_WRP4_PAGES1824TO1839 ((uint32_t)0x00040000) /* Write protection of Sector114*/ |
| bogdanm | 0:9b334a45a8ff | 375 | #define OB_WRP4_PAGES1840TO1855 ((uint32_t)0x00080000) /* Write protection of Sector115*/ |
| bogdanm | 0:9b334a45a8ff | 376 | #define OB_WRP4_PAGES1856TO1871 ((uint32_t)0x00100000) /* Write protection of Sector116*/ |
| bogdanm | 0:9b334a45a8ff | 377 | #define OB_WRP4_PAGES1872TO1887 ((uint32_t)0x00200000) /* Write protection of Sector117*/ |
| bogdanm | 0:9b334a45a8ff | 378 | #define OB_WRP4_PAGES1888TO1903 ((uint32_t)0x00400000) /* Write protection of Sector118*/ |
| bogdanm | 0:9b334a45a8ff | 379 | #define OB_WRP4_PAGES1904TO1919 ((uint32_t)0x00800000) /* Write protection of Sector119*/ |
| bogdanm | 0:9b334a45a8ff | 380 | #define OB_WRP4_PAGES1920TO1935 ((uint32_t)0x01000000) /* Write protection of Sector120*/ |
| bogdanm | 0:9b334a45a8ff | 381 | #define OB_WRP4_PAGES1936TO1951 ((uint32_t)0x02000000) /* Write protection of Sector121*/ |
| bogdanm | 0:9b334a45a8ff | 382 | #define OB_WRP4_PAGES1952TO1967 ((uint32_t)0x04000000) /* Write protection of Sector122*/ |
| bogdanm | 0:9b334a45a8ff | 383 | #define OB_WRP4_PAGES1968TO1983 ((uint32_t)0x08000000) /* Write protection of Sector123*/ |
| bogdanm | 0:9b334a45a8ff | 384 | #define OB_WRP4_PAGES1984TO1999 ((uint32_t)0x10000000) /* Write protection of Sector124*/ |
| bogdanm | 0:9b334a45a8ff | 385 | #define OB_WRP4_PAGES2000TO2015 ((uint32_t)0x20000000) /* Write protection of Sector125*/ |
| bogdanm | 0:9b334a45a8ff | 386 | #define OB_WRP4_PAGES2016TO2031 ((uint32_t)0x40000000) /* Write protection of Sector126*/ |
| bogdanm | 0:9b334a45a8ff | 387 | #define OB_WRP4_PAGES2032TO2047 ((uint32_t)0x80000000) /* Write protection of Sector127*/ |
| bogdanm | 0:9b334a45a8ff | 388 | |
| bogdanm | 0:9b334a45a8ff | 389 | #define OB_WRP4_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 390 | |
| bogdanm | 0:9b334a45a8ff | 391 | /** |
| bogdanm | 0:9b334a45a8ff | 392 | * @} |
| bogdanm | 0:9b334a45a8ff | 393 | */ |
| bogdanm | 0:9b334a45a8ff | 394 | |
| bogdanm | 0:9b334a45a8ff | 395 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 396 | |
| bogdanm | 0:9b334a45a8ff | 397 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection |
| bogdanm | 0:9b334a45a8ff | 398 | * @{ |
| bogdanm | 0:9b334a45a8ff | 399 | */ |
| bogdanm | 0:9b334a45a8ff | 400 | #define OB_RDP_LEVEL0 ((uint8_t)0xAA) |
| bogdanm | 0:9b334a45a8ff | 401 | #define OB_RDP_LEVEL1 ((uint8_t)0xBB) |
| bogdanm | 0:9b334a45a8ff | 402 | /*#define OB_RDP_LEVEL2 ((uint8_t)0xCC)*/ /* Warning: When enabling read protection level 2 |
| bogdanm | 0:9b334a45a8ff | 403 | it's no more possible to go back to level 1 or 0 */ |
| bogdanm | 0:9b334a45a8ff | 404 | |
| bogdanm | 0:9b334a45a8ff | 405 | #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL0)||\ |
| bogdanm | 0:9b334a45a8ff | 406 | ((__LEVEL__) == OB_RDP_LEVEL1))/*||\ |
| bogdanm | 0:9b334a45a8ff | 407 | ((__LEVEL__) == OB_RDP_LEVEL2))*/ |
| bogdanm | 0:9b334a45a8ff | 408 | /** |
| bogdanm | 0:9b334a45a8ff | 409 | * @} |
| bogdanm | 0:9b334a45a8ff | 410 | */ |
| bogdanm | 0:9b334a45a8ff | 411 | |
| bogdanm | 0:9b334a45a8ff | 412 | /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level |
| bogdanm | 0:9b334a45a8ff | 413 | * @{ |
| bogdanm | 0:9b334a45a8ff | 414 | */ |
| bogdanm | 0:9b334a45a8ff | 415 | |
| bogdanm | 0:9b334a45a8ff | 416 | #define OB_BOR_OFF ((uint8_t)0x00) /*!< BOR is disabled at power down, the reset is asserted when the VDD |
| bogdanm | 0:9b334a45a8ff | 417 | power supply reaches the PDR(Power Down Reset) threshold (1.5V) */ |
| bogdanm | 0:9b334a45a8ff | 418 | #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */ |
| bogdanm | 0:9b334a45a8ff | 419 | #define OB_BOR_LEVEL2 ((uint8_t)0x09) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */ |
| bogdanm | 0:9b334a45a8ff | 420 | #define OB_BOR_LEVEL3 ((uint8_t)0x0A) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */ |
| bogdanm | 0:9b334a45a8ff | 421 | #define OB_BOR_LEVEL4 ((uint8_t)0x0B) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */ |
| bogdanm | 0:9b334a45a8ff | 422 | #define OB_BOR_LEVEL5 ((uint8_t)0x0C) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */ |
| bogdanm | 0:9b334a45a8ff | 423 | |
| bogdanm | 0:9b334a45a8ff | 424 | #define IS_OB_BOR_LEVEL(__LEVEL__) ( ((__LEVEL__) == OB_BOR_OFF) || \ |
| bogdanm | 0:9b334a45a8ff | 425 | ((__LEVEL__) == OB_BOR_LEVEL1) || \ |
| bogdanm | 0:9b334a45a8ff | 426 | ((__LEVEL__) == OB_BOR_LEVEL2) || \ |
| bogdanm | 0:9b334a45a8ff | 427 | ((__LEVEL__) == OB_BOR_LEVEL3) || \ |
| bogdanm | 0:9b334a45a8ff | 428 | ((__LEVEL__) == OB_BOR_LEVEL4) || \ |
| bogdanm | 0:9b334a45a8ff | 429 | ((__LEVEL__) == OB_BOR_LEVEL5)) |
| bogdanm | 0:9b334a45a8ff | 430 | |
| bogdanm | 0:9b334a45a8ff | 431 | /** |
| bogdanm | 0:9b334a45a8ff | 432 | * @} |
| bogdanm | 0:9b334a45a8ff | 433 | */ |
| bogdanm | 0:9b334a45a8ff | 434 | |
| bogdanm | 0:9b334a45a8ff | 435 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog |
| bogdanm | 0:9b334a45a8ff | 436 | * @{ |
| bogdanm | 0:9b334a45a8ff | 437 | */ |
| bogdanm | 0:9b334a45a8ff | 438 | |
| bogdanm | 0:9b334a45a8ff | 439 | #define OB_IWDG_SW ((uint8_t)0x10) /*!< Software WDG selected */ |
| bogdanm | 0:9b334a45a8ff | 440 | #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware WDG selected */ |
| bogdanm | 0:9b334a45a8ff | 441 | |
| bogdanm | 0:9b334a45a8ff | 442 | #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW)) |
| bogdanm | 0:9b334a45a8ff | 443 | |
| bogdanm | 0:9b334a45a8ff | 444 | /** |
| bogdanm | 0:9b334a45a8ff | 445 | * @} |
| bogdanm | 0:9b334a45a8ff | 446 | */ |
| bogdanm | 0:9b334a45a8ff | 447 | |
| bogdanm | 0:9b334a45a8ff | 448 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP |
| bogdanm | 0:9b334a45a8ff | 449 | * @{ |
| bogdanm | 0:9b334a45a8ff | 450 | */ |
| bogdanm | 0:9b334a45a8ff | 451 | |
| bogdanm | 0:9b334a45a8ff | 452 | #define OB_STOP_NORST ((uint8_t)0x20) /*!< No reset generated when entering in STOP */ |
| bogdanm | 0:9b334a45a8ff | 453 | #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ |
| bogdanm | 0:9b334a45a8ff | 454 | #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST)) |
| bogdanm | 0:9b334a45a8ff | 455 | |
| bogdanm | 0:9b334a45a8ff | 456 | /** |
| bogdanm | 0:9b334a45a8ff | 457 | * @} |
| bogdanm | 0:9b334a45a8ff | 458 | */ |
| bogdanm | 0:9b334a45a8ff | 459 | |
| bogdanm | 0:9b334a45a8ff | 460 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY |
| bogdanm | 0:9b334a45a8ff | 461 | * @{ |
| bogdanm | 0:9b334a45a8ff | 462 | */ |
| bogdanm | 0:9b334a45a8ff | 463 | |
| bogdanm | 0:9b334a45a8ff | 464 | #define OB_STDBY_NORST ((uint8_t)0x40) /*!< No reset generated when entering in STANDBY */ |
| bogdanm | 0:9b334a45a8ff | 465 | #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ |
| bogdanm | 0:9b334a45a8ff | 466 | #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST)) |
| bogdanm | 0:9b334a45a8ff | 467 | |
| bogdanm | 0:9b334a45a8ff | 468 | /** |
| bogdanm | 0:9b334a45a8ff | 469 | * @} |
| bogdanm | 0:9b334a45a8ff | 470 | */ |
| bogdanm | 0:9b334a45a8ff | 471 | |
| bogdanm | 0:9b334a45a8ff | 472 | #if defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
| bogdanm | 0:9b334a45a8ff | 473 | defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 474 | |
| bogdanm | 0:9b334a45a8ff | 475 | /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type |
| bogdanm | 0:9b334a45a8ff | 476 | * @{ |
| bogdanm | 0:9b334a45a8ff | 477 | */ |
| bogdanm | 0:9b334a45a8ff | 478 | |
| bogdanm | 0:9b334a45a8ff | 479 | #define OBEX_PCROP ((uint32_t)0x01) /*!<PCROP option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 480 | |
| bogdanm | 0:9b334a45a8ff | 481 | #define IS_OBEX(__VALUE__) ((__VALUE__) == OBEX_PCROP) |
| bogdanm | 0:9b334a45a8ff | 482 | |
| bogdanm | 0:9b334a45a8ff | 483 | /** |
| bogdanm | 0:9b334a45a8ff | 484 | * @} |
| bogdanm | 0:9b334a45a8ff | 485 | */ |
| bogdanm | 0:9b334a45a8ff | 486 | |
| bogdanm | 0:9b334a45a8ff | 487 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 488 | |
| bogdanm | 0:9b334a45a8ff | 489 | #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 490 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 491 | |
| bogdanm | 0:9b334a45a8ff | 492 | /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type |
| bogdanm | 0:9b334a45a8ff | 493 | * @{ |
| bogdanm | 0:9b334a45a8ff | 494 | */ |
| bogdanm | 0:9b334a45a8ff | 495 | |
| bogdanm | 0:9b334a45a8ff | 496 | #define OBEX_BOOTCONFIG ((uint32_t)0x02) /*!<BOOTConfig option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 497 | |
| bogdanm | 0:9b334a45a8ff | 498 | #define IS_OBEX(__VALUE__) ((__VALUE__) == OBEX_BOOTCONFIG) |
| bogdanm | 0:9b334a45a8ff | 499 | |
| bogdanm | 0:9b334a45a8ff | 500 | /** |
| bogdanm | 0:9b334a45a8ff | 501 | * @} |
| bogdanm | 0:9b334a45a8ff | 502 | */ |
| bogdanm | 0:9b334a45a8ff | 503 | |
| bogdanm | 0:9b334a45a8ff | 504 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 505 | |
| bogdanm | 0:9b334a45a8ff | 506 | #if defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
| bogdanm | 0:9b334a45a8ff | 507 | defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 508 | |
| bogdanm | 0:9b334a45a8ff | 509 | /** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State |
| bogdanm | 0:9b334a45a8ff | 510 | * @{ |
| bogdanm | 0:9b334a45a8ff | 511 | */ |
| bogdanm | 0:9b334a45a8ff | 512 | #define PCROPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable PCROP for selected sectors */ |
| bogdanm | 0:9b334a45a8ff | 513 | #define PCROPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable PCROP for selected sectors */ |
| bogdanm | 0:9b334a45a8ff | 514 | |
| bogdanm | 0:9b334a45a8ff | 515 | #define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == PCROPSTATE_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 516 | ((__VALUE__) == PCROPSTATE_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 517 | /** |
| bogdanm | 0:9b334a45a8ff | 518 | * @} |
| bogdanm | 0:9b334a45a8ff | 519 | */ |
| bogdanm | 0:9b334a45a8ff | 520 | |
| bogdanm | 0:9b334a45a8ff | 521 | /** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode |
| bogdanm | 0:9b334a45a8ff | 522 | * @{ |
| bogdanm | 0:9b334a45a8ff | 523 | */ |
| bogdanm | 0:9b334a45a8ff | 524 | #define OB_PCROP_DESELECTED ((uint16_t)0x0000) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */ |
| bogdanm | 0:9b334a45a8ff | 525 | #define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */ |
| bogdanm | 0:9b334a45a8ff | 526 | |
| bogdanm | 0:9b334a45a8ff | 527 | /** |
| bogdanm | 0:9b334a45a8ff | 528 | * @} |
| bogdanm | 0:9b334a45a8ff | 529 | */ |
| bogdanm | 0:9b334a45a8ff | 530 | |
| bogdanm | 0:9b334a45a8ff | 531 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1 |
| bogdanm | 0:9b334a45a8ff | 532 | * @{ |
| bogdanm | 0:9b334a45a8ff | 533 | */ |
| bogdanm | 0:9b334a45a8ff | 534 | |
| bogdanm | 0:9b334a45a8ff | 535 | /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ |
| bogdanm | 0:9b334a45a8ff | 536 | #define OB_PCROP1_PAGES0TO15 ((uint32_t)0x00000001) /* PC Read/Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 537 | #define OB_PCROP1_PAGES16TO31 ((uint32_t)0x00000002) /* PC Read/Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 538 | #define OB_PCROP1_PAGES32TO47 ((uint32_t)0x00000004) /* PC Read/Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 539 | #define OB_PCROP1_PAGES48TO63 ((uint32_t)0x00000008) /* PC Read/Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 540 | #define OB_PCROP1_PAGES64TO79 ((uint32_t)0x00000010) /* PC Read/Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 541 | #define OB_PCROP1_PAGES80TO95 ((uint32_t)0x00000020) /* PC Read/Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 542 | #define OB_PCROP1_PAGES96TO111 ((uint32_t)0x00000040) /* PC Read/Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 543 | #define OB_PCROP1_PAGES112TO127 ((uint32_t)0x00000080) /* PC Read/Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 544 | #define OB_PCROP1_PAGES128TO143 ((uint32_t)0x00000100) /* PC Read/Write protection of Sector8 */ |
| bogdanm | 0:9b334a45a8ff | 545 | #define OB_PCROP1_PAGES144TO159 ((uint32_t)0x00000200) /* PC Read/Write protection of Sector9 */ |
| bogdanm | 0:9b334a45a8ff | 546 | #define OB_PCROP1_PAGES160TO175 ((uint32_t)0x00000400) /* PC Read/Write protection of Sector10 */ |
| bogdanm | 0:9b334a45a8ff | 547 | #define OB_PCROP1_PAGES176TO191 ((uint32_t)0x00000800) /* PC Read/Write protection of Sector11 */ |
| bogdanm | 0:9b334a45a8ff | 548 | #define OB_PCROP1_PAGES192TO207 ((uint32_t)0x00001000) /* PC Read/Write protection of Sector12 */ |
| bogdanm | 0:9b334a45a8ff | 549 | #define OB_PCROP1_PAGES208TO223 ((uint32_t)0x00002000) /* PC Read/Write protection of Sector13 */ |
| bogdanm | 0:9b334a45a8ff | 550 | #define OB_PCROP1_PAGES224TO239 ((uint32_t)0x00004000) /* PC Read/Write protection of Sector14 */ |
| bogdanm | 0:9b334a45a8ff | 551 | #define OB_PCROP1_PAGES240TO255 ((uint32_t)0x00008000) /* PC Read/Write protection of Sector15 */ |
| bogdanm | 0:9b334a45a8ff | 552 | #define OB_PCROP1_PAGES256TO271 ((uint32_t)0x00010000) /* PC Read/Write protection of Sector16 */ |
| bogdanm | 0:9b334a45a8ff | 553 | #define OB_PCROP1_PAGES272TO287 ((uint32_t)0x00020000) /* PC Read/Write protection of Sector17 */ |
| bogdanm | 0:9b334a45a8ff | 554 | #define OB_PCROP1_PAGES288TO303 ((uint32_t)0x00040000) /* PC Read/Write protection of Sector18 */ |
| bogdanm | 0:9b334a45a8ff | 555 | #define OB_PCROP1_PAGES304TO319 ((uint32_t)0x00080000) /* PC Read/Write protection of Sector19 */ |
| bogdanm | 0:9b334a45a8ff | 556 | #define OB_PCROP1_PAGES320TO335 ((uint32_t)0x00100000) /* PC Read/Write protection of Sector20 */ |
| bogdanm | 0:9b334a45a8ff | 557 | #define OB_PCROP1_PAGES336TO351 ((uint32_t)0x00200000) /* PC Read/Write protection of Sector21 */ |
| bogdanm | 0:9b334a45a8ff | 558 | #define OB_PCROP1_PAGES352TO367 ((uint32_t)0x00400000) /* PC Read/Write protection of Sector22 */ |
| bogdanm | 0:9b334a45a8ff | 559 | #define OB_PCROP1_PAGES368TO383 ((uint32_t)0x00800000) /* PC Read/Write protection of Sector23 */ |
| bogdanm | 0:9b334a45a8ff | 560 | #define OB_PCROP1_PAGES384TO399 ((uint32_t)0x01000000) /* PC Read/Write protection of Sector24 */ |
| bogdanm | 0:9b334a45a8ff | 561 | #define OB_PCROP1_PAGES400TO415 ((uint32_t)0x02000000) /* PC Read/Write protection of Sector25 */ |
| bogdanm | 0:9b334a45a8ff | 562 | #define OB_PCROP1_PAGES416TO431 ((uint32_t)0x04000000) /* PC Read/Write protection of Sector26 */ |
| bogdanm | 0:9b334a45a8ff | 563 | #define OB_PCROP1_PAGES432TO447 ((uint32_t)0x08000000) /* PC Read/Write protection of Sector27 */ |
| bogdanm | 0:9b334a45a8ff | 564 | #define OB_PCROP1_PAGES448TO463 ((uint32_t)0x10000000) /* PC Read/Write protection of Sector28 */ |
| bogdanm | 0:9b334a45a8ff | 565 | #define OB_PCROP1_PAGES464TO479 ((uint32_t)0x20000000) /* PC Read/Write protection of Sector29 */ |
| bogdanm | 0:9b334a45a8ff | 566 | #define OB_PCROP1_PAGES480TO495 ((uint32_t)0x40000000) /* PC Read/Write protection of Sector30 */ |
| bogdanm | 0:9b334a45a8ff | 567 | #define OB_PCROP1_PAGES496TO511 ((uint32_t)0x80000000) /* PC Read/Write protection of Sector31 */ |
| bogdanm | 0:9b334a45a8ff | 568 | |
| bogdanm | 0:9b334a45a8ff | 569 | #define OB_PCROP1_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< PC Read/Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 570 | |
| bogdanm | 0:9b334a45a8ff | 571 | /** |
| bogdanm | 0:9b334a45a8ff | 572 | * @} |
| bogdanm | 0:9b334a45a8ff | 573 | */ |
| bogdanm | 0:9b334a45a8ff | 574 | |
| bogdanm | 0:9b334a45a8ff | 575 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 576 | |
| bogdanm | 0:9b334a45a8ff | 577 | #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2 |
| bogdanm | 0:9b334a45a8ff | 580 | * @{ |
| bogdanm | 0:9b334a45a8ff | 581 | */ |
| bogdanm | 0:9b334a45a8ff | 582 | |
| bogdanm | 0:9b334a45a8ff | 583 | /* Pages for Cat3, Cat4 & Cat5 devices*/ |
| bogdanm | 0:9b334a45a8ff | 584 | #define OB_PCROP2_PAGES512TO527 ((uint32_t)0x00000001) /* PC Read/Write protection of Sector32 */ |
| bogdanm | 0:9b334a45a8ff | 585 | #define OB_PCROP2_PAGES528TO543 ((uint32_t)0x00000002) /* PC Read/Write protection of Sector33 */ |
| bogdanm | 0:9b334a45a8ff | 586 | #define OB_PCROP2_PAGES544TO559 ((uint32_t)0x00000004) /* PC Read/Write protection of Sector34 */ |
| bogdanm | 0:9b334a45a8ff | 587 | #define OB_PCROP2_PAGES560TO575 ((uint32_t)0x00000008) /* PC Read/Write protection of Sector35 */ |
| bogdanm | 0:9b334a45a8ff | 588 | #define OB_PCROP2_PAGES576TO591 ((uint32_t)0x00000010) /* PC Read/Write protection of Sector36 */ |
| bogdanm | 0:9b334a45a8ff | 589 | #define OB_PCROP2_PAGES592TO607 ((uint32_t)0x00000020) /* PC Read/Write protection of Sector37 */ |
| bogdanm | 0:9b334a45a8ff | 590 | #define OB_PCROP2_PAGES608TO623 ((uint32_t)0x00000040) /* PC Read/Write protection of Sector38 */ |
| bogdanm | 0:9b334a45a8ff | 591 | #define OB_PCROP2_PAGES624TO639 ((uint32_t)0x00000080) /* PC Read/Write protection of Sector39 */ |
| bogdanm | 0:9b334a45a8ff | 592 | #define OB_PCROP2_PAGES640TO655 ((uint32_t)0x00000100) /* PC Read/Write protection of Sector40 */ |
| bogdanm | 0:9b334a45a8ff | 593 | #define OB_PCROP2_PAGES656TO671 ((uint32_t)0x00000200) /* PC Read/Write protection of Sector41 */ |
| bogdanm | 0:9b334a45a8ff | 594 | #define OB_PCROP2_PAGES672TO687 ((uint32_t)0x00000400) /* PC Read/Write protection of Sector42 */ |
| bogdanm | 0:9b334a45a8ff | 595 | #define OB_PCROP2_PAGES688TO703 ((uint32_t)0x00000800) /* PC Read/Write protection of Sector43 */ |
| bogdanm | 0:9b334a45a8ff | 596 | #define OB_PCROP2_PAGES704TO719 ((uint32_t)0x00001000) /* PC Read/Write protection of Sector44 */ |
| bogdanm | 0:9b334a45a8ff | 597 | #define OB_PCROP2_PAGES720TO735 ((uint32_t)0x00002000) /* PC Read/Write protection of Sector45 */ |
| bogdanm | 0:9b334a45a8ff | 598 | #define OB_PCROP2_PAGES736TO751 ((uint32_t)0x00004000) /* PC Read/Write protection of Sector46 */ |
| bogdanm | 0:9b334a45a8ff | 599 | #define OB_PCROP2_PAGES752TO767 ((uint32_t)0x00008000) /* PC Read/Write protection of Sector47 */ |
| bogdanm | 0:9b334a45a8ff | 600 | #define OB_PCROP2_PAGES768TO783 ((uint32_t)0x00010000) /* PC Read/Write protection of Sector48 */ |
| bogdanm | 0:9b334a45a8ff | 601 | #define OB_PCROP2_PAGES784TO799 ((uint32_t)0x00020000) /* PC Read/Write protection of Sector49 */ |
| bogdanm | 0:9b334a45a8ff | 602 | #define OB_PCROP2_PAGES800TO815 ((uint32_t)0x00040000) /* PC Read/Write protection of Sector50 */ |
| bogdanm | 0:9b334a45a8ff | 603 | #define OB_PCROP2_PAGES816TO831 ((uint32_t)0x00080000) /* PC Read/Write protection of Sector51 */ |
| bogdanm | 0:9b334a45a8ff | 604 | #define OB_PCROP2_PAGES832TO847 ((uint32_t)0x00100000) /* PC Read/Write protection of Sector52 */ |
| bogdanm | 0:9b334a45a8ff | 605 | #define OB_PCROP2_PAGES848TO863 ((uint32_t)0x00200000) /* PC Read/Write protection of Sector53 */ |
| bogdanm | 0:9b334a45a8ff | 606 | #define OB_PCROP2_PAGES864TO879 ((uint32_t)0x00400000) /* PC Read/Write protection of Sector54 */ |
| bogdanm | 0:9b334a45a8ff | 607 | #define OB_PCROP2_PAGES880TO895 ((uint32_t)0x00800000) /* PC Read/Write protection of Sector55 */ |
| bogdanm | 0:9b334a45a8ff | 608 | #define OB_PCROP2_PAGES896TO911 ((uint32_t)0x01000000) /* PC Read/Write protection of Sector56 */ |
| bogdanm | 0:9b334a45a8ff | 609 | #define OB_PCROP2_PAGES912TO927 ((uint32_t)0x02000000) /* PC Read/Write protection of Sector57 */ |
| bogdanm | 0:9b334a45a8ff | 610 | #define OB_PCROP2_PAGES928TO943 ((uint32_t)0x04000000) /* PC Read/Write protection of Sector58 */ |
| bogdanm | 0:9b334a45a8ff | 611 | #define OB_PCROP2_PAGES944TO959 ((uint32_t)0x08000000) /* PC Read/Write protection of Sector59 */ |
| bogdanm | 0:9b334a45a8ff | 612 | #define OB_PCROP2_PAGES960TO975 ((uint32_t)0x10000000) /* PC Read/Write protection of Sector60 */ |
| bogdanm | 0:9b334a45a8ff | 613 | #define OB_PCROP2_PAGES976TO991 ((uint32_t)0x20000000) /* PC Read/Write protection of Sector61 */ |
| bogdanm | 0:9b334a45a8ff | 614 | #define OB_PCROP2_PAGES992TO1007 ((uint32_t)0x40000000) /* PC Read/Write protection of Sector62 */ |
| bogdanm | 0:9b334a45a8ff | 615 | #define OB_PCROP2_PAGES1008TO1023 ((uint32_t)0x80000000) /* PC Read/Write protection of Sector63 */ |
| bogdanm | 0:9b334a45a8ff | 616 | |
| bogdanm | 0:9b334a45a8ff | 617 | #define OB_PCROP2_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< PC Read/Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 618 | |
| bogdanm | 0:9b334a45a8ff | 619 | /** |
| bogdanm | 0:9b334a45a8ff | 620 | * @} |
| bogdanm | 0:9b334a45a8ff | 621 | */ |
| bogdanm | 0:9b334a45a8ff | 622 | |
| bogdanm | 0:9b334a45a8ff | 623 | #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 624 | |
| bogdanm | 0:9b334a45a8ff | 625 | /** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data |
| bogdanm | 0:9b334a45a8ff | 626 | * @{ |
| bogdanm | 0:9b334a45a8ff | 627 | */ |
| bogdanm | 0:9b334a45a8ff | 628 | #define TYPEERASEDATA_BYTE ((uint32_t)0x00) /*!<Erase byte (8-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 629 | #define TYPEERASEDATA_HALFWORD ((uint32_t)0x01) /*!<Erase a half-word (16-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 630 | #define TYPEERASEDATA_WORD ((uint32_t)0x02) /*!<Erase a word (32-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 631 | |
| bogdanm | 0:9b334a45a8ff | 632 | #define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == TYPEERASEDATA_BYTE) || \ |
| bogdanm | 0:9b334a45a8ff | 633 | ((__VALUE__) == TYPEERASEDATA_HALFWORD) || \ |
| bogdanm | 0:9b334a45a8ff | 634 | ((__VALUE__) == TYPEERASEDATA_WORD)) |
| bogdanm | 0:9b334a45a8ff | 635 | /** |
| bogdanm | 0:9b334a45a8ff | 636 | * @} |
| bogdanm | 0:9b334a45a8ff | 637 | */ |
| bogdanm | 0:9b334a45a8ff | 638 | |
| bogdanm | 0:9b334a45a8ff | 639 | /** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data |
| bogdanm | 0:9b334a45a8ff | 640 | * @{ |
| bogdanm | 0:9b334a45a8ff | 641 | */ |
| bogdanm | 0:9b334a45a8ff | 642 | #define TYPEPROGRAMDATA_BYTE ((uint32_t)0x00) /*!<Program byte (8-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 643 | #define TYPEPROGRAMDATA_HALFWORD ((uint32_t)0x01) /*!<Program a half-word (16-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 644 | #define TYPEPROGRAMDATA_WORD ((uint32_t)0x02) /*!<Program a word (32-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 645 | #define TYPEPROGRAMDATA_FASTBYTE ((uint32_t)0x04) /*!<Fast Program byte (8-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 646 | #define TYPEPROGRAMDATA_FASTHALFWORD ((uint32_t)0x08) /*!<Fast Program a half-word (16-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 647 | #define TYPEPROGRAMDATA_FASTWORD ((uint32_t)0x10) /*!<Fast Program a word (32-bit) at a specified address.*/ |
| bogdanm | 0:9b334a45a8ff | 648 | |
| bogdanm | 0:9b334a45a8ff | 649 | #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == TYPEPROGRAMDATA_BYTE) || \ |
| bogdanm | 0:9b334a45a8ff | 650 | ((__VALUE__) == TYPEPROGRAMDATA_HALFWORD) || \ |
| bogdanm | 0:9b334a45a8ff | 651 | ((__VALUE__) == TYPEPROGRAMDATA_WORD) || \ |
| bogdanm | 0:9b334a45a8ff | 652 | ((__VALUE__) == TYPEPROGRAMDATA_FASTBYTE) || \ |
| bogdanm | 0:9b334a45a8ff | 653 | ((__VALUE__) == TYPEPROGRAMDATA_FASTHALFWORD) || \ |
| bogdanm | 0:9b334a45a8ff | 654 | ((__VALUE__) == TYPEPROGRAMDATA_FASTWORD)) |
| bogdanm | 0:9b334a45a8ff | 655 | /** |
| bogdanm | 0:9b334a45a8ff | 656 | * @} |
| bogdanm | 0:9b334a45a8ff | 657 | */ |
| bogdanm | 0:9b334a45a8ff | 658 | |
| bogdanm | 0:9b334a45a8ff | 659 | |
| bogdanm | 0:9b334a45a8ff | 660 | /** @defgroup FLASHEx_Address FLASHEx Address |
| bogdanm | 0:9b334a45a8ff | 661 | * @{ |
| bogdanm | 0:9b334a45a8ff | 662 | */ |
| bogdanm | 0:9b334a45a8ff | 663 | #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || \ |
| bogdanm | 0:9b334a45a8ff | 664 | defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) |
| bogdanm | 0:9b334a45a8ff | 665 | |
| bogdanm | 0:9b334a45a8ff | 666 | /******* Devices with FLASH 128K *******/ |
| bogdanm | 0:9b334a45a8ff | 667 | #define FLASH_NBPAGES_MAX 512 /* 512 pages from page 0 to page 511 */ |
| bogdanm | 0:9b334a45a8ff | 668 | |
| bogdanm | 0:9b334a45a8ff | 669 | #elif defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \ |
| bogdanm | 0:9b334a45a8ff | 670 | defined (STM32L151xCA) || defined (STM32L152xCA) || defined (STM32L162xCA) |
| bogdanm | 0:9b334a45a8ff | 671 | |
| bogdanm | 0:9b334a45a8ff | 672 | /******* Devices with FLASH 256K *******/ |
| bogdanm | 0:9b334a45a8ff | 673 | #define FLASH_NBPAGES_MAX 1025 /* 1025 pages from page 0 to page 1024 */ |
| bogdanm | 0:9b334a45a8ff | 674 | |
| bogdanm | 0:9b334a45a8ff | 675 | #elif defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) |
| bogdanm | 0:9b334a45a8ff | 676 | |
| bogdanm | 0:9b334a45a8ff | 677 | /******* Devices with FLASH 384K *******/ |
| bogdanm | 0:9b334a45a8ff | 678 | #define FLASH_NBPAGES_MAX 1536 /* 1536 pages from page 0 to page 1535 */ |
| bogdanm | 0:9b334a45a8ff | 679 | |
| bogdanm | 0:9b334a45a8ff | 680 | #elif defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 681 | |
| bogdanm | 0:9b334a45a8ff | 682 | /******* Devices with FLASH 512K *******/ |
| bogdanm | 0:9b334a45a8ff | 683 | #define FLASH_NBPAGES_MAX 2048 /* 2048 pages from page 0 to page 2047 */ |
| bogdanm | 0:9b334a45a8ff | 684 | |
| bogdanm | 0:9b334a45a8ff | 685 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */ |
| bogdanm | 0:9b334a45a8ff | 686 | |
| bogdanm | 0:9b334a45a8ff | 687 | #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END)) |
| bogdanm | 0:9b334a45a8ff | 688 | |
| bogdanm | 0:9b334a45a8ff | 689 | #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || \ |
| bogdanm | 0:9b334a45a8ff | 690 | defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
| bogdanm | 0:9b334a45a8ff | 691 | defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \ |
| bogdanm | 0:9b334a45a8ff | 692 | defined (STM32L151xCA) || defined (STM32L152xCA) || defined (STM32L162xCA) |
| bogdanm | 0:9b334a45a8ff | 693 | |
| bogdanm | 0:9b334a45a8ff | 694 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END)) |
| bogdanm | 0:9b334a45a8ff | 695 | |
| bogdanm | 0:9b334a45a8ff | 696 | #else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 697 | |
| bogdanm | 0:9b334a45a8ff | 698 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) |
| bogdanm | 0:9b334a45a8ff | 699 | #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END)) |
| bogdanm | 0:9b334a45a8ff | 700 | #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) |
| bogdanm | 0:9b334a45a8ff | 701 | |
| bogdanm | 0:9b334a45a8ff | 702 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L152xCA || STM32L162xCA */ |
| bogdanm | 0:9b334a45a8ff | 703 | |
| bogdanm | 0:9b334a45a8ff | 704 | #define IS_NBPAGES(_PAGES_) (((_PAGES_) >= 1) && ((_PAGES_) <= FLASH_NBPAGES_MAX)) |
| bogdanm | 0:9b334a45a8ff | 705 | |
| bogdanm | 0:9b334a45a8ff | 706 | /** |
| bogdanm | 0:9b334a45a8ff | 707 | * @} |
| bogdanm | 0:9b334a45a8ff | 708 | */ |
| bogdanm | 0:9b334a45a8ff | 709 | |
| bogdanm | 0:9b334a45a8ff | 710 | /** @defgroup FLASHEx_Flags FLASHEx Flags |
| bogdanm | 0:9b334a45a8ff | 711 | * @{ |
| bogdanm | 0:9b334a45a8ff | 712 | */ |
| bogdanm | 0:9b334a45a8ff | 713 | |
| bogdanm | 0:9b334a45a8ff | 714 | /* Cat2 & Cat3*/ |
| bogdanm | 0:9b334a45a8ff | 715 | #if defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
| bogdanm | 0:9b334a45a8ff | 716 | defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 717 | |
| bogdanm | 0:9b334a45a8ff | 718 | #define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< Read protected error flag */ |
| bogdanm | 0:9b334a45a8ff | 719 | |
| bogdanm | 0:9b334a45a8ff | 720 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 721 | |
| bogdanm | 0:9b334a45a8ff | 722 | /* Cat3, Cat4 & Cat5*/ |
| bogdanm | 0:9b334a45a8ff | 723 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \ |
| bogdanm | 0:9b334a45a8ff | 724 | defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 725 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 726 | |
| bogdanm | 0:9b334a45a8ff | 727 | #define FLASH_FLAG_OPTVERRUSR FLASH_SR_OPTVERRUSR /*!< FLASH Option User Validity error flag */ |
| bogdanm | 0:9b334a45a8ff | 728 | |
| bogdanm | 0:9b334a45a8ff | 729 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 730 | |
| bogdanm | 0:9b334a45a8ff | 731 | /* Cat1*/ |
| bogdanm | 0:9b334a45a8ff | 732 | #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || defined (STM32L100xBA) |
| bogdanm | 0:9b334a45a8ff | 733 | |
| bogdanm | 0:9b334a45a8ff | 734 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
| bogdanm | 0:9b334a45a8ff | 735 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR) |
| bogdanm | 0:9b334a45a8ff | 736 | |
| bogdanm | 0:9b334a45a8ff | 737 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA */ |
| bogdanm | 0:9b334a45a8ff | 738 | |
| bogdanm | 0:9b334a45a8ff | 739 | /* RDERR only for STM32L151xBA & STM32L152xBA (Cat2)*/ |
| bogdanm | 0:9b334a45a8ff | 740 | #if defined (STM32L151xBA) || defined (STM32L152xBA) |
| bogdanm | 0:9b334a45a8ff | 741 | |
| bogdanm | 0:9b334a45a8ff | 742 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
| bogdanm | 0:9b334a45a8ff | 743 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
| bogdanm | 0:9b334a45a8ff | 744 | FLASH_FLAG_RDERR) |
| bogdanm | 0:9b334a45a8ff | 745 | |
| bogdanm | 0:9b334a45a8ff | 746 | #endif /* STM32L151xBA || STM32L152xBA */ |
| bogdanm | 0:9b334a45a8ff | 747 | |
| bogdanm | 0:9b334a45a8ff | 748 | /* FLASH_FLAG_OPTVERRUSR & RDERR only for STM32L151xC, STM32L152xC & STM32L152xBA (Cat3) */ |
| bogdanm | 0:9b334a45a8ff | 749 | #if defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 750 | |
| bogdanm | 0:9b334a45a8ff | 751 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
| bogdanm | 0:9b334a45a8ff | 752 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
| bogdanm | 0:9b334a45a8ff | 753 | FLASH_FLAG_OPTVERRUSR | FLASH_FLAG_RDERR) |
| bogdanm | 0:9b334a45a8ff | 754 | |
| bogdanm | 0:9b334a45a8ff | 755 | #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 756 | |
| bogdanm | 0:9b334a45a8ff | 757 | /* FLASH_FLAG_OPTVERRUSR only for STM32L100xC (Cat3) */ |
| bogdanm | 0:9b334a45a8ff | 758 | #if defined (STM32L100xC) |
| bogdanm | 0:9b334a45a8ff | 759 | |
| bogdanm | 0:9b334a45a8ff | 760 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
| bogdanm | 0:9b334a45a8ff | 761 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
| bogdanm | 0:9b334a45a8ff | 762 | FLASH_FLAG_OPTVERRUSR) |
| bogdanm | 0:9b334a45a8ff | 763 | |
| bogdanm | 0:9b334a45a8ff | 764 | #endif /* STM32L100xC */ |
| bogdanm | 0:9b334a45a8ff | 765 | |
| bogdanm | 0:9b334a45a8ff | 766 | /* Cat4 & Cat5 */ |
| bogdanm | 0:9b334a45a8ff | 767 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 768 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 769 | |
| bogdanm | 0:9b334a45a8ff | 770 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
| bogdanm | 0:9b334a45a8ff | 771 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
| bogdanm | 0:9b334a45a8ff | 772 | FLASH_FLAG_OPTVERRUSR) |
| bogdanm | 0:9b334a45a8ff | 773 | |
| bogdanm | 0:9b334a45a8ff | 774 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 775 | |
| bogdanm | 0:9b334a45a8ff | 776 | /** |
| bogdanm | 0:9b334a45a8ff | 777 | * @} |
| bogdanm | 0:9b334a45a8ff | 778 | */ |
| bogdanm | 0:9b334a45a8ff | 779 | |
| bogdanm | 0:9b334a45a8ff | 780 | #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 781 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 782 | |
| bogdanm | 0:9b334a45a8ff | 783 | /** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT |
| bogdanm | 0:9b334a45a8ff | 784 | * @{ |
| bogdanm | 0:9b334a45a8ff | 785 | */ |
| bogdanm | 0:9b334a45a8ff | 786 | |
| bogdanm | 0:9b334a45a8ff | 787 | #define OB_BOOT_BANK2 ((uint8_t)0x00) /*!< At startup, if boot pins are set in boot from user Flash position |
| bogdanm | 0:9b334a45a8ff | 788 | and this parameter is selected the device will boot from Bank 2 |
| bogdanm | 0:9b334a45a8ff | 789 | or Bank 1, depending on the activation of the bank */ |
| bogdanm | 0:9b334a45a8ff | 790 | #define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16)) /*!< At startup, if boot pins are set in boot from user Flash position |
| bogdanm | 0:9b334a45a8ff | 791 | and this parameter is selected the device will boot from Bank1(Default) */ |
| bogdanm | 0:9b334a45a8ff | 792 | #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1)) |
| bogdanm | 0:9b334a45a8ff | 793 | |
| bogdanm | 0:9b334a45a8ff | 794 | /** |
| bogdanm | 0:9b334a45a8ff | 795 | * @} |
| bogdanm | 0:9b334a45a8ff | 796 | */ |
| bogdanm | 0:9b334a45a8ff | 797 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 798 | |
| bogdanm | 0:9b334a45a8ff | 799 | /** |
| bogdanm | 0:9b334a45a8ff | 800 | * @} |
| bogdanm | 0:9b334a45a8ff | 801 | */ |
| bogdanm | 0:9b334a45a8ff | 802 | |
| bogdanm | 0:9b334a45a8ff | 803 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 804 | |
| bogdanm | 0:9b334a45a8ff | 805 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
| bogdanm | 0:9b334a45a8ff | 806 | * @{ |
| bogdanm | 0:9b334a45a8ff | 807 | */ |
| bogdanm | 0:9b334a45a8ff | 808 | |
| bogdanm | 0:9b334a45a8ff | 809 | /** |
| bogdanm | 0:9b334a45a8ff | 810 | * @brief Set the FLASH Latency. |
| bogdanm | 0:9b334a45a8ff | 811 | * @param __LATENCY__: FLASH Latency |
| bogdanm | 0:9b334a45a8ff | 812 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 813 | * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle |
| bogdanm | 0:9b334a45a8ff | 814 | * @arg FLASH_LATENCY_1: FLASH One Latency cycle |
| bogdanm | 0:9b334a45a8ff | 815 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 816 | */ |
| bogdanm | 0:9b334a45a8ff | 817 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \ |
| bogdanm | 0:9b334a45a8ff | 818 | if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \ |
| bogdanm | 0:9b334a45a8ff | 819 | MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \ |
| bogdanm | 0:9b334a45a8ff | 820 | } while(0) |
| bogdanm | 0:9b334a45a8ff | 821 | |
| bogdanm | 0:9b334a45a8ff | 822 | /** |
| bogdanm | 0:9b334a45a8ff | 823 | * @brief Get the FLASH Latency. |
| bogdanm | 0:9b334a45a8ff | 824 | * @retval FLASH Latency |
| bogdanm | 0:9b334a45a8ff | 825 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 826 | * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle |
| bogdanm | 0:9b334a45a8ff | 827 | * @arg FLASH_LATENCY_1: FLASH One Latency cycle |
| bogdanm | 0:9b334a45a8ff | 828 | */ |
| bogdanm | 0:9b334a45a8ff | 829 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) |
| bogdanm | 0:9b334a45a8ff | 830 | |
| bogdanm | 0:9b334a45a8ff | 831 | /** |
| bogdanm | 0:9b334a45a8ff | 832 | * @brief Enable the FLASH 64-bit access. |
| bogdanm | 0:9b334a45a8ff | 833 | * @note Read access 64 bit is used. |
| bogdanm | 0:9b334a45a8ff | 834 | * @note This bit cannot be written at the same time as the LATENCY and |
| bogdanm | 0:9b334a45a8ff | 835 | * PRFTEN bits. |
| bogdanm | 0:9b334a45a8ff | 836 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 837 | */ |
| bogdanm | 0:9b334a45a8ff | 838 | #define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64)) |
| bogdanm | 0:9b334a45a8ff | 839 | |
| bogdanm | 0:9b334a45a8ff | 840 | /** |
| bogdanm | 0:9b334a45a8ff | 841 | * @brief Disable the FLASH 64-bit access. |
| bogdanm | 0:9b334a45a8ff | 842 | * @note Read access 32 bit is used |
| bogdanm | 0:9b334a45a8ff | 843 | * @note To reset this bit, the LATENCY should be zero wait state and the |
| bogdanm | 0:9b334a45a8ff | 844 | * prefetch off. |
| bogdanm | 0:9b334a45a8ff | 845 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 846 | */ |
| bogdanm | 0:9b334a45a8ff | 847 | #define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64)) |
| bogdanm | 0:9b334a45a8ff | 848 | |
| bogdanm | 0:9b334a45a8ff | 849 | /** |
| bogdanm | 0:9b334a45a8ff | 850 | * @brief Enable the FLASH prefetch buffer. |
| bogdanm | 0:9b334a45a8ff | 851 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 852 | */ |
| bogdanm | 0:9b334a45a8ff | 853 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \ |
| bogdanm | 0:9b334a45a8ff | 854 | SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \ |
| bogdanm | 0:9b334a45a8ff | 855 | } while(0) |
| bogdanm | 0:9b334a45a8ff | 856 | |
| bogdanm | 0:9b334a45a8ff | 857 | /** |
| bogdanm | 0:9b334a45a8ff | 858 | * @brief Disable the FLASH prefetch buffer. |
| bogdanm | 0:9b334a45a8ff | 859 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 860 | */ |
| bogdanm | 0:9b334a45a8ff | 861 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN) |
| bogdanm | 0:9b334a45a8ff | 862 | |
| bogdanm | 0:9b334a45a8ff | 863 | /** |
| bogdanm | 0:9b334a45a8ff | 864 | * @brief Enable the FLASH power down during Sleep mode |
| bogdanm | 0:9b334a45a8ff | 865 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 866 | */ |
| bogdanm | 0:9b334a45a8ff | 867 | #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
| bogdanm | 0:9b334a45a8ff | 868 | |
| bogdanm | 0:9b334a45a8ff | 869 | /** |
| bogdanm | 0:9b334a45a8ff | 870 | * @brief Disable the FLASH power down during Sleep mode |
| bogdanm | 0:9b334a45a8ff | 871 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 872 | */ |
| bogdanm | 0:9b334a45a8ff | 873 | #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
| bogdanm | 0:9b334a45a8ff | 874 | |
| bogdanm | 0:9b334a45a8ff | 875 | /** |
| bogdanm | 0:9b334a45a8ff | 876 | * @brief Macro to enable or disable the Flash Run power down mode. |
| bogdanm | 0:9b334a45a8ff | 877 | * @note Writing this bit to 0 this bit, automatically the keys are |
| bogdanm | 0:9b334a45a8ff | 878 | * loss and a new unlock sequence is necessary to re-write it to 1. |
| bogdanm | 0:9b334a45a8ff | 879 | */ |
| bogdanm | 0:9b334a45a8ff | 880 | |
| bogdanm | 0:9b334a45a8ff | 881 | #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
| bogdanm | 0:9b334a45a8ff | 882 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
| bogdanm | 0:9b334a45a8ff | 883 | SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
| bogdanm | 0:9b334a45a8ff | 884 | } while (0) |
| bogdanm | 0:9b334a45a8ff | 885 | |
| bogdanm | 0:9b334a45a8ff | 886 | #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
| bogdanm | 0:9b334a45a8ff | 887 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
| bogdanm | 0:9b334a45a8ff | 888 | CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
| bogdanm | 0:9b334a45a8ff | 889 | } while (0) |
| bogdanm | 0:9b334a45a8ff | 890 | |
| bogdanm | 0:9b334a45a8ff | 891 | /** |
| bogdanm | 0:9b334a45a8ff | 892 | * @} |
| bogdanm | 0:9b334a45a8ff | 893 | */ |
| bogdanm | 0:9b334a45a8ff | 894 | |
| bogdanm | 0:9b334a45a8ff | 895 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 896 | |
| bogdanm | 0:9b334a45a8ff | 897 | /** @addtogroup FLASHEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 898 | * @{ |
| bogdanm | 0:9b334a45a8ff | 899 | */ |
| bogdanm | 0:9b334a45a8ff | 900 | |
| bogdanm | 0:9b334a45a8ff | 901 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 902 | * @{ |
| bogdanm | 0:9b334a45a8ff | 903 | */ |
| bogdanm | 0:9b334a45a8ff | 904 | |
| bogdanm | 0:9b334a45a8ff | 905 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
| bogdanm | 0:9b334a45a8ff | 906 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| bogdanm | 0:9b334a45a8ff | 907 | |
| bogdanm | 0:9b334a45a8ff | 908 | /** |
| bogdanm | 0:9b334a45a8ff | 909 | * @} |
| bogdanm | 0:9b334a45a8ff | 910 | */ |
| bogdanm | 0:9b334a45a8ff | 911 | |
| bogdanm | 0:9b334a45a8ff | 912 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
| bogdanm | 0:9b334a45a8ff | 913 | * @{ |
| bogdanm | 0:9b334a45a8ff | 914 | */ |
| bogdanm | 0:9b334a45a8ff | 915 | |
| bogdanm | 0:9b334a45a8ff | 916 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| bogdanm | 0:9b334a45a8ff | 917 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| bogdanm | 0:9b334a45a8ff | 918 | |
| bogdanm | 0:9b334a45a8ff | 919 | #if defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
| bogdanm | 0:9b334a45a8ff | 920 | defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \ |
| bogdanm | 0:9b334a45a8ff | 921 | defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) || \ |
| bogdanm | 0:9b334a45a8ff | 922 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
| bogdanm | 0:9b334a45a8ff | 923 | |
| bogdanm | 0:9b334a45a8ff | 924 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| bogdanm | 0:9b334a45a8ff | 925 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| bogdanm | 0:9b334a45a8ff | 926 | |
| bogdanm | 0:9b334a45a8ff | 927 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
| bogdanm | 0:9b334a45a8ff | 928 | |
| bogdanm | 0:9b334a45a8ff | 929 | #if defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
| bogdanm | 0:9b334a45a8ff | 930 | defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| bogdanm | 0:9b334a45a8ff | 931 | |
| bogdanm | 0:9b334a45a8ff | 932 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); |
| bogdanm | 0:9b334a45a8ff | 933 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); |
| bogdanm | 0:9b334a45a8ff | 934 | |
| bogdanm | 0:9b334a45a8ff | 935 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ |
| bogdanm | 0:9b334a45a8ff | 936 | |
| bogdanm | 0:9b334a45a8ff | 937 | /** |
| bogdanm | 0:9b334a45a8ff | 938 | * @} |
| bogdanm | 0:9b334a45a8ff | 939 | */ |
| bogdanm | 0:9b334a45a8ff | 940 | |
| bogdanm | 0:9b334a45a8ff | 941 | /** @addtogroup FLASHEx_Exported_Functions_Group3 |
| bogdanm | 0:9b334a45a8ff | 942 | * @{ |
| bogdanm | 0:9b334a45a8ff | 943 | */ |
| bogdanm | 0:9b334a45a8ff | 944 | |
| bogdanm | 0:9b334a45a8ff | 945 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void); |
| bogdanm | 0:9b334a45a8ff | 946 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void); |
| bogdanm | 0:9b334a45a8ff | 947 | |
| bogdanm | 0:9b334a45a8ff | 948 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address); |
| bogdanm | 0:9b334a45a8ff | 949 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data); |
| bogdanm | 0:9b334a45a8ff | 950 | void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void); |
| bogdanm | 0:9b334a45a8ff | 951 | void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void); |
| bogdanm | 0:9b334a45a8ff | 952 | |
| bogdanm | 0:9b334a45a8ff | 953 | /** |
| bogdanm | 0:9b334a45a8ff | 954 | * @} |
| bogdanm | 0:9b334a45a8ff | 955 | */ |
| bogdanm | 0:9b334a45a8ff | 956 | |
| bogdanm | 0:9b334a45a8ff | 957 | /** |
| bogdanm | 0:9b334a45a8ff | 958 | * @} |
| bogdanm | 0:9b334a45a8ff | 959 | */ |
| bogdanm | 0:9b334a45a8ff | 960 | |
| bogdanm | 0:9b334a45a8ff | 961 | /** |
| bogdanm | 0:9b334a45a8ff | 962 | * @} |
| bogdanm | 0:9b334a45a8ff | 963 | */ |
| bogdanm | 0:9b334a45a8ff | 964 | |
| bogdanm | 0:9b334a45a8ff | 965 | /** |
| bogdanm | 0:9b334a45a8ff | 966 | * @} |
| bogdanm | 0:9b334a45a8ff | 967 | */ |
| bogdanm | 0:9b334a45a8ff | 968 | |
| bogdanm | 0:9b334a45a8ff | 969 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 970 | } |
| bogdanm | 0:9b334a45a8ff | 971 | #endif |
| bogdanm | 0:9b334a45a8ff | 972 | |
| bogdanm | 0:9b334a45a8ff | 973 | #endif /* __STM32L1xx_HAL_FLASH_EX_H */ |
| bogdanm | 0:9b334a45a8ff | 974 | |
| bogdanm | 0:9b334a45a8ff | 975 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |