en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_dma_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l1xx_hal_dma_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 5-September-2014
bogdanm 0:9b334a45a8ff 7 * @brief Header file of DMA HAL extension module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32L1xx_HAL_DMA_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32L1xx_HAL_DMA_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32l1xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32L1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup DMAEx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 60 /** @defgroup DMAEx_Exported_Macros DMAEx Exported Macros
bogdanm 0:9b334a45a8ff 61 * @{
bogdanm 0:9b334a45a8ff 62 */
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 /* Interrupt & Flag management */
bogdanm 0:9b334a45a8ff 65 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
bogdanm 0:9b334a45a8ff 66 defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
bogdanm 0:9b334a45a8ff 67 defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE)
bogdanm 0:9b334a45a8ff 68 /**
bogdanm 0:9b334a45a8ff 69 * @brief Returns the current DMA Channel transfer complete flag.
bogdanm 0:9b334a45a8ff 70 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 71 * @retval The specified transfer complete flag index.
bogdanm 0:9b334a45a8ff 72 */
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
bogdanm 0:9b334a45a8ff 75 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
bogdanm 0:9b334a45a8ff 76 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
bogdanm 0:9b334a45a8ff 77 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
bogdanm 0:9b334a45a8ff 78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
bogdanm 0:9b334a45a8ff 79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
bogdanm 0:9b334a45a8ff 80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
bogdanm 0:9b334a45a8ff 81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
bogdanm 0:9b334a45a8ff 82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
bogdanm 0:9b334a45a8ff 83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
bogdanm 0:9b334a45a8ff 84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
bogdanm 0:9b334a45a8ff 85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
bogdanm 0:9b334a45a8ff 86 DMA_FLAG_TC5)
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /**
bogdanm 0:9b334a45a8ff 89 * @brief Returns the current DMA Channel half transfer complete flag.
bogdanm 0:9b334a45a8ff 90 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 91 * @retval The specified half transfer complete flag index.
bogdanm 0:9b334a45a8ff 92 */
bogdanm 0:9b334a45a8ff 93 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
bogdanm 0:9b334a45a8ff 94 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
bogdanm 0:9b334a45a8ff 95 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
bogdanm 0:9b334a45a8ff 96 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
bogdanm 0:9b334a45a8ff 97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
bogdanm 0:9b334a45a8ff 98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
bogdanm 0:9b334a45a8ff 99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
bogdanm 0:9b334a45a8ff 100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
bogdanm 0:9b334a45a8ff 101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
bogdanm 0:9b334a45a8ff 102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
bogdanm 0:9b334a45a8ff 103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
bogdanm 0:9b334a45a8ff 104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
bogdanm 0:9b334a45a8ff 105 DMA_FLAG_HT5)
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 /**
bogdanm 0:9b334a45a8ff 108 * @brief Returns the current DMA Channel transfer error flag.
bogdanm 0:9b334a45a8ff 109 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 110 * @retval The specified transfer error flag index.
bogdanm 0:9b334a45a8ff 111 */
bogdanm 0:9b334a45a8ff 112 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
bogdanm 0:9b334a45a8ff 113 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
bogdanm 0:9b334a45a8ff 114 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
bogdanm 0:9b334a45a8ff 115 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
bogdanm 0:9b334a45a8ff 116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
bogdanm 0:9b334a45a8ff 117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
bogdanm 0:9b334a45a8ff 118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
bogdanm 0:9b334a45a8ff 119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
bogdanm 0:9b334a45a8ff 120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
bogdanm 0:9b334a45a8ff 121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
bogdanm 0:9b334a45a8ff 122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
bogdanm 0:9b334a45a8ff 123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
bogdanm 0:9b334a45a8ff 124 DMA_FLAG_TE5)
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 /**
bogdanm 0:9b334a45a8ff 127 * @brief Get the DMA Channel pending flags.
bogdanm 0:9b334a45a8ff 128 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 129 * @param __FLAG__: Get the specified flag.
bogdanm 0:9b334a45a8ff 130 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 131 * @arg DMA_FLAG_TCx: Transfer complete flag
bogdanm 0:9b334a45a8ff 132 * @arg DMA_FLAG_HTx: Half transfer complete flag
bogdanm 0:9b334a45a8ff 133 * @arg DMA_FLAG_TEx: Transfer error flag
bogdanm 0:9b334a45a8ff 134 * Where x can be 1_7 or 1_5 to select the DMA Channel flag.
bogdanm 0:9b334a45a8ff 135 * @retval The state of FLAG (SET or RESET).
bogdanm 0:9b334a45a8ff 136 */
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
bogdanm 0:9b334a45a8ff 139 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
bogdanm 0:9b334a45a8ff 140 (DMA1->ISR & (__FLAG__)))
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /**
bogdanm 0:9b334a45a8ff 143 * @brief Clears the DMA Channel pending flags.
bogdanm 0:9b334a45a8ff 144 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 145 * @param __FLAG__: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 146 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 147 * @arg DMA_FLAG_TCx: Transfer complete flag
bogdanm 0:9b334a45a8ff 148 * @arg DMA_FLAG_HTx: Half transfer complete flag
bogdanm 0:9b334a45a8ff 149 * @arg DMA_FLAG_TEx: Transfer error flag
bogdanm 0:9b334a45a8ff 150 * Where x can be 1_7 or 1_5 to select the DMA Channel flag.
bogdanm 0:9b334a45a8ff 151 * @retval None
bogdanm 0:9b334a45a8ff 152 */
bogdanm 0:9b334a45a8ff 153 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
bogdanm 0:9b334a45a8ff 154 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
bogdanm 0:9b334a45a8ff 155 (DMA1->IFCR = (__FLAG__)))
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 #else
bogdanm 0:9b334a45a8ff 158 /**
bogdanm 0:9b334a45a8ff 159 * @brief Returns the current DMA Channel transfer complete flag.
bogdanm 0:9b334a45a8ff 160 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 161 * @retval The specified transfer complete flag index.
bogdanm 0:9b334a45a8ff 162 */
bogdanm 0:9b334a45a8ff 163 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
bogdanm 0:9b334a45a8ff 164 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
bogdanm 0:9b334a45a8ff 165 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
bogdanm 0:9b334a45a8ff 166 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
bogdanm 0:9b334a45a8ff 167 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
bogdanm 0:9b334a45a8ff 168 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
bogdanm 0:9b334a45a8ff 169 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
bogdanm 0:9b334a45a8ff 170 DMA_FLAG_TC7)
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 /**
bogdanm 0:9b334a45a8ff 173 * @brief Returns the current DMA Channel half transfer complete flag.
bogdanm 0:9b334a45a8ff 174 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 175 * @retval The specified half transfer complete flag index.
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
bogdanm 0:9b334a45a8ff 178 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
bogdanm 0:9b334a45a8ff 179 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
bogdanm 0:9b334a45a8ff 180 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
bogdanm 0:9b334a45a8ff 181 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
bogdanm 0:9b334a45a8ff 182 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
bogdanm 0:9b334a45a8ff 183 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
bogdanm 0:9b334a45a8ff 184 DMA_FLAG_HT7)
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /**
bogdanm 0:9b334a45a8ff 187 * @brief Returns the current DMA Channel transfer error flag.
bogdanm 0:9b334a45a8ff 188 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 189 * @retval The specified transfer error flag index.
bogdanm 0:9b334a45a8ff 190 */
bogdanm 0:9b334a45a8ff 191 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
bogdanm 0:9b334a45a8ff 192 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
bogdanm 0:9b334a45a8ff 193 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
bogdanm 0:9b334a45a8ff 194 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
bogdanm 0:9b334a45a8ff 195 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
bogdanm 0:9b334a45a8ff 196 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
bogdanm 0:9b334a45a8ff 197 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
bogdanm 0:9b334a45a8ff 198 DMA_FLAG_TE7)
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /**
bogdanm 0:9b334a45a8ff 201 * @brief Get the DMA Channel pending flags.
bogdanm 0:9b334a45a8ff 202 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 203 * @param __FLAG__: Get the specified flag.
bogdanm 0:9b334a45a8ff 204 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 205 * @arg DMA_FLAG_TCx: Transfer complete flag
bogdanm 0:9b334a45a8ff 206 * @arg DMA_FLAG_HTx: Half transfer complete flag
bogdanm 0:9b334a45a8ff 207 * @arg DMA_FLAG_TEx: Transfer error flag
bogdanm 0:9b334a45a8ff 208 * Where x can be 1_7 to select the DMA Channel flag.
bogdanm 0:9b334a45a8ff 209 * @retval The state of FLAG (SET or RESET).
bogdanm 0:9b334a45a8ff 210 */
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 /**
bogdanm 0:9b334a45a8ff 215 * @brief Clears the DMA Channel pending flags.
bogdanm 0:9b334a45a8ff 216 * @param __HANDLE__: DMA handle
bogdanm 0:9b334a45a8ff 217 * @param __FLAG__: specifies the flag to clear.
bogdanm 0:9b334a45a8ff 218 * This parameter can be any combination of the following values:
bogdanm 0:9b334a45a8ff 219 * @arg DMA_FLAG_TCx: Transfer complete flag
bogdanm 0:9b334a45a8ff 220 * @arg DMA_FLAG_HTx: Half transfer complete flag
bogdanm 0:9b334a45a8ff 221 * @arg DMA_FLAG_TEx: Transfer error flag
bogdanm 0:9b334a45a8ff 222 * Where x can be 1_7 to select the DMA Channel flag.
bogdanm 0:9b334a45a8ff 223 * @retval None
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || STM32L151xE || STM32L152xE || STM32L162xE */
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 /**
bogdanm 0:9b334a45a8ff 230 * @}
bogdanm 0:9b334a45a8ff 231 */
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 /**
bogdanm 0:9b334a45a8ff 235 * @}
bogdanm 0:9b334a45a8ff 236 */
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 /**
bogdanm 0:9b334a45a8ff 239 * @}
bogdanm 0:9b334a45a8ff 240 */
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 243 }
bogdanm 0:9b334a45a8ff 244 #endif
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 #endif /* __STM32L1xx_HAL_DMA_EX_H */
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/