mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 113:b3775bf36a83

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32l0xx_hal_uart.h
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	113:b3775bf36a83	5	* @version V1.5.0
mbed_official	113:b3775bf36a83	6	* @date 8-January-2016
bogdanm	0:9b334a45a8ff	7	* @brief Header file of UART HAL module.
bogdanm	0:9b334a45a8ff	8	******************************************************************************
bogdanm	0:9b334a45a8ff	9	* @attention
bogdanm	0:9b334a45a8ff	10	*
mbed_official	113:b3775bf36a83	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	12	*
bogdanm	0:9b334a45a8ff	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	14	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	16	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	19	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	21	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	22	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	23	*
bogdanm	0:9b334a45a8ff	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	34	*
bogdanm	0:9b334a45a8ff	35	******************************************************************************
bogdanm	0:9b334a45a8ff	36	*/
bogdanm	0:9b334a45a8ff	37
bogdanm	0:9b334a45a8ff	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	0:9b334a45a8ff	39	#ifndef __STM32L0xx_HAL_UART_H
bogdanm	0:9b334a45a8ff	40	#define __STM32L0xx_HAL_UART_H
bogdanm	0:9b334a45a8ff	41
bogdanm	0:9b334a45a8ff	42	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	43	extern "C" {
bogdanm	0:9b334a45a8ff	44	#endif
bogdanm	0:9b334a45a8ff	45
bogdanm	0:9b334a45a8ff	46	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	47	#include "stm32l0xx_hal_def.h"
bogdanm	0:9b334a45a8ff	48
bogdanm	0:9b334a45a8ff	49	/** @addtogroup STM32L0xx_HAL_Driver
bogdanm	0:9b334a45a8ff	50	* @{
bogdanm	0:9b334a45a8ff	51	*/
bogdanm	0:9b334a45a8ff	52
bogdanm	0:9b334a45a8ff	53	/** @defgroup UART UART
bogdanm	0:9b334a45a8ff	54	* @{
bogdanm	0:9b334a45a8ff	55	*/
bogdanm	0:9b334a45a8ff	56
bogdanm	0:9b334a45a8ff	57	/******************************************************************************/
bogdanm	0:9b334a45a8ff	58	/* Exported types ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	59	/******************************************************************************/
bogdanm	0:9b334a45a8ff	60
bogdanm	0:9b334a45a8ff	61	/** @defgroup UART_Exported_Types UART Exported Types
bogdanm	0:9b334a45a8ff	62	* @{
bogdanm	0:9b334a45a8ff	63	*/
bogdanm	0:9b334a45a8ff	64
bogdanm	0:9b334a45a8ff	65	/** @defgroup UART_Init_Configuration UART initialization configuration structure
bogdanm	0:9b334a45a8ff	66	* @{
bogdanm	0:9b334a45a8ff	67	*/
bogdanm	0:9b334a45a8ff	68	/**
bogdanm	0:9b334a45a8ff	69	* @brief UART Init Structure definition
bogdanm	0:9b334a45a8ff	70	*/
bogdanm	0:9b334a45a8ff	71	typedef struct
bogdanm	0:9b334a45a8ff	72	{
bogdanm	0:9b334a45a8ff	73	uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
bogdanm	0:9b334a45a8ff	74	The baud rate register is computed using the following formula:
bogdanm	0:9b334a45a8ff	75	- If oversampling is 16 or in LIN mode,
bogdanm	0:9b334a45a8ff	76	Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
bogdanm	0:9b334a45a8ff	77	- If oversampling is 8,
bogdanm	0:9b334a45a8ff	78	Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
bogdanm	0:9b334a45a8ff	79	Baud Rate Register[3] = 0
bogdanm	0:9b334a45a8ff	80	Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
bogdanm	0:9b334a45a8ff	81
bogdanm	0:9b334a45a8ff	82	uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm	0:9b334a45a8ff	83	This parameter can be a value of @ref UARTEx_Word_Length */
bogdanm	0:9b334a45a8ff	84
bogdanm	0:9b334a45a8ff	85	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm	0:9b334a45a8ff	86	This parameter can be a value of @ref UART_Stop_Bits */
bogdanm	0:9b334a45a8ff	87
bogdanm	0:9b334a45a8ff	88	uint32_t Parity; /*!< Specifies the parity mode.
bogdanm	0:9b334a45a8ff	89	This parameter can be a value of @ref UART_Parity
bogdanm	0:9b334a45a8ff	90	@note When parity is enabled, the computed parity is inserted
bogdanm	0:9b334a45a8ff	91	at the MSB position of the transmitted data (9th bit when
bogdanm	0:9b334a45a8ff	92	the word length is set to 9 data bits; 8th bit when the
bogdanm	0:9b334a45a8ff	93	word length is set to 8 data bits). */
bogdanm	0:9b334a45a8ff	94
bogdanm	0:9b334a45a8ff	95	uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm	0:9b334a45a8ff	96	This parameter can be a value of @ref UART_Mode */
bogdanm	0:9b334a45a8ff	97
bogdanm	0:9b334a45a8ff	98	uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled
bogdanm	0:9b334a45a8ff	99	or disabled.
bogdanm	0:9b334a45a8ff	100	This parameter can be a value of @ref UART_Hardware_Flow_Control */
bogdanm	0:9b334a45a8ff	101
bogdanm	0:9b334a45a8ff	102	uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
bogdanm	0:9b334a45a8ff	103	This parameter can be a value of @ref UART_Over_Sampling */
bogdanm	0:9b334a45a8ff	104
bogdanm	0:9b334a45a8ff	105	uint32_t OneBitSampling; /*!< Specifies wether a single sample or three samples' majority vote is selected.
bogdanm	0:9b334a45a8ff	106	Selecting the single sample method increases the receiver tolerance to clock
bogdanm	0:9b334a45a8ff	107	deviations. This parameter can be a value of @ref UART_One_Bit */
bogdanm	0:9b334a45a8ff	108	}UART_InitTypeDef;
bogdanm	0:9b334a45a8ff	109	/**
bogdanm	0:9b334a45a8ff	110	* @}
bogdanm	0:9b334a45a8ff	111	*/
bogdanm	0:9b334a45a8ff	112	/** @defgroup UART_Advanced_Feature UART advanced feature structure
bogdanm	0:9b334a45a8ff	113	* @{
bogdanm	0:9b334a45a8ff	114	*/
bogdanm	0:9b334a45a8ff	115	/**
bogdanm	0:9b334a45a8ff	116	* @brief UART Advanced Features initalization structure definition
bogdanm	0:9b334a45a8ff	117	*/
bogdanm	0:9b334a45a8ff	118	typedef struct
bogdanm	0:9b334a45a8ff	119	{
bogdanm	0:9b334a45a8ff	120	uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
bogdanm	0:9b334a45a8ff	121	Advanced Features may be initialized at the same time .
bogdanm	0:9b334a45a8ff	122	This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
bogdanm	0:9b334a45a8ff	123
bogdanm	0:9b334a45a8ff	124	uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
bogdanm	0:9b334a45a8ff	125	This parameter can be a value of @ref UART_Tx_Inv */
bogdanm	0:9b334a45a8ff	126
bogdanm	0:9b334a45a8ff	127	uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
bogdanm	0:9b334a45a8ff	128	This parameter can be a value of @ref UART_Rx_Inv */
bogdanm	0:9b334a45a8ff	129
bogdanm	0:9b334a45a8ff	130	uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
bogdanm	0:9b334a45a8ff	131	vs negative/inverted logic).
bogdanm	0:9b334a45a8ff	132	This parameter can be a value of @ref UART_Data_Inv */
bogdanm	0:9b334a45a8ff	133
bogdanm	0:9b334a45a8ff	134	uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
bogdanm	0:9b334a45a8ff	135	This parameter can be a value of @ref UART_Rx_Tx_Swap */
bogdanm	0:9b334a45a8ff	136
bogdanm	0:9b334a45a8ff	137	uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
bogdanm	0:9b334a45a8ff	138	This parameter can be a value of @ref UART_Overrun_Disable */
bogdanm	0:9b334a45a8ff	139
bogdanm	0:9b334a45a8ff	140	uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
bogdanm	0:9b334a45a8ff	141	This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
bogdanm	0:9b334a45a8ff	142
bogdanm	0:9b334a45a8ff	143	uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
bogdanm	0:9b334a45a8ff	144	This parameter can be a value of @ref UART_AutoBaudRate_Enable */
bogdanm	0:9b334a45a8ff	145
bogdanm	0:9b334a45a8ff	146	uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
bogdanm	0:9b334a45a8ff	147	detection is carried out.
bogdanm	0:9b334a45a8ff	148	This parameter can be a value of @ref UARTEx_AutoBaud_Rate_Mode */
bogdanm	0:9b334a45a8ff	149
bogdanm	0:9b334a45a8ff	150	uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
bogdanm	0:9b334a45a8ff	151	This parameter can be a value of @ref UART_MSB_First */
bogdanm	0:9b334a45a8ff	152	} UART_AdvFeatureInitTypeDef;
bogdanm	0:9b334a45a8ff	153	/**
bogdanm	0:9b334a45a8ff	154	* @}
bogdanm	0:9b334a45a8ff	155	*/
bogdanm	0:9b334a45a8ff	156
bogdanm	0:9b334a45a8ff	157	/** @defgroup UART_State_Definition UART state definition
bogdanm	0:9b334a45a8ff	158	* @{
bogdanm	0:9b334a45a8ff	159	*/
bogdanm	0:9b334a45a8ff	160	/**
bogdanm	0:9b334a45a8ff	161	* @brief HAL UART State structures definition
bogdanm	0:9b334a45a8ff	162	*/
bogdanm	0:9b334a45a8ff	163	typedef enum
bogdanm	0:9b334a45a8ff	164	{
bogdanm	0:9b334a45a8ff	165	HAL_UART_STATE_RESET = 0x00, /!< Peripheral Reset state /
bogdanm	0:9b334a45a8ff	166	HAL_UART_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
bogdanm	0:9b334a45a8ff	167	HAL_UART_STATE_BUSY = 0x02, /!< an internal process is ongoing /
bogdanm	0:9b334a45a8ff	168	HAL_UART_STATE_BUSY_TX = 0x12, /!< Data Transmission process is ongoing /
bogdanm	0:9b334a45a8ff	169	HAL_UART_STATE_BUSY_RX = 0x22, /!< Data Reception process is ongoing /
bogdanm	0:9b334a45a8ff	170	HAL_UART_STATE_BUSY_TX_RX = 0x32, /!< Data Transmission and Reception process is ongoing /
bogdanm	0:9b334a45a8ff	171	HAL_UART_STATE_TIMEOUT = 0x03, /!< Timeout state /
bogdanm	0:9b334a45a8ff	172	HAL_UART_STATE_ERROR = 0x04 /!< Error /
bogdanm	0:9b334a45a8ff	173	}HAL_UART_StateTypeDef;
bogdanm	0:9b334a45a8ff	174	/**
bogdanm	0:9b334a45a8ff	175	* @}
bogdanm	0:9b334a45a8ff	176	*/
bogdanm	0:9b334a45a8ff	177	/** @defgroup UART_Error_Definition UART error definition
bogdanm	0:9b334a45a8ff	178	* @{
bogdanm	0:9b334a45a8ff	179	*/
bogdanm	0:9b334a45a8ff	180	/**
bogdanm	0:9b334a45a8ff	181	* @brief HAL UART Error Code definition
bogdanm	0:9b334a45a8ff	182	*/
bogdanm	0:9b334a45a8ff	183
bogdanm	0:9b334a45a8ff	184	#define HAL_UART_ERROR_NONE ((uint32_t)0x00) /!< No error /
bogdanm	0:9b334a45a8ff	185	#define HAL_UART_ERROR_PE ((uint32_t)0x01) /!< Parity error /
bogdanm	0:9b334a45a8ff	186	#define HAL_UART_ERROR_NE ((uint32_t)0x02) /!< Noise error /
bogdanm	0:9b334a45a8ff	187	#define HAL_UART_ERROR_FE ((uint32_t)0x04) /!< frame error /
bogdanm	0:9b334a45a8ff	188	#define HAL_UART_ERROR_ORE ((uint32_t)0x08) /!< Overrun error /
bogdanm	0:9b334a45a8ff	189	#define HAL_UART_ERROR_DMA ((uint32_t)0x10) /!< DMA transfer error /
bogdanm	0:9b334a45a8ff	190
bogdanm	0:9b334a45a8ff	191	/**
bogdanm	0:9b334a45a8ff	192	* @}
bogdanm	0:9b334a45a8ff	193	*/
bogdanm	0:9b334a45a8ff	194	/** @defgroup UART_Clock_SourceDefinition UART clock source definition
bogdanm	0:9b334a45a8ff	195	* @{
bogdanm	0:9b334a45a8ff	196	*/
bogdanm	0:9b334a45a8ff	197	/**
bogdanm	0:9b334a45a8ff	198	* @brief UART clock sources definition
bogdanm	0:9b334a45a8ff	199	*/
bogdanm	0:9b334a45a8ff	200	typedef enum
bogdanm	0:9b334a45a8ff	201	{
bogdanm	0:9b334a45a8ff	202	UART_CLOCKSOURCE_PCLK1 = 0x00, /!< PCLK1 clock source /
bogdanm	0:9b334a45a8ff	203	UART_CLOCKSOURCE_PCLK2 = 0x01, /!< PCLK2 clock source /
bogdanm	0:9b334a45a8ff	204	UART_CLOCKSOURCE_HSI = 0x02, /!< HSI clock source /
bogdanm	0:9b334a45a8ff	205	UART_CLOCKSOURCE_SYSCLK = 0x04, /!< SYSCLK clock source /
bogdanm	0:9b334a45a8ff	206	UART_CLOCKSOURCE_LSE = 0x08 /!< LSE clock source /
bogdanm	0:9b334a45a8ff	207	}UART_ClockSourceTypeDef;
bogdanm	0:9b334a45a8ff	208	/**
bogdanm	0:9b334a45a8ff	209	* @}
bogdanm	0:9b334a45a8ff	210	*/
bogdanm	0:9b334a45a8ff	211	/** @defgroup UART_handle_Definition Handle structure definition
bogdanm	0:9b334a45a8ff	212	* @{
bogdanm	0:9b334a45a8ff	213	*/
bogdanm	0:9b334a45a8ff	214	/**
bogdanm	0:9b334a45a8ff	215	* @brief UART handle Structure definition
bogdanm	0:9b334a45a8ff	216	*/
bogdanm	0:9b334a45a8ff	217
bogdanm	0:9b334a45a8ff	218	typedef struct
bogdanm	0:9b334a45a8ff	219	{
bogdanm	0:9b334a45a8ff	220	USART_TypeDef Instance; / UART registers base address */
bogdanm	0:9b334a45a8ff	221
bogdanm	0:9b334a45a8ff	222	UART_InitTypeDef Init; /* UART communication parameters */
bogdanm	0:9b334a45a8ff	223
bogdanm	0:9b334a45a8ff	224	UART_AdvFeatureInitTypeDef AdvancedInit; /* UART Advanced Features initialization parameters */
bogdanm	0:9b334a45a8ff	225
bogdanm	0:9b334a45a8ff	226	uint8_t pTxBuffPtr; / Pointer to UART Tx transfer Buffer */
bogdanm	0:9b334a45a8ff	227
bogdanm	0:9b334a45a8ff	228	uint16_t TxXferSize; /* UART Tx Transfer size */
bogdanm	0:9b334a45a8ff	229
bogdanm	0:9b334a45a8ff	230	uint16_t TxXferCount; /* UART Tx Transfer Counter */
bogdanm	0:9b334a45a8ff	231
bogdanm	0:9b334a45a8ff	232	uint8_t pRxBuffPtr; / Pointer to UART Rx transfer Buffer */
bogdanm	0:9b334a45a8ff	233
bogdanm	0:9b334a45a8ff	234	uint16_t RxXferSize; /* UART Rx Transfer size */
bogdanm	0:9b334a45a8ff	235
bogdanm	0:9b334a45a8ff	236	uint16_t RxXferCount; /* UART Rx Transfer Counter */
bogdanm	0:9b334a45a8ff	237
bogdanm	0:9b334a45a8ff	238	uint16_t Mask; /* UART Rx RDR register mask */
bogdanm	0:9b334a45a8ff	239
bogdanm	0:9b334a45a8ff	240	DMA_HandleTypeDef hdmatx; / UART Tx DMA Handle parameters */
bogdanm	0:9b334a45a8ff	241
bogdanm	0:9b334a45a8ff	242	DMA_HandleTypeDef hdmarx; / UART Rx DMA Handle parameters */
bogdanm	0:9b334a45a8ff	243
bogdanm	0:9b334a45a8ff	244	HAL_LockTypeDef Lock; /* Locking object */
bogdanm	0:9b334a45a8ff	245
bogdanm	0:9b334a45a8ff	246	__IO HAL_UART_StateTypeDef State; /* UART communication state */
bogdanm	0:9b334a45a8ff	247
bogdanm	0:9b334a45a8ff	248	__IO uint32_t ErrorCode; /* UART Error code */
bogdanm	0:9b334a45a8ff	249
bogdanm	0:9b334a45a8ff	250	}UART_HandleTypeDef;
bogdanm	0:9b334a45a8ff	251	/**
bogdanm	0:9b334a45a8ff	252	* @}
bogdanm	0:9b334a45a8ff	253	*/
bogdanm	0:9b334a45a8ff	254	/**
bogdanm	0:9b334a45a8ff	255	* @}
bogdanm	0:9b334a45a8ff	256	*/
bogdanm	0:9b334a45a8ff	257
bogdanm	0:9b334a45a8ff	258	/* Exported constants --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	259	/** @defgroup UART_Exported_Constants UART Exported Constants
bogdanm	0:9b334a45a8ff	260	* @{
bogdanm	0:9b334a45a8ff	261	*/
bogdanm	0:9b334a45a8ff	262
bogdanm	0:9b334a45a8ff	263	/** @defgroup UART_Stop_Bits UART stop bit definition
bogdanm	0:9b334a45a8ff	264	* @{
bogdanm	0:9b334a45a8ff	265	*/
mbed_official	113:b3775bf36a83	266	#define UART_STOPBITS_1 ((uint32_t)0x0000) /!< USART frame with 1 stop bit /
mbed_official	113:b3775bf36a83	267	#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 \| USART_CR2_STOP_1) /!< USART frame with 1.5 stop bits /
mbed_official	113:b3775bf36a83	268	#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /!< USART frame with 2 stop bits /
mbed_official	113:b3775bf36a83	269	#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) \|\| \
mbed_official	113:b3775bf36a83	270	((STOPBITS) == UART_STOPBITS_1_5) \|\| \
bogdanm	0:9b334a45a8ff	271	((STOPBITS) == UART_STOPBITS_2))
mbed_official	113:b3775bf36a83	272
mbed_official	113:b3775bf36a83	273	#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) \|\| \
mbed_official	113:b3775bf36a83	274	((__STOPBITS__) == UART_STOPBITS_2))
mbed_official	113:b3775bf36a83	275
bogdanm	0:9b334a45a8ff	276	/**
bogdanm	0:9b334a45a8ff	277	* @}
bogdanm	0:9b334a45a8ff	278	*/
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	/** @defgroup UART_Parity UART parity definition
bogdanm	0:9b334a45a8ff	281	* @{
bogdanm	0:9b334a45a8ff	282	*/
bogdanm	0:9b334a45a8ff	283	#define UART_PARITY_NONE ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	284	#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm	0:9b334a45a8ff	285	#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE \| USART_CR1_PS))
bogdanm	0:9b334a45a8ff	286	#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) \|\| \
bogdanm	0:9b334a45a8ff	287	((PARITY) == UART_PARITY_EVEN) \|\| \
bogdanm	0:9b334a45a8ff	288	((PARITY) == UART_PARITY_ODD))
bogdanm	0:9b334a45a8ff	289	/**
bogdanm	0:9b334a45a8ff	290	* @}
bogdanm	0:9b334a45a8ff	291	*/
bogdanm	0:9b334a45a8ff	292
bogdanm	0:9b334a45a8ff	293	/** @defgroup UART_Hardware_Flow_Control UART hardware flow control definition
bogdanm	0:9b334a45a8ff	294	* @{
bogdanm	0:9b334a45a8ff	295	*/
bogdanm	0:9b334a45a8ff	296	#define UART_HWCONTROL_NONE ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	297	#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
bogdanm	0:9b334a45a8ff	298	#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
bogdanm	0:9b334a45a8ff	299	#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE))
bogdanm	0:9b334a45a8ff	300	#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
bogdanm	0:9b334a45a8ff	301	(((CONTROL) == UART_HWCONTROL_NONE) \|\| \
bogdanm	0:9b334a45a8ff	302	((CONTROL) == UART_HWCONTROL_RTS) \|\| \
bogdanm	0:9b334a45a8ff	303	((CONTROL) == UART_HWCONTROL_CTS) \|\| \
bogdanm	0:9b334a45a8ff	304	((CONTROL) == UART_HWCONTROL_RTS_CTS))
bogdanm	0:9b334a45a8ff	305	/**
bogdanm	0:9b334a45a8ff	306	* @}
bogdanm	0:9b334a45a8ff	307	*/
bogdanm	0:9b334a45a8ff	308
bogdanm	0:9b334a45a8ff	309	/** @defgroup UART_Mode UART mode definition
bogdanm	0:9b334a45a8ff	310	* @{
bogdanm	0:9b334a45a8ff	311	*/
bogdanm	0:9b334a45a8ff	312	#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm	0:9b334a45a8ff	313	#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm	0:9b334a45a8ff	314	#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE \|USART_CR1_RE))
bogdanm	0:9b334a45a8ff	315	#define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
bogdanm	0:9b334a45a8ff	316	/**
bogdanm	0:9b334a45a8ff	317	* @}
bogdanm	0:9b334a45a8ff	318	*/
bogdanm	0:9b334a45a8ff	319
bogdanm	0:9b334a45a8ff	320	/** @defgroup UART_State UART state enable and disable definition
bogdanm	0:9b334a45a8ff	321	* @{
bogdanm	0:9b334a45a8ff	322	*/
bogdanm	0:9b334a45a8ff	323	#define UART_STATE_DISABLE ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	324	#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
bogdanm	0:9b334a45a8ff	325	#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	326	((STATE) == UART_STATE_ENABLE))
bogdanm	0:9b334a45a8ff	327	/**
bogdanm	0:9b334a45a8ff	328	* @}
bogdanm	0:9b334a45a8ff	329	*/
bogdanm	0:9b334a45a8ff	330
bogdanm	0:9b334a45a8ff	331	/** @defgroup UART_Over_Sampling UART over sampling definition
bogdanm	0:9b334a45a8ff	332	* @{
bogdanm	0:9b334a45a8ff	333	*/
bogdanm	0:9b334a45a8ff	334	#define UART_OVERSAMPLING_16 ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	335	#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
bogdanm	0:9b334a45a8ff	336	#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) \|\| \
bogdanm	0:9b334a45a8ff	337	((SAMPLING) == UART_OVERSAMPLING_8))
bogdanm	0:9b334a45a8ff	338	/**
bogdanm	0:9b334a45a8ff	339	* @}
bogdanm	0:9b334a45a8ff	340	*/
bogdanm	0:9b334a45a8ff	341
bogdanm	0:9b334a45a8ff	342
bogdanm	0:9b334a45a8ff	343	/** @defgroup UART_Receiver_TimeOut UART receiver timeOut definition
bogdanm	0:9b334a45a8ff	344	* @{
bogdanm	0:9b334a45a8ff	345	*/
bogdanm	0:9b334a45a8ff	346	#define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	347	#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
bogdanm	0:9b334a45a8ff	348	#define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	349	((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
bogdanm	0:9b334a45a8ff	350	/**
bogdanm	0:9b334a45a8ff	351	* @}
bogdanm	0:9b334a45a8ff	352	*/
bogdanm	0:9b334a45a8ff	353
bogdanm	0:9b334a45a8ff	354	/** @defgroup UART_LIN UART LIN enable and disable definition
bogdanm	0:9b334a45a8ff	355	* @{
bogdanm	0:9b334a45a8ff	356	*/
bogdanm	0:9b334a45a8ff	357	#define UART_LIN_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	358	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
bogdanm	0:9b334a45a8ff	359	#define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	360	((LIN) == UART_LIN_ENABLE))
bogdanm	0:9b334a45a8ff	361	/**
bogdanm	0:9b334a45a8ff	362	* @}
bogdanm	0:9b334a45a8ff	363	*/
bogdanm	0:9b334a45a8ff	364
bogdanm	0:9b334a45a8ff	365	/** @defgroup UART_LIN_Break_Detection UART LIN break detection definition
bogdanm	0:9b334a45a8ff	366	* @{
bogdanm	0:9b334a45a8ff	367	*/
bogdanm	0:9b334a45a8ff	368	#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	369	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
bogdanm	0:9b334a45a8ff	370	#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
bogdanm	0:9b334a45a8ff	371	((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
bogdanm	0:9b334a45a8ff	372	/**
bogdanm	0:9b334a45a8ff	373	* @}
bogdanm	0:9b334a45a8ff	374	*/
bogdanm	0:9b334a45a8ff	375
bogdanm	0:9b334a45a8ff	376
bogdanm	0:9b334a45a8ff	377
bogdanm	0:9b334a45a8ff	378	/** @defgroup UART_One_Bit UART one bit definition
bogdanm	0:9b334a45a8ff	379	* @{
bogdanm	0:9b334a45a8ff	380	*/
bogdanm	0:9b334a45a8ff	381	#define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	382	#define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
bogdanm	0:9b334a45a8ff	383	#define IS_UART_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	384	((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLE))
bogdanm	0:9b334a45a8ff	385	/**
bogdanm	0:9b334a45a8ff	386	* @}
bogdanm	0:9b334a45a8ff	387	*/
bogdanm	0:9b334a45a8ff	388
bogdanm	0:9b334a45a8ff	389	/** @defgroup UART_DMA_Tx UART DMA Tx definition
bogdanm	0:9b334a45a8ff	390	* @{
bogdanm	0:9b334a45a8ff	391	*/
bogdanm	0:9b334a45a8ff	392	#define UART_DMA_TX_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	393	#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
bogdanm	0:9b334a45a8ff	394	#define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	395	((DMATX) == UART_DMA_TX_ENABLE))
bogdanm	0:9b334a45a8ff	396	/**
bogdanm	0:9b334a45a8ff	397	* @}
bogdanm	0:9b334a45a8ff	398	*/
bogdanm	0:9b334a45a8ff	399
bogdanm	0:9b334a45a8ff	400	/** @defgroup UART_DMA_Rx UART DMA Rx definition
bogdanm	0:9b334a45a8ff	401	* @{
bogdanm	0:9b334a45a8ff	402	*/
bogdanm	0:9b334a45a8ff	403	#define UART_DMA_RX_DISABLE ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	404	#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
bogdanm	0:9b334a45a8ff	405	#define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	406	((DMARX) == UART_DMA_RX_ENABLE))
bogdanm	0:9b334a45a8ff	407	/**
bogdanm	0:9b334a45a8ff	408	* @}
bogdanm	0:9b334a45a8ff	409	*/
bogdanm	0:9b334a45a8ff	410
bogdanm	0:9b334a45a8ff	411	/** @defgroup UART_Half_Duplex_Selection UART half duplex selection definition
bogdanm	0:9b334a45a8ff	412	* @{
bogdanm	0:9b334a45a8ff	413	*/
bogdanm	0:9b334a45a8ff	414	#define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	415	#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
bogdanm	0:9b334a45a8ff	416	#define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	417	((HDSEL) == UART_HALF_DUPLEX_ENABLE))
bogdanm	0:9b334a45a8ff	418	/**
bogdanm	0:9b334a45a8ff	419	* @}
bogdanm	0:9b334a45a8ff	420	*/
bogdanm	0:9b334a45a8ff	421
bogdanm	0:9b334a45a8ff	422	/** @defgroup UART_Flags UART flags definition
bogdanm	0:9b334a45a8ff	423	* Elements values convention: 0xXXXX
bogdanm	0:9b334a45a8ff	424	* - 0xXXXX : Flag mask in the ISR register
bogdanm	0:9b334a45a8ff	425	* @{
bogdanm	0:9b334a45a8ff	426	*/
mbed_official	113:b3775bf36a83	427	#define UART_FLAG_REACK USART_ISR_REACK /!< Receive Enable Acknowledge Flag /
mbed_official	113:b3775bf36a83	428	#define UART_FLAG_TEACK USART_ISR_TEACK /!< Transmit Enable Acknowledge Flag /
mbed_official	113:b3775bf36a83	429	#define UART_FLAG_WUF USART_ISR_WUF /!< Wake Up from stop mode Flag /
mbed_official	113:b3775bf36a83	430	#define UART_FLAG_RWU USART_ISR_RWU /!< Receive Wake Up from mute mode Flag /
mbed_official	113:b3775bf36a83	431	#define UART_FLAG_SBKF USART_ISR_SBKF /!< Send Break Flag /
mbed_official	113:b3775bf36a83	432	#define UART_FLAG_CMF USART_ISR_CMF /!< Character Match Flag /
mbed_official	113:b3775bf36a83	433	#define UART_FLAG_BUSY USART_ISR_BUSY /!< Busy Flag /
mbed_official	113:b3775bf36a83	434	#define UART_FLAG_ABRF USART_ISR_ABRF /!< Auto-Baud Rate Flag /
mbed_official	113:b3775bf36a83	435	#define UART_FLAG_ABRE USART_ISR_ABRE /!< Auto-Baud Rate Error /
mbed_official	113:b3775bf36a83	436	#define UART_FLAG_EOBF USART_ISR_EOBF /!< End Of Block Flag /
mbed_official	113:b3775bf36a83	437	#define UART_FLAG_RTOF USART_ISR_RTOF /!< Receiver Time Out /
mbed_official	113:b3775bf36a83	438	#define UART_FLAG_CTS USART_ISR_CTS /!< CTS flag /
mbed_official	113:b3775bf36a83	439	#define UART_FLAG_CTSIF USART_ISR_CTSIF /!< CTS interrupt flag /
mbed_official	113:b3775bf36a83	440	#define UART_FLAG_LBDF USART_ISR_LBDF /!< LIN Break Detection Flag /
mbed_official	113:b3775bf36a83	441	#define UART_FLAG_TXE USART_ISR_TXE /!< Transmit Data Register Empty /
mbed_official	113:b3775bf36a83	442	#define UART_FLAG_TC USART_ISR_TC /!< Transmission Complete /
mbed_official	113:b3775bf36a83	443	#define UART_FLAG_RXNE USART_ISR_RXNE /!< Read Data Register Not Empty /
mbed_official	113:b3775bf36a83	444	#define UART_FLAG_IDLE USART_ISR_IDLE /!< IDLE line detected /
mbed_official	113:b3775bf36a83	445	#define UART_FLAG_ORE USART_ISR_ORE /!< OverRun Error /
mbed_official	113:b3775bf36a83	446	#define UART_FLAG_NE USART_ISR_NE /!< Noise detected Flag /
mbed_official	113:b3775bf36a83	447	#define UART_FLAG_FE USART_ISR_FE /!< Framing Error /
mbed_official	113:b3775bf36a83	448	#define UART_FLAG_PE USART_ISR_PE /!< Parity Error /
bogdanm	0:9b334a45a8ff	449	/**
bogdanm	0:9b334a45a8ff	450	* @}
bogdanm	0:9b334a45a8ff	451	*/
bogdanm	0:9b334a45a8ff	452
bogdanm	0:9b334a45a8ff	453	/** @defgroup UART_Interrupt_definition UART interrupt definition
bogdanm	0:9b334a45a8ff	454	* Elements values convention: 000ZZZZZ0XXYYYYYb
bogdanm	0:9b334a45a8ff	455	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	0:9b334a45a8ff	456	* - XX : Interrupt source register (2bits)
bogdanm	0:9b334a45a8ff	457	* - 01: CR1 register
bogdanm	0:9b334a45a8ff	458	* - 10: CR2 register
bogdanm	0:9b334a45a8ff	459	* - 11: CR3 register
bogdanm	0:9b334a45a8ff	460	* - ZZZZZ : Flag position in the ISR register(5bits)
bogdanm	0:9b334a45a8ff	461	* @{
bogdanm	0:9b334a45a8ff	462	*/
bogdanm	0:9b334a45a8ff	463	#define UART_IT_PE ((uint32_t)0x0028)
bogdanm	0:9b334a45a8ff	464	#define UART_IT_TXE ((uint32_t)0x0727)
bogdanm	0:9b334a45a8ff	465	#define UART_IT_TC ((uint32_t)0x0626)
bogdanm	0:9b334a45a8ff	466	#define UART_IT_RXNE ((uint32_t)0x0525)
bogdanm	0:9b334a45a8ff	467	#define UART_IT_IDLE ((uint32_t)0x0424)
bogdanm	0:9b334a45a8ff	468	#define UART_IT_LBD ((uint32_t)0x0846)
bogdanm	0:9b334a45a8ff	469	#define UART_IT_CTS ((uint32_t)0x096A)
bogdanm	0:9b334a45a8ff	470	#define UART_IT_CM ((uint32_t)0x112E)
bogdanm	0:9b334a45a8ff	471	#define UART_IT_WUF ((uint32_t)0x1476)
bogdanm	0:9b334a45a8ff	472
bogdanm	0:9b334a45a8ff	473	/** Elements values convention: 000000000XXYYYYYb
bogdanm	0:9b334a45a8ff	474	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	0:9b334a45a8ff	475	* - XX : Interrupt source register (2bits)
bogdanm	0:9b334a45a8ff	476	* - 01: CR1 register
bogdanm	0:9b334a45a8ff	477	* - 10: CR2 register
bogdanm	0:9b334a45a8ff	478	* - 11: CR3 register
bogdanm	0:9b334a45a8ff	479	*/
bogdanm	0:9b334a45a8ff	480	#define UART_IT_ERR ((uint32_t)0x0060)
bogdanm	0:9b334a45a8ff	481
bogdanm	0:9b334a45a8ff	482	/** Elements values convention: 0000ZZZZ00000000b
bogdanm	0:9b334a45a8ff	483	* - ZZZZ : Flag position in the ISR register(4bits)
bogdanm	0:9b334a45a8ff	484	*/
bogdanm	0:9b334a45a8ff	485	#define UART_IT_ORE ((uint32_t)0x0300)
bogdanm	0:9b334a45a8ff	486	#define UART_IT_NE ((uint32_t)0x0200)
bogdanm	0:9b334a45a8ff	487	#define UART_IT_FE ((uint32_t)0x0100)
bogdanm	0:9b334a45a8ff	488	/**
bogdanm	0:9b334a45a8ff	489	* @}
bogdanm	0:9b334a45a8ff	490	*/
bogdanm	0:9b334a45a8ff	491
bogdanm	0:9b334a45a8ff	492	/** @defgroup UART_IT_CLEAR_Flags UART interrupt clear flags definition
bogdanm	0:9b334a45a8ff	493	* @{
bogdanm	0:9b334a45a8ff	494	*/
bogdanm	0:9b334a45a8ff	495	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
bogdanm	0:9b334a45a8ff	496	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
bogdanm	0:9b334a45a8ff	497	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
bogdanm	0:9b334a45a8ff	498	#define UART_CLEAR_OREF USART_ICR_ORECF /!< OverRun Error Clear Flag /
bogdanm	0:9b334a45a8ff	499	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
bogdanm	0:9b334a45a8ff	500	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
bogdanm	0:9b334a45a8ff	501	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag /
bogdanm	0:9b334a45a8ff	502	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
bogdanm	0:9b334a45a8ff	503	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
bogdanm	0:9b334a45a8ff	504	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
bogdanm	0:9b334a45a8ff	505	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
bogdanm	0:9b334a45a8ff	506	#define UART_CLEAR_WUF USART_ICR_WUCF /!< Wake Up from stop mode Clear Flag /
bogdanm	0:9b334a45a8ff	507	/**
bogdanm	0:9b334a45a8ff	508	* @}
bogdanm	0:9b334a45a8ff	509	*/
bogdanm	0:9b334a45a8ff	510
bogdanm	0:9b334a45a8ff	511	/** @defgroup UART_Request_Parameters UART request parameter definition
bogdanm	0:9b334a45a8ff	512	* @{
bogdanm	0:9b334a45a8ff	513	*/
bogdanm	0:9b334a45a8ff	514	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
bogdanm	0:9b334a45a8ff	515	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
bogdanm	0:9b334a45a8ff	516	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
bogdanm	0:9b334a45a8ff	517	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
bogdanm	0:9b334a45a8ff	518	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
bogdanm	0:9b334a45a8ff	519	#define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	520	((PARAM) == UART_SENDBREAK_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	521	((PARAM) == UART_MUTE_MODE_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	522	((PARAM) == UART_RXDATA_FLUSH_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	523	((PARAM) == UART_TXDATA_FLUSH_REQUEST))
bogdanm	0:9b334a45a8ff	524	/**
bogdanm	0:9b334a45a8ff	525	* @}
bogdanm	0:9b334a45a8ff	526	*/
bogdanm	0:9b334a45a8ff	527
bogdanm	0:9b334a45a8ff	528	/** @defgroup UART_Advanced_Features_Initialization_Type UART advanced features initialization type definition
bogdanm	0:9b334a45a8ff	529	* @{
bogdanm	0:9b334a45a8ff	530	*/
bogdanm	0:9b334a45a8ff	531	#define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	532	#define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001)
bogdanm	0:9b334a45a8ff	533	#define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002)
bogdanm	0:9b334a45a8ff	534	#define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004)
bogdanm	0:9b334a45a8ff	535	#define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008)
bogdanm	0:9b334a45a8ff	536	#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010)
bogdanm	0:9b334a45a8ff	537	#define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020)
bogdanm	0:9b334a45a8ff	538	#define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040)
bogdanm	0:9b334a45a8ff	539	#define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080)
bogdanm	0:9b334a45a8ff	540	#define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT \| \
bogdanm	0:9b334a45a8ff	541	UART_ADVFEATURE_TXINVERT_INIT \| \
bogdanm	0:9b334a45a8ff	542	UART_ADVFEATURE_RXINVERT_INIT \| \
bogdanm	0:9b334a45a8ff	543	UART_ADVFEATURE_DATAINVERT_INIT \| \
bogdanm	0:9b334a45a8ff	544	UART_ADVFEATURE_SWAP_INIT \| \
bogdanm	0:9b334a45a8ff	545	UART_ADVFEATURE_RXOVERRUNDISABLE_INIT \| \
bogdanm	0:9b334a45a8ff	546	UART_ADVFEATURE_DMADISABLEONERROR_INIT \| \
bogdanm	0:9b334a45a8ff	547	UART_ADVFEATURE_AUTOBAUDRATE_INIT \| \
bogdanm	0:9b334a45a8ff	548	UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm	0:9b334a45a8ff	549	/**
bogdanm	0:9b334a45a8ff	550	* @}
bogdanm	0:9b334a45a8ff	551	*/
bogdanm	0:9b334a45a8ff	552
bogdanm	0:9b334a45a8ff	553	/** @defgroup UART_Tx_Inv UART advanced Tx inv activation definition
bogdanm	0:9b334a45a8ff	554	* @{
bogdanm	0:9b334a45a8ff	555	*/
bogdanm	0:9b334a45a8ff	556	#define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	557	#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
bogdanm	0:9b334a45a8ff	558	#define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	559	((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
bogdanm	0:9b334a45a8ff	560	/**
bogdanm	0:9b334a45a8ff	561	* @}
bogdanm	0:9b334a45a8ff	562	*/
bogdanm	0:9b334a45a8ff	563
bogdanm	0:9b334a45a8ff	564	/** @defgroup UART_Rx_Inv UART advanced Rx inv activation definition
bogdanm	0:9b334a45a8ff	565	* @{
bogdanm	0:9b334a45a8ff	566	*/
bogdanm	0:9b334a45a8ff	567	#define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	568	#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
bogdanm	0:9b334a45a8ff	569	#define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	570	((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
bogdanm	0:9b334a45a8ff	571	/**
bogdanm	0:9b334a45a8ff	572	* @}
bogdanm	0:9b334a45a8ff	573	*/
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575	/** @defgroup UART_Data_Inv UART advanced data inv activation definition
bogdanm	0:9b334a45a8ff	576	* @{
bogdanm	0:9b334a45a8ff	577	*/
bogdanm	0:9b334a45a8ff	578	#define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	579	#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
bogdanm	0:9b334a45a8ff	580	#define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	581	((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
bogdanm	0:9b334a45a8ff	582	/**
bogdanm	0:9b334a45a8ff	583	* @}
bogdanm	0:9b334a45a8ff	584	*/
bogdanm	0:9b334a45a8ff	585
bogdanm	0:9b334a45a8ff	586	/** @defgroup UART_Rx_Tx_Swap UART advanced swap activation definition
bogdanm	0:9b334a45a8ff	587	* @{
bogdanm	0:9b334a45a8ff	588	*/
bogdanm	0:9b334a45a8ff	589	#define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	590	#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
bogdanm	0:9b334a45a8ff	591	#define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	592	((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
bogdanm	0:9b334a45a8ff	593	/**
bogdanm	0:9b334a45a8ff	594	* @}
bogdanm	0:9b334a45a8ff	595	*/
bogdanm	0:9b334a45a8ff	596
bogdanm	0:9b334a45a8ff	597	/** @defgroup UART_Overrun_Disable UART advanced overrun activation definition
bogdanm	0:9b334a45a8ff	598	* @{
bogdanm	0:9b334a45a8ff	599	*/
bogdanm	0:9b334a45a8ff	600	#define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	601	#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
bogdanm	0:9b334a45a8ff	602	#define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) \|\| \
bogdanm	0:9b334a45a8ff	603	((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
bogdanm	0:9b334a45a8ff	604	/**
bogdanm	0:9b334a45a8ff	605	* @}
bogdanm	0:9b334a45a8ff	606	*/
bogdanm	0:9b334a45a8ff	607
bogdanm	0:9b334a45a8ff	608	/** @defgroup UART_AutoBaudRate_Enable UART advanced auto baud rate activation definition
bogdanm	0:9b334a45a8ff	609	* @{
bogdanm	0:9b334a45a8ff	610	*/
bogdanm	0:9b334a45a8ff	611	#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	612	#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
bogdanm	0:9b334a45a8ff	613	#define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	614	((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
bogdanm	0:9b334a45a8ff	615	/**
bogdanm	0:9b334a45a8ff	616	* @}
bogdanm	0:9b334a45a8ff	617	*/
bogdanm	0:9b334a45a8ff	618
bogdanm	0:9b334a45a8ff	619	/** @defgroup UART_DMA_Disable_on_Rx_Error UART advanced DMA on Rx error activation definition
bogdanm	0:9b334a45a8ff	620	* @{
bogdanm	0:9b334a45a8ff	621	*/
bogdanm	0:9b334a45a8ff	622	#define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	623	#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
bogdanm	0:9b334a45a8ff	624	#define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) \|\| \
bogdanm	0:9b334a45a8ff	625	((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
bogdanm	0:9b334a45a8ff	626	/**
bogdanm	0:9b334a45a8ff	627	* @}
bogdanm	0:9b334a45a8ff	628	*/
bogdanm	0:9b334a45a8ff	629
bogdanm	0:9b334a45a8ff	630	/** @defgroup UART_MSB_First UART advanced MSB first activation definition
bogdanm	0:9b334a45a8ff	631	* @{
bogdanm	0:9b334a45a8ff	632	*/
bogdanm	0:9b334a45a8ff	633	#define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	634	#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
bogdanm	0:9b334a45a8ff	635	#define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	636	((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
bogdanm	0:9b334a45a8ff	637	/**
bogdanm	0:9b334a45a8ff	638	* @}
bogdanm	0:9b334a45a8ff	639	*/
bogdanm	0:9b334a45a8ff	640
bogdanm	0:9b334a45a8ff	641	/** @defgroup UART_Stop_Mode_Enable UART advanced stop mode activation definition
bogdanm	0:9b334a45a8ff	642	* @{
bogdanm	0:9b334a45a8ff	643	*/
bogdanm	0:9b334a45a8ff	644	#define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	645	#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM)
bogdanm	0:9b334a45a8ff	646	#define IS_UART_ADVFEATURE_STOPMODE(STOPMODE) (((STOPMODE) == UART_ADVFEATURE_STOPMODE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	647	((STOPMODE) == UART_ADVFEATURE_STOPMODE_ENABLE))
bogdanm	0:9b334a45a8ff	648	/**
bogdanm	0:9b334a45a8ff	649	* @}
bogdanm	0:9b334a45a8ff	650	*/
bogdanm	0:9b334a45a8ff	651
bogdanm	0:9b334a45a8ff	652	/** @defgroup UART_Mute_Mode UART advanced mute mode activation definition
bogdanm	0:9b334a45a8ff	653	* @{
bogdanm	0:9b334a45a8ff	654	*/
bogdanm	0:9b334a45a8ff	655	#define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	656	#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
bogdanm	0:9b334a45a8ff	657	#define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	658	((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
bogdanm	0:9b334a45a8ff	659	/**
bogdanm	0:9b334a45a8ff	660	* @}
bogdanm	0:9b334a45a8ff	661	*/
bogdanm	0:9b334a45a8ff	662
bogdanm	0:9b334a45a8ff	663	/** @defgroup UART_CR2_ADDRESS_LSBPOS UART CR2 address lsb position definition
bogdanm	0:9b334a45a8ff	664	* @{
bogdanm	0:9b334a45a8ff	665	*/
bogdanm	0:9b334a45a8ff	666	#define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24)
bogdanm	0:9b334a45a8ff	667	/**
bogdanm	0:9b334a45a8ff	668	* @}
bogdanm	0:9b334a45a8ff	669	*/
bogdanm	0:9b334a45a8ff	670
bogdanm	0:9b334a45a8ff	671	/** @defgroup UART_WakeUp_from_Stop_Selection UART wake up mode selection definition
bogdanm	0:9b334a45a8ff	672	* @{
bogdanm	0:9b334a45a8ff	673	*/
bogdanm	0:9b334a45a8ff	674	#define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x0000)
bogdanm	0:9b334a45a8ff	675	#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1)
bogdanm	0:9b334a45a8ff	676	#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS)
bogdanm	0:9b334a45a8ff	677	#define IS_UART_WAKEUP_SELECTION(WAKE) (((WAKE) == UART_WAKEUP_ON_ADDRESS) \|\| \
bogdanm	0:9b334a45a8ff	678	((WAKE) == UART_WAKEUP_ON_STARTBIT) \|\| \
bogdanm	0:9b334a45a8ff	679	((WAKE) == UART_WAKEUP_ON_READDATA_NONEMPTY))
bogdanm	0:9b334a45a8ff	680	/**
bogdanm	0:9b334a45a8ff	681	* @}
bogdanm	0:9b334a45a8ff	682	*/
bogdanm	0:9b334a45a8ff	683
bogdanm	0:9b334a45a8ff	684	/** @defgroup UART_DriverEnable_Polarity UART driver polarity level definition
bogdanm	0:9b334a45a8ff	685	* @{
bogdanm	0:9b334a45a8ff	686	*/
bogdanm	0:9b334a45a8ff	687	#define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	688	#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
bogdanm	0:9b334a45a8ff	689	#define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) \|\| \
bogdanm	0:9b334a45a8ff	690	((POLARITY) == UART_DE_POLARITY_LOW))
bogdanm	0:9b334a45a8ff	691	/**
bogdanm	0:9b334a45a8ff	692	* @}
bogdanm	0:9b334a45a8ff	693	*/
bogdanm	0:9b334a45a8ff	694
bogdanm	0:9b334a45a8ff	695	/** @defgroup UART_CR1_DEAT_ADDRESS_LSBPOS UART CR1 DEAT address lsb position definition
bogdanm	0:9b334a45a8ff	696	* @{
bogdanm	0:9b334a45a8ff	697	*/
bogdanm	0:9b334a45a8ff	698	#define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21)
bogdanm	0:9b334a45a8ff	699	/**
bogdanm	0:9b334a45a8ff	700	* @}
bogdanm	0:9b334a45a8ff	701	*/
bogdanm	0:9b334a45a8ff	702
bogdanm	0:9b334a45a8ff	703	/** @defgroup UART_CR1_DEDT_ADDRESS_LSBPOS UART CR1 DEDT address lsb position definition
bogdanm	0:9b334a45a8ff	704	* @{
bogdanm	0:9b334a45a8ff	705	*/
bogdanm	0:9b334a45a8ff	706	#define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16)
bogdanm	0:9b334a45a8ff	707	/**
bogdanm	0:9b334a45a8ff	708	* @}
bogdanm	0:9b334a45a8ff	709	*/
bogdanm	0:9b334a45a8ff	710
bogdanm	0:9b334a45a8ff	711	/** @defgroup UART_Interruption_Mask UART interruption mask definition
bogdanm	0:9b334a45a8ff	712	* @{
bogdanm	0:9b334a45a8ff	713	*/
bogdanm	0:9b334a45a8ff	714	#define UART_IT_MASK ((uint32_t)0x001F)
bogdanm	0:9b334a45a8ff	715	/**
bogdanm	0:9b334a45a8ff	716	* @}
bogdanm	0:9b334a45a8ff	717	*/
bogdanm	0:9b334a45a8ff	718
bogdanm	0:9b334a45a8ff	719	/**
bogdanm	0:9b334a45a8ff	720	* @}
bogdanm	0:9b334a45a8ff	721	*/
bogdanm	0:9b334a45a8ff	722
bogdanm	0:9b334a45a8ff	723	/* Exported macro ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	724	/** @defgroup UART_Exported_Macros UART Exported Macros
bogdanm	0:9b334a45a8ff	725	* @{
bogdanm	0:9b334a45a8ff	726	*/
bogdanm	0:9b334a45a8ff	727
bogdanm	0:9b334a45a8ff	728	/** @brief Reset UART handle state
bogdanm	0:9b334a45a8ff	729	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	730	* The Handle Instance which can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	731	* @retval None
bogdanm	0:9b334a45a8ff	732	*/
bogdanm	0:9b334a45a8ff	733	#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	734
bogdanm	0:9b334a45a8ff	735	/** @brief Flush the UART Data registers
bogdanm	0:9b334a45a8ff	736	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	737	*/
bogdanm	0:9b334a45a8ff	738	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
bogdanm	0:9b334a45a8ff	739	do{ \
bogdanm	0:9b334a45a8ff	740	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
bogdanm	0:9b334a45a8ff	741	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
bogdanm	0:9b334a45a8ff	742	} while(0)
bogdanm	0:9b334a45a8ff	743
bogdanm	0:9b334a45a8ff	744
bogdanm	0:9b334a45a8ff	745	/** @brief Clears the specified UART pending flag.
bogdanm	0:9b334a45a8ff	746	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	747	* @param __FLAG__: specifies the flag to check.
bogdanm	0:9b334a45a8ff	748	* This parameter can be any combination of the following values:
bogdanm	0:9b334a45a8ff	749	* @arg UART_CLEAR_PEF
bogdanm	0:9b334a45a8ff	750	* @arg UART_CLEAR_FEF
bogdanm	0:9b334a45a8ff	751	* @arg UART_CLEAR_NEF
bogdanm	0:9b334a45a8ff	752	* @arg UART_CLEAR_OREF
bogdanm	0:9b334a45a8ff	753	* @arg UART_CLEAR_IDLEF
bogdanm	0:9b334a45a8ff	754	* @arg UART_CLEAR_TCF
bogdanm	0:9b334a45a8ff	755	* @arg UART_CLEAR_LBDF
bogdanm	0:9b334a45a8ff	756	* @arg UART_CLEAR_CTSF
bogdanm	0:9b334a45a8ff	757	* @arg UART_CLEAR_RTOF
bogdanm	0:9b334a45a8ff	758	* @arg UART_CLEAR_EOBF
bogdanm	0:9b334a45a8ff	759	* @arg UART_CLEAR_CMF
bogdanm	0:9b334a45a8ff	760	* @arg UART_CLEAR_WUF
bogdanm	0:9b334a45a8ff	761	* @retval None
bogdanm	0:9b334a45a8ff	762	*/
mbed_official	113:b3775bf36a83	763	#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
mbed_official	113:b3775bf36a83	764
bogdanm	0:9b334a45a8ff	765
bogdanm	0:9b334a45a8ff	766	/** @brief Clear the UART PE pending flag.
bogdanm	0:9b334a45a8ff	767	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	768	* @retval None
bogdanm	0:9b334a45a8ff	769	*/
bogdanm	0:9b334a45a8ff	770	#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_PEF)
bogdanm	0:9b334a45a8ff	771
bogdanm	0:9b334a45a8ff	772	/** @brief Clear the UART FE pending flag.
bogdanm	0:9b334a45a8ff	773	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	774	* @retval None
bogdanm	0:9b334a45a8ff	775	*/
bogdanm	0:9b334a45a8ff	776	#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_FEF)
bogdanm	0:9b334a45a8ff	777
bogdanm	0:9b334a45a8ff	778	/** @brief Clear the UART NE pending flag.
bogdanm	0:9b334a45a8ff	779	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	780	* @retval None
bogdanm	0:9b334a45a8ff	781	*/
bogdanm	0:9b334a45a8ff	782	#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_NEF)
bogdanm	0:9b334a45a8ff	783
bogdanm	0:9b334a45a8ff	784	/** @brief Clear the UART ORE pending flag.
bogdanm	0:9b334a45a8ff	785	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	786	* @retval None
bogdanm	0:9b334a45a8ff	787	*/
bogdanm	0:9b334a45a8ff	788	#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_OREF)
bogdanm	0:9b334a45a8ff	789
bogdanm	0:9b334a45a8ff	790	/** @brief Clear the UART IDLE pending flag.
bogdanm	0:9b334a45a8ff	791	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	792	* @retval None
bogdanm	0:9b334a45a8ff	793	*/
bogdanm	0:9b334a45a8ff	794	#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_IDLEF)
bogdanm	0:9b334a45a8ff	795
bogdanm	0:9b334a45a8ff	796	/** @brief Checks whether the specified UART flag is set or not.
bogdanm	0:9b334a45a8ff	797	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	798	* This parameter can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	799	* @param __FLAG__: specifies the flag to check.
bogdanm	0:9b334a45a8ff	800	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	801	* @arg UART_FLAG_REACK: Receive enable ackowledge flag
bogdanm	0:9b334a45a8ff	802	* @arg UART_FLAG_TEACK: Transmit enable ackowledge flag
bogdanm	0:9b334a45a8ff	803	* @arg UART_FLAG_WUF: Wake up from stop mode flag
bogdanm	0:9b334a45a8ff	804	* @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
bogdanm	0:9b334a45a8ff	805	* @arg UART_FLAG_SBKF: Send Break flag
bogdanm	0:9b334a45a8ff	806	* @arg UART_FLAG_CMF: Character match flag
bogdanm	0:9b334a45a8ff	807	* @arg UART_FLAG_BUSY: Busy flag
bogdanm	0:9b334a45a8ff	808	* @arg UART_FLAG_ABRF: Auto Baud rate detection flag
bogdanm	0:9b334a45a8ff	809	* @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
bogdanm	0:9b334a45a8ff	810	* @arg UART_FLAG_EOBF: End of block flag
bogdanm	0:9b334a45a8ff	811	* @arg UART_FLAG_RTOF: Receiver timeout flag
bogdanm	0:9b334a45a8ff	812	* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
bogdanm	0:9b334a45a8ff	813	* @arg UART_FLAG_LBD: LIN Break detection flag
bogdanm	0:9b334a45a8ff	814	* @arg UART_FLAG_TXE: Transmit data register empty flag
bogdanm	0:9b334a45a8ff	815	* @arg UART_FLAG_TC: Transmission Complete flag
bogdanm	0:9b334a45a8ff	816	* @arg UART_FLAG_RXNE: Receive data register not empty flag
bogdanm	0:9b334a45a8ff	817	* @arg UART_FLAG_IDLE: Idle Line detection flag
bogdanm	0:9b334a45a8ff	818	* @arg UART_FLAG_ORE: OverRun Error flag
bogdanm	0:9b334a45a8ff	819	* @arg UART_FLAG_NE: Noise Error flag
bogdanm	0:9b334a45a8ff	820	* @arg UART_FLAG_FE: Framing Error flag
bogdanm	0:9b334a45a8ff	821	* @arg UART_FLAG_PE: Parity Error flag
bogdanm	0:9b334a45a8ff	822	* @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	823	*/
bogdanm	0:9b334a45a8ff	824	#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
bogdanm	0:9b334a45a8ff	825
bogdanm	0:9b334a45a8ff	826	/** @brief Enables the specified UART interrupt.
bogdanm	0:9b334a45a8ff	827	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	828	* This parameter can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	829	* @param __INTERRUPT__: specifies the UART interrupt source to enable.
bogdanm	0:9b334a45a8ff	830	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	831	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm	0:9b334a45a8ff	832	* @arg UART_IT_CM: Character match interrupt
bogdanm	0:9b334a45a8ff	833	* @arg UART_IT_CTS: CTS change interrupt
bogdanm	0:9b334a45a8ff	834	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	835	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	836	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	837	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	838	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	839	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	840	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm	0:9b334a45a8ff	841	* @retval None
bogdanm	0:9b334a45a8ff	842	*/
bogdanm	0:9b334a45a8ff	843	#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 \|= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	844	((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 \|= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	845	((__HANDLE__)->Instance->CR3 \|= (1 << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm	0:9b334a45a8ff	846
bogdanm	0:9b334a45a8ff	847	/** @brief Disables the specified UART interrupt.
bogdanm	0:9b334a45a8ff	848	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	849	* This parameter can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	850	* @param __INTERRUPT__: specifies the UART interrupt source to disable.
bogdanm	0:9b334a45a8ff	851	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	852	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm	0:9b334a45a8ff	853	* @arg UART_IT_CM: Character match interrupt
bogdanm	0:9b334a45a8ff	854	* @arg UART_IT_CTS: CTS change interrupt
bogdanm	0:9b334a45a8ff	855	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	856	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	857	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	858	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	859	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	860	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	861	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm	0:9b334a45a8ff	862	* @retval None
bogdanm	0:9b334a45a8ff	863	*/
bogdanm	0:9b334a45a8ff	864	#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	865	((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm	0:9b334a45a8ff	866	((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm	0:9b334a45a8ff	867
bogdanm	0:9b334a45a8ff	868	/** @brief Checks whether the specified UART interrupt has occurred or not.
bogdanm	0:9b334a45a8ff	869	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	870	* This parameter can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	871	* @param __IT__: specifies the UART interrupt to check.
bogdanm	0:9b334a45a8ff	872	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	873	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm	0:9b334a45a8ff	874	* @arg UART_IT_CM: Character match interrupt
bogdanm	0:9b334a45a8ff	875	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm	0:9b334a45a8ff	876	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	877	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	878	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	879	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	880	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	881	* @arg UART_IT_ORE: OverRun Error interrupt
bogdanm	0:9b334a45a8ff	882	* @arg UART_IT_NE: Noise Error interrupt
bogdanm	0:9b334a45a8ff	883	* @arg UART_IT_FE: Framing Error interrupt
bogdanm	0:9b334a45a8ff	884	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	885	* @retval The new state of __IT__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	886	*/
bogdanm	0:9b334a45a8ff	887	#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
bogdanm	0:9b334a45a8ff	888
bogdanm	0:9b334a45a8ff	889	/** @brief Checks whether the specified UART interrupt source is enabled.
bogdanm	0:9b334a45a8ff	890	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	891	* This parameter can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	892	* @param __IT__: specifies the UART interrupt source to check.
bogdanm	0:9b334a45a8ff	893	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	894	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm	0:9b334a45a8ff	895	* @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm	0:9b334a45a8ff	896	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm	0:9b334a45a8ff	897	* @arg UART_IT_TC: Transmission complete interrupt
bogdanm	0:9b334a45a8ff	898	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm	0:9b334a45a8ff	899	* @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm	0:9b334a45a8ff	900	* @arg UART_IT_ORE: OverRun Error interrupt
bogdanm	0:9b334a45a8ff	901	* @arg UART_IT_NE: Noise Error interrupt
bogdanm	0:9b334a45a8ff	902	* @arg UART_IT_FE: Framing Error interrupt
bogdanm	0:9b334a45a8ff	903	* @arg UART_IT_PE: Parity Error interrupt
bogdanm	0:9b334a45a8ff	904	* @retval The new state of __IT__ (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	905	*/
bogdanm	0:9b334a45a8ff	906	#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
bogdanm	0:9b334a45a8ff	907	(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
bogdanm	0:9b334a45a8ff	908
bogdanm	0:9b334a45a8ff	909	/** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
bogdanm	0:9b334a45a8ff	910	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	911	* This parameter can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	912	* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
bogdanm	0:9b334a45a8ff	913	* to clear the corresponding interrupt
bogdanm	0:9b334a45a8ff	914	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	915	* @arg UART_CLEAR_PEF: Parity Error Clear Flag
bogdanm	0:9b334a45a8ff	916	* @arg UART_CLEAR_FEF: Framing Error Clear Flag
bogdanm	0:9b334a45a8ff	917	* @arg UART_CLEAR_NEF: Noise detected Clear Flag
bogdanm	0:9b334a45a8ff	918	* @arg UART_CLEAR_OREF: OverRun Error Clear Flag
bogdanm	0:9b334a45a8ff	919	* @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
bogdanm	0:9b334a45a8ff	920	* @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
bogdanm	0:9b334a45a8ff	921	* @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
bogdanm	0:9b334a45a8ff	922	* @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
bogdanm	0:9b334a45a8ff	923	* @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
bogdanm	0:9b334a45a8ff	924	* @arg UART_CLEAR_EOBF: End Of Block Clear Flag
bogdanm	0:9b334a45a8ff	925	* @arg UART_CLEAR_CMF: Character Match Clear Flag
bogdanm	0:9b334a45a8ff	926	* @arg UART_CLEAR_WUF: Wake Up from stop mode Clear Flag
bogdanm	0:9b334a45a8ff	927	* @retval None
bogdanm	0:9b334a45a8ff	928	*/
bogdanm	0:9b334a45a8ff	929	#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
bogdanm	0:9b334a45a8ff	930
bogdanm	0:9b334a45a8ff	931	/** @brief Set a specific UART request flag.
bogdanm	0:9b334a45a8ff	932	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	933	* This parameter can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	934	* @param __REQ__: specifies the request flag to set
bogdanm	0:9b334a45a8ff	935	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	936	* @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
bogdanm	0:9b334a45a8ff	937	* @arg UART_SENDBREAK_REQUEST: Send Break Request
bogdanm	0:9b334a45a8ff	938	* @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
bogdanm	0:9b334a45a8ff	939	* @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
bogdanm	0:9b334a45a8ff	940	* @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
bogdanm	0:9b334a45a8ff	941	* @retval None
bogdanm	0:9b334a45a8ff	942	*/
bogdanm	0:9b334a45a8ff	943	#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR \|= (uint32_t)(__REQ__))
bogdanm	0:9b334a45a8ff	944
bogdanm	0:9b334a45a8ff	945	/** @brief Enables the UART one bit sample method
bogdanm	0:9b334a45a8ff	946	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	947	* @retval None
bogdanm	0:9b334a45a8ff	948	*/
bogdanm	0:9b334a45a8ff	949	#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
bogdanm	0:9b334a45a8ff	950
bogdanm	0:9b334a45a8ff	951	/** @brief Disables the UART one bit sample method
bogdanm	0:9b334a45a8ff	952	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	953	* @retval None
bogdanm	0:9b334a45a8ff	954	*/
bogdanm	0:9b334a45a8ff	955	#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
bogdanm	0:9b334a45a8ff	956
bogdanm	0:9b334a45a8ff	957	/** @brief Enable UART
bogdanm	0:9b334a45a8ff	958	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	959	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	960	* @retval None
bogdanm	0:9b334a45a8ff	961	*/
bogdanm	0:9b334a45a8ff	962	#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= USART_CR1_UE)
bogdanm	0:9b334a45a8ff	963
bogdanm	0:9b334a45a8ff	964	/** @brief Disable UART
bogdanm	0:9b334a45a8ff	965	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	966	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	967	* @retval None
bogdanm	0:9b334a45a8ff	968	*/
bogdanm	0:9b334a45a8ff	969	#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm	0:9b334a45a8ff	970
bogdanm	0:9b334a45a8ff	971	/** @brief Enable CTS flow control
bogdanm	0:9b334a45a8ff	972	* This macro allows to enable CTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	973	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	974	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	975	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	976	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	977	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	978	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	979	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	980	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	981	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	982	* @retval None
bogdanm	0:9b334a45a8ff	983	*/
bogdanm	0:9b334a45a8ff	984	#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	985	do{ \
bogdanm	0:9b334a45a8ff	986	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm	0:9b334a45a8ff	987	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_CTSE; \
bogdanm	0:9b334a45a8ff	988	} while(0)
bogdanm	0:9b334a45a8ff	989
bogdanm	0:9b334a45a8ff	990	/** @brief Disable CTS flow control
bogdanm	0:9b334a45a8ff	991	* This macro allows to disable CTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	992	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	993	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	994	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	995	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	996	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	997	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	998	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	999	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	1000	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	1001	* @retval None
bogdanm	0:9b334a45a8ff	1002	*/
bogdanm	0:9b334a45a8ff	1003	#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	1004	do{ \
bogdanm	0:9b334a45a8ff	1005	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm	0:9b334a45a8ff	1006	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
bogdanm	0:9b334a45a8ff	1007	} while(0)
bogdanm	0:9b334a45a8ff	1008
bogdanm	0:9b334a45a8ff	1009	/** @brief Enable RTS flow control
bogdanm	0:9b334a45a8ff	1010	* This macro allows to enable RTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	1011	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	1012	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	1013	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	1014	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	1015	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	1016	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	1017	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	1018	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	1019	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	1020	* @retval None
bogdanm	0:9b334a45a8ff	1021	*/
bogdanm	0:9b334a45a8ff	1022	#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	1023	do{ \
bogdanm	0:9b334a45a8ff	1024	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
bogdanm	0:9b334a45a8ff	1025	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_RTSE; \
bogdanm	0:9b334a45a8ff	1026	} while(0)
bogdanm	0:9b334a45a8ff	1027
bogdanm	0:9b334a45a8ff	1028	/** @brief Disable RTS flow control
bogdanm	0:9b334a45a8ff	1029	* This macro allows to disable RTS hardware flow control for a given UART instance,
bogdanm	0:9b334a45a8ff	1030	* without need to call HAL_UART_Init() function.
bogdanm	0:9b334a45a8ff	1031	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm	0:9b334a45a8ff	1032	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm	0:9b334a45a8ff	1033	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm	0:9b334a45a8ff	1034	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm	0:9b334a45a8ff	1035	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm	0:9b334a45a8ff	1036	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm	0:9b334a45a8ff	1037	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	1038	* The Handle Instance can be USART1, USART2 or LPUART.
bogdanm	0:9b334a45a8ff	1039	* @retval None
bogdanm	0:9b334a45a8ff	1040	*/
bogdanm	0:9b334a45a8ff	1041	#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
bogdanm	0:9b334a45a8ff	1042	do{ \
bogdanm	0:9b334a45a8ff	1043	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
bogdanm	0:9b334a45a8ff	1044	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
bogdanm	0:9b334a45a8ff	1045	} while(0)
bogdanm	0:9b334a45a8ff	1046
mbed_official	113:b3775bf36a83	1047	/** @brief macros to enable the UART's one bit sampling method
bogdanm	0:9b334a45a8ff	1048	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	1049	* @retval None
bogdanm	0:9b334a45a8ff	1050	*/
bogdanm	0:9b334a45a8ff	1051	#define __HAL_UART_ONE_BIT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
mbed_official	113:b3775bf36a83	1052
mbed_official	113:b3775bf36a83	1053	/** @brief macros to disable the UART's one bit sampling method
mbed_official	113:b3775bf36a83	1054	* @param __HANDLE__: specifies the UART Handle.
mbed_official	113:b3775bf36a83	1055	* @retval None
mbed_official	113:b3775bf36a83	1056	*/
bogdanm	0:9b334a45a8ff	1057	#define __HAL_UART_ONE_BIT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
bogdanm	0:9b334a45a8ff	1058
bogdanm	0:9b334a45a8ff	1059
bogdanm	0:9b334a45a8ff	1060	/** @brief BRR division operation to set BRR register with LPUART
bogdanm	0:9b334a45a8ff	1061	* @param _PCLK_: LPUART clock
bogdanm	0:9b334a45a8ff	1062	* @param _BAUD_: Baud rate set by the user
bogdanm	0:9b334a45a8ff	1063	* @retval Division result
bogdanm	0:9b334a45a8ff	1064	*/
mbed_official	113:b3775bf36a83	1065	#define __DIV_LPUART(_PCLK_, _BAUD_) ((uint32_t)(((((uint64_t)_PCLK_)*256.0))/(((uint64_t)_BAUD_))))
mbed_official	113:b3775bf36a83	1066
bogdanm	0:9b334a45a8ff	1067	/** @brief BRR division operation to set BRR register in 8-bit oversampling mode
bogdanm	0:9b334a45a8ff	1068	* @param _PCLK_: UART clock
bogdanm	0:9b334a45a8ff	1069	* @param _BAUD_: Baud rate set by the user
bogdanm	0:9b334a45a8ff	1070	* @retval Division result
bogdanm	0:9b334a45a8ff	1071	*/
bogdanm	0:9b334a45a8ff	1072	#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*2)/((_BAUD_)))
bogdanm	0:9b334a45a8ff	1073
bogdanm	0:9b334a45a8ff	1074	/** @brief BRR division operation to set BRR register in 16-bit oversampling mode
bogdanm	0:9b334a45a8ff	1075	* @param _PCLK_: UART clock
bogdanm	0:9b334a45a8ff	1076	* @param _BAUD_: Baud rate set by the user
bogdanm	0:9b334a45a8ff	1077	* @retval Division result
bogdanm	0:9b334a45a8ff	1078	*/
bogdanm	0:9b334a45a8ff	1079	#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_))/((_BAUD_)))
bogdanm	0:9b334a45a8ff	1080
mbed_official	113:b3775bf36a83	1081	/** @brief Check whether or not UART instance is Low Power UART.
mbed_official	113:b3775bf36a83	1082	* @param __HANDLE__: specifies the UART Handle.
mbed_official	113:b3775bf36a83	1083	* @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
mbed_official	113:b3775bf36a83	1084	*/
mbed_official	113:b3775bf36a83	1085	#define UART_INSTANCE_LOWPOWER(__HANDLE__) (((__HANDLE__)->Instance == LPUART1) ? SET : RESET )
mbed_official	113:b3775bf36a83	1086
bogdanm	0:9b334a45a8ff	1087	/** @brief Check UART Baud rate
bogdanm	0:9b334a45a8ff	1088	* @param BAUDRATE: Baudrate specified by the user
bogdanm	0:9b334a45a8ff	1089	* The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
bogdanm	0:9b334a45a8ff	1090	* divided by the smallest oversampling used on the USART (i.e. 8)
bogdanm	0:9b334a45a8ff	1091	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	1092	*/
bogdanm	0:9b334a45a8ff	1093	#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4000001)
bogdanm	0:9b334a45a8ff	1094
bogdanm	0:9b334a45a8ff	1095	/** @brief Check UART byte address
bogdanm	0:9b334a45a8ff	1096	* @param ADDRESS: UART 8-bit address for wake-up process scheme
bogdanm	0:9b334a45a8ff	1097	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	1098	*/
bogdanm	0:9b334a45a8ff	1099	#define IS_UART_7B_ADDRESS(ADDRESS) ((ADDRESS) <= 0x7F)
bogdanm	0:9b334a45a8ff	1100
bogdanm	0:9b334a45a8ff	1101	/** @brief Check UART 4-bit address
bogdanm	0:9b334a45a8ff	1102	* @param ADDRESS: UART 4-bit address for wake-up process scheme
bogdanm	0:9b334a45a8ff	1103	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	1104	*/
bogdanm	0:9b334a45a8ff	1105	#define IS_UART_4B_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
bogdanm	0:9b334a45a8ff	1106
bogdanm	0:9b334a45a8ff	1107	/** @brief Check UART assertion time
bogdanm	0:9b334a45a8ff	1108	* @param TIME: 5-bit value assertion time
bogdanm	0:9b334a45a8ff	1109	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	1110	*/
bogdanm	0:9b334a45a8ff	1111	#define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm	0:9b334a45a8ff	1112
bogdanm	0:9b334a45a8ff	1113	/** @brief Check UART deassertion time
bogdanm	0:9b334a45a8ff	1114	* @param TIME: 5-bit value deassertion time
bogdanm	0:9b334a45a8ff	1115	* @retval Test result (TRUE or FALSE).
bogdanm	0:9b334a45a8ff	1116	*/
bogdanm	0:9b334a45a8ff	1117	#define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm	0:9b334a45a8ff	1118
bogdanm	0:9b334a45a8ff	1119	/**
bogdanm	0:9b334a45a8ff	1120	* @}
bogdanm	0:9b334a45a8ff	1121	*/
bogdanm	0:9b334a45a8ff	1122	/* Include UART HAL Extension module */
bogdanm	0:9b334a45a8ff	1123	#include "stm32l0xx_hal_uart_ex.h"
bogdanm	0:9b334a45a8ff	1124
bogdanm	0:9b334a45a8ff	1125	/******************************************************************************/
bogdanm	0:9b334a45a8ff	1126	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1127	/******************************************************************************/
bogdanm	0:9b334a45a8ff	1128
bogdanm	0:9b334a45a8ff	1129	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1130	/** @defgroup UART_Exported_Functions UART Exported Functions
bogdanm	0:9b334a45a8ff	1131	* @{
bogdanm	0:9b334a45a8ff	1132	*/
bogdanm	0:9b334a45a8ff	1133	/* Initialization/de-initialization functions ********************************/
bogdanm	0:9b334a45a8ff	1134	/** @defgroup UART_Exported_Functions_Group1 Initialization/de-initialization methods
bogdanm	0:9b334a45a8ff	1135	* @{
bogdanm	0:9b334a45a8ff	1136	*/
bogdanm	0:9b334a45a8ff	1137	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1138	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1139	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
bogdanm	0:9b334a45a8ff	1140	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
bogdanm	0:9b334a45a8ff	1141	HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1142	void HAL_UART_MspInit(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1143	void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1144	/**
bogdanm	0:9b334a45a8ff	1145	* @}
bogdanm	0:9b334a45a8ff	1146	*/
bogdanm	0:9b334a45a8ff	1147
bogdanm	0:9b334a45a8ff	1148	/* IO operation functions *****************************************************/
bogdanm	0:9b334a45a8ff	1149	/** @defgroup UART_Exported_Functions_Group2 IO operation functions
bogdanm	0:9b334a45a8ff	1150	* @{
bogdanm	0:9b334a45a8ff	1151	*/
bogdanm	0:9b334a45a8ff	1152	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	1153	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	1154	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1155	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1156	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1157	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
bogdanm	0:9b334a45a8ff	1158	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1159	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1160	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1161	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1162	void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1163	void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1164	void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1165	void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1166	void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1167	/**
bogdanm	0:9b334a45a8ff	1168	* @}
bogdanm	0:9b334a45a8ff	1169	*/
bogdanm	0:9b334a45a8ff	1170	/* Peripheral Control and State functions ************************************/
bogdanm	0:9b334a45a8ff	1171	/** @defgroup UART_Exported_Functions_Group3 Peripheral Control funtions
bogdanm	0:9b334a45a8ff	1172	* @{
bogdanm	0:9b334a45a8ff	1173	*/
bogdanm	0:9b334a45a8ff	1174	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1175	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1176	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1177	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1178	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1179	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1180	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1181	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1182	/**
bogdanm	0:9b334a45a8ff	1183	* @}
bogdanm	0:9b334a45a8ff	1184	*/
mbed_official	113:b3775bf36a83	1185	/**
mbed_official	113:b3775bf36a83	1186	* @}
mbed_official	113:b3775bf36a83	1187	*/
mbed_official	113:b3775bf36a83	1188
mbed_official	113:b3775bf36a83	1189	/** @addtogroup UART_Private
mbed_official	113:b3775bf36a83	1190	* @{
mbed_official	113:b3775bf36a83	1191	*/
bogdanm	0:9b334a45a8ff	1192	void UART_SetConfig(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1193	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1194	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm	0:9b334a45a8ff	1195	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	1196	/**
bogdanm	0:9b334a45a8ff	1197	* @}
bogdanm	0:9b334a45a8ff	1198	*/
bogdanm	0:9b334a45a8ff	1199
mbed_official	113:b3775bf36a83	1200
mbed_official	113:b3775bf36a83	1201	/* Define the private group ***********************************/
mbed_official	113:b3775bf36a83	1202	/**************************************************************/
mbed_official	113:b3775bf36a83	1203	/** @defgroup UART_Private UART Private
mbed_official	113:b3775bf36a83	1204	* @{
mbed_official	113:b3775bf36a83	1205	*/
mbed_official	113:b3775bf36a83	1206	/**
mbed_official	113:b3775bf36a83	1207	* @}
mbed_official	113:b3775bf36a83	1208	*/
mbed_official	113:b3775bf36a83	1209	/**************************************************************/
mbed_official	113:b3775bf36a83	1210
bogdanm	0:9b334a45a8ff	1211	/**
bogdanm	0:9b334a45a8ff	1212	* @}
bogdanm	0:9b334a45a8ff	1213	*/
bogdanm	0:9b334a45a8ff	1214	/**
bogdanm	0:9b334a45a8ff	1215	* @}
bogdanm	0:9b334a45a8ff	1216	*/
bogdanm	0:9b334a45a8ff	1217
bogdanm	0:9b334a45a8ff	1218	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	1219	}
bogdanm	0:9b334a45a8ff	1220	#endif
bogdanm	0:9b334a45a8ff	1221
bogdanm	0:9b334a45a8ff	1222	#endif /* __STM32L0xx_HAL_UART_H */
bogdanm	0:9b334a45a8ff	1223
bogdanm	0:9b334a45a8ff	1224	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.h@129:2e517c56bcfb, 2016-05-16 (annotated)

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