mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 113:b3775bf36a83

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32l0xx_hal_uart.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	113:b3775bf36a83	5	* @version V1.5.0
mbed_official	113:b3775bf36a83	6	* @date 8-January-2016
bogdanm	0:9b334a45a8ff	7	* @brief UART HAL module driver.
bogdanm	0:9b334a45a8ff	8	*
bogdanm	0:9b334a45a8ff	9	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	10	* functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
bogdanm	0:9b334a45a8ff	11	* + Initialization and de-initialization methods
bogdanm	0:9b334a45a8ff	12	* + IO operation methods
bogdanm	0:9b334a45a8ff	13	* + Peripheral Control methods
bogdanm	0:9b334a45a8ff	14	*
bogdanm	0:9b334a45a8ff	15	@verbatim
bogdanm	0:9b334a45a8ff	16	===============================================================================
bogdanm	0:9b334a45a8ff	17	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	18	===============================================================================
bogdanm	0:9b334a45a8ff	19	[..]
bogdanm	0:9b334a45a8ff	20	The UART HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	21
bogdanm	0:9b334a45a8ff	22	(#) Declare a UART_HandleTypeDef handle structure.
bogdanm	0:9b334a45a8ff	23
bogdanm	0:9b334a45a8ff	24	(#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
bogdanm	0:9b334a45a8ff	25	(##) Enable the USARTx interface clock.
bogdanm	0:9b334a45a8ff	26	(##) UART pins configuration:
bogdanm	0:9b334a45a8ff	27	(+++) Enable the clock for the UART GPIOs.
bogdanm	0:9b334a45a8ff	28	(+++) Configure these UART pins as alternate function pull-up.
bogdanm	0:9b334a45a8ff	29	(##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	30	and HAL_UART_Receive_IT() APIs):
bogdanm	0:9b334a45a8ff	31	(+++) Configure the USARTx interrupt priority.
bogdanm	0:9b334a45a8ff	32	(+++) Enable the NVIC USART IRQ handle.
bogdanm	0:9b334a45a8ff	33
bogdanm	0:9b334a45a8ff	34	(##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	35	and HAL_UART_Receive_DMA() APIs):
bogdanm	0:9b334a45a8ff	36	(+++) Declare a DMA handle structure for the Tx/Rx stream.
bogdanm	0:9b334a45a8ff	37	(+++) Enable the DMAx interface clock.
bogdanm	0:9b334a45a8ff	38	(+++) Configure the declared DMA handle structure with the required
bogdanm	0:9b334a45a8ff	39	Tx/Rx parameters.
bogdanm	0:9b334a45a8ff	40	(+++) Configure the DMA Tx/Rx Stream.
bogdanm	0:9b334a45a8ff	41	(+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
bogdanm	0:9b334a45a8ff	42	(+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm	0:9b334a45a8ff	43	interrupt on the DMA Tx/Rx Stream.
bogdanm	0:9b334a45a8ff	44
bogdanm	0:9b334a45a8ff	45	(#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
bogdanm	0:9b334a45a8ff	46	flow control and Mode(Receiver/Transmitter) in the Init structure.
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) For the UART asynchronous mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	49	the HAL_UART_Init() API.
bogdanm	0:9b334a45a8ff	50
bogdanm	0:9b334a45a8ff	51	(#) For the UART Half duplex mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	52	the HAL_HalfDuplex_Init() API.
bogdanm	0:9b334a45a8ff	53
bogdanm	0:9b334a45a8ff	54	(#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
bogdanm	0:9b334a45a8ff	55
bogdanm	0:9b334a45a8ff	56	(#) For the Multi-Processor mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	57	the HAL_MultiProcessor_Init() API.
bogdanm	0:9b334a45a8ff	58
bogdanm	0:9b334a45a8ff	59	[..]
bogdanm	0:9b334a45a8ff	60	(@) The specific UART interrupts (Transmission complete interrupt,
bogdanm	0:9b334a45a8ff	61	RXNE interrupt and Error Interrupts) will be managed using the macros
bogdanm	0:9b334a45a8ff	62	__HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
bogdanm	0:9b334a45a8ff	63	and receive process.
bogdanm	0:9b334a45a8ff	64
bogdanm	0:9b334a45a8ff	65	[..]
bogdanm	0:9b334a45a8ff	66	(@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
bogdanm	0:9b334a45a8ff	67	low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customed
bogdanm	0:9b334a45a8ff	68	HAL_UART_MspInit() API.
bogdanm	0:9b334a45a8ff	69
bogdanm	0:9b334a45a8ff	70	[..]
bogdanm	0:9b334a45a8ff	71	Three operation modes are available within this driver :
bogdanm	0:9b334a45a8ff	72
bogdanm	0:9b334a45a8ff	73	* Polling mode IO operation *
bogdanm	0:9b334a45a8ff	74	=================================
bogdanm	0:9b334a45a8ff	75	[..]
bogdanm	0:9b334a45a8ff	76	(+) Send an amount of data in blocking mode using HAL_UART_Transmit()
bogdanm	0:9b334a45a8ff	77	(+) Receive an amount of data in blocking mode using HAL_UART_Receive()
bogdanm	0:9b334a45a8ff	78
bogdanm	0:9b334a45a8ff	79
bogdanm	0:9b334a45a8ff	80	* Interrupt mode IO operation *
bogdanm	0:9b334a45a8ff	81	===================================
bogdanm	0:9b334a45a8ff	82	[..]
bogdanm	0:9b334a45a8ff	83	(+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	84	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	85	add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm	0:9b334a45a8ff	86	(+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	87	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	88	add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm	0:9b334a45a8ff	89	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	90	add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm	0:9b334a45a8ff	91
bogdanm	0:9b334a45a8ff	92	* DMA mode IO operation *
bogdanm	0:9b334a45a8ff	93	==============================
bogdanm	0:9b334a45a8ff	94	[..]
bogdanm	0:9b334a45a8ff	95	(+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	96	(+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	97	add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
bogdanm	0:9b334a45a8ff	98	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	99	add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm	0:9b334a45a8ff	100	(+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
bogdanm	0:9b334a45a8ff	101	(+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	102	add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
bogdanm	0:9b334a45a8ff	103	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	104	add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm	0:9b334a45a8ff	105	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	106	add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm	0:9b334a45a8ff	107	(+) Pause the DMA Transfer using HAL_UART_DMAPause()
bogdanm	0:9b334a45a8ff	108	(+) Resume the DMA Transfer using HAL_UART_DMAResume()
bogdanm	0:9b334a45a8ff	109	(+) Stop the DMA Transfer using HAL_UART_DMAStop()
bogdanm	0:9b334a45a8ff	110
bogdanm	0:9b334a45a8ff	111	* UART HAL driver macros list *
bogdanm	0:9b334a45a8ff	112	=============================================
bogdanm	0:9b334a45a8ff	113	[..]
bogdanm	0:9b334a45a8ff	114	Below the list of most used macros in UART HAL driver.
bogdanm	0:9b334a45a8ff	115
bogdanm	0:9b334a45a8ff	116	(+) __HAL_UART_ENABLE: Enable the UART peripheral
bogdanm	0:9b334a45a8ff	117	(+) __HAL_UART_DISABLE: Disable the UART peripheral
bogdanm	0:9b334a45a8ff	118	(+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
bogdanm	0:9b334a45a8ff	119	(+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
bogdanm	0:9b334a45a8ff	120	(+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
bogdanm	0:9b334a45a8ff	121	(+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
bogdanm	0:9b334a45a8ff	122
bogdanm	0:9b334a45a8ff	123	[..]
bogdanm	0:9b334a45a8ff	124	(@) You can refer to the UART HAL driver header file for more useful macros
bogdanm	0:9b334a45a8ff	125	@endverbatim
bogdanm	0:9b334a45a8ff	126	******************************************************************************
bogdanm	0:9b334a45a8ff	127	* @attention
bogdanm	0:9b334a45a8ff	128	*
mbed_official	113:b3775bf36a83	129	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	130	*
bogdanm	0:9b334a45a8ff	131	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	132	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	133	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	134	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	135	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	136	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	137	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	138	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	139	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	140	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	141	*
bogdanm	0:9b334a45a8ff	142	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	143	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	144	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	145	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	146	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	147	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	148	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	149	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	150	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	151	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	152	*
bogdanm	0:9b334a45a8ff	153	******************************************************************************
bogdanm	0:9b334a45a8ff	154	*/
bogdanm	0:9b334a45a8ff	155
bogdanm	0:9b334a45a8ff	156	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	157	#include "stm32l0xx_hal.h"
bogdanm	0:9b334a45a8ff	158
bogdanm	0:9b334a45a8ff	159	/** @addtogroup STM32L0xx_HAL_Driver
bogdanm	0:9b334a45a8ff	160	* @{
bogdanm	0:9b334a45a8ff	161	*/
bogdanm	0:9b334a45a8ff	162
mbed_official	113:b3775bf36a83	163	#ifdef HAL_UART_MODULE_ENABLED
mbed_official	113:b3775bf36a83	164
mbed_official	113:b3775bf36a83	165
bogdanm	0:9b334a45a8ff	166	/** @addtogroup UART
bogdanm	0:9b334a45a8ff	167	* @brief UART module driver
bogdanm	0:9b334a45a8ff	168	* @{
bogdanm	0:9b334a45a8ff	169	*/
mbed_official	113:b3775bf36a83	170
mbed_official	113:b3775bf36a83	171	/** @addtogroup UART_Private
mbed_official	113:b3775bf36a83	172	* @{
mbed_official	113:b3775bf36a83	173	*/
bogdanm	0:9b334a45a8ff	174	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	175	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	176	#define UART_TIMEOUT_VALUE ((uint32_t) 22000)
bogdanm	0:9b334a45a8ff	177	#define UART_CR1_FIELDS ((uint32_t)(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \| \
bogdanm	0:9b334a45a8ff	178	USART_CR1_TE \| USART_CR1_RE \| USART_CR1_OVER8))
bogdanm	0:9b334a45a8ff	179	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	180	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	181	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	182	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	183	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	184	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	185	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	186	static void UART_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	187	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	188	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	189	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	190
mbed_official	113:b3775bf36a83	191	/**
mbed_official	113:b3775bf36a83	192	* @}
mbed_official	113:b3775bf36a83	193	*/
bogdanm	0:9b334a45a8ff	194
bogdanm	0:9b334a45a8ff	195	/* Private functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	196
bogdanm	0:9b334a45a8ff	197	/** @addtogroup UART_Exported_Functions UART Exported Functions
bogdanm	0:9b334a45a8ff	198	* @{
bogdanm	0:9b334a45a8ff	199	*/
bogdanm	0:9b334a45a8ff	200
bogdanm	0:9b334a45a8ff	201	/** @addtogroup UART_Exported_Functions_Group1
bogdanm	0:9b334a45a8ff	202	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	203	*
bogdanm	0:9b334a45a8ff	204	@verbatim
bogdanm	0:9b334a45a8ff	205	===============================================================================
bogdanm	0:9b334a45a8ff	206	##### Initialization and Configuration functions #####
bogdanm	0:9b334a45a8ff	207	===============================================================================
bogdanm	0:9b334a45a8ff	208	[..]
bogdanm	0:9b334a45a8ff	209	This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
bogdanm	0:9b334a45a8ff	210	in asynchronous mode.
bogdanm	0:9b334a45a8ff	211	(+) For the asynchronous mode only these parameters can be configured:
bogdanm	0:9b334a45a8ff	212	(++) Baud Rate
bogdanm	0:9b334a45a8ff	213	(++) Word Length
bogdanm	0:9b334a45a8ff	214	(++) Stop Bit
bogdanm	0:9b334a45a8ff	215	(++) Parity: If the parity is enabled, then the MSB bit of the data written
bogdanm	0:9b334a45a8ff	216	in the data register is transmitted but is changed by the parity bit.
bogdanm	0:9b334a45a8ff	217	Depending on the frame length defined by the M bit (8-bits or 9-bits),
bogdanm	0:9b334a45a8ff	218	the possible UART frame formats are as listed in the following table:
bogdanm	0:9b334a45a8ff	219	+-----------------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	220	\| M1 bit \| M0 bit \| PCE bit \| USART frame \|
bogdanm	0:9b334a45a8ff	221	\|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	222	\| 0 \| 0 \| 0 \| \| SB \| 8 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	223	\|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	224	\| 0 \| 0 \| 1 \| \| SB \| 7 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	225	\|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	226	\| 0 \| 1 \| 0 \| \| SB \| 9 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	227	\|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	228	\| 0 \| 1 \| 1 \| \| SB \| 8 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	229	\|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	230	\| 1 \| 0 \| 0 \| \| SB \| 7 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	231	\|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	232	\| 1 \| 0 \| 1 \| \| SB \| 6 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	233	+-----------------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	234	(++) Hardware flow control
bogdanm	0:9b334a45a8ff	235	(++) Receiver/transmitter modes
bogdanm	0:9b334a45a8ff	236	(++) Over Sampling Method
bogdanm	0:9b334a45a8ff	237	(++) One-Bit Sampling Method
bogdanm	0:9b334a45a8ff	238	(+) For the asynchronous mode, the following advanced features can be configured as well:
bogdanm	0:9b334a45a8ff	239	(++) TX and/or RX pin level inversion
bogdanm	0:9b334a45a8ff	240	(++) data logical level inversion
bogdanm	0:9b334a45a8ff	241	(++) RX and TX pins swap
bogdanm	0:9b334a45a8ff	242	(++) RX overrun detection disabling
bogdanm	0:9b334a45a8ff	243	(++) DMA disabling on RX error
bogdanm	0:9b334a45a8ff	244	(++) MSB first on communication line
bogdanm	0:9b334a45a8ff	245	(++) auto Baud rate detection
bogdanm	0:9b334a45a8ff	246	[..]
bogdanm	0:9b334a45a8ff	247	The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessorEx_Init()API
bogdanm	0:9b334a45a8ff	248	follow respectively the UART asynchronous, UART Half duplex, UART LIN mode
bogdanm	0:9b334a45a8ff	249	and UART multiprocessor mode mode configuration procedures (details for the procedures
bogdanm	0:9b334a45a8ff	250	are available in reference manual).
bogdanm	0:9b334a45a8ff	251
bogdanm	0:9b334a45a8ff	252	@endverbatim
bogdanm	0:9b334a45a8ff	253	* @{
bogdanm	0:9b334a45a8ff	254	*/
bogdanm	0:9b334a45a8ff	255
bogdanm	0:9b334a45a8ff	256	/**
bogdanm	0:9b334a45a8ff	257	* @brief Initializes the UART mode according to the specified
bogdanm	0:9b334a45a8ff	258	* parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm	0:9b334a45a8ff	259	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	260	* @retval HAL status
bogdanm	0:9b334a45a8ff	261	*/
bogdanm	0:9b334a45a8ff	262	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	263	{
bogdanm	0:9b334a45a8ff	264	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	265	if(huart == NULL)
bogdanm	0:9b334a45a8ff	266	{
bogdanm	0:9b334a45a8ff	267	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	268	}
bogdanm	0:9b334a45a8ff	269
bogdanm	0:9b334a45a8ff	270	if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
bogdanm	0:9b334a45a8ff	271	{
bogdanm	0:9b334a45a8ff	272	/* Check the parameters */
bogdanm	0:9b334a45a8ff	273	assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	274	}
bogdanm	0:9b334a45a8ff	275	else
bogdanm	0:9b334a45a8ff	276	{
bogdanm	0:9b334a45a8ff	277	/* Check the parameters */
bogdanm	0:9b334a45a8ff	278	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	279	}
bogdanm	0:9b334a45a8ff	280
bogdanm	0:9b334a45a8ff	281	if(huart->State == HAL_UART_STATE_RESET)
mbed_official	113:b3775bf36a83	282	{
mbed_official	113:b3775bf36a83	283	/* Allocate lock resource and initialize it */
mbed_official	113:b3775bf36a83	284	huart->Lock = HAL_UNLOCKED;
mbed_official	113:b3775bf36a83	285
bogdanm	0:9b334a45a8ff	286	/* Init the low level hardware : GPIO, CLOCK, CORTEX */
bogdanm	0:9b334a45a8ff	287	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	288	}
bogdanm	0:9b334a45a8ff	289
bogdanm	0:9b334a45a8ff	290	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	291
bogdanm	0:9b334a45a8ff	292	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	293	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	294
bogdanm	0:9b334a45a8ff	295	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	296	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	297
bogdanm	0:9b334a45a8ff	298	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	299	{
bogdanm	0:9b334a45a8ff	300	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	301	}
bogdanm	0:9b334a45a8ff	302
bogdanm	0:9b334a45a8ff	303	/* In asynchronous mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	304	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	305	- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	306	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	307	huart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN);
bogdanm	0:9b334a45a8ff	308
bogdanm	0:9b334a45a8ff	309	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	310	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	311
bogdanm	0:9b334a45a8ff	312	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	313	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	314	}
bogdanm	0:9b334a45a8ff	315
bogdanm	0:9b334a45a8ff	316	/**
bogdanm	0:9b334a45a8ff	317	* @brief Initializes the half-duplex mode according to the specified
bogdanm	0:9b334a45a8ff	318	* parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm	0:9b334a45a8ff	319	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	320	* @retval HAL status
bogdanm	0:9b334a45a8ff	321	*/
bogdanm	0:9b334a45a8ff	322	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	323	{
bogdanm	0:9b334a45a8ff	324	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	325	if(huart == NULL)
bogdanm	0:9b334a45a8ff	326	{
bogdanm	0:9b334a45a8ff	327	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	328	}
bogdanm	0:9b334a45a8ff	329
bogdanm	0:9b334a45a8ff	330	/* Check UART instance */
bogdanm	0:9b334a45a8ff	331	assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	332
bogdanm	0:9b334a45a8ff	333
bogdanm	0:9b334a45a8ff	334	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	335	{
bogdanm	0:9b334a45a8ff	336	/* Init the low level hardware : GPIO, CLOCK, CORTEX */
bogdanm	0:9b334a45a8ff	337	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	338	}
bogdanm	0:9b334a45a8ff	339
bogdanm	0:9b334a45a8ff	340	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	341	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	342
bogdanm	0:9b334a45a8ff	343	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	344	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	345
bogdanm	0:9b334a45a8ff	346	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	347	{
bogdanm	0:9b334a45a8ff	348	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	349	}
bogdanm	0:9b334a45a8ff	350
bogdanm	0:9b334a45a8ff	351	/* In half-duplex mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	352	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	353	- SCEN and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	354	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	355	huart->Instance->CR3 &= ~(USART_CR3_IREN \| USART_CR3_SCEN);
bogdanm	0:9b334a45a8ff	356
bogdanm	0:9b334a45a8ff	357	/* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
bogdanm	0:9b334a45a8ff	358	huart->Instance->CR3 \|= USART_CR3_HDSEL;
bogdanm	0:9b334a45a8ff	359
bogdanm	0:9b334a45a8ff	360	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	361	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	362
bogdanm	0:9b334a45a8ff	363	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	364	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	365	}
bogdanm	0:9b334a45a8ff	366
bogdanm	0:9b334a45a8ff	367	/**
bogdanm	0:9b334a45a8ff	368	* @brief Initializes the LIN mode according to the specified
bogdanm	0:9b334a45a8ff	369	* parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm	0:9b334a45a8ff	370	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	371	* @param BreakDetectLength: specifies the LIN break detection length.
bogdanm	0:9b334a45a8ff	372	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	373	* @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
bogdanm	0:9b334a45a8ff	374	* @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
bogdanm	0:9b334a45a8ff	375	* @retval HAL status
bogdanm	0:9b334a45a8ff	376	*/
bogdanm	0:9b334a45a8ff	377	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
bogdanm	0:9b334a45a8ff	378	{
bogdanm	0:9b334a45a8ff	379	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	380	if(huart == NULL)
bogdanm	0:9b334a45a8ff	381	{
bogdanm	0:9b334a45a8ff	382	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	383	}
bogdanm	0:9b334a45a8ff	384	/* Check the LIN UART instance */
bogdanm	0:9b334a45a8ff	385	assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	386
bogdanm	0:9b334a45a8ff	387	/* Check the Break detection length parameter */
bogdanm	0:9b334a45a8ff	388	assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
bogdanm	0:9b334a45a8ff	389
bogdanm	0:9b334a45a8ff	390	/* LIN mode limited to 16-bit oversampling only */
bogdanm	0:9b334a45a8ff	391	if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm	0:9b334a45a8ff	392	{
bogdanm	0:9b334a45a8ff	393	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	394	}
bogdanm	0:9b334a45a8ff	395
bogdanm	0:9b334a45a8ff	396	/* in LIN mode limited, data length limited to 8-bit only */
bogdanm	0:9b334a45a8ff	397	if(huart->Init.WordLength!= UART_WORDLENGTH_8B)
bogdanm	0:9b334a45a8ff	398	{
bogdanm	0:9b334a45a8ff	399	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	400	}
bogdanm	0:9b334a45a8ff	401
bogdanm	0:9b334a45a8ff	402	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	403	{
bogdanm	0:9b334a45a8ff	404	/* Init the low level hardware : GPIO, CLOCK, CORTEX */
bogdanm	0:9b334a45a8ff	405	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	406	}
bogdanm	0:9b334a45a8ff	407
bogdanm	0:9b334a45a8ff	408	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	409	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	410
bogdanm	0:9b334a45a8ff	411	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	412	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	413
bogdanm	0:9b334a45a8ff	414	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	415	{
bogdanm	0:9b334a45a8ff	416	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	417	}
bogdanm	0:9b334a45a8ff	418
bogdanm	0:9b334a45a8ff	419	/* In LIN mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	420	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	421	- SCEN and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	422	huart->Instance->CR2 &= ~(USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	423	huart->Instance->CR3 &= ~(USART_CR3_HDSEL \| USART_CR3_IREN \| USART_CR3_SCEN);
bogdanm	0:9b334a45a8ff	424
bogdanm	0:9b334a45a8ff	425	/* Enable the LIN mode by setting the LINEN bit in the CR2 register */
bogdanm	0:9b334a45a8ff	426	huart->Instance->CR2 \|= USART_CR2_LINEN;
bogdanm	0:9b334a45a8ff	427
bogdanm	0:9b334a45a8ff	428	/* Set the USART LIN Break detection length. */
bogdanm	0:9b334a45a8ff	429	MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
bogdanm	0:9b334a45a8ff	430
bogdanm	0:9b334a45a8ff	431	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	432	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	433
bogdanm	0:9b334a45a8ff	434	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	435	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	436	}
bogdanm	0:9b334a45a8ff	437
bogdanm	0:9b334a45a8ff	438	/**
bogdanm	0:9b334a45a8ff	439	* @brief Initializes the multiprocessor mode according to the specified
bogdanm	0:9b334a45a8ff	440	* parameters in the UART_InitTypeDef and creates the associated handle.
bogdanm	0:9b334a45a8ff	441	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	442	* @param Address: UART node address (4-, 6-, 7- or 8-bit long)
bogdanm	0:9b334a45a8ff	443	* @param WakeUpMethod: specifies the UART wakeup method.
bogdanm	0:9b334a45a8ff	444	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	445	* @arg UART_WAKEUPMETHOD_IDLELINE: WakeUp by an idle line detection
bogdanm	0:9b334a45a8ff	446	* @arg UART_WAKEUPMETHOD_ADDRESSMARK: WakeUp by an address mark
bogdanm	0:9b334a45a8ff	447	* @note If the user resorts to idle line detection wake up, the Address parameter
bogdanm	0:9b334a45a8ff	448	* is useless and ignored by the initialization function.
bogdanm	0:9b334a45a8ff	449	* @note If the user resorts to address mark wake up, the address length detection
bogdanm	0:9b334a45a8ff	450	* is configured by default to 4 bits only. For the UART to be able to
bogdanm	0:9b334a45a8ff	451	* manage 6-, 7- or 8-bit long addresses detection, the API
bogdanm	0:9b334a45a8ff	452	* HAL_MultiProcessorEx_AddressLength_Set() must be called after
bogdanm	0:9b334a45a8ff	453	* HAL_MultiProcessor_Init().
bogdanm	0:9b334a45a8ff	454	* @retval HAL status
bogdanm	0:9b334a45a8ff	455	*/
bogdanm	0:9b334a45a8ff	456	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
bogdanm	0:9b334a45a8ff	457	{
bogdanm	0:9b334a45a8ff	458	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	459	if(huart == NULL)
bogdanm	0:9b334a45a8ff	460	{
bogdanm	0:9b334a45a8ff	461	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	462	}
bogdanm	0:9b334a45a8ff	463
bogdanm	0:9b334a45a8ff	464	/* Check the wake up method parameter */
bogdanm	0:9b334a45a8ff	465	assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
bogdanm	0:9b334a45a8ff	466
bogdanm	0:9b334a45a8ff	467	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	468	{
bogdanm	0:9b334a45a8ff	469	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	470	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	471	}
bogdanm	0:9b334a45a8ff	472
bogdanm	0:9b334a45a8ff	473	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	474
bogdanm	0:9b334a45a8ff	475	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	476	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	477
bogdanm	0:9b334a45a8ff	478	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	479	UART_SetConfig(huart);
bogdanm	0:9b334a45a8ff	480
bogdanm	0:9b334a45a8ff	481	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	482	{
bogdanm	0:9b334a45a8ff	483	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	484	}
bogdanm	0:9b334a45a8ff	485
bogdanm	0:9b334a45a8ff	486	/* In multiprocessor mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	487	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	488	- SCEN, HDSEL and IREN bits in the USART_CR3 register. */
bogdanm	0:9b334a45a8ff	489	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	490	huart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN);
bogdanm	0:9b334a45a8ff	491
bogdanm	0:9b334a45a8ff	492	if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
bogdanm	0:9b334a45a8ff	493	{
bogdanm	0:9b334a45a8ff	494	/* If address mark wake up method is chosen, set the USART address node */
bogdanm	0:9b334a45a8ff	495	MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
bogdanm	0:9b334a45a8ff	496	}
bogdanm	0:9b334a45a8ff	497
bogdanm	0:9b334a45a8ff	498	/* Set the wake up method by setting the WAKE bit in the CR1 register */
bogdanm	0:9b334a45a8ff	499	MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
bogdanm	0:9b334a45a8ff	500
bogdanm	0:9b334a45a8ff	501	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	502	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	503
bogdanm	0:9b334a45a8ff	504	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	505	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	506	}
bogdanm	0:9b334a45a8ff	507
bogdanm	0:9b334a45a8ff	508	/**
bogdanm	0:9b334a45a8ff	509	* @brief DeInitializes the UART peripheral
bogdanm	0:9b334a45a8ff	510	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	511	* @retval HAL status
bogdanm	0:9b334a45a8ff	512	*/
bogdanm	0:9b334a45a8ff	513	HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	514	{
bogdanm	0:9b334a45a8ff	515	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	516	if(huart == NULL)
bogdanm	0:9b334a45a8ff	517	{
bogdanm	0:9b334a45a8ff	518	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	519	}
bogdanm	0:9b334a45a8ff	520
bogdanm	0:9b334a45a8ff	521	/* Check the parameters */
bogdanm	0:9b334a45a8ff	522	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	523
bogdanm	0:9b334a45a8ff	524	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	525
bogdanm	0:9b334a45a8ff	526	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	527	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	528
bogdanm	0:9b334a45a8ff	529	huart->Instance->CR1 = 0x0;
bogdanm	0:9b334a45a8ff	530	huart->Instance->CR2 = 0x0;
bogdanm	0:9b334a45a8ff	531	huart->Instance->CR3 = 0x0;
bogdanm	0:9b334a45a8ff	532
bogdanm	0:9b334a45a8ff	533	/* DeInit the low level hardware */
bogdanm	0:9b334a45a8ff	534	HAL_UART_MspDeInit(huart);
bogdanm	0:9b334a45a8ff	535
bogdanm	0:9b334a45a8ff	536	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	537	huart->State = HAL_UART_STATE_RESET;
bogdanm	0:9b334a45a8ff	538
bogdanm	0:9b334a45a8ff	539	/* Release Lock */
bogdanm	0:9b334a45a8ff	540	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	541
bogdanm	0:9b334a45a8ff	542	return HAL_OK;
bogdanm	0:9b334a45a8ff	543	}
bogdanm	0:9b334a45a8ff	544
bogdanm	0:9b334a45a8ff	545	/**
bogdanm	0:9b334a45a8ff	546	* @brief UART MSP Init
bogdanm	0:9b334a45a8ff	547	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	548	* @retval None
bogdanm	0:9b334a45a8ff	549	*/
bogdanm	0:9b334a45a8ff	550	__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	551	{
mbed_official	113:b3775bf36a83	552	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	553	UNUSED(huart);
mbed_official	113:b3775bf36a83	554
bogdanm	0:9b334a45a8ff	555	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	556	the HAL_UART_MspInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	557	*/
bogdanm	0:9b334a45a8ff	558	}
bogdanm	0:9b334a45a8ff	559
bogdanm	0:9b334a45a8ff	560	/**
bogdanm	0:9b334a45a8ff	561	* @brief UART MSP DeInit
bogdanm	0:9b334a45a8ff	562	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	563	* @retval None
bogdanm	0:9b334a45a8ff	564	*/
bogdanm	0:9b334a45a8ff	565	__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	566	{
mbed_official	113:b3775bf36a83	567	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	568	UNUSED(huart);
mbed_official	113:b3775bf36a83	569
bogdanm	0:9b334a45a8ff	570	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	571	the HAL_UART_MspDeInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	572	*/
bogdanm	0:9b334a45a8ff	573	}
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575	/**
bogdanm	0:9b334a45a8ff	576	* @}
bogdanm	0:9b334a45a8ff	577	*/
bogdanm	0:9b334a45a8ff	578
bogdanm	0:9b334a45a8ff	579	/** @addtogroup UART_Exported_Functions_Group2
bogdanm	0:9b334a45a8ff	580	* @brief UART Transmit/Receive functions
bogdanm	0:9b334a45a8ff	581	*
bogdanm	0:9b334a45a8ff	582	@verbatim
bogdanm	0:9b334a45a8ff	583	===============================================================================
bogdanm	0:9b334a45a8ff	584	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	585	===============================================================================
bogdanm	0:9b334a45a8ff	586	This subsection provides a set of functions allowing to manage the UART asynchronous
bogdanm	0:9b334a45a8ff	587	and Half duplex data transfers.
bogdanm	0:9b334a45a8ff	588
bogdanm	0:9b334a45a8ff	589	(#) There are two mode of transfer:
bogdanm	0:9b334a45a8ff	590	(+) Blocking mode: The communication is performed in polling mode.
bogdanm	0:9b334a45a8ff	591	The HAL status of all data processing is returned by the same function
bogdanm	0:9b334a45a8ff	592	after finishing transfer.
bogdanm	0:9b334a45a8ff	593	(+) No-Blocking mode: The communication is performed using Interrupts
bogdanm	0:9b334a45a8ff	594	or DMA, These API's return the HAL status.
bogdanm	0:9b334a45a8ff	595	The end of the data processing will be indicated through the
bogdanm	0:9b334a45a8ff	596	dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
bogdanm	0:9b334a45a8ff	597	using DMA mode.
bogdanm	0:9b334a45a8ff	598	The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
bogdanm	0:9b334a45a8ff	599	will be executed respectivelly at the end of the transmit or Receive process
bogdanm	0:9b334a45a8ff	600	The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
bogdanm	0:9b334a45a8ff	601
bogdanm	0:9b334a45a8ff	602	(#) Blocking mode API's are :
bogdanm	0:9b334a45a8ff	603	(+) HAL_UART_Transmit()
bogdanm	0:9b334a45a8ff	604	(+) HAL_UART_Receive()
bogdanm	0:9b334a45a8ff	605
bogdanm	0:9b334a45a8ff	606	(#) Non-Blocking mode API's with Interrupt are :
bogdanm	0:9b334a45a8ff	607	(+) HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	608	(+) HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	609	(+) HAL_UART_IRQHandler()
bogdanm	0:9b334a45a8ff	610	(+) UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	611	(+) UART_Receive_IT()
bogdanm	0:9b334a45a8ff	612
bogdanm	0:9b334a45a8ff	613	(#) No-Blocking mode API's with DMA are :
bogdanm	0:9b334a45a8ff	614	(+) HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	615	(+) HAL_UART_Receive_DMA()
bogdanm	0:9b334a45a8ff	616	(+) HAL_UART_DMAPause()
bogdanm	0:9b334a45a8ff	617	(+) HAL_UART_DMAResume()
bogdanm	0:9b334a45a8ff	618	(+) HAL_UART_DMAStop()
bogdanm	0:9b334a45a8ff	619
bogdanm	0:9b334a45a8ff	620	(#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
bogdanm	0:9b334a45a8ff	621	(+) HAL_UART_TxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	622	(+) HAL_UART_TxCpltCallback()
bogdanm	0:9b334a45a8ff	623	(+) HAL_UART_RxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	624	(+) HAL_UART_RxCpltCallback()
bogdanm	0:9b334a45a8ff	625	(+) HAL_UART_ErrorCallback()
bogdanm	0:9b334a45a8ff	626
bogdanm	0:9b334a45a8ff	627	-@- In the Half duplex communication, it is forbidden to run the transmit
bogdanm	0:9b334a45a8ff	628	and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
bogdanm	0:9b334a45a8ff	629
bogdanm	0:9b334a45a8ff	630	@endverbatim
bogdanm	0:9b334a45a8ff	631	* @{
bogdanm	0:9b334a45a8ff	632	*/
bogdanm	0:9b334a45a8ff	633
bogdanm	0:9b334a45a8ff	634	/**
bogdanm	0:9b334a45a8ff	635	* @brief Send an amount of data in blocking mode
bogdanm	0:9b334a45a8ff	636	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	637	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	638	* @param Size: amount of data to be sent
bogdanm	0:9b334a45a8ff	639	* @param Timeout : Timeout duration
bogdanm	0:9b334a45a8ff	640	* @retval HAL status
bogdanm	0:9b334a45a8ff	641	*/
bogdanm	0:9b334a45a8ff	642	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	643	{
bogdanm	0:9b334a45a8ff	644	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	645
bogdanm	0:9b334a45a8ff	646	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	647	{
bogdanm	0:9b334a45a8ff	648	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	649	{
bogdanm	0:9b334a45a8ff	650	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	651	}
bogdanm	0:9b334a45a8ff	652
bogdanm	0:9b334a45a8ff	653	/* Process Locked */
bogdanm	0:9b334a45a8ff	654	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	655
bogdanm	0:9b334a45a8ff	656	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	657	/* Check if a non-blocking receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	658	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	659	{
bogdanm	0:9b334a45a8ff	660	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	661	}
bogdanm	0:9b334a45a8ff	662	else
bogdanm	0:9b334a45a8ff	663	{
bogdanm	0:9b334a45a8ff	664	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	665	}
bogdanm	0:9b334a45a8ff	666
bogdanm	0:9b334a45a8ff	667	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	668	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	669	while(huart->TxXferCount > 0)
bogdanm	0:9b334a45a8ff	670	{
bogdanm	0:9b334a45a8ff	671	huart->TxXferCount--;
bogdanm	0:9b334a45a8ff	672	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	673	{
bogdanm	0:9b334a45a8ff	674	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	675	}
bogdanm	0:9b334a45a8ff	676	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	677	{
bogdanm	0:9b334a45a8ff	678	tmp = (uint16_t*) pData;
bogdanm	0:9b334a45a8ff	679	huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	680	pData += 2;
bogdanm	0:9b334a45a8ff	681	}
bogdanm	0:9b334a45a8ff	682	else
bogdanm	0:9b334a45a8ff	683	{
bogdanm	0:9b334a45a8ff	684	huart->Instance->TDR = (*pData++ & (uint8_t)0xFF);
bogdanm	0:9b334a45a8ff	685	}
bogdanm	0:9b334a45a8ff	686	}
bogdanm	0:9b334a45a8ff	687	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	688	{
bogdanm	0:9b334a45a8ff	689	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	690	}
bogdanm	0:9b334a45a8ff	691	/* Check if a non-blocking receive Process is ongoing or not */
bogdanm	0:9b334a45a8ff	692	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	693	{
bogdanm	0:9b334a45a8ff	694	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	695	}
bogdanm	0:9b334a45a8ff	696	else
bogdanm	0:9b334a45a8ff	697	{
bogdanm	0:9b334a45a8ff	698	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	699	}
bogdanm	0:9b334a45a8ff	700
bogdanm	0:9b334a45a8ff	701	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	702	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	703
bogdanm	0:9b334a45a8ff	704	return HAL_OK;
bogdanm	0:9b334a45a8ff	705	}
bogdanm	0:9b334a45a8ff	706	else
bogdanm	0:9b334a45a8ff	707	{
bogdanm	0:9b334a45a8ff	708	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	709	}
bogdanm	0:9b334a45a8ff	710	}
bogdanm	0:9b334a45a8ff	711
bogdanm	0:9b334a45a8ff	712	/**
bogdanm	0:9b334a45a8ff	713	* @brief Receive an amount of data in blocking mode
bogdanm	0:9b334a45a8ff	714	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	715	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	716	* @param Size: amount of data to be received
bogdanm	0:9b334a45a8ff	717	* @param Timeout : Timeout duration
bogdanm	0:9b334a45a8ff	718	* @retval HAL status
bogdanm	0:9b334a45a8ff	719	*/
bogdanm	0:9b334a45a8ff	720	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	721	{
bogdanm	0:9b334a45a8ff	722	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	723	uint16_t uhMask;
bogdanm	0:9b334a45a8ff	724
bogdanm	0:9b334a45a8ff	725	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	726	{
bogdanm	0:9b334a45a8ff	727	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	728	{
bogdanm	0:9b334a45a8ff	729	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	730	}
bogdanm	0:9b334a45a8ff	731
bogdanm	0:9b334a45a8ff	732	/* Process Locked */
bogdanm	0:9b334a45a8ff	733	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	734
bogdanm	0:9b334a45a8ff	735	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	736	/* Check if a non-blocking transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	737	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	738	{
bogdanm	0:9b334a45a8ff	739	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	740	}
bogdanm	0:9b334a45a8ff	741	else
bogdanm	0:9b334a45a8ff	742	{
bogdanm	0:9b334a45a8ff	743	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	744	}
bogdanm	0:9b334a45a8ff	745
bogdanm	0:9b334a45a8ff	746	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	747	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	748
bogdanm	0:9b334a45a8ff	749	/* Computation of UART mask to apply to RDR register */
bogdanm	0:9b334a45a8ff	750	UART_MASK_COMPUTATION(huart);
bogdanm	0:9b334a45a8ff	751	uhMask = huart->Mask;
bogdanm	0:9b334a45a8ff	752
bogdanm	0:9b334a45a8ff	753	/* as long as data have to be received */
bogdanm	0:9b334a45a8ff	754	while(huart->RxXferCount > 0)
bogdanm	0:9b334a45a8ff	755	{
bogdanm	0:9b334a45a8ff	756	huart->RxXferCount--;
bogdanm	0:9b334a45a8ff	757	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	758	{
bogdanm	0:9b334a45a8ff	759	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	760	}
bogdanm	0:9b334a45a8ff	761	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	762	{
bogdanm	0:9b334a45a8ff	763	tmp = (uint16_t*) pData ;
bogdanm	0:9b334a45a8ff	764	*tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm	0:9b334a45a8ff	765	pData +=2;
bogdanm	0:9b334a45a8ff	766	}
bogdanm	0:9b334a45a8ff	767	else
bogdanm	0:9b334a45a8ff	768	{
bogdanm	0:9b334a45a8ff	769	*pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm	0:9b334a45a8ff	770	}
bogdanm	0:9b334a45a8ff	771	}
bogdanm	0:9b334a45a8ff	772
bogdanm	0:9b334a45a8ff	773	/* Check if a non-blocking transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	774	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	775	{
bogdanm	0:9b334a45a8ff	776	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	777	}
bogdanm	0:9b334a45a8ff	778	else
bogdanm	0:9b334a45a8ff	779	{
bogdanm	0:9b334a45a8ff	780	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	781	}
bogdanm	0:9b334a45a8ff	782	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	783	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	784
bogdanm	0:9b334a45a8ff	785	return HAL_OK;
bogdanm	0:9b334a45a8ff	786	}
bogdanm	0:9b334a45a8ff	787	else
bogdanm	0:9b334a45a8ff	788	{
bogdanm	0:9b334a45a8ff	789	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	790	}
bogdanm	0:9b334a45a8ff	791	}
bogdanm	0:9b334a45a8ff	792
bogdanm	0:9b334a45a8ff	793	/**
bogdanm	0:9b334a45a8ff	794	* @brief Send an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	795	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	796	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	797	* @param Size: amount of data to be sent
bogdanm	0:9b334a45a8ff	798	* @retval HAL status
bogdanm	0:9b334a45a8ff	799	*/
bogdanm	0:9b334a45a8ff	800	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	801	{
bogdanm	0:9b334a45a8ff	802	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	803	{
bogdanm	0:9b334a45a8ff	804	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	805	{
bogdanm	0:9b334a45a8ff	806	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	807	}
bogdanm	0:9b334a45a8ff	808
bogdanm	0:9b334a45a8ff	809	/* Process Locked */
bogdanm	0:9b334a45a8ff	810	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	811
bogdanm	0:9b334a45a8ff	812	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	813	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	814	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	815
bogdanm	0:9b334a45a8ff	816	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	817	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	818	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	819	{
bogdanm	0:9b334a45a8ff	820	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	821	}
bogdanm	0:9b334a45a8ff	822	else
bogdanm	0:9b334a45a8ff	823	{
bogdanm	0:9b334a45a8ff	824	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	825	}
bogdanm	0:9b334a45a8ff	826
bogdanm	0:9b334a45a8ff	827	/* Enable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	828	__HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	829
bogdanm	0:9b334a45a8ff	830	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	831	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	832
bogdanm	0:9b334a45a8ff	833	/* Enable the UART Transmit data register empty Interrupt */
bogdanm	0:9b334a45a8ff	834	__HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	835
bogdanm	0:9b334a45a8ff	836	return HAL_OK;
bogdanm	0:9b334a45a8ff	837	}
bogdanm	0:9b334a45a8ff	838	else
bogdanm	0:9b334a45a8ff	839	{
bogdanm	0:9b334a45a8ff	840	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	841	}
bogdanm	0:9b334a45a8ff	842	}
bogdanm	0:9b334a45a8ff	843
bogdanm	0:9b334a45a8ff	844	/**
bogdanm	0:9b334a45a8ff	845	* @brief Receive an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	846	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	847	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	848	* @param Size: amount of data to be received
bogdanm	0:9b334a45a8ff	849	* @retval HAL status
bogdanm	0:9b334a45a8ff	850	*/
bogdanm	0:9b334a45a8ff	851	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	852	{
bogdanm	0:9b334a45a8ff	853	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	854	{
bogdanm	0:9b334a45a8ff	855	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	856	{
bogdanm	0:9b334a45a8ff	857	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	858	}
bogdanm	0:9b334a45a8ff	859
bogdanm	0:9b334a45a8ff	860	/* Process Locked */
bogdanm	0:9b334a45a8ff	861	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	862
bogdanm	0:9b334a45a8ff	863	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	864	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	865	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	866
bogdanm	0:9b334a45a8ff	867	/* Computation of UART mask to apply to RDR register */
bogdanm	0:9b334a45a8ff	868	UART_MASK_COMPUTATION(huart);
bogdanm	0:9b334a45a8ff	869
bogdanm	0:9b334a45a8ff	870	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	871	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	872	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	873	{
bogdanm	0:9b334a45a8ff	874	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	875	}
bogdanm	0:9b334a45a8ff	876	else
bogdanm	0:9b334a45a8ff	877	{
bogdanm	0:9b334a45a8ff	878	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	879	}
bogdanm	0:9b334a45a8ff	880
bogdanm	0:9b334a45a8ff	881	/* Enable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	882	__HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	883
bogdanm	0:9b334a45a8ff	884	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	885	__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	886
bogdanm	0:9b334a45a8ff	887	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	888	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	889
bogdanm	0:9b334a45a8ff	890	/* Enable the UART Data Register not empty Interrupt */
bogdanm	0:9b334a45a8ff	891	__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	892
bogdanm	0:9b334a45a8ff	893	return HAL_OK;
bogdanm	0:9b334a45a8ff	894	}
bogdanm	0:9b334a45a8ff	895	else
bogdanm	0:9b334a45a8ff	896	{
bogdanm	0:9b334a45a8ff	897	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	898	}
bogdanm	0:9b334a45a8ff	899	}
bogdanm	0:9b334a45a8ff	900
bogdanm	0:9b334a45a8ff	901	/**
bogdanm	0:9b334a45a8ff	902	* @brief Send an amount of data in DMA mode
bogdanm	0:9b334a45a8ff	903	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	904	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	905	* @param Size: amount of data to be sent
bogdanm	0:9b334a45a8ff	906	* @retval HAL status
bogdanm	0:9b334a45a8ff	907	*/
bogdanm	0:9b334a45a8ff	908	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	909	{
bogdanm	0:9b334a45a8ff	910	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	911
bogdanm	0:9b334a45a8ff	912	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	913	{
bogdanm	0:9b334a45a8ff	914	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	915	{
bogdanm	0:9b334a45a8ff	916	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	917	}
bogdanm	0:9b334a45a8ff	918
bogdanm	0:9b334a45a8ff	919	/* Process Locked */
bogdanm	0:9b334a45a8ff	920	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	921
bogdanm	0:9b334a45a8ff	922	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	923	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	924	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	925
bogdanm	0:9b334a45a8ff	926	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	927	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	928	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	929	{
bogdanm	0:9b334a45a8ff	930	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	931	}
bogdanm	0:9b334a45a8ff	932	else
bogdanm	0:9b334a45a8ff	933	{
bogdanm	0:9b334a45a8ff	934	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	935	}
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	/* Set the UART DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	938	huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
bogdanm	0:9b334a45a8ff	939
bogdanm	0:9b334a45a8ff	940	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	941	huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
bogdanm	0:9b334a45a8ff	942
bogdanm	0:9b334a45a8ff	943	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	944	huart->hdmatx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	945
bogdanm	0:9b334a45a8ff	946	/* Enable the UART transmit DMA Stream */
bogdanm	0:9b334a45a8ff	947	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	948	HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)tmp, (uint32_t)&huart->Instance->TDR, Size);
bogdanm	0:9b334a45a8ff	949
bogdanm	0:9b334a45a8ff	950	/* Clear the TC flag in the SR register by writing 0 to it */
bogdanm	0:9b334a45a8ff	951	__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/* Enable the DMA transfer for transmit request by setting the DMAT bit
bogdanm	0:9b334a45a8ff	954	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	955	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	956
bogdanm	0:9b334a45a8ff	957	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	958	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	959
bogdanm	0:9b334a45a8ff	960	return HAL_OK;
bogdanm	0:9b334a45a8ff	961	}
bogdanm	0:9b334a45a8ff	962	else
bogdanm	0:9b334a45a8ff	963	{
bogdanm	0:9b334a45a8ff	964	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	965	}
bogdanm	0:9b334a45a8ff	966	}
bogdanm	0:9b334a45a8ff	967
bogdanm	0:9b334a45a8ff	968	/**
bogdanm	0:9b334a45a8ff	969	* @brief Receive an amount of data in DMA mode
bogdanm	0:9b334a45a8ff	970	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	971	* @param pData: pointer to data buffer
bogdanm	0:9b334a45a8ff	972	* @param Size: amount of data to be received
bogdanm	0:9b334a45a8ff	973	* @note When the UART parity is enabled (PCE = 1) the data received contain the parity bit.
bogdanm	0:9b334a45a8ff	974	* @retval HAL status
bogdanm	0:9b334a45a8ff	975	*/
bogdanm	0:9b334a45a8ff	976	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	977	{
bogdanm	0:9b334a45a8ff	978	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	979
bogdanm	0:9b334a45a8ff	980	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	981	{
bogdanm	0:9b334a45a8ff	982	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	983	{
bogdanm	0:9b334a45a8ff	984	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	985	}
bogdanm	0:9b334a45a8ff	986
bogdanm	0:9b334a45a8ff	987	/* Process Locked */
bogdanm	0:9b334a45a8ff	988	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	989
bogdanm	0:9b334a45a8ff	990	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	991	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	992
bogdanm	0:9b334a45a8ff	993	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	994	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	995	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	996	{
bogdanm	0:9b334a45a8ff	997	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	998	}
bogdanm	0:9b334a45a8ff	999	else
bogdanm	0:9b334a45a8ff	1000	{
bogdanm	0:9b334a45a8ff	1001	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1002	}
bogdanm	0:9b334a45a8ff	1003
bogdanm	0:9b334a45a8ff	1004	/* Set the UART DMA transfert complete callback */
bogdanm	0:9b334a45a8ff	1005	huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
bogdanm	0:9b334a45a8ff	1006
bogdanm	0:9b334a45a8ff	1007	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	1008	huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
bogdanm	0:9b334a45a8ff	1009
bogdanm	0:9b334a45a8ff	1010	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1011	huart->hdmarx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	1012
bogdanm	0:9b334a45a8ff	1013	/* Enable the DMA Stream */
bogdanm	0:9b334a45a8ff	1014	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	1015	HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)tmp, Size);
bogdanm	0:9b334a45a8ff	1016
bogdanm	0:9b334a45a8ff	1017	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm	0:9b334a45a8ff	1018	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1019	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1020
bogdanm	0:9b334a45a8ff	1021	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1022	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1023
bogdanm	0:9b334a45a8ff	1024	return HAL_OK;
bogdanm	0:9b334a45a8ff	1025	}
bogdanm	0:9b334a45a8ff	1026	else
bogdanm	0:9b334a45a8ff	1027	{
bogdanm	0:9b334a45a8ff	1028	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1029	}
bogdanm	0:9b334a45a8ff	1030	}
bogdanm	0:9b334a45a8ff	1031
bogdanm	0:9b334a45a8ff	1032	/**
bogdanm	0:9b334a45a8ff	1033	* @brief Pauses the DMA Transfer.
bogdanm	0:9b334a45a8ff	1034	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1035	* @retval None
bogdanm	0:9b334a45a8ff	1036	*/
bogdanm	0:9b334a45a8ff	1037	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1038	{
bogdanm	0:9b334a45a8ff	1039	/* Process Locked */
bogdanm	0:9b334a45a8ff	1040	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1041
bogdanm	0:9b334a45a8ff	1042	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1043	{
bogdanm	0:9b334a45a8ff	1044	/* Disable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1045	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1046	}
bogdanm	0:9b334a45a8ff	1047	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	1048	{
bogdanm	0:9b334a45a8ff	1049	/* Disable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1050	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1051	}
bogdanm	0:9b334a45a8ff	1052	else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1053	{
bogdanm	0:9b334a45a8ff	1054	/* Disable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1055	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1056	/* Disable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1057	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1058	}
bogdanm	0:9b334a45a8ff	1059	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1060	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1061
bogdanm	0:9b334a45a8ff	1062	return HAL_OK;
bogdanm	0:9b334a45a8ff	1063	}
bogdanm	0:9b334a45a8ff	1064
bogdanm	0:9b334a45a8ff	1065	/**
bogdanm	0:9b334a45a8ff	1066	* @brief Resumes the DMA Transfer.
bogdanm	0:9b334a45a8ff	1067	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1068	* @retval None
bogdanm	0:9b334a45a8ff	1069	*/
bogdanm	0:9b334a45a8ff	1070	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1071	{
bogdanm	0:9b334a45a8ff	1072	/* Process Locked */
bogdanm	0:9b334a45a8ff	1073	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1074
bogdanm	0:9b334a45a8ff	1075	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1076	{
bogdanm	0:9b334a45a8ff	1077	/* Enable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1078	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1079	}
bogdanm	0:9b334a45a8ff	1080	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	1081	{
bogdanm	0:9b334a45a8ff	1082	/* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm	0:9b334a45a8ff	1083	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
bogdanm	0:9b334a45a8ff	1084
bogdanm	0:9b334a45a8ff	1085	/* Enable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1086	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1087	}
bogdanm	0:9b334a45a8ff	1088	else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1089	{
bogdanm	0:9b334a45a8ff	1090	/* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm	0:9b334a45a8ff	1091	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
bogdanm	0:9b334a45a8ff	1092
bogdanm	0:9b334a45a8ff	1093	/* Enable the UART DMA Rx request before the DMA Tx request */
bogdanm	0:9b334a45a8ff	1094	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1095
bogdanm	0:9b334a45a8ff	1096	/* Enable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1097	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1098	}
bogdanm	0:9b334a45a8ff	1099
bogdanm	0:9b334a45a8ff	1100	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1101	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1102
bogdanm	0:9b334a45a8ff	1103	return HAL_OK;
bogdanm	0:9b334a45a8ff	1104	}
bogdanm	0:9b334a45a8ff	1105
bogdanm	0:9b334a45a8ff	1106	/**
bogdanm	0:9b334a45a8ff	1107	* @brief Stops the DMA Transfer.
bogdanm	0:9b334a45a8ff	1108	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1109	* @retval None
bogdanm	0:9b334a45a8ff	1110	*/
bogdanm	0:9b334a45a8ff	1111	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1112	{
bogdanm	0:9b334a45a8ff	1113	/* The Lock is not implemented on this API to allow the user application
bogdanm	0:9b334a45a8ff	1114	to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
bogdanm	0:9b334a45a8ff	1115	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
bogdanm	0:9b334a45a8ff	1116	and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
bogdanm	0:9b334a45a8ff	1117	*/
bogdanm	0:9b334a45a8ff	1118
bogdanm	0:9b334a45a8ff	1119	/* Disable the UART Tx/Rx DMA requests */
bogdanm	0:9b334a45a8ff	1120	huart->Instance->CR3 &= ~USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1121	huart->Instance->CR3 &= ~USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1122
bogdanm	0:9b334a45a8ff	1123	/* Abort the UART DMA tx channel */
bogdanm	0:9b334a45a8ff	1124	if(huart->hdmatx != NULL)
bogdanm	0:9b334a45a8ff	1125	{
bogdanm	0:9b334a45a8ff	1126	HAL_DMA_Abort(huart->hdmatx);
bogdanm	0:9b334a45a8ff	1127	}
bogdanm	0:9b334a45a8ff	1128	/* Abort the UART DMA rx channel */
bogdanm	0:9b334a45a8ff	1129	if(huart->hdmarx != NULL)
bogdanm	0:9b334a45a8ff	1130	{
bogdanm	0:9b334a45a8ff	1131	HAL_DMA_Abort(huart->hdmarx);
bogdanm	0:9b334a45a8ff	1132	}
bogdanm	0:9b334a45a8ff	1133
bogdanm	0:9b334a45a8ff	1134	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1135
bogdanm	0:9b334a45a8ff	1136	return HAL_OK;
bogdanm	0:9b334a45a8ff	1137	}
bogdanm	0:9b334a45a8ff	1138
bogdanm	0:9b334a45a8ff	1139	/**
bogdanm	0:9b334a45a8ff	1140	* @brief This function handles UART interrupt request.
bogdanm	0:9b334a45a8ff	1141	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1142	* @retval None
bogdanm	0:9b334a45a8ff	1143	*/
bogdanm	0:9b334a45a8ff	1144	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1145	{
bogdanm	0:9b334a45a8ff	1146	/* UART parity error interrupt occurred ------------------------------------*/
bogdanm	0:9b334a45a8ff	1147
bogdanm	0:9b334a45a8ff	1148	if((__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE) != RESET))
bogdanm	0:9b334a45a8ff	1149	{
mbed_official	113:b3775bf36a83	1150	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
bogdanm	0:9b334a45a8ff	1151
bogdanm	0:9b334a45a8ff	1152	huart->ErrorCode \|= HAL_UART_ERROR_PE;
bogdanm	0:9b334a45a8ff	1153	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1154	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1155	}
bogdanm	0:9b334a45a8ff	1156
bogdanm	0:9b334a45a8ff	1157	/* UART frame error interrupt occured --------------------------------------*/
bogdanm	0:9b334a45a8ff	1158	if((__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm	0:9b334a45a8ff	1159	{
mbed_official	113:b3775bf36a83	1160	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
bogdanm	0:9b334a45a8ff	1161
bogdanm	0:9b334a45a8ff	1162	huart->ErrorCode \|= HAL_UART_ERROR_FE;
bogdanm	0:9b334a45a8ff	1163	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1164	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1165	}
bogdanm	0:9b334a45a8ff	1166
bogdanm	0:9b334a45a8ff	1167	/* UART noise error interrupt occured --------------------------------------*/
bogdanm	0:9b334a45a8ff	1168	if((__HAL_UART_GET_IT(huart, UART_IT_NE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm	0:9b334a45a8ff	1169	{
mbed_official	113:b3775bf36a83	1170	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
bogdanm	0:9b334a45a8ff	1171
bogdanm	0:9b334a45a8ff	1172	huart->ErrorCode \|= HAL_UART_ERROR_NE;
bogdanm	0:9b334a45a8ff	1173	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1174	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1175	}
bogdanm	0:9b334a45a8ff	1176
bogdanm	0:9b334a45a8ff	1177	/* UART Over-Run interrupt occured -----------------------------------------*/
bogdanm	0:9b334a45a8ff	1178	if((__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm	0:9b334a45a8ff	1179	{
mbed_official	113:b3775bf36a83	1180	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
bogdanm	0:9b334a45a8ff	1181
bogdanm	0:9b334a45a8ff	1182	huart->ErrorCode \|= HAL_UART_ERROR_ORE;
bogdanm	0:9b334a45a8ff	1183	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1184	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1185	}
bogdanm	0:9b334a45a8ff	1186
bogdanm	0:9b334a45a8ff	1187	/* Call UART Error Call back function if need be --------------------------*/
bogdanm	0:9b334a45a8ff	1188	if(huart->ErrorCode != HAL_UART_ERROR_NONE)
bogdanm	0:9b334a45a8ff	1189	{
bogdanm	0:9b334a45a8ff	1190	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1191	}
bogdanm	0:9b334a45a8ff	1192
bogdanm	0:9b334a45a8ff	1193	/* UART Wake Up interrupt occured ------------------------------------------*/
bogdanm	0:9b334a45a8ff	1194	if((__HAL_UART_GET_IT(huart, UART_IT_WUF) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_WUF) != RESET))
bogdanm	0:9b334a45a8ff	1195	{
bogdanm	0:9b334a45a8ff	1196	__HAL_UART_CLEAR_IT(huart, UART_CLEAR_WUF);
bogdanm	0:9b334a45a8ff	1197	/* Set the UART state ready to be able to start again the process */
bogdanm	0:9b334a45a8ff	1198	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1199	HAL_UARTEx_WakeupCallback(huart);
bogdanm	0:9b334a45a8ff	1200	}
bogdanm	0:9b334a45a8ff	1201
bogdanm	0:9b334a45a8ff	1202	/* UART in mode Receiver ---------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1203	if((__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET))
bogdanm	0:9b334a45a8ff	1204	{
bogdanm	0:9b334a45a8ff	1205	UART_Receive_IT(huart);
bogdanm	0:9b334a45a8ff	1206	}
bogdanm	0:9b334a45a8ff	1207
bogdanm	0:9b334a45a8ff	1208	/* UART in mode Transmitter ------------------------------------------------*/
bogdanm	0:9b334a45a8ff	1209	if((__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET))
bogdanm	0:9b334a45a8ff	1210	{
bogdanm	0:9b334a45a8ff	1211	UART_Transmit_IT(huart);
bogdanm	0:9b334a45a8ff	1212	}
bogdanm	0:9b334a45a8ff	1213
bogdanm	0:9b334a45a8ff	1214	/* UART in mode Transmitter -- TC ------------------------------------------*/
bogdanm	0:9b334a45a8ff	1215	if((__HAL_UART_GET_IT(huart, UART_IT_TC) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET))
bogdanm	0:9b334a45a8ff	1216	{
bogdanm	0:9b334a45a8ff	1217	UART_EndTransmit_IT(huart);
bogdanm	0:9b334a45a8ff	1218	}
bogdanm	0:9b334a45a8ff	1219	}
bogdanm	0:9b334a45a8ff	1220
bogdanm	0:9b334a45a8ff	1221	/**
bogdanm	0:9b334a45a8ff	1222	* @brief Tx Transfer completed callbacks
bogdanm	0:9b334a45a8ff	1223	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1224	* @retval None
bogdanm	0:9b334a45a8ff	1225	*/
bogdanm	0:9b334a45a8ff	1226	__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1227	{
mbed_official	113:b3775bf36a83	1228	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1229	UNUSED(huart);
mbed_official	113:b3775bf36a83	1230
bogdanm	0:9b334a45a8ff	1231	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1232	the HAL_UART_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1233	*/
bogdanm	0:9b334a45a8ff	1234	}
bogdanm	0:9b334a45a8ff	1235
bogdanm	0:9b334a45a8ff	1236	/**
bogdanm	0:9b334a45a8ff	1237	* @brief Tx Half Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1238	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1239	* @retval None
bogdanm	0:9b334a45a8ff	1240	*/
bogdanm	0:9b334a45a8ff	1241	__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1242	{
mbed_official	113:b3775bf36a83	1243	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1244	UNUSED(huart);
mbed_official	113:b3775bf36a83	1245
bogdanm	0:9b334a45a8ff	1246	/* NOTE: This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1247	the HAL_UART_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1248	*/
bogdanm	0:9b334a45a8ff	1249	}
bogdanm	0:9b334a45a8ff	1250
bogdanm	0:9b334a45a8ff	1251	/**
bogdanm	0:9b334a45a8ff	1252	* @brief Rx Transfer completed callbacks
bogdanm	0:9b334a45a8ff	1253	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1254	* @retval None
bogdanm	0:9b334a45a8ff	1255	*/
bogdanm	0:9b334a45a8ff	1256	__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1257	{
mbed_official	113:b3775bf36a83	1258	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1259	UNUSED(huart);
mbed_official	113:b3775bf36a83	1260
bogdanm	0:9b334a45a8ff	1261	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1262	the HAL_UART_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1263	*/
bogdanm	0:9b334a45a8ff	1264	}
bogdanm	0:9b334a45a8ff	1265
bogdanm	0:9b334a45a8ff	1266	/**
bogdanm	0:9b334a45a8ff	1267	* @brief Rx Half Transfer completed callbacks.
bogdanm	0:9b334a45a8ff	1268	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1269	* @retval None
bogdanm	0:9b334a45a8ff	1270	*/
bogdanm	0:9b334a45a8ff	1271	__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1272	{
mbed_official	113:b3775bf36a83	1273	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1274	UNUSED(huart);
mbed_official	113:b3775bf36a83	1275
bogdanm	0:9b334a45a8ff	1276	/* NOTE: This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1277	the HAL_UART_TxCpltCallback could be implemented in the user file
bogdanm	0:9b334a45a8ff	1278	*/
bogdanm	0:9b334a45a8ff	1279	}
bogdanm	0:9b334a45a8ff	1280
bogdanm	0:9b334a45a8ff	1281	/**
bogdanm	0:9b334a45a8ff	1282	* @brief UART error callbacks
bogdanm	0:9b334a45a8ff	1283	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1284	* @retval None
bogdanm	0:9b334a45a8ff	1285	*/
bogdanm	0:9b334a45a8ff	1286	__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1287	{
mbed_official	113:b3775bf36a83	1288	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1289	UNUSED(huart);
mbed_official	113:b3775bf36a83	1290
bogdanm	0:9b334a45a8ff	1291	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1292	the HAL_UART_ErrorCallback can be implemented in the user file
bogdanm	0:9b334a45a8ff	1293	*/
bogdanm	0:9b334a45a8ff	1294	}
bogdanm	0:9b334a45a8ff	1295
bogdanm	0:9b334a45a8ff	1296
bogdanm	0:9b334a45a8ff	1297	/**
bogdanm	0:9b334a45a8ff	1298	* @}
bogdanm	0:9b334a45a8ff	1299	*/
bogdanm	0:9b334a45a8ff	1300
bogdanm	0:9b334a45a8ff	1301	/** @addtogroup UART_Exported_Functions_Group3
bogdanm	0:9b334a45a8ff	1302	* @brief UART control functions
bogdanm	0:9b334a45a8ff	1303	*
bogdanm	0:9b334a45a8ff	1304	@verbatim
bogdanm	0:9b334a45a8ff	1305	===============================================================================
bogdanm	0:9b334a45a8ff	1306	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	1307	===============================================================================
bogdanm	0:9b334a45a8ff	1308	[..]
bogdanm	0:9b334a45a8ff	1309	This subsection provides a set of functions allowing to control the UART.
bogdanm	0:9b334a45a8ff	1310	(+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
bogdanm	0:9b334a45a8ff	1311	(+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
bogdanm	0:9b334a45a8ff	1312	(+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
bogdanm	0:9b334a45a8ff	1313	(+) HAL_HalfDuplex_EnableTransmitter() API enables the transmitter
bogdanm	0:9b334a45a8ff	1314	(+) HAL_HalfDuplex_EnableReceiver() API enables the receiver
bogdanm	0:9b334a45a8ff	1315	(+) HAL_UART_GetState() API is helpful to check in run-time the state of the UART peripheral
bogdanm	0:9b334a45a8ff	1316	(+) HAL_UART_GetError()API is helpful to check in run-time the error state of the UART peripheral
bogdanm	0:9b334a45a8ff	1317	@endverbatim
bogdanm	0:9b334a45a8ff	1318	* @{
bogdanm	0:9b334a45a8ff	1319	*/
bogdanm	0:9b334a45a8ff	1320
bogdanm	0:9b334a45a8ff	1321	/**
bogdanm	0:9b334a45a8ff	1322	* @brief Enable UART in mute mode (doesn't mean UART enters mute mode;
bogdanm	0:9b334a45a8ff	1323	* to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called)
bogdanm	0:9b334a45a8ff	1324	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1325	* @retval HAL status
bogdanm	0:9b334a45a8ff	1326	*/
bogdanm	0:9b334a45a8ff	1327	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1328	{
bogdanm	0:9b334a45a8ff	1329	/* Process Locked */
bogdanm	0:9b334a45a8ff	1330	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1331
bogdanm	0:9b334a45a8ff	1332	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1333
bogdanm	0:9b334a45a8ff	1334	/* Enable USART mute mode by setting the MME bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1335	huart->Instance->CR1 \|= USART_CR1_MME;
bogdanm	0:9b334a45a8ff	1336
bogdanm	0:9b334a45a8ff	1337	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1338
bogdanm	0:9b334a45a8ff	1339	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	1340	}
bogdanm	0:9b334a45a8ff	1341
bogdanm	0:9b334a45a8ff	1342	/**
bogdanm	0:9b334a45a8ff	1343	* @brief Disable UART mute mode (doesn't mean it actually wakes up the software,
bogdanm	0:9b334a45a8ff	1344	* as it may not have been in mute mode at this very moment).
bogdanm	0:9b334a45a8ff	1345	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1346	* @retval HAL status
bogdanm	0:9b334a45a8ff	1347	*/
bogdanm	0:9b334a45a8ff	1348	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1349	{
bogdanm	0:9b334a45a8ff	1350	/* Process Locked */
bogdanm	0:9b334a45a8ff	1351	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1352
bogdanm	0:9b334a45a8ff	1353	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1354
bogdanm	0:9b334a45a8ff	1355	/* Disable USART mute mode by clearing the MME bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1356	huart->Instance->CR1 &= ~(USART_CR1_MME);
bogdanm	0:9b334a45a8ff	1357
bogdanm	0:9b334a45a8ff	1358	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1359
bogdanm	0:9b334a45a8ff	1360	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	1361	}
bogdanm	0:9b334a45a8ff	1362
bogdanm	0:9b334a45a8ff	1363	/**
bogdanm	0:9b334a45a8ff	1364	* @brief Enter UART mute mode (means UART actually enters mute mode).
bogdanm	0:9b334a45a8ff	1365	* To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
bogdanm	0:9b334a45a8ff	1366	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1367	* @retval HAL status
bogdanm	0:9b334a45a8ff	1368	*/
bogdanm	0:9b334a45a8ff	1369	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1370	{
bogdanm	0:9b334a45a8ff	1371	__HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
bogdanm	0:9b334a45a8ff	1372	}
bogdanm	0:9b334a45a8ff	1373
bogdanm	0:9b334a45a8ff	1374	/**
bogdanm	0:9b334a45a8ff	1375	* @brief Enables the UART transmitter and disables the UART receiver.
bogdanm	0:9b334a45a8ff	1376	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1377	* @retval HAL status
bogdanm	0:9b334a45a8ff	1378	* @retval None
bogdanm	0:9b334a45a8ff	1379	*/
bogdanm	0:9b334a45a8ff	1380	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1381	{
bogdanm	0:9b334a45a8ff	1382	/* Process Locked */
bogdanm	0:9b334a45a8ff	1383	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1384	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1385
bogdanm	0:9b334a45a8ff	1386	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1387	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE \| USART_CR1_RE));
bogdanm	0:9b334a45a8ff	1388	/* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1389	SET_BIT(huart->Instance->CR1, USART_CR1_TE);
bogdanm	0:9b334a45a8ff	1390
bogdanm	0:9b334a45a8ff	1391	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1392	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1393	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1394
bogdanm	0:9b334a45a8ff	1395	return HAL_OK;
bogdanm	0:9b334a45a8ff	1396	}
bogdanm	0:9b334a45a8ff	1397
bogdanm	0:9b334a45a8ff	1398	/**
bogdanm	0:9b334a45a8ff	1399	* @brief Enables the UART receiver and disables the UART transmitter.
bogdanm	0:9b334a45a8ff	1400	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1401	* @retval HAL status
bogdanm	0:9b334a45a8ff	1402	*/
bogdanm	0:9b334a45a8ff	1403	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1404	{
bogdanm	0:9b334a45a8ff	1405	/* Process Locked */
bogdanm	0:9b334a45a8ff	1406	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1407	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1408
bogdanm	0:9b334a45a8ff	1409	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1410	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE \| USART_CR1_RE));
bogdanm	0:9b334a45a8ff	1411	/* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1412	SET_BIT(huart->Instance->CR1, USART_CR1_RE);
bogdanm	0:9b334a45a8ff	1413
bogdanm	0:9b334a45a8ff	1414	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1415	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1416	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1417
bogdanm	0:9b334a45a8ff	1418	return HAL_OK;
bogdanm	0:9b334a45a8ff	1419	}
bogdanm	0:9b334a45a8ff	1420
bogdanm	0:9b334a45a8ff	1421	/**
bogdanm	0:9b334a45a8ff	1422	* @brief Transmits break characters.
bogdanm	0:9b334a45a8ff	1423	* @param huart: pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1424	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1425	* @retval HAL status
bogdanm	0:9b334a45a8ff	1426	*/
bogdanm	0:9b334a45a8ff	1427	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1428	{
bogdanm	0:9b334a45a8ff	1429	/* Check the parameters */
mbed_official	113:b3775bf36a83	1430	assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1431
bogdanm	0:9b334a45a8ff	1432	/* Process Locked */
bogdanm	0:9b334a45a8ff	1433	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1434
bogdanm	0:9b334a45a8ff	1435	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1436
bogdanm	0:9b334a45a8ff	1437	/* Send break characters */
bogdanm	0:9b334a45a8ff	1438	huart->Instance->RQR \|= USART_RQR_SBKRQ;
bogdanm	0:9b334a45a8ff	1439
bogdanm	0:9b334a45a8ff	1440	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1441
bogdanm	0:9b334a45a8ff	1442	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1443	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1444
bogdanm	0:9b334a45a8ff	1445	return HAL_OK;
bogdanm	0:9b334a45a8ff	1446	}
bogdanm	0:9b334a45a8ff	1447
bogdanm	0:9b334a45a8ff	1448	/**
bogdanm	0:9b334a45a8ff	1449	* @brief return the UART state
bogdanm	0:9b334a45a8ff	1450	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1451	* @retval HAL state
bogdanm	0:9b334a45a8ff	1452	*/
bogdanm	0:9b334a45a8ff	1453	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1454	{
bogdanm	0:9b334a45a8ff	1455	return huart->State;
bogdanm	0:9b334a45a8ff	1456	}
bogdanm	0:9b334a45a8ff	1457
bogdanm	0:9b334a45a8ff	1458	/**
bogdanm	0:9b334a45a8ff	1459	* @brief Return the UART error code
bogdanm	0:9b334a45a8ff	1460	* @param huart : pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1461	* the configuration information for the specified UART.
bogdanm	0:9b334a45a8ff	1462	* @retval UART Error Code
bogdanm	0:9b334a45a8ff	1463	*/
bogdanm	0:9b334a45a8ff	1464	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1465	{
bogdanm	0:9b334a45a8ff	1466	return huart->ErrorCode;
bogdanm	0:9b334a45a8ff	1467	}
bogdanm	0:9b334a45a8ff	1468
bogdanm	0:9b334a45a8ff	1469	/**
bogdanm	0:9b334a45a8ff	1470	* @}
bogdanm	0:9b334a45a8ff	1471	*/
bogdanm	0:9b334a45a8ff	1472
mbed_official	113:b3775bf36a83	1473	/**
mbed_official	113:b3775bf36a83	1474	* @}
mbed_official	113:b3775bf36a83	1475	*/
mbed_official	113:b3775bf36a83	1476
bogdanm	0:9b334a45a8ff	1477	/***************************************************************
bogdanm	0:9b334a45a8ff	1478	* Private functions...
bogdanm	0:9b334a45a8ff	1479	*
bogdanm	0:9b334a45a8ff	1480	***************************************************************/
mbed_official	113:b3775bf36a83	1481	/** @addtogroup UART_Private
mbed_official	113:b3775bf36a83	1482	* @{
mbed_official	113:b3775bf36a83	1483	*/
bogdanm	0:9b334a45a8ff	1484	/**
bogdanm	0:9b334a45a8ff	1485	* @brief DMA UART transmit process complete callback
bogdanm	0:9b334a45a8ff	1486	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	1487	* @retval None
bogdanm	0:9b334a45a8ff	1488	*/
bogdanm	0:9b334a45a8ff	1489	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1490	{
bogdanm	0:9b334a45a8ff	1491	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	113:b3775bf36a83	1492
mbed_official	113:b3775bf36a83	1493	/* DMA Normal mode */
mbed_official	113:b3775bf36a83	1494	if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
mbed_official	113:b3775bf36a83	1495	{
mbed_official	113:b3775bf36a83	1496	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1497
mbed_official	113:b3775bf36a83	1498	/* Disable the DMA transfer for transmit request by resetting the DMAT bit
mbed_official	113:b3775bf36a83	1499	in the UART CR3 register */
mbed_official	113:b3775bf36a83	1500	huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1501
mbed_official	113:b3775bf36a83	1502	/* Enable the UART Transmit Complete Interrupt */
mbed_official	113:b3775bf36a83	1503	__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
mbed_official	113:b3775bf36a83	1504	}
mbed_official	113:b3775bf36a83	1505	/* DMA Circular mode */
mbed_official	113:b3775bf36a83	1506	else
mbed_official	113:b3775bf36a83	1507	{
mbed_official	113:b3775bf36a83	1508	HAL_UART_TxCpltCallback(huart);
mbed_official	113:b3775bf36a83	1509	}
bogdanm	0:9b334a45a8ff	1510
bogdanm	0:9b334a45a8ff	1511	}
bogdanm	0:9b334a45a8ff	1512
bogdanm	0:9b334a45a8ff	1513	/**
bogdanm	0:9b334a45a8ff	1514	* @brief DMA UART transmit process half complete callback
bogdanm	0:9b334a45a8ff	1515	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	1516	* @retval None
bogdanm	0:9b334a45a8ff	1517	*/
bogdanm	0:9b334a45a8ff	1518	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1519	{
bogdanm	0:9b334a45a8ff	1520	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1521
bogdanm	0:9b334a45a8ff	1522	HAL_UART_TxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1523	}
bogdanm	0:9b334a45a8ff	1524
bogdanm	0:9b334a45a8ff	1525	/**
bogdanm	0:9b334a45a8ff	1526	* @brief DMA UART receive process complete callback
bogdanm	0:9b334a45a8ff	1527	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	1528	* @retval None
bogdanm	0:9b334a45a8ff	1529	*/
bogdanm	0:9b334a45a8ff	1530	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1531	{
bogdanm	0:9b334a45a8ff	1532	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1533
bogdanm	0:9b334a45a8ff	1534	/* DMA Normal mode*/
bogdanm	0:9b334a45a8ff	1535	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
bogdanm	0:9b334a45a8ff	1536	{
bogdanm	0:9b334a45a8ff	1537	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1538
bogdanm	0:9b334a45a8ff	1539	/* Disable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm	0:9b334a45a8ff	1540	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1541	huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1542
bogdanm	0:9b334a45a8ff	1543	/* Check if a transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	1544	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1545	{
bogdanm	0:9b334a45a8ff	1546	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1547	}
bogdanm	0:9b334a45a8ff	1548	else
bogdanm	0:9b334a45a8ff	1549	{
bogdanm	0:9b334a45a8ff	1550	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1551	}
bogdanm	0:9b334a45a8ff	1552	}
bogdanm	0:9b334a45a8ff	1553	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1554	}
bogdanm	0:9b334a45a8ff	1555
bogdanm	0:9b334a45a8ff	1556	/**
bogdanm	0:9b334a45a8ff	1557	* @brief DMA UART receive process half complete callback
bogdanm	0:9b334a45a8ff	1558	* @param hdma : DMA handle
bogdanm	0:9b334a45a8ff	1559	* @retval None
bogdanm	0:9b334a45a8ff	1560	*/
bogdanm	0:9b334a45a8ff	1561	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1562	{
bogdanm	0:9b334a45a8ff	1563	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1564
bogdanm	0:9b334a45a8ff	1565	HAL_UART_RxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1566	}
bogdanm	0:9b334a45a8ff	1567
bogdanm	0:9b334a45a8ff	1568	/**
bogdanm	0:9b334a45a8ff	1569	* @brief DMA UART communication error callback
bogdanm	0:9b334a45a8ff	1570	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	1571	* @retval None
bogdanm	0:9b334a45a8ff	1572	*/
bogdanm	0:9b334a45a8ff	1573	static void UART_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1574	{
bogdanm	0:9b334a45a8ff	1575	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1576	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1577	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1578	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1579	huart->ErrorCode \|= HAL_UART_ERROR_DMA;
bogdanm	0:9b334a45a8ff	1580	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1581	}
bogdanm	0:9b334a45a8ff	1582
bogdanm	0:9b334a45a8ff	1583	/**
bogdanm	0:9b334a45a8ff	1584	* @brief Send an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	1585	* Function called under interruption only, once
bogdanm	0:9b334a45a8ff	1586	* interruptions have been enabled by HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	1587	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1588	* @retval HAL status
bogdanm	0:9b334a45a8ff	1589	*/
bogdanm	0:9b334a45a8ff	1590	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1591	{
bogdanm	0:9b334a45a8ff	1592	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1593
bogdanm	0:9b334a45a8ff	1594	if ((huart->State == HAL_UART_STATE_BUSY_TX) \|\| (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1595	{
bogdanm	0:9b334a45a8ff	1596	if(huart->TxXferCount == 0)
bogdanm	0:9b334a45a8ff	1597	{
bogdanm	0:9b334a45a8ff	1598	/* Disable the UART TXE Interrupt */
bogdanm	0:9b334a45a8ff	1599	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1600
bogdanm	0:9b334a45a8ff	1601	/* Enable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1602	__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1603
bogdanm	0:9b334a45a8ff	1604	return HAL_OK;
bogdanm	0:9b334a45a8ff	1605
bogdanm	0:9b334a45a8ff	1606	}
bogdanm	0:9b334a45a8ff	1607	else
bogdanm	0:9b334a45a8ff	1608	{
bogdanm	0:9b334a45a8ff	1609	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	1610	{
bogdanm	0:9b334a45a8ff	1611	tmp = (uint16_t*) huart->pTxBuffPtr;
bogdanm	0:9b334a45a8ff	1612	huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	1613	huart->pTxBuffPtr += 2;
bogdanm	0:9b334a45a8ff	1614	}
bogdanm	0:9b334a45a8ff	1615	else
bogdanm	0:9b334a45a8ff	1616	{
bogdanm	0:9b334a45a8ff	1617	huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF);
bogdanm	0:9b334a45a8ff	1618	}
bogdanm	0:9b334a45a8ff	1619
bogdanm	0:9b334a45a8ff	1620	huart->TxXferCount--;
bogdanm	0:9b334a45a8ff	1621
bogdanm	0:9b334a45a8ff	1622	return HAL_OK;
bogdanm	0:9b334a45a8ff	1623	}
bogdanm	0:9b334a45a8ff	1624	}
bogdanm	0:9b334a45a8ff	1625	else
bogdanm	0:9b334a45a8ff	1626	{
bogdanm	0:9b334a45a8ff	1627	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1628	}
bogdanm	0:9b334a45a8ff	1629	}
bogdanm	0:9b334a45a8ff	1630
bogdanm	0:9b334a45a8ff	1631	/**
bogdanm	0:9b334a45a8ff	1632	* @brief Wraps up transmission in non blocking mode.
bogdanm	0:9b334a45a8ff	1633	* @param huart: pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1634	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1635	* @retval HAL status
bogdanm	0:9b334a45a8ff	1636	*/
bogdanm	0:9b334a45a8ff	1637	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1638	{
bogdanm	0:9b334a45a8ff	1639	/* Disable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1640	__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1641
bogdanm	0:9b334a45a8ff	1642	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	1643	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1644	{
bogdanm	0:9b334a45a8ff	1645	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1646	}
bogdanm	0:9b334a45a8ff	1647	else
bogdanm	0:9b334a45a8ff	1648	{
bogdanm	0:9b334a45a8ff	1649	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1650	}
bogdanm	0:9b334a45a8ff	1651
bogdanm	0:9b334a45a8ff	1652	HAL_UART_TxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1653
bogdanm	0:9b334a45a8ff	1654	return HAL_OK;
bogdanm	0:9b334a45a8ff	1655	}
bogdanm	0:9b334a45a8ff	1656
bogdanm	0:9b334a45a8ff	1657
bogdanm	0:9b334a45a8ff	1658	/**
bogdanm	0:9b334a45a8ff	1659	* @brief Receive an amount of data in interrupt mode
bogdanm	0:9b334a45a8ff	1660	* Function called under interruption only, once
bogdanm	0:9b334a45a8ff	1661	* interruptions have been enabled by HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	1662	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1663	* @retval HAL status
bogdanm	0:9b334a45a8ff	1664	*/
bogdanm	0:9b334a45a8ff	1665	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1666	{
bogdanm	0:9b334a45a8ff	1667	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1668	uint16_t uhMask = huart->Mask;
bogdanm	0:9b334a45a8ff	1669
bogdanm	0:9b334a45a8ff	1670	if((huart->State == HAL_UART_STATE_BUSY_RX) \|\| (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1671	{
bogdanm	0:9b334a45a8ff	1672	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	1673	{
bogdanm	0:9b334a45a8ff	1674	tmp = (uint16_t*) huart->pRxBuffPtr ;
bogdanm	0:9b334a45a8ff	1675	*tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm	0:9b334a45a8ff	1676	huart->pRxBuffPtr +=2;
bogdanm	0:9b334a45a8ff	1677	}
bogdanm	0:9b334a45a8ff	1678	else
bogdanm	0:9b334a45a8ff	1679	{
bogdanm	0:9b334a45a8ff	1680	*huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm	0:9b334a45a8ff	1681	}
bogdanm	0:9b334a45a8ff	1682
bogdanm	0:9b334a45a8ff	1683	if(--huart->RxXferCount == 0)
bogdanm	0:9b334a45a8ff	1684	{
bogdanm	0:9b334a45a8ff	1685	while(HAL_IS_BIT_SET(huart->Instance->ISR, UART_FLAG_RXNE))
bogdanm	0:9b334a45a8ff	1686	{
bogdanm	0:9b334a45a8ff	1687	}
bogdanm	0:9b334a45a8ff	1688	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1689
bogdanm	0:9b334a45a8ff	1690	/* Check if a transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	1691	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1692	{
bogdanm	0:9b334a45a8ff	1693	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1694	}
bogdanm	0:9b334a45a8ff	1695	else
bogdanm	0:9b334a45a8ff	1696	{
bogdanm	0:9b334a45a8ff	1697	/* Disable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	1698	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1699
bogdanm	0:9b334a45a8ff	1700	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	1701	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1702
bogdanm	0:9b334a45a8ff	1703	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1704	}
bogdanm	0:9b334a45a8ff	1705	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1706	return HAL_OK;
bogdanm	0:9b334a45a8ff	1707	}
bogdanm	0:9b334a45a8ff	1708	return HAL_OK;
bogdanm	0:9b334a45a8ff	1709	}
bogdanm	0:9b334a45a8ff	1710	else
bogdanm	0:9b334a45a8ff	1711	{
bogdanm	0:9b334a45a8ff	1712	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1713	}
bogdanm	0:9b334a45a8ff	1714	}
bogdanm	0:9b334a45a8ff	1715
bogdanm	0:9b334a45a8ff	1716	/**
bogdanm	0:9b334a45a8ff	1717	* @brief Configure the UART peripheral
bogdanm	0:9b334a45a8ff	1718	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1719	* @retval None
bogdanm	0:9b334a45a8ff	1720	*/
bogdanm	0:9b334a45a8ff	1721	void UART_SetConfig(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1722	{
bogdanm	0:9b334a45a8ff	1723	uint32_t tmpreg = 0x00000000;
bogdanm	0:9b334a45a8ff	1724	uint32_t clocksource = 0x00000000;
bogdanm	0:9b334a45a8ff	1725	uint16_t brrtemp = 0x0000;
bogdanm	0:9b334a45a8ff	1726	uint16_t usartdiv = 0x0000;
bogdanm	0:9b334a45a8ff	1727
bogdanm	0:9b334a45a8ff	1728	/* Check the parameters */
mbed_official	113:b3775bf36a83	1729	assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1730	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
mbed_official	113:b3775bf36a83	1731	if(UART_INSTANCE_LOWPOWER(huart))
mbed_official	113:b3775bf36a83	1732	{
mbed_official	113:b3775bf36a83	1733	assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
mbed_official	113:b3775bf36a83	1734	}
mbed_official	113:b3775bf36a83	1735	else
mbed_official	113:b3775bf36a83	1736	{
mbed_official	113:b3775bf36a83	1737	assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
mbed_official	113:b3775bf36a83	1738	assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
mbed_official	113:b3775bf36a83	1739	}
mbed_official	113:b3775bf36a83	1740
bogdanm	0:9b334a45a8ff	1741	assert_param(IS_UART_PARITY(huart->Init.Parity));
bogdanm	0:9b334a45a8ff	1742	assert_param(IS_UART_MODE(huart->Init.Mode));
bogdanm	0:9b334a45a8ff	1743	assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
bogdanm	0:9b334a45a8ff	1744	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
bogdanm	0:9b334a45a8ff	1745
bogdanm	0:9b334a45a8ff	1746	/-------------------------- USART CR1 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1747	/* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
bogdanm	0:9b334a45a8ff	1748	* the UART Word Length, Parity, Mode and oversampling:
bogdanm	0:9b334a45a8ff	1749	* set the M bits according to huart->Init.WordLength value
bogdanm	0:9b334a45a8ff	1750	* set PCE and PS bits according to huart->Init.Parity value
bogdanm	0:9b334a45a8ff	1751	* set TE and RE bits according to huart->Init.Mode value
bogdanm	0:9b334a45a8ff	1752	* set OVER8 bit according to huart->Init.OverSampling value */
bogdanm	0:9b334a45a8ff	1753	tmpreg = (uint32_t)huart->Init.WordLength \| huart->Init.Parity \| huart->Init.Mode \| huart->Init.OverSampling ;
bogdanm	0:9b334a45a8ff	1754	MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg);
bogdanm	0:9b334a45a8ff	1755
bogdanm	0:9b334a45a8ff	1756	/-------------------------- USART CR2 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1757	/* Configure the UART Stop Bits: Set STOP[13:12] bits according
bogdanm	0:9b334a45a8ff	1758	* to huart->Init.StopBits value */
bogdanm	0:9b334a45a8ff	1759	MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
bogdanm	0:9b334a45a8ff	1760
bogdanm	0:9b334a45a8ff	1761	/-------------------------- USART CR3 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1762	/* Configure
bogdanm	0:9b334a45a8ff	1763	* - UART HardWare Flow Control: set CTSE and RTSE bits according
bogdanm	0:9b334a45a8ff	1764	* to huart->Init.HwFlowCtl value
bogdanm	0:9b334a45a8ff	1765	* - one-bit sampling method versus three samples' majority rule according
bogdanm	0:9b334a45a8ff	1766	* to huart->Init.OneBitSampling */
mbed_official	113:b3775bf36a83	1767	tmpreg = (uint32_t)huart->Init.HwFlowCtl;
mbed_official	113:b3775bf36a83	1768	if (!(UART_INSTANCE_LOWPOWER(huart)))
mbed_official	113:b3775bf36a83	1769	{
mbed_official	113:b3775bf36a83	1770	tmpreg \|= huart->Init.OneBitSampling;
mbed_official	113:b3775bf36a83	1771	}
bogdanm	0:9b334a45a8ff	1772	MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE \| USART_CR3_CTSE \| USART_CR3_ONEBIT), tmpreg);
mbed_official	113:b3775bf36a83	1773
bogdanm	0:9b334a45a8ff	1774	/-------------------------- USART BRR Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1775	UART_GETCLOCKSOURCE(huart, clocksource);
bogdanm	0:9b334a45a8ff	1776
bogdanm	0:9b334a45a8ff	1777	/* Check LPUART instace */
mbed_official	113:b3775bf36a83	1778	if(UART_INSTANCE_LOWPOWER(huart))
bogdanm	0:9b334a45a8ff	1779	{
bogdanm	0:9b334a45a8ff	1780	switch (clocksource)
bogdanm	0:9b334a45a8ff	1781	{
bogdanm	0:9b334a45a8ff	1782	case UART_CLOCKSOURCE_PCLK1:
bogdanm	0:9b334a45a8ff	1783	huart->Instance->BRR = (uint32_t)(__DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1784	break;
bogdanm	0:9b334a45a8ff	1785	case UART_CLOCKSOURCE_HSI:
mbed_official	113:b3775bf36a83	1786	if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0)
mbed_official	113:b3775bf36a83	1787	{
mbed_official	113:b3775bf36a83	1788	huart->Instance->BRR = (uint32_t)(__DIV_LPUART((HSI_VALUE >> 2), huart->Init.BaudRate));
mbed_official	113:b3775bf36a83	1789	}
mbed_official	113:b3775bf36a83	1790	else
mbed_official	113:b3775bf36a83	1791	{
mbed_official	113:b3775bf36a83	1792	huart->Instance->BRR = (uint32_t)(__DIV_LPUART(HSI_VALUE, huart->Init.BaudRate));
mbed_official	113:b3775bf36a83	1793	}
bogdanm	0:9b334a45a8ff	1794	break;
bogdanm	0:9b334a45a8ff	1795	case UART_CLOCKSOURCE_SYSCLK:
bogdanm	0:9b334a45a8ff	1796	huart->Instance->BRR = (uint32_t)(__DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1797	break;
bogdanm	0:9b334a45a8ff	1798	case UART_CLOCKSOURCE_LSE:
bogdanm	0:9b334a45a8ff	1799	huart->Instance->BRR = (uint32_t)(__DIV_LPUART(LSE_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1800	break;
bogdanm	0:9b334a45a8ff	1801	default:
bogdanm	0:9b334a45a8ff	1802	break;
bogdanm	0:9b334a45a8ff	1803	}
bogdanm	0:9b334a45a8ff	1804	}
bogdanm	0:9b334a45a8ff	1805	/* Check the UART Over Sampling 8 to set Baud Rate Register */
bogdanm	0:9b334a45a8ff	1806	else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm	0:9b334a45a8ff	1807	{
bogdanm	0:9b334a45a8ff	1808	switch (clocksource)
bogdanm	0:9b334a45a8ff	1809	{
bogdanm	0:9b334a45a8ff	1810	case UART_CLOCKSOURCE_PCLK1:
bogdanm	0:9b334a45a8ff	1811	usartdiv = (uint32_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1812	break;
bogdanm	0:9b334a45a8ff	1813	case UART_CLOCKSOURCE_PCLK2:
bogdanm	0:9b334a45a8ff	1814	usartdiv = (uint32_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1815	break;
bogdanm	0:9b334a45a8ff	1816	case UART_CLOCKSOURCE_HSI:
mbed_official	113:b3775bf36a83	1817	if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0)
mbed_official	113:b3775bf36a83	1818	{
mbed_official	113:b3775bf36a83	1819	usartdiv = (uint32_t)(UART_DIV_SAMPLING8((HSI_VALUE >> 2), huart->Init.BaudRate));
mbed_official	113:b3775bf36a83	1820	}
mbed_official	113:b3775bf36a83	1821	else
mbed_official	113:b3775bf36a83	1822	{
mbed_official	113:b3775bf36a83	1823	usartdiv = (uint32_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
mbed_official	113:b3775bf36a83	1824	}
bogdanm	0:9b334a45a8ff	1825	break;
bogdanm	0:9b334a45a8ff	1826	case UART_CLOCKSOURCE_SYSCLK:
mbed_official	113:b3775bf36a83	1827	usartdiv = (uint32_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1828	break;
bogdanm	0:9b334a45a8ff	1829	case UART_CLOCKSOURCE_LSE:
bogdanm	0:9b334a45a8ff	1830	usartdiv = (uint32_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1831	break;
bogdanm	0:9b334a45a8ff	1832	default:
bogdanm	0:9b334a45a8ff	1833	break;
bogdanm	0:9b334a45a8ff	1834	}
bogdanm	0:9b334a45a8ff	1835
bogdanm	0:9b334a45a8ff	1836	brrtemp = usartdiv & 0xFFF0;
bogdanm	0:9b334a45a8ff	1837	brrtemp \|= (uint16_t)((uint16_t)(usartdiv & (uint16_t)0x000F) >> (uint16_t)1);
bogdanm	0:9b334a45a8ff	1838	huart->Instance->BRR = brrtemp;
bogdanm	0:9b334a45a8ff	1839	}
bogdanm	0:9b334a45a8ff	1840	else
bogdanm	0:9b334a45a8ff	1841	{
bogdanm	0:9b334a45a8ff	1842	switch (clocksource)
bogdanm	0:9b334a45a8ff	1843	{
bogdanm	0:9b334a45a8ff	1844	case UART_CLOCKSOURCE_PCLK1:
bogdanm	0:9b334a45a8ff	1845	huart->Instance->BRR = (uint32_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1846	break;
bogdanm	0:9b334a45a8ff	1847	case UART_CLOCKSOURCE_PCLK2:
bogdanm	0:9b334a45a8ff	1848	huart->Instance->BRR = (uint32_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1849	break;
bogdanm	0:9b334a45a8ff	1850	case UART_CLOCKSOURCE_HSI:
mbed_official	113:b3775bf36a83	1851	if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0)
mbed_official	113:b3775bf36a83	1852	{
mbed_official	113:b3775bf36a83	1853	huart->Instance->BRR = (uint32_t)(UART_DIV_SAMPLING16((HSI_VALUE >> 2), huart->Init.BaudRate));
mbed_official	113:b3775bf36a83	1854	}
mbed_official	113:b3775bf36a83	1855	else
mbed_official	113:b3775bf36a83	1856	{
mbed_official	113:b3775bf36a83	1857	huart->Instance->BRR = (uint32_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
mbed_official	113:b3775bf36a83	1858	}
bogdanm	0:9b334a45a8ff	1859	break;
bogdanm	0:9b334a45a8ff	1860	case UART_CLOCKSOURCE_SYSCLK:
bogdanm	0:9b334a45a8ff	1861	huart->Instance->BRR = (uint32_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1862	break;
bogdanm	0:9b334a45a8ff	1863	case UART_CLOCKSOURCE_LSE:
bogdanm	0:9b334a45a8ff	1864	huart->Instance->BRR = (uint32_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1865	break;
bogdanm	0:9b334a45a8ff	1866	default:
bogdanm	0:9b334a45a8ff	1867	break;
bogdanm	0:9b334a45a8ff	1868	}
bogdanm	0:9b334a45a8ff	1869	}
bogdanm	0:9b334a45a8ff	1870	}
bogdanm	0:9b334a45a8ff	1871
bogdanm	0:9b334a45a8ff	1872	/**
bogdanm	0:9b334a45a8ff	1873	* @brief Check the UART Idle State
bogdanm	0:9b334a45a8ff	1874	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1875	* @retval HAL status
bogdanm	0:9b334a45a8ff	1876	*/
bogdanm	0:9b334a45a8ff	1877	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1878	{
bogdanm	0:9b334a45a8ff	1879	/* Check if the Transmitter is enabled */
bogdanm	0:9b334a45a8ff	1880	if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
bogdanm	0:9b334a45a8ff	1881	{
bogdanm	0:9b334a45a8ff	1882	/* Wait until TEACK flag is set */
bogdanm	0:9b334a45a8ff	1883	if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1884	{
bogdanm	0:9b334a45a8ff	1885	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1886	}
bogdanm	0:9b334a45a8ff	1887	}
bogdanm	0:9b334a45a8ff	1888	/* Check if the Receiver is enabled */
bogdanm	0:9b334a45a8ff	1889	if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
bogdanm	0:9b334a45a8ff	1890	{
bogdanm	0:9b334a45a8ff	1891	/* Wait until REACK flag is set */
bogdanm	0:9b334a45a8ff	1892	if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm	0:9b334a45a8ff	1893	{
bogdanm	0:9b334a45a8ff	1894	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1895	}
bogdanm	0:9b334a45a8ff	1896	}
bogdanm	0:9b334a45a8ff	1897
bogdanm	0:9b334a45a8ff	1898	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1899	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1900
bogdanm	0:9b334a45a8ff	1901	/* Initialize the UART state*/
bogdanm	0:9b334a45a8ff	1902	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1903	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1904
bogdanm	0:9b334a45a8ff	1905	return HAL_OK;
bogdanm	0:9b334a45a8ff	1906	}
bogdanm	0:9b334a45a8ff	1907
bogdanm	0:9b334a45a8ff	1908	/**
bogdanm	0:9b334a45a8ff	1909	* @brief Configure the UART peripheral advanced feautures
bogdanm	0:9b334a45a8ff	1910	* @param huart: uart handle
bogdanm	0:9b334a45a8ff	1911	* @retval None
bogdanm	0:9b334a45a8ff	1912	*/
bogdanm	0:9b334a45a8ff	1913	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1914	{
bogdanm	0:9b334a45a8ff	1915	/* Check whether the set of advanced features to configure is properly set */
bogdanm	0:9b334a45a8ff	1916	assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
bogdanm	0:9b334a45a8ff	1917
bogdanm	0:9b334a45a8ff	1918	/* if required, configure TX pin active level inversion */
bogdanm	0:9b334a45a8ff	1919	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
bogdanm	0:9b334a45a8ff	1920	{
bogdanm	0:9b334a45a8ff	1921	assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
bogdanm	0:9b334a45a8ff	1922	MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
bogdanm	0:9b334a45a8ff	1923	}
bogdanm	0:9b334a45a8ff	1924
bogdanm	0:9b334a45a8ff	1925	/* if required, configure RX pin active level inversion */
bogdanm	0:9b334a45a8ff	1926	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
bogdanm	0:9b334a45a8ff	1927	{
bogdanm	0:9b334a45a8ff	1928	assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
bogdanm	0:9b334a45a8ff	1929	MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
bogdanm	0:9b334a45a8ff	1930	}
bogdanm	0:9b334a45a8ff	1931
bogdanm	0:9b334a45a8ff	1932	/* if required, configure data inversion */
bogdanm	0:9b334a45a8ff	1933	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
bogdanm	0:9b334a45a8ff	1934	{
bogdanm	0:9b334a45a8ff	1935	assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
bogdanm	0:9b334a45a8ff	1936	MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
bogdanm	0:9b334a45a8ff	1937	}
bogdanm	0:9b334a45a8ff	1938
bogdanm	0:9b334a45a8ff	1939	/* if required, configure RX/TX pins swap */
bogdanm	0:9b334a45a8ff	1940	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
bogdanm	0:9b334a45a8ff	1941	{
bogdanm	0:9b334a45a8ff	1942	assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
bogdanm	0:9b334a45a8ff	1943	MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
bogdanm	0:9b334a45a8ff	1944	}
bogdanm	0:9b334a45a8ff	1945
bogdanm	0:9b334a45a8ff	1946	/* if required, configure RX overrun detection disabling */
bogdanm	0:9b334a45a8ff	1947	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
bogdanm	0:9b334a45a8ff	1948	{
bogdanm	0:9b334a45a8ff	1949	assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
bogdanm	0:9b334a45a8ff	1950	MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
bogdanm	0:9b334a45a8ff	1951	}
bogdanm	0:9b334a45a8ff	1952
bogdanm	0:9b334a45a8ff	1953	/* if required, configure DMA disabling on reception error */
bogdanm	0:9b334a45a8ff	1954	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
bogdanm	0:9b334a45a8ff	1955	{
bogdanm	0:9b334a45a8ff	1956	assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
bogdanm	0:9b334a45a8ff	1957	MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
bogdanm	0:9b334a45a8ff	1958	}
bogdanm	0:9b334a45a8ff	1959
bogdanm	0:9b334a45a8ff	1960	/* if required, configure auto Baud rate detection scheme */
bogdanm	0:9b334a45a8ff	1961	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
bogdanm	0:9b334a45a8ff	1962	{
bogdanm	0:9b334a45a8ff	1963	assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1964	assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
bogdanm	0:9b334a45a8ff	1965	MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
bogdanm	0:9b334a45a8ff	1966	/* set auto Baudrate detection parameters if detection is enabled */
bogdanm	0:9b334a45a8ff	1967	if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
bogdanm	0:9b334a45a8ff	1968	{
bogdanm	0:9b334a45a8ff	1969	assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
bogdanm	0:9b334a45a8ff	1970	MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
bogdanm	0:9b334a45a8ff	1971	}
bogdanm	0:9b334a45a8ff	1972	}
bogdanm	0:9b334a45a8ff	1973
bogdanm	0:9b334a45a8ff	1974	/* if required, configure MSB first on communication line */
bogdanm	0:9b334a45a8ff	1975	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm	0:9b334a45a8ff	1976	{
bogdanm	0:9b334a45a8ff	1977	assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
bogdanm	0:9b334a45a8ff	1978	MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
bogdanm	0:9b334a45a8ff	1979	}
bogdanm	0:9b334a45a8ff	1980	}
bogdanm	0:9b334a45a8ff	1981
bogdanm	0:9b334a45a8ff	1982	/**
bogdanm	0:9b334a45a8ff	1983	* @brief This function handles UART Communication Timeout.
bogdanm	0:9b334a45a8ff	1984	* @param huart: UART handle
bogdanm	0:9b334a45a8ff	1985	* @param Flag: specifies the UART flag to check.
bogdanm	0:9b334a45a8ff	1986	* @param Status: The new Flag status (SET or RESET).
bogdanm	0:9b334a45a8ff	1987	* @param Timeout: Timeout duration
bogdanm	0:9b334a45a8ff	1988	* @retval HAL status
bogdanm	0:9b334a45a8ff	1989	*/
bogdanm	0:9b334a45a8ff	1990	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1991	{
bogdanm	0:9b334a45a8ff	1992	uint32_t tickstart = 0x00;
bogdanm	0:9b334a45a8ff	1993	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1994
bogdanm	0:9b334a45a8ff	1995	/* Wait until flag is set */
bogdanm	0:9b334a45a8ff	1996	if(Status == RESET)
bogdanm	0:9b334a45a8ff	1997	{
bogdanm	0:9b334a45a8ff	1998	while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
bogdanm	0:9b334a45a8ff	1999	{
bogdanm	0:9b334a45a8ff	2000	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	2001	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	2002	{
bogdanm	0:9b334a45a8ff	2003	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	2004	{
bogdanm	0:9b334a45a8ff	2005	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	2006	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	2007	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	2008	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	2009	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	2010
bogdanm	0:9b334a45a8ff	2011	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	2012
bogdanm	0:9b334a45a8ff	2013	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2014	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	2015
bogdanm	0:9b334a45a8ff	2016	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2017	}
bogdanm	0:9b334a45a8ff	2018	}
bogdanm	0:9b334a45a8ff	2019	}
bogdanm	0:9b334a45a8ff	2020	}
bogdanm	0:9b334a45a8ff	2021	else
bogdanm	0:9b334a45a8ff	2022	{
bogdanm	0:9b334a45a8ff	2023	while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
bogdanm	0:9b334a45a8ff	2024	{
bogdanm	0:9b334a45a8ff	2025	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	2026	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	2027	{
bogdanm	0:9b334a45a8ff	2028	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	2029	{
bogdanm	0:9b334a45a8ff	2030	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	2031	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	2032	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	2033	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	2034	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	2035
bogdanm	0:9b334a45a8ff	2036	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	2037
bogdanm	0:9b334a45a8ff	2038	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	2039	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	2040
bogdanm	0:9b334a45a8ff	2041	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	2042	}
bogdanm	0:9b334a45a8ff	2043	}
bogdanm	0:9b334a45a8ff	2044	}
bogdanm	0:9b334a45a8ff	2045	}
bogdanm	0:9b334a45a8ff	2046	return HAL_OK;
bogdanm	0:9b334a45a8ff	2047	}
bogdanm	0:9b334a45a8ff	2048
bogdanm	0:9b334a45a8ff	2049	/**
bogdanm	0:9b334a45a8ff	2050	* @}
bogdanm	0:9b334a45a8ff	2051	*/
bogdanm	0:9b334a45a8ff	2052
bogdanm	0:9b334a45a8ff	2053	/**
bogdanm	0:9b334a45a8ff	2054	* @}
bogdanm	0:9b334a45a8ff	2055	*/
bogdanm	0:9b334a45a8ff	2056
mbed_official	113:b3775bf36a83	2057	#endif /* HAL_UART_MODULE_ENABLED */
mbed_official	113:b3775bf36a83	2058
bogdanm	0:9b334a45a8ff	2059	/**
bogdanm	0:9b334a45a8ff	2060	* @}
bogdanm	0:9b334a45a8ff	2061	*/
bogdanm	0:9b334a45a8ff	2062
bogdanm	0:9b334a45a8ff	2063	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
bogdanm	0:9b334a45a8ff	2064

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.c@129:2e517c56bcfb, 2016-05-16 (annotated)

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