en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pwr_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
113:b3775bf36a83 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_pwr_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 113:b3775bf36a83 5 * @version V1.5.0
mbed_official 113:b3775bf36a83 6 * @date 8-January-2016
bogdanm 0:9b334a45a8ff 7 * @brief Extended PWR HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Power Controller (PWR) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Extended Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + Extended Peripheral Control functions
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 ******************************************************************************
bogdanm 0:9b334a45a8ff 14 * @attention
bogdanm 0:9b334a45a8ff 15 *
mbed_official 113:b3775bf36a83 16 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 19 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 20 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 21 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 23 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 24 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 26 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 27 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 28 *
bogdanm 0:9b334a45a8ff 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 39 *
bogdanm 0:9b334a45a8ff 40 ******************************************************************************
bogdanm 0:9b334a45a8ff 41 */
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 44 #include "stm32l0xx_hal.h"
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 #ifdef HAL_PWR_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 47 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 48 * @{
bogdanm 0:9b334a45a8ff 49 */
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /** @addtogroup PWREx
bogdanm 0:9b334a45a8ff 52 * @{
bogdanm 0:9b334a45a8ff 53 */
bogdanm 0:9b334a45a8ff 54
mbed_official 113:b3775bf36a83 55 /** @addtogroup PWREx_Private
mbed_official 113:b3775bf36a83 56 * @{
mbed_official 113:b3775bf36a83 57 */
mbed_official 113:b3775bf36a83 58
mbed_official 113:b3775bf36a83 59 /** @defgroup PWR_Extended_TimeOut_Value PWREx Flag Setting Time Out Value
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
mbed_official 113:b3775bf36a83 62 #define PWR_FLAG_SETTING_DELAY_US 50
mbed_official 113:b3775bf36a83 63 /**
mbed_official 113:b3775bf36a83 64 * @}
mbed_official 113:b3775bf36a83 65 */
mbed_official 113:b3775bf36a83 66
bogdanm 0:9b334a45a8ff 67 /**
bogdanm 0:9b334a45a8ff 68 * @}
bogdanm 0:9b334a45a8ff 69 */
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 /** @addtogroup PWREx_Exported_Functions
bogdanm 0:9b334a45a8ff 73 * @brief Low Power modes configuration functions
bogdanm 0:9b334a45a8ff 74 *
bogdanm 0:9b334a45a8ff 75 @verbatim
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 ===============================================================================
bogdanm 0:9b334a45a8ff 78 ##### Peripheral extended features functions #####
bogdanm 0:9b334a45a8ff 79 ===============================================================================
bogdanm 0:9b334a45a8ff 80 @endverbatim
bogdanm 0:9b334a45a8ff 81 * @{
bogdanm 0:9b334a45a8ff 82 */
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 /**
bogdanm 0:9b334a45a8ff 85 * @brief Enables the Fast WakeUp from Ultra Low Power mode.
bogdanm 0:9b334a45a8ff 86 * @note This bit works in conjunction with ULP bit.
bogdanm 0:9b334a45a8ff 87 * Means, when ULP = 1 and FWU = 1 :VREFINT startup time is ignored when
bogdanm 0:9b334a45a8ff 88 * exiting from low power mode.
bogdanm 0:9b334a45a8ff 89 * @retval None
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91 void HAL_PWREx_EnableFastWakeUp(void)
bogdanm 0:9b334a45a8ff 92 {
bogdanm 0:9b334a45a8ff 93 /* Enable the fast wake up */
bogdanm 0:9b334a45a8ff 94 SET_BIT(PWR->CR, PWR_CR_FWU);
bogdanm 0:9b334a45a8ff 95 }
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 /**
bogdanm 0:9b334a45a8ff 98 * @brief Disables the Fast WakeUp from Ultra Low Power mode.
bogdanm 0:9b334a45a8ff 99 * @retval None
bogdanm 0:9b334a45a8ff 100 */
bogdanm 0:9b334a45a8ff 101 void HAL_PWREx_DisableFastWakeUp(void)
bogdanm 0:9b334a45a8ff 102 {
bogdanm 0:9b334a45a8ff 103 /* Disable the fast wake up */
bogdanm 0:9b334a45a8ff 104 CLEAR_BIT(PWR->CR, PWR_CR_FWU);
bogdanm 0:9b334a45a8ff 105 }
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 /**
bogdanm 0:9b334a45a8ff 108 * @brief Enables the Ultra Low Power mode
bogdanm 0:9b334a45a8ff 109 * @retval None
bogdanm 0:9b334a45a8ff 110 */
bogdanm 0:9b334a45a8ff 111 void HAL_PWREx_EnableUltraLowPower(void)
bogdanm 0:9b334a45a8ff 112 {
bogdanm 0:9b334a45a8ff 113 /* Enable the Ultra Low Power mode */
bogdanm 0:9b334a45a8ff 114 SET_BIT(PWR->CR, PWR_CR_ULP);
bogdanm 0:9b334a45a8ff 115 }
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 /**
bogdanm 0:9b334a45a8ff 118 * @brief Disables the Ultra Low Power mode
bogdanm 0:9b334a45a8ff 119 * @retval None
bogdanm 0:9b334a45a8ff 120 */
bogdanm 0:9b334a45a8ff 121 void HAL_PWREx_DisableUltraLowPower(void)
bogdanm 0:9b334a45a8ff 122 {
bogdanm 0:9b334a45a8ff 123 /* Disable the Ultra Low Power mode */
bogdanm 0:9b334a45a8ff 124 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
bogdanm 0:9b334a45a8ff 125 }
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /**
bogdanm 0:9b334a45a8ff 128 * @brief Enable the Low Power Run mode.
bogdanm 0:9b334a45a8ff 129 * @note Low power run mode can only be entered when VCORE is in range 2.
bogdanm 0:9b334a45a8ff 130 * In addition, the dynamic voltage scaling must not be used when Low
bogdanm 0:9b334a45a8ff 131 * power run mode is selected. Only Stop and Sleep modes with regulator
bogdanm 0:9b334a45a8ff 132 * configured in Low power mode is allowed when Low power run mode is
bogdanm 0:9b334a45a8ff 133 * selected.
bogdanm 0:9b334a45a8ff 134 * @note The frequency of the system clock must be decreased to not exceed the
bogdanm 0:9b334a45a8ff 135 * frequency of RCC_MSIRANGE_1.
bogdanm 0:9b334a45a8ff 136 * @note In Low power run mode, all I/O pins keep the same state as in Run mode.
bogdanm 0:9b334a45a8ff 137 * @retval None
bogdanm 0:9b334a45a8ff 138 */
bogdanm 0:9b334a45a8ff 139 void HAL_PWREx_EnableLowPowerRunMode(void)
bogdanm 0:9b334a45a8ff 140 {
bogdanm 0:9b334a45a8ff 141 /* Enters the Low Power Run mode */
bogdanm 0:9b334a45a8ff 142 SET_BIT(PWR->CR, PWR_CR_LPSDSR);
bogdanm 0:9b334a45a8ff 143 SET_BIT(PWR->CR, PWR_CR_LPRUN);
bogdanm 0:9b334a45a8ff 144 }
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 /**
bogdanm 0:9b334a45a8ff 147 * @brief Disable the Low Power Run mode.
bogdanm 0:9b334a45a8ff 148 * @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that
bogdanm 0:9b334a45a8ff 149 * REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode
bogdanm 0:9b334a45a8ff 150 * returns HAL_TIMEOUT status). The system clock frequency can then be
bogdanm 0:9b334a45a8ff 151 * increased above 2 MHz.
bogdanm 0:9b334a45a8ff 152 * @retval HAL_StatusTypeDef
bogdanm 0:9b334a45a8ff 153 */
bogdanm 0:9b334a45a8ff 154 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
bogdanm 0:9b334a45a8ff 155 {
bogdanm 0:9b334a45a8ff 156 uint32_t wait_loop_index = 0;
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 /* Exit the Low Power Run mode */
bogdanm 0:9b334a45a8ff 159 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
bogdanm 0:9b334a45a8ff 160 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 /* Wait until REGLPF is reset */
bogdanm 0:9b334a45a8ff 163 wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF)))
bogdanm 0:9b334a45a8ff 166 {
bogdanm 0:9b334a45a8ff 167 wait_loop_index--;
bogdanm 0:9b334a45a8ff 168 }
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 if (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF))
bogdanm 0:9b334a45a8ff 171 {
bogdanm 0:9b334a45a8ff 172 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 173 }
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 return HAL_OK;
bogdanm 0:9b334a45a8ff 176 }
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 /**
bogdanm 0:9b334a45a8ff 179 * @}
bogdanm 0:9b334a45a8ff 180 */
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /**
bogdanm 0:9b334a45a8ff 183 * @}
bogdanm 0:9b334a45a8ff 184 */
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /**
bogdanm 0:9b334a45a8ff 187 * @}
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189 #endif /* HAL_PWR_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 192