en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_gpio.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
113:b3775bf36a83 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_gpio.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 113:b3775bf36a83 5 * @version V1.5.0
mbed_official 113:b3775bf36a83 6 * @date 8-January-2016
bogdanm 0:9b334a45a8ff 7 * @brief GPIO HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the General Purpose Input/Output (GPIO) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + IO operation functions
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ==============================================================================
bogdanm 0:9b334a45a8ff 15 ##### GPIO Peripheral features #####
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17 [..]
bogdanm 0:9b334a45a8ff 18 (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually
bogdanm 0:9b334a45a8ff 19 configured by software in several modes:
bogdanm 0:9b334a45a8ff 20 (++) Input mode
bogdanm 0:9b334a45a8ff 21 (++) Analog mode
bogdanm 0:9b334a45a8ff 22 (++) Output mode
bogdanm 0:9b334a45a8ff 23 (++) Alternate function mode
bogdanm 0:9b334a45a8ff 24 (++) External interrupt/event lines
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 (+) During and just after reset, the alternate functions and external interrupt
bogdanm 0:9b334a45a8ff 27 lines are not active and the I/O ports are configured in input floating mode.
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be
bogdanm 0:9b334a45a8ff 30 activated or not.
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull
bogdanm 0:9b334a45a8ff 33 type and the IO speed can be selected depending on the VDD value.
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 (+) The microcontroller IO pins are connected to onboard peripherals/modules through a
bogdanm 0:9b334a45a8ff 36 multiplexer that allows only one peripheral alternate function (AF) connected
bogdanm 0:9b334a45a8ff 37 to an IO pin at a time. In this way, there can be no conflict between peripherals
bogdanm 0:9b334a45a8ff 38 sharing the same IO pin.
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 (+) All ports have external interrupt/event capability. To use external interrupt
bogdanm 0:9b334a45a8ff 41 lines, the port must be configured in input mode. All available GPIO pins are
bogdanm 0:9b334a45a8ff 42 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 (+) The external interrupt/event controller consists of up to 28 edge detectors
bogdanm 0:9b334a45a8ff 45 (16 lines are connected to GPIO) for generating event/interrupt requests (each
bogdanm 0:9b334a45a8ff 46 input line can be independently configured to select the type (interrupt or event)
bogdanm 0:9b334a45a8ff 47 and the corresponding trigger event (rising or falling or both). Each line can
bogdanm 0:9b334a45a8ff 48 also be masked independently.
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 51 ==============================================================================
bogdanm 0:9b334a45a8ff 52 [..]
bogdanm 0:9b334a45a8ff 53 (#) Enable the GPIO IOPORT clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
bogdanm 0:9b334a45a8ff 56 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
bogdanm 0:9b334a45a8ff 57 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
bogdanm 0:9b334a45a8ff 58 structure.
bogdanm 0:9b334a45a8ff 59 (++) In case of Output or alternate function mode selection: the speed is
bogdanm 0:9b334a45a8ff 60 configured through "Speed" member from GPIO_InitTypeDef structure.
bogdanm 0:9b334a45a8ff 61 (++) In alternate mode is selection, the alternate function connected to the IO
bogdanm 0:9b334a45a8ff 62 is configured through "Alternate" member from GPIO_InitTypeDef structure.
bogdanm 0:9b334a45a8ff 63 (++) Analog mode is required when a pin is to be used as ADC channel
bogdanm 0:9b334a45a8ff 64 or DAC output.
bogdanm 0:9b334a45a8ff 65 (++) In case of external interrupt/event selection the "Mode" member from
bogdanm 0:9b334a45a8ff 66 GPIO_InitTypeDef structure select the type (interrupt or event) and
bogdanm 0:9b334a45a8ff 67 the corresponding trigger event (rising or falling or both).
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
bogdanm 0:9b334a45a8ff 70 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
bogdanm 0:9b334a45a8ff 71 HAL_NVIC_EnableIRQ().
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 (#) HAL_GPIO_DeInit allows to set register values to their reset value. This function
bogdanm 0:9b334a45a8ff 74 is also to be used when unconfiguring pin which was used as an external interrupt
bogdanm 0:9b334a45a8ff 75 or in event mode. That is the only way to reset the corresponding bit in
bogdanm 0:9b334a45a8ff 76 EXTI & SYSCFG registers.
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 (#) To set/reset the level of a pin configured in output mode use
bogdanm 0:9b334a45a8ff 81 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 (#) During and just after reset, the alternate functions are not
bogdanm 0:9b334a45a8ff 86 active and the GPIO pins are configured in input floating mode (except JTAG
bogdanm 0:9b334a45a8ff 87 pins).
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
bogdanm 0:9b334a45a8ff 90 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
bogdanm 0:9b334a45a8ff 91 priority over the GPIO function.
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
bogdanm 0:9b334a45a8ff 94 general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
bogdanm 0:9b334a45a8ff 95 The HSE has priority over the GPIO function.
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 @endverbatim
bogdanm 0:9b334a45a8ff 98 ******************************************************************************
bogdanm 0:9b334a45a8ff 99 * @attention
bogdanm 0:9b334a45a8ff 100 *
mbed_official 113:b3775bf36a83 101 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 102 *
bogdanm 0:9b334a45a8ff 103 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 104 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 105 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 106 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 107 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 108 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 109 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 111 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 112 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 113 *
bogdanm 0:9b334a45a8ff 114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 124 *
bogdanm 0:9b334a45a8ff 125 ******************************************************************************
bogdanm 0:9b334a45a8ff 126 */
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 129 #include "stm32l0xx_hal.h"
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 132 * @{
bogdanm 0:9b334a45a8ff 133 */
bogdanm 0:9b334a45a8ff 134
mbed_official 113:b3775bf36a83 135 #ifdef HAL_GPIO_MODULE_ENABLED
mbed_official 113:b3775bf36a83 136
bogdanm 0:9b334a45a8ff 137 /** @addtogroup GPIO
bogdanm 0:9b334a45a8ff 138 * @brief GPIO HAL module driver
bogdanm 0:9b334a45a8ff 139 * @{
bogdanm 0:9b334a45a8ff 140 */
bogdanm 0:9b334a45a8ff 141
mbed_official 113:b3775bf36a83 142 /** @addtogroup GPIO_Private
mbed_official 113:b3775bf36a83 143 * @{
mbed_official 113:b3775bf36a83 144 */
bogdanm 0:9b334a45a8ff 145 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 #define GPIO_MODE ((uint32_t)0x00000003)
bogdanm 0:9b334a45a8ff 149 #define EXTI_MODE ((uint32_t)0x10000000)
bogdanm 0:9b334a45a8ff 150 #define GPIO_MODE_IT ((uint32_t)0x00010000)
bogdanm 0:9b334a45a8ff 151 #define GPIO_MODE_EVT ((uint32_t)0x00020000)
bogdanm 0:9b334a45a8ff 152 #define RISING_EDGE ((uint32_t)0x00100000)
bogdanm 0:9b334a45a8ff 153 #define FALLING_EDGE ((uint32_t)0x00200000)
bogdanm 0:9b334a45a8ff 154 #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010)
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 #define GPIO_NUMBER ((uint32_t)16)
bogdanm 0:9b334a45a8ff 157
mbed_official 113:b3775bf36a83 158 /**
mbed_official 113:b3775bf36a83 159 * @}
mbed_official 113:b3775bf36a83 160 */
bogdanm 0:9b334a45a8ff 161 /** @addtogroup GPIO_Exported_Functions
bogdanm 0:9b334a45a8ff 162 * @{
bogdanm 0:9b334a45a8ff 163 */
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /** @addtogroup GPIO_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 166 * @brief Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 167 *
bogdanm 0:9b334a45a8ff 168 @verbatim
bogdanm 0:9b334a45a8ff 169 ===============================================================================
bogdanm 0:9b334a45a8ff 170 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 171 ===============================================================================
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 @endverbatim
bogdanm 0:9b334a45a8ff 174 * @{
bogdanm 0:9b334a45a8ff 175 */
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 /**
bogdanm 0:9b334a45a8ff 178 * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
bogdanm 0:9b334a45a8ff 179 * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0XX family devices.
bogdanm 0:9b334a45a8ff 180 * Note that GPIOE is not available on all devices.
bogdanm 0:9b334a45a8ff 181 * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
bogdanm 0:9b334a45a8ff 182 * the configuration information for the specified GPIO peripheral.
bogdanm 0:9b334a45a8ff 183 * @retval None
bogdanm 0:9b334a45a8ff 184 */
bogdanm 0:9b334a45a8ff 185 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
bogdanm 0:9b334a45a8ff 186 {
bogdanm 0:9b334a45a8ff 187 uint32_t position = 0x00;
bogdanm 0:9b334a45a8ff 188 uint32_t iocurrent = 0x00;
bogdanm 0:9b334a45a8ff 189 uint32_t temp = 0x00;
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /* Check the parameters */
bogdanm 0:9b334a45a8ff 192 assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
bogdanm 0:9b334a45a8ff 193 assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
bogdanm 0:9b334a45a8ff 194 assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,(GPIO_Init->Pin)));
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 /* Configure the port pins */
mbed_official 113:b3775bf36a83 197 while ((GPIO_Init->Pin) >> position)
bogdanm 0:9b334a45a8ff 198 {
bogdanm 0:9b334a45a8ff 199 /* Get the IO position */
mbed_official 113:b3775bf36a83 200 iocurrent = (GPIO_Init->Pin) & (1 << position);
bogdanm 0:9b334a45a8ff 201
mbed_official 113:b3775bf36a83 202 if(iocurrent)
bogdanm 0:9b334a45a8ff 203 {
bogdanm 0:9b334a45a8ff 204 /*--------------------- GPIO Mode Configuration ------------------------*/
bogdanm 0:9b334a45a8ff 205 /* In case of Alternate function mode selection */
bogdanm 0:9b334a45a8ff 206 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
bogdanm 0:9b334a45a8ff 207 {
bogdanm 0:9b334a45a8ff 208 /* Check if the Alternate function is compliant with the GPIO in use */
bogdanm 0:9b334a45a8ff 209 assert_param(IS_GPIO_AF_AVAILABLE(GPIOx,(GPIO_Init->Alternate)));
bogdanm 0:9b334a45a8ff 210 /* Configure Alternate function mapped with the current IO */
bogdanm 0:9b334a45a8ff 211 temp = GPIOx->AFR[position >> 3];
bogdanm 0:9b334a45a8ff 212 temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
bogdanm 0:9b334a45a8ff 213 temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)) ;
bogdanm 0:9b334a45a8ff 214 GPIOx->AFR[position >> 3] = temp;
bogdanm 0:9b334a45a8ff 215 }
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 /* In case of Output or Alternate function mode selection */
bogdanm 0:9b334a45a8ff 218 if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
bogdanm 0:9b334a45a8ff 219 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
bogdanm 0:9b334a45a8ff 220 {
bogdanm 0:9b334a45a8ff 221 /* Check the Speed parameter */
bogdanm 0:9b334a45a8ff 222 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
bogdanm 0:9b334a45a8ff 223 /* Configure the IO Speed */
bogdanm 0:9b334a45a8ff 224 temp = GPIOx->OSPEEDR;
bogdanm 0:9b334a45a8ff 225 temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2));
bogdanm 0:9b334a45a8ff 226 temp |= (GPIO_Init->Speed << (position * 2));
bogdanm 0:9b334a45a8ff 227 GPIOx->OSPEEDR = temp;
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 /* Configure the IO Output Type */
bogdanm 0:9b334a45a8ff 230 temp= GPIOx->OTYPER;
bogdanm 0:9b334a45a8ff 231 temp &= ~(GPIO_OTYPER_OT_0 << position) ;
bogdanm 0:9b334a45a8ff 232 temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
bogdanm 0:9b334a45a8ff 233 GPIOx->OTYPER = temp;
bogdanm 0:9b334a45a8ff 234 }
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
bogdanm 0:9b334a45a8ff 237 temp = GPIOx->MODER;
bogdanm 0:9b334a45a8ff 238 temp &= ~(GPIO_MODER_MODE0 << (position * 2));
bogdanm 0:9b334a45a8ff 239 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
bogdanm 0:9b334a45a8ff 240 GPIOx->MODER = temp;
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 /* Activate the Pull-up or Pull down resistor for the current IO */
bogdanm 0:9b334a45a8ff 243 temp = GPIOx->PUPDR;
bogdanm 0:9b334a45a8ff 244 temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2));
bogdanm 0:9b334a45a8ff 245 temp |= ((GPIO_Init->Pull) << (position * 2));
bogdanm 0:9b334a45a8ff 246 GPIOx->PUPDR = temp;
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /*--------------------- EXTI Mode Configuration ------------------------*/
bogdanm 0:9b334a45a8ff 249 /* Configure the External Interrupt or event for the current IO */
bogdanm 0:9b334a45a8ff 250 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
bogdanm 0:9b334a45a8ff 251 {
bogdanm 0:9b334a45a8ff 252 /* Enable SYSCFG Clock */
bogdanm 0:9b334a45a8ff 253 __HAL_RCC_SYSCFG_CLK_ENABLE();
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 temp = SYSCFG->EXTICR[position >> 2];
bogdanm 0:9b334a45a8ff 256 temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
bogdanm 0:9b334a45a8ff 257 temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
bogdanm 0:9b334a45a8ff 258 SYSCFG->EXTICR[position >> 2] = temp;
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /* Clear EXTI line configuration */
bogdanm 0:9b334a45a8ff 261 temp = EXTI->IMR;
bogdanm 0:9b334a45a8ff 262 temp &= ~((uint32_t)iocurrent);
bogdanm 0:9b334a45a8ff 263 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
bogdanm 0:9b334a45a8ff 264 {
bogdanm 0:9b334a45a8ff 265 temp |= iocurrent;
bogdanm 0:9b334a45a8ff 266 }
bogdanm 0:9b334a45a8ff 267 EXTI->IMR = temp;
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 temp = EXTI->EMR;
bogdanm 0:9b334a45a8ff 270 temp &= ~((uint32_t)iocurrent);
bogdanm 0:9b334a45a8ff 271 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
bogdanm 0:9b334a45a8ff 272 {
bogdanm 0:9b334a45a8ff 273 temp |= iocurrent;
bogdanm 0:9b334a45a8ff 274 }
bogdanm 0:9b334a45a8ff 275 EXTI->EMR = temp;
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /* Clear Rising Falling edge configuration */
bogdanm 0:9b334a45a8ff 278 temp = EXTI->RTSR;
bogdanm 0:9b334a45a8ff 279 temp &= ~((uint32_t)iocurrent);
bogdanm 0:9b334a45a8ff 280 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
bogdanm 0:9b334a45a8ff 281 {
bogdanm 0:9b334a45a8ff 282 temp |= iocurrent;
bogdanm 0:9b334a45a8ff 283 }
bogdanm 0:9b334a45a8ff 284 EXTI->RTSR = temp;
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 temp = EXTI->FTSR;
bogdanm 0:9b334a45a8ff 287 temp &= ~((uint32_t)iocurrent);
bogdanm 0:9b334a45a8ff 288 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
bogdanm 0:9b334a45a8ff 289 {
bogdanm 0:9b334a45a8ff 290 temp |= iocurrent;
bogdanm 0:9b334a45a8ff 291 }
bogdanm 0:9b334a45a8ff 292 EXTI->FTSR = temp;
bogdanm 0:9b334a45a8ff 293 }
bogdanm 0:9b334a45a8ff 294 }
mbed_official 113:b3775bf36a83 295 position++;
bogdanm 0:9b334a45a8ff 296 }
bogdanm 0:9b334a45a8ff 297 }
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /**
bogdanm 0:9b334a45a8ff 300 * @brief De-initializes the GPIOx peripheral registers to their default reset values.
bogdanm 0:9b334a45a8ff 301 * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0XX family devices.
bogdanm 0:9b334a45a8ff 302 * Note that GPIOE is not available on all devices.
bogdanm 0:9b334a45a8ff 303 * @param GPIO_Pin: specifies the port bit to be written.
bogdanm 0:9b334a45a8ff 304 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
bogdanm 0:9b334a45a8ff 305 * All port bits are not necessarily available on all GPIOs.
bogdanm 0:9b334a45a8ff 306 * @retval None
bogdanm 0:9b334a45a8ff 307 */
bogdanm 0:9b334a45a8ff 308 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
bogdanm 0:9b334a45a8ff 309 {
bogdanm 0:9b334a45a8ff 310 uint32_t position = 0x00;
bogdanm 0:9b334a45a8ff 311 uint32_t iocurrent = 0x00;
bogdanm 0:9b334a45a8ff 312 uint32_t tmp = 0x00;
bogdanm 0:9b334a45a8ff 313
bogdanm 0:9b334a45a8ff 314 /* Check the parameters */
mbed_official 113:b3775bf36a83 315 assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 /* Configure the port pins */
mbed_official 113:b3775bf36a83 318 while (GPIO_Pin >> position)
bogdanm 0:9b334a45a8ff 319 {
bogdanm 0:9b334a45a8ff 320 /* Get the IO position */
mbed_official 113:b3775bf36a83 321 iocurrent = (GPIO_Pin) & (1 << position);
mbed_official 113:b3775bf36a83 322
mbed_official 113:b3775bf36a83 323 if(iocurrent)
bogdanm 0:9b334a45a8ff 324 {
bogdanm 0:9b334a45a8ff 325 /*------------------------- GPIO Mode Configuration --------------------*/
bogdanm 0:9b334a45a8ff 326 /* Configure IO Direction in Input Floting Mode */
bogdanm 0:9b334a45a8ff 327 GPIOx->MODER &= ~(GPIO_MODER_MODE0 << (position * 2));
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 /* Configure the default Alternate Function in current IO */
bogdanm 0:9b334a45a8ff 330 GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /* Configure the default value for IO Speed */
bogdanm 0:9b334a45a8ff 333 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2));
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 /* Configure the default value IO Output Type */
bogdanm 0:9b334a45a8ff 336 GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
bogdanm 0:9b334a45a8ff 339 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2));
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /*------------------------- EXTI Mode Configuration --------------------*/
mbed_official 113:b3775bf36a83 342 /* Clear the External Interrupt or Event for the current IO */
bogdanm 0:9b334a45a8ff 343
mbed_official 113:b3775bf36a83 344 tmp = SYSCFG->EXTICR[position >> 2];
mbed_official 113:b3775bf36a83 345 tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03)));
mbed_official 113:b3775bf36a83 346 if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))))
mbed_official 113:b3775bf36a83 347 {
mbed_official 113:b3775bf36a83 348 tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
mbed_official 113:b3775bf36a83 349 SYSCFG->EXTICR[position >> 2] &= ~tmp;
mbed_official 113:b3775bf36a83 350
mbed_official 113:b3775bf36a83 351 /* Clear EXTI line configuration */
mbed_official 113:b3775bf36a83 352 EXTI->IMR &= ~((uint32_t)iocurrent);
mbed_official 113:b3775bf36a83 353 EXTI->EMR &= ~((uint32_t)iocurrent);
mbed_official 113:b3775bf36a83 354
mbed_official 113:b3775bf36a83 355 /* Clear Rising Falling edge configuration */
mbed_official 113:b3775bf36a83 356 EXTI->RTSR &= ~((uint32_t)iocurrent);
mbed_official 113:b3775bf36a83 357 EXTI->FTSR &= ~((uint32_t)iocurrent);
mbed_official 113:b3775bf36a83 358 }
bogdanm 0:9b334a45a8ff 359 }
mbed_official 113:b3775bf36a83 360 position++;
bogdanm 0:9b334a45a8ff 361 }
bogdanm 0:9b334a45a8ff 362 }
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 /**
bogdanm 0:9b334a45a8ff 365 * @}
bogdanm 0:9b334a45a8ff 366 */
bogdanm 0:9b334a45a8ff 367
bogdanm 0:9b334a45a8ff 368 /** @addtogroup GPIO_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 369 * @brief GPIO Read and Write
bogdanm 0:9b334a45a8ff 370 *
bogdanm 0:9b334a45a8ff 371 @verbatim
bogdanm 0:9b334a45a8ff 372 ===============================================================================
bogdanm 0:9b334a45a8ff 373 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 374 ===============================================================================
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 @endverbatim
bogdanm 0:9b334a45a8ff 377 * @{
bogdanm 0:9b334a45a8ff 378 */
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 /**
bogdanm 0:9b334a45a8ff 381 * @brief Reads the specified input port pin.
bogdanm 0:9b334a45a8ff 382 * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family devices.
bogdanm 0:9b334a45a8ff 383 * Note that GPIOE is not available on all devices.
bogdanm 0:9b334a45a8ff 384 * @param GPIO_Pin: specifies the port bit to read.
bogdanm 0:9b334a45a8ff 385 * This parameter can be GPIO_PIN_x where x can be (0..15).
bogdanm 0:9b334a45a8ff 386 * All port bits are not necessarily available on all GPIOs.
bogdanm 0:9b334a45a8ff 387 * @retval The input port pin value.
bogdanm 0:9b334a45a8ff 388 */
bogdanm 0:9b334a45a8ff 389 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
bogdanm 0:9b334a45a8ff 390 {
bogdanm 0:9b334a45a8ff 391 GPIO_PinState bitstatus;
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393 /* Check the parameters */
bogdanm 0:9b334a45a8ff 394 assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
bogdanm 0:9b334a45a8ff 397 {
bogdanm 0:9b334a45a8ff 398 bitstatus = GPIO_PIN_SET;
bogdanm 0:9b334a45a8ff 399 }
bogdanm 0:9b334a45a8ff 400 else
bogdanm 0:9b334a45a8ff 401 {
bogdanm 0:9b334a45a8ff 402 bitstatus = GPIO_PIN_RESET;
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404 return bitstatus;
bogdanm 0:9b334a45a8ff 405 }
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 /**
bogdanm 0:9b334a45a8ff 408 * @brief Sets or clears the selected data port bit.
bogdanm 0:9b334a45a8ff 409 *
bogdanm 0:9b334a45a8ff 410 * @note This function uses GPIOx_BSRR register to allow atomic read/modify
bogdanm 0:9b334a45a8ff 411 * accesses. In this way, there is no risk of an IRQ occurring between
bogdanm 0:9b334a45a8ff 412 * the read and the modify access.
bogdanm 0:9b334a45a8ff 413 *
bogdanm 0:9b334a45a8ff 414 * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family devices.
bogdanm 0:9b334a45a8ff 415 * Note that GPIOE is not available on all devices.
bogdanm 0:9b334a45a8ff 416 * @param GPIO_Pin: specifies the port bit to be written.
bogdanm 0:9b334a45a8ff 417 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
bogdanm 0:9b334a45a8ff 418 * All port bits are not necessarily available on all GPIOs.
bogdanm 0:9b334a45a8ff 419 * @param PinState: specifies the value to be written to the selected bit.
bogdanm 0:9b334a45a8ff 420 * This parameter can be one of the GPIO_PinState enum values:
bogdanm 0:9b334a45a8ff 421 * GPIO_PIN_RESET: to clear the port pin
bogdanm 0:9b334a45a8ff 422 * GPIO_PIN_SET: to set the port pin
bogdanm 0:9b334a45a8ff 423 * @retval None
bogdanm 0:9b334a45a8ff 424 */
bogdanm 0:9b334a45a8ff 425 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
bogdanm 0:9b334a45a8ff 426 {
bogdanm 0:9b334a45a8ff 427 /* Check the parameters */
bogdanm 0:9b334a45a8ff 428 assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
bogdanm 0:9b334a45a8ff 429 assert_param(IS_GPIO_PIN_ACTION(PinState));
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 if(PinState != GPIO_PIN_RESET)
bogdanm 0:9b334a45a8ff 432 {
bogdanm 0:9b334a45a8ff 433 GPIOx->BSRR = GPIO_Pin;
bogdanm 0:9b334a45a8ff 434 }
bogdanm 0:9b334a45a8ff 435 else
bogdanm 0:9b334a45a8ff 436 {
bogdanm 0:9b334a45a8ff 437 GPIOx->BRR = GPIO_Pin ;
bogdanm 0:9b334a45a8ff 438 }
bogdanm 0:9b334a45a8ff 439 }
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 /**
bogdanm 0:9b334a45a8ff 442 * @brief Toggles the specified GPIO pins.
bogdanm 0:9b334a45a8ff 443 * @param GPIOx: Where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family devices.
bogdanm 0:9b334a45a8ff 444 * Note that GPIOE is not available on all devices.
bogdanm 0:9b334a45a8ff 445 * All port bits are not necessarily available on all GPIOs.
bogdanm 0:9b334a45a8ff 446 * @param GPIO_Pin: Specifies the pins to be toggled.
bogdanm 0:9b334a45a8ff 447 * @retval None
bogdanm 0:9b334a45a8ff 448 */
bogdanm 0:9b334a45a8ff 449 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
bogdanm 0:9b334a45a8ff 450 {
bogdanm 0:9b334a45a8ff 451 /* Check the parameters */
bogdanm 0:9b334a45a8ff 452 assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
bogdanm 0:9b334a45a8ff 453
bogdanm 0:9b334a45a8ff 454 GPIOx->ODR ^= GPIO_Pin;
bogdanm 0:9b334a45a8ff 455 }
bogdanm 0:9b334a45a8ff 456
bogdanm 0:9b334a45a8ff 457 /**
bogdanm 0:9b334a45a8ff 458 * @brief Locks GPIO Pins configuration registers.
bogdanm 0:9b334a45a8ff 459 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
bogdanm 0:9b334a45a8ff 460 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
bogdanm 0:9b334a45a8ff 461 * @note The configuration of the locked GPIO pins can no longer be modified
bogdanm 0:9b334a45a8ff 462 * until the next reset.
bogdanm 0:9b334a45a8ff 463 * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family.
bogdanm 0:9b334a45a8ff 464 * Note that GPIOE is not available on all devices.
bogdanm 0:9b334a45a8ff 465 * @param GPIO_Pin: specifies the port bit to be locked.
bogdanm 0:9b334a45a8ff 466 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
bogdanm 0:9b334a45a8ff 467 * All port bits are not necessarily available on all GPIOs.
bogdanm 0:9b334a45a8ff 468 * @retval None
bogdanm 0:9b334a45a8ff 469 */
bogdanm 0:9b334a45a8ff 470 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
bogdanm 0:9b334a45a8ff 471 {
bogdanm 0:9b334a45a8ff 472 __IO uint32_t tmp = GPIO_LCKR_LCKK;
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 /* Check the parameters */
bogdanm 0:9b334a45a8ff 475 assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 /* Apply lock key write sequence */
bogdanm 0:9b334a45a8ff 478 tmp |= GPIO_Pin;
bogdanm 0:9b334a45a8ff 479 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
bogdanm 0:9b334a45a8ff 480 GPIOx->LCKR = tmp;
bogdanm 0:9b334a45a8ff 481 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
bogdanm 0:9b334a45a8ff 482 GPIOx->LCKR = GPIO_Pin;
bogdanm 0:9b334a45a8ff 483 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
bogdanm 0:9b334a45a8ff 484 GPIOx->LCKR = tmp;
bogdanm 0:9b334a45a8ff 485 /* Read LCKK bit*/
bogdanm 0:9b334a45a8ff 486 tmp = GPIOx->LCKR;
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488 if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
bogdanm 0:9b334a45a8ff 489 {
bogdanm 0:9b334a45a8ff 490 return HAL_OK;
bogdanm 0:9b334a45a8ff 491 }
bogdanm 0:9b334a45a8ff 492 else
bogdanm 0:9b334a45a8ff 493 {
bogdanm 0:9b334a45a8ff 494 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 495 }
bogdanm 0:9b334a45a8ff 496 }
bogdanm 0:9b334a45a8ff 497 /**
bogdanm 0:9b334a45a8ff 498 * @brief This function handles EXTI interrupt request.
bogdanm 0:9b334a45a8ff 499 * @param GPIO_Pin: Specifies the pins connected to the EXTI line.
bogdanm 0:9b334a45a8ff 500 * @retval None
bogdanm 0:9b334a45a8ff 501 */
bogdanm 0:9b334a45a8ff 502 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
bogdanm 0:9b334a45a8ff 503 {
bogdanm 0:9b334a45a8ff 504 /* EXTI line interrupt detected */
bogdanm 0:9b334a45a8ff 505 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
bogdanm 0:9b334a45a8ff 506 {
bogdanm 0:9b334a45a8ff 507 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
bogdanm 0:9b334a45a8ff 508 HAL_GPIO_EXTI_Callback(GPIO_Pin);
bogdanm 0:9b334a45a8ff 509 }
bogdanm 0:9b334a45a8ff 510 }
bogdanm 0:9b334a45a8ff 511
bogdanm 0:9b334a45a8ff 512 /**
bogdanm 0:9b334a45a8ff 513 * @brief EXTI line detection callbacks.
bogdanm 0:9b334a45a8ff 514 * @param GPIO_Pin: Specifies the pins connected to the EXTI line.
bogdanm 0:9b334a45a8ff 515 * @retval None
bogdanm 0:9b334a45a8ff 516 */
bogdanm 0:9b334a45a8ff 517 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
bogdanm 0:9b334a45a8ff 518 {
mbed_official 113:b3775bf36a83 519 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 520 UNUSED(GPIO_Pin);
mbed_official 113:b3775bf36a83 521
bogdanm 0:9b334a45a8ff 522 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 523 the HAL_GPIO_EXTI_Callback could be implemented in the user file
bogdanm 0:9b334a45a8ff 524 */
bogdanm 0:9b334a45a8ff 525 }
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 /**
bogdanm 0:9b334a45a8ff 528 * @}
bogdanm 0:9b334a45a8ff 529 */
bogdanm 0:9b334a45a8ff 530
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /**
bogdanm 0:9b334a45a8ff 533 * @}
bogdanm 0:9b334a45a8ff 534 */
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 /**
bogdanm 0:9b334a45a8ff 537 * @}
bogdanm 0:9b334a45a8ff 538 */
bogdanm 0:9b334a45a8ff 539
mbed_official 113:b3775bf36a83 540 #endif /* HAL_GPIO_MODULE_ENABLED */
mbed_official 113:b3775bf36a83 541
bogdanm 0:9b334a45a8ff 542 /**
bogdanm 0:9b334a45a8ff 543 * @}
bogdanm 0:9b334a45a8ff 544 */
bogdanm 0:9b334a45a8ff 545
bogdanm 0:9b334a45a8ff 546 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 547