en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dac_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
113:b3775bf36a83 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_dac_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 113:b3775bf36a83 5 * @version V1.5.0
mbed_official 113:b3775bf36a83 6 * @date 8-January-2016
bogdanm 0:9b334a45a8ff 7 * @brief Extended DAC HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of DAC extension peripheral:
bogdanm 0:9b334a45a8ff 10 * + Extended features functions
bogdanm 0:9b334a45a8ff 11 *
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ==============================================================================
bogdanm 0:9b334a45a8ff 15 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17 [..]
bogdanm 0:9b334a45a8ff 18 (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
bogdanm 0:9b334a45a8ff 19 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
bogdanm 0:9b334a45a8ff 20 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
bogdanm 0:9b334a45a8ff 21 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
bogdanm 0:9b334a45a8ff 22 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 @endverbatim
bogdanm 0:9b334a45a8ff 25 ******************************************************************************
bogdanm 0:9b334a45a8ff 26 * @attention
bogdanm 0:9b334a45a8ff 27 *
mbed_official 113:b3775bf36a83 28 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 29 *
bogdanm 0:9b334a45a8ff 30 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 31 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 32 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 33 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 34 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 35 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 36 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 38 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 39 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 40 *
bogdanm 0:9b334a45a8ff 41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 51 *
bogdanm 0:9b334a45a8ff 52 ******************************************************************************
bogdanm 0:9b334a45a8ff 53 */
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55
mbed_official 113:b3775bf36a83 56 #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
bogdanm 0:9b334a45a8ff 57 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 #include "stm32l0xx_hal.h"
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 #ifdef HAL_DAC_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 61 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 62 * @{
bogdanm 0:9b334a45a8ff 63 */
bogdanm 0:9b334a45a8ff 64
mbed_official 113:b3775bf36a83 65 /** @addtogroup DACEx DACEx
bogdanm 0:9b334a45a8ff 66 * @brief DAC driver modules
bogdanm 0:9b334a45a8ff 67 * @{
bogdanm 0:9b334a45a8ff 68 */
bogdanm 0:9b334a45a8ff 69
mbed_official 113:b3775bf36a83 70 /** @addtogroup DACEx_Private
mbed_official 113:b3775bf36a83 71 * @{
mbed_official 113:b3775bf36a83 72 */
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 75 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 76 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 77 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 78 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 79 /* Private functions ---------------------------------------------------------*/
mbed_official 113:b3775bf36a83 80
bogdanm 0:9b334a45a8ff 81 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
bogdanm 0:9b334a45a8ff 82 static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 83 static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 84 static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 85 #endif
bogdanm 0:9b334a45a8ff 86 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 87 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 88 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 89 /**
bogdanm 0:9b334a45a8ff 90 * @}
bogdanm 0:9b334a45a8ff 91 */
bogdanm 0:9b334a45a8ff 92
mbed_official 113:b3775bf36a83 93 /** @addtogroup DACEx_Exported_Functions
bogdanm 0:9b334a45a8ff 94 * @{
bogdanm 0:9b334a45a8ff 95 */
bogdanm 0:9b334a45a8ff 96
mbed_official 113:b3775bf36a83 97 /** @addtogroup DACEx_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 98 * @brief Extended features functions
bogdanm 0:9b334a45a8ff 99 *
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 * @{
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
bogdanm 0:9b334a45a8ff 105 /**
bogdanm 0:9b334a45a8ff 106 * @brief Returns the last data output value of the selected DAC channel.
bogdanm 0:9b334a45a8ff 107 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 108 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 109 * @retval The selected DAC channel data output value.
bogdanm 0:9b334a45a8ff 110 */
bogdanm 0:9b334a45a8ff 111 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 112 {
bogdanm 0:9b334a45a8ff 113 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 tmp |= hdac->Instance->DOR1;
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 tmp |= hdac->Instance->DOR2 << 16;
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /* Returns the DAC channel data output register value */
bogdanm 0:9b334a45a8ff 120 return tmp;
bogdanm 0:9b334a45a8ff 121 }
bogdanm 0:9b334a45a8ff 122 #endif
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /**
bogdanm 0:9b334a45a8ff 125 * @brief Enables or disables the selected DAC channel wave generation.
bogdanm 0:9b334a45a8ff 126 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 127 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 128 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 129 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 130 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 131 * @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
bogdanm 0:9b334a45a8ff 132 * @param Amplitude: Select max triangle amplitude.
bogdanm 0:9b334a45a8ff 133 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 134 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
bogdanm 0:9b334a45a8ff 135 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
bogdanm 0:9b334a45a8ff 136 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
bogdanm 0:9b334a45a8ff 137 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
bogdanm 0:9b334a45a8ff 138 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
bogdanm 0:9b334a45a8ff 139 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
bogdanm 0:9b334a45a8ff 140 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
bogdanm 0:9b334a45a8ff 141 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
bogdanm 0:9b334a45a8ff 142 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
bogdanm 0:9b334a45a8ff 143 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
bogdanm 0:9b334a45a8ff 144 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
bogdanm 0:9b334a45a8ff 145 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
bogdanm 0:9b334a45a8ff 146 * @retval HAL status
bogdanm 0:9b334a45a8ff 147 */
bogdanm 0:9b334a45a8ff 148 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
bogdanm 0:9b334a45a8ff 149 {
bogdanm 0:9b334a45a8ff 150 /* Check the parameters */
bogdanm 0:9b334a45a8ff 151 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 152 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 /* Process locked */
bogdanm 0:9b334a45a8ff 155 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 /* Change DAC state */
bogdanm 0:9b334a45a8ff 158 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /* Enable the triangle wave generation for the selected DAC channel */
bogdanm 0:9b334a45a8ff 161 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 /* Change DAC state */
bogdanm 0:9b334a45a8ff 165 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 /* Process unlocked */
bogdanm 0:9b334a45a8ff 168 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 /* Return function status */
bogdanm 0:9b334a45a8ff 171 return HAL_OK;
bogdanm 0:9b334a45a8ff 172 }
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 /**
bogdanm 0:9b334a45a8ff 175 * @brief Enables or disables the selected DAC channel wave generation.
bogdanm 0:9b334a45a8ff 176 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 177 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 178 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 179 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 180 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 181 * @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
bogdanm 0:9b334a45a8ff 182 * @param Amplitude: Unmask DAC channel LFSR for noise wave generation.
bogdanm 0:9b334a45a8ff 183 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 184 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
bogdanm 0:9b334a45a8ff 185 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
bogdanm 0:9b334a45a8ff 186 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
bogdanm 0:9b334a45a8ff 187 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
bogdanm 0:9b334a45a8ff 188 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
bogdanm 0:9b334a45a8ff 189 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
bogdanm 0:9b334a45a8ff 190 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
bogdanm 0:9b334a45a8ff 191 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
bogdanm 0:9b334a45a8ff 192 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
bogdanm 0:9b334a45a8ff 193 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
bogdanm 0:9b334a45a8ff 194 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
bogdanm 0:9b334a45a8ff 195 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
bogdanm 0:9b334a45a8ff 196 * @retval HAL status
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
bogdanm 0:9b334a45a8ff 199 {
bogdanm 0:9b334a45a8ff 200 /* Check the parameters */
bogdanm 0:9b334a45a8ff 201 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 202 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /* Process locked */
bogdanm 0:9b334a45a8ff 205 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 /* Change DAC state */
bogdanm 0:9b334a45a8ff 208 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 /* Enable the noise wave generation for the selected DAC channel */
bogdanm 0:9b334a45a8ff 211 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 /* Change DAC state */
bogdanm 0:9b334a45a8ff 214 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 /* Process unlocked */
bogdanm 0:9b334a45a8ff 217 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 /* Return function status */
bogdanm 0:9b334a45a8ff 220 return HAL_OK;
bogdanm 0:9b334a45a8ff 221 }
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
bogdanm 0:9b334a45a8ff 224 /**
bogdanm 0:9b334a45a8ff 225 * @brief Set the specified data holding register value for dual DAC channel.
bogdanm 0:9b334a45a8ff 226 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 227 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 228 * @param Alignment: Specifies the data alignment for dual channel DAC.
bogdanm 0:9b334a45a8ff 229 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 230 * DAC_ALIGN_8B_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 231 * DAC_ALIGN_12B_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 232 * DAC_ALIGN_12B_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 233 * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
bogdanm 0:9b334a45a8ff 234 * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register.
bogdanm 0:9b334a45a8ff 235 * @note In dual mode, a unique register access is required to write in both
bogdanm 0:9b334a45a8ff 236 * DAC channels at the same time.
bogdanm 0:9b334a45a8ff 237 * @retval HAL status
bogdanm 0:9b334a45a8ff 238 */
bogdanm 0:9b334a45a8ff 239 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
bogdanm 0:9b334a45a8ff 240 {
bogdanm 0:9b334a45a8ff 241 uint32_t data = 0, tmp = 0;
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 /* Check the parameters */
bogdanm 0:9b334a45a8ff 244 assert_param(IS_DAC_ALIGN(Alignment));
bogdanm 0:9b334a45a8ff 245 assert_param(IS_DAC_DATA(Data1));
bogdanm 0:9b334a45a8ff 246 assert_param(IS_DAC_DATA(Data2));
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /* Calculate and set dual DAC data holding register value */
bogdanm 0:9b334a45a8ff 249 if (Alignment == DAC_ALIGN_8B_R)
bogdanm 0:9b334a45a8ff 250 {
bogdanm 0:9b334a45a8ff 251 data = ((uint32_t)Data2 << 8) | Data1;
bogdanm 0:9b334a45a8ff 252 }
bogdanm 0:9b334a45a8ff 253 else
bogdanm 0:9b334a45a8ff 254 {
bogdanm 0:9b334a45a8ff 255 data = ((uint32_t)Data2 << 16) | Data1;
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 tmp = (uint32_t)hdac->Instance;
mbed_official 113:b3775bf36a83 259 tmp += DAC_DHR12RD_ALIGNEMENT(Alignment);
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 /* Set the dual DAC selected data holding register */
bogdanm 0:9b334a45a8ff 262 *(__IO uint32_t *)tmp = data;
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 /* Return function status */
bogdanm 0:9b334a45a8ff 265 return HAL_OK;
bogdanm 0:9b334a45a8ff 266 }
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /**
bogdanm 0:9b334a45a8ff 270 * @brief Conversion complete callback in non blocking mode for Channel2
bogdanm 0:9b334a45a8ff 271 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 272 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 273 * @retval None
bogdanm 0:9b334a45a8ff 274 */
bogdanm 0:9b334a45a8ff 275 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 276 {
mbed_official 113:b3775bf36a83 277 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 278 UNUSED(hdac);
mbed_official 113:b3775bf36a83 279
bogdanm 0:9b334a45a8ff 280 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 281 the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
bogdanm 0:9b334a45a8ff 282 */
bogdanm 0:9b334a45a8ff 283 }
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /**
bogdanm 0:9b334a45a8ff 286 * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
bogdanm 0:9b334a45a8ff 287 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 288 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 289 * @retval None
bogdanm 0:9b334a45a8ff 290 */
bogdanm 0:9b334a45a8ff 291 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 292 {
mbed_official 113:b3775bf36a83 293 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 294 UNUSED(hdac);
mbed_official 113:b3775bf36a83 295
bogdanm 0:9b334a45a8ff 296 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 297 the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
bogdanm 0:9b334a45a8ff 298 */
bogdanm 0:9b334a45a8ff 299 }
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 /**
bogdanm 0:9b334a45a8ff 302 * @brief Error DAC callback for Channel2.
bogdanm 0:9b334a45a8ff 303 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 304 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 305 * @retval None
bogdanm 0:9b334a45a8ff 306 */
bogdanm 0:9b334a45a8ff 307 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
bogdanm 0:9b334a45a8ff 308 {
mbed_official 113:b3775bf36a83 309 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 310 UNUSED(hdac);
mbed_official 113:b3775bf36a83 311
bogdanm 0:9b334a45a8ff 312 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 313 the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
bogdanm 0:9b334a45a8ff 314 */
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 /**
bogdanm 0:9b334a45a8ff 318 * @brief DMA underrun DAC callback for channel2.
bogdanm 0:9b334a45a8ff 319 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 320 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 321 * @retval None
bogdanm 0:9b334a45a8ff 322 */
bogdanm 0:9b334a45a8ff 323 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
bogdanm 0:9b334a45a8ff 324 {
mbed_official 113:b3775bf36a83 325 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 326 UNUSED(hdac);
mbed_official 113:b3775bf36a83 327
bogdanm 0:9b334a45a8ff 328 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 329 the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
bogdanm 0:9b334a45a8ff 330 */
bogdanm 0:9b334a45a8ff 331 }
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 /**
bogdanm 0:9b334a45a8ff 334 * @brief Enables DAC and starts conversion of channel.
bogdanm 0:9b334a45a8ff 335 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 336 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 337 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 338 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 339 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 340 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 341 * @retval HAL status
bogdanm 0:9b334a45a8ff 342 */
bogdanm 0:9b334a45a8ff 343 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 344 {
bogdanm 0:9b334a45a8ff 345 uint32_t tmp1 = 0, tmp2 = 0;
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 /* Check the parameters */
bogdanm 0:9b334a45a8ff 348 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350 /* Process locked */
bogdanm 0:9b334a45a8ff 351 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 /* Change DAC state */
bogdanm 0:9b334a45a8ff 354 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 /* Enable the Peripharal */
bogdanm 0:9b334a45a8ff 357 __HAL_DAC_ENABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 360 {
bogdanm 0:9b334a45a8ff 361 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
bogdanm 0:9b334a45a8ff 362 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
bogdanm 0:9b334a45a8ff 363 /* Check if software trigger enabled */
bogdanm 0:9b334a45a8ff 364 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
bogdanm 0:9b334a45a8ff 365 {
bogdanm 0:9b334a45a8ff 366 /* Enable the selected DAC software conversion */
bogdanm 0:9b334a45a8ff 367 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
bogdanm 0:9b334a45a8ff 368 }
bogdanm 0:9b334a45a8ff 369 }
bogdanm 0:9b334a45a8ff 370 else
bogdanm 0:9b334a45a8ff 371 {
bogdanm 0:9b334a45a8ff 372 tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
bogdanm 0:9b334a45a8ff 373 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;
bogdanm 0:9b334a45a8ff 374 /* Check if software trigger enabled */
bogdanm 0:9b334a45a8ff 375 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
bogdanm 0:9b334a45a8ff 376 {
bogdanm 0:9b334a45a8ff 377 /* Enable the selected DAC software conversion*/
bogdanm 0:9b334a45a8ff 378 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
bogdanm 0:9b334a45a8ff 379 }
bogdanm 0:9b334a45a8ff 380 }
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 /* Change DAC state */
bogdanm 0:9b334a45a8ff 383 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 /* Process unlocked */
bogdanm 0:9b334a45a8ff 386 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 /* Return function status */
bogdanm 0:9b334a45a8ff 389 return HAL_OK;
bogdanm 0:9b334a45a8ff 390 }
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /**
bogdanm 0:9b334a45a8ff 393 * @brief Enables DAC and starts conversion of channel using DMA.
bogdanm 0:9b334a45a8ff 394 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 395 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 396 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 397 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 398 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 399 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 400 * @param pData: The destination peripheral Buffer address.
bogdanm 0:9b334a45a8ff 401 * @param Length: The length of data to be transferred from memory to DAC peripheral
bogdanm 0:9b334a45a8ff 402 * @param Alignment: Specifies the data alignment for DAC channel.
bogdanm 0:9b334a45a8ff 403 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 404 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 405 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 406 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 407 * @retval HAL status
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
bogdanm 0:9b334a45a8ff 410 {
bogdanm 0:9b334a45a8ff 411 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 /* Check the parameters */
bogdanm 0:9b334a45a8ff 414 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 415 assert_param(IS_DAC_ALIGN(Alignment));
bogdanm 0:9b334a45a8ff 416
bogdanm 0:9b334a45a8ff 417 /* Process locked */
bogdanm 0:9b334a45a8ff 418 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420 /* Change DAC state */
bogdanm 0:9b334a45a8ff 421 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 422
bogdanm 0:9b334a45a8ff 423 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 424 {
bogdanm 0:9b334a45a8ff 425 /* Set the DMA transfer complete callback for channel1 */
bogdanm 0:9b334a45a8ff 426 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 /* Set the DMA half transfer complete callback for channel1 */
bogdanm 0:9b334a45a8ff 429 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 /* Set the DMA error callback for channel1 */
bogdanm 0:9b334a45a8ff 432 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434 /* Enable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 435 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 /* Case of use of channel 1 */
bogdanm 0:9b334a45a8ff 438 switch(Alignment)
bogdanm 0:9b334a45a8ff 439 {
bogdanm 0:9b334a45a8ff 440 case DAC_ALIGN_12B_R:
bogdanm 0:9b334a45a8ff 441 /* Get DHR12R1 address */
bogdanm 0:9b334a45a8ff 442 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
bogdanm 0:9b334a45a8ff 443 break;
bogdanm 0:9b334a45a8ff 444 case DAC_ALIGN_12B_L:
bogdanm 0:9b334a45a8ff 445 /* Get DHR12L1 address */
bogdanm 0:9b334a45a8ff 446 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
bogdanm 0:9b334a45a8ff 447 break;
bogdanm 0:9b334a45a8ff 448 case DAC_ALIGN_8B_R:
bogdanm 0:9b334a45a8ff 449 /* Get DHR8R1 address */
bogdanm 0:9b334a45a8ff 450 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
bogdanm 0:9b334a45a8ff 451 break;
bogdanm 0:9b334a45a8ff 452 default:
bogdanm 0:9b334a45a8ff 453 break;
bogdanm 0:9b334a45a8ff 454 }
bogdanm 0:9b334a45a8ff 455 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
bogdanm 0:9b334a45a8ff 456 }
bogdanm 0:9b334a45a8ff 457 else
bogdanm 0:9b334a45a8ff 458 {
bogdanm 0:9b334a45a8ff 459 /* Set the DMA transfer complete callback for channel2 */
bogdanm 0:9b334a45a8ff 460 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 /* Set the DMA half transfer complete callback for channel2 */
bogdanm 0:9b334a45a8ff 463 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
bogdanm 0:9b334a45a8ff 464
bogdanm 0:9b334a45a8ff 465 /* Set the DMA error callback for channel2 */
bogdanm 0:9b334a45a8ff 466 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
bogdanm 0:9b334a45a8ff 467
bogdanm 0:9b334a45a8ff 468 /* Enable the selected DAC channel2 DMA request */
bogdanm 0:9b334a45a8ff 469 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 /* Case of use of channel 2 */
bogdanm 0:9b334a45a8ff 472 switch(Alignment)
bogdanm 0:9b334a45a8ff 473 {
bogdanm 0:9b334a45a8ff 474 case DAC_ALIGN_12B_R:
bogdanm 0:9b334a45a8ff 475 /* Get DHR12R2 address */
bogdanm 0:9b334a45a8ff 476 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
bogdanm 0:9b334a45a8ff 477 break;
bogdanm 0:9b334a45a8ff 478 case DAC_ALIGN_12B_L:
bogdanm 0:9b334a45a8ff 479 /* Get DHR12L2 address */
bogdanm 0:9b334a45a8ff 480 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
bogdanm 0:9b334a45a8ff 481 break;
bogdanm 0:9b334a45a8ff 482 case DAC_ALIGN_8B_R:
bogdanm 0:9b334a45a8ff 483 /* Get DHR8R2 address */
bogdanm 0:9b334a45a8ff 484 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
bogdanm 0:9b334a45a8ff 485 break;
bogdanm 0:9b334a45a8ff 486 default:
bogdanm 0:9b334a45a8ff 487 break;
bogdanm 0:9b334a45a8ff 488 }
bogdanm 0:9b334a45a8ff 489 }
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 492 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 493 {
bogdanm 0:9b334a45a8ff 494 /* Enable the DAC DMA underrun interrupt */
bogdanm 0:9b334a45a8ff 495 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
bogdanm 0:9b334a45a8ff 496
bogdanm 0:9b334a45a8ff 497 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 498 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
bogdanm 0:9b334a45a8ff 499 }
bogdanm 0:9b334a45a8ff 500 else
bogdanm 0:9b334a45a8ff 501 {
bogdanm 0:9b334a45a8ff 502 /* Enable the DAC DMA underrun interrupt */
bogdanm 0:9b334a45a8ff 503 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
bogdanm 0:9b334a45a8ff 504
bogdanm 0:9b334a45a8ff 505 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 506 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
bogdanm 0:9b334a45a8ff 507 }
bogdanm 0:9b334a45a8ff 508
bogdanm 0:9b334a45a8ff 509 /* Enable the Peripharal */
bogdanm 0:9b334a45a8ff 510 __HAL_DAC_ENABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 511
bogdanm 0:9b334a45a8ff 512 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 513 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 /* Return function status */
bogdanm 0:9b334a45a8ff 516 return HAL_OK;
bogdanm 0:9b334a45a8ff 517 }
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 /**
bogdanm 0:9b334a45a8ff 520 * @brief Disables DAC and stop conversion of channel.
bogdanm 0:9b334a45a8ff 521 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 522 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 523 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 524 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 525 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 526 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 527 * @retval HAL status
bogdanm 0:9b334a45a8ff 528 */
bogdanm 0:9b334a45a8ff 529 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 530 {
bogdanm 0:9b334a45a8ff 531 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 532
bogdanm 0:9b334a45a8ff 533 /* Check the parameters */
bogdanm 0:9b334a45a8ff 534 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 535
bogdanm 0:9b334a45a8ff 536 /* Disable the selected DAC channel DMA request */
bogdanm 0:9b334a45a8ff 537 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
bogdanm 0:9b334a45a8ff 538
bogdanm 0:9b334a45a8ff 539 /* Disable the Peripharal */
bogdanm 0:9b334a45a8ff 540 __HAL_DAC_DISABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 541
bogdanm 0:9b334a45a8ff 542 /* Disable the DMA Channel */
bogdanm 0:9b334a45a8ff 543 /* Channel1 is used */
bogdanm 0:9b334a45a8ff 544 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 545 {
bogdanm 0:9b334a45a8ff 546 status = HAL_DMA_Abort(hdac->DMA_Handle1);
bogdanm 0:9b334a45a8ff 547 }
bogdanm 0:9b334a45a8ff 548 else /* Channel2 is used for */
bogdanm 0:9b334a45a8ff 549 {
bogdanm 0:9b334a45a8ff 550 status = HAL_DMA_Abort(hdac->DMA_Handle2);
bogdanm 0:9b334a45a8ff 551 }
bogdanm 0:9b334a45a8ff 552
bogdanm 0:9b334a45a8ff 553 /* Check if DMA Channel effectively disabled */
bogdanm 0:9b334a45a8ff 554 if(status != HAL_OK)
bogdanm 0:9b334a45a8ff 555 {
bogdanm 0:9b334a45a8ff 556 /* Update DAC state machine to error */
bogdanm 0:9b334a45a8ff 557 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 558 }
bogdanm 0:9b334a45a8ff 559 else
bogdanm 0:9b334a45a8ff 560 {
bogdanm 0:9b334a45a8ff 561 /* Change DAC state */
bogdanm 0:9b334a45a8ff 562 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 563 }
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 /* Return function status */
bogdanm 0:9b334a45a8ff 566 return status;
bogdanm 0:9b334a45a8ff 567 }
bogdanm 0:9b334a45a8ff 568
bogdanm 0:9b334a45a8ff 569 /**
bogdanm 0:9b334a45a8ff 570 * @brief Returns the last data output value of the selected DAC channel.
bogdanm 0:9b334a45a8ff 571 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 572 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 573 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 574 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 575 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 576 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 577 * @retval The selected DAC channel data output value.
bogdanm 0:9b334a45a8ff 578 */
bogdanm 0:9b334a45a8ff 579 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 580 {
bogdanm 0:9b334a45a8ff 581 /* Check the parameters */
bogdanm 0:9b334a45a8ff 582 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 /* Returns the DAC channel data output register value */
bogdanm 0:9b334a45a8ff 585 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 586 {
bogdanm 0:9b334a45a8ff 587 return hdac->Instance->DOR1;
bogdanm 0:9b334a45a8ff 588 }
bogdanm 0:9b334a45a8ff 589 else
bogdanm 0:9b334a45a8ff 590 {
bogdanm 0:9b334a45a8ff 591 return hdac->Instance->DOR2;
bogdanm 0:9b334a45a8ff 592 }
bogdanm 0:9b334a45a8ff 593 }
bogdanm 0:9b334a45a8ff 594
bogdanm 0:9b334a45a8ff 595 /**
bogdanm 0:9b334a45a8ff 596 * @brief Handles DAC interrupt request
bogdanm 0:9b334a45a8ff 597 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 598 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 599 * @retval None
bogdanm 0:9b334a45a8ff 600 */
bogdanm 0:9b334a45a8ff 601 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 602 {
bogdanm 0:9b334a45a8ff 603 /* Check underrun flag of DAC channel 1 */
bogdanm 0:9b334a45a8ff 604 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
bogdanm 0:9b334a45a8ff 605 {
bogdanm 0:9b334a45a8ff 606 /* Change DAC state to error state */
bogdanm 0:9b334a45a8ff 607 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 608
bogdanm 0:9b334a45a8ff 609 /* Set DAC error code to chanel1 DMA underrun error */
bogdanm 0:9b334a45a8ff 610 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
bogdanm 0:9b334a45a8ff 611
bogdanm 0:9b334a45a8ff 612 /* Clear the underrun flag */
bogdanm 0:9b334a45a8ff 613 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
bogdanm 0:9b334a45a8ff 614
bogdanm 0:9b334a45a8ff 615 /* Disable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 616 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 /* Error callback */
bogdanm 0:9b334a45a8ff 619 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 620 }
bogdanm 0:9b334a45a8ff 621
bogdanm 0:9b334a45a8ff 622 /* Check underrun flag of DAC channel 2 */
bogdanm 0:9b334a45a8ff 623 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
bogdanm 0:9b334a45a8ff 624 {
bogdanm 0:9b334a45a8ff 625 /* Change DAC state to error state */
bogdanm 0:9b334a45a8ff 626 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 627
bogdanm 0:9b334a45a8ff 628 /* Set DAC error code to channel2 DMA underrun error */
bogdanm 0:9b334a45a8ff 629 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
bogdanm 0:9b334a45a8ff 630
bogdanm 0:9b334a45a8ff 631 /* Clear the underrun flag */
bogdanm 0:9b334a45a8ff 632 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
bogdanm 0:9b334a45a8ff 633
bogdanm 0:9b334a45a8ff 634 /* Disable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 635 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
bogdanm 0:9b334a45a8ff 636
bogdanm 0:9b334a45a8ff 637 /* Error callback */
bogdanm 0:9b334a45a8ff 638 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
bogdanm 0:9b334a45a8ff 639 }
bogdanm 0:9b334a45a8ff 640 }
bogdanm 0:9b334a45a8ff 641
bogdanm 0:9b334a45a8ff 642
bogdanm 0:9b334a45a8ff 643 /**
bogdanm 0:9b334a45a8ff 644 * @brief Set the specified data holding register value for DAC channel.
bogdanm 0:9b334a45a8ff 645 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 646 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 647 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 648 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 649 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 650 * @arg DAC_CHANNEL_2: DAC Channel2 selected
bogdanm 0:9b334a45a8ff 651 * @param Alignment: Specifies the data alignment.
bogdanm 0:9b334a45a8ff 652 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 653 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 654 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 655 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 656 * @param Data: Data to be loaded in the selected data holding register.
bogdanm 0:9b334a45a8ff 657 * @retval HAL status
bogdanm 0:9b334a45a8ff 658 */
bogdanm 0:9b334a45a8ff 659 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
bogdanm 0:9b334a45a8ff 660 {
bogdanm 0:9b334a45a8ff 661 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 662
bogdanm 0:9b334a45a8ff 663 /* Check the parameters */
bogdanm 0:9b334a45a8ff 664 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 665 assert_param(IS_DAC_ALIGN(Alignment));
bogdanm 0:9b334a45a8ff 666 assert_param(IS_DAC_DATA(Data));
bogdanm 0:9b334a45a8ff 667
bogdanm 0:9b334a45a8ff 668 tmp = (uint32_t)hdac->Instance;
bogdanm 0:9b334a45a8ff 669 if(Channel == DAC_CHANNEL_1)
bogdanm 0:9b334a45a8ff 670 {
mbed_official 113:b3775bf36a83 671 tmp += DAC_DHR12R1_ALIGNEMENT(Alignment);
bogdanm 0:9b334a45a8ff 672 }
bogdanm 0:9b334a45a8ff 673 else
bogdanm 0:9b334a45a8ff 674 {
mbed_official 113:b3775bf36a83 675 tmp += DAC_DHR12R2_ALIGNEMENT(Alignment);
bogdanm 0:9b334a45a8ff 676 }
bogdanm 0:9b334a45a8ff 677
bogdanm 0:9b334a45a8ff 678 /* Set the DAC channel selected data holding register */
bogdanm 0:9b334a45a8ff 679 *(__IO uint32_t *) tmp = Data;
bogdanm 0:9b334a45a8ff 680
bogdanm 0:9b334a45a8ff 681 /* Return function status */
bogdanm 0:9b334a45a8ff 682 return HAL_OK;
bogdanm 0:9b334a45a8ff 683 }
bogdanm 0:9b334a45a8ff 684 #else /* All products with only one channel */
bogdanm 0:9b334a45a8ff 685
bogdanm 0:9b334a45a8ff 686 /**
bogdanm 0:9b334a45a8ff 687 * @brief Enables DAC and starts conversion of channel.
bogdanm 0:9b334a45a8ff 688 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 689 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 690 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 691 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 692 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 693 * @retval HAL status
bogdanm 0:9b334a45a8ff 694 */
bogdanm 0:9b334a45a8ff 695 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 696 {
bogdanm 0:9b334a45a8ff 697 uint32_t tmp1 = 0, tmp2 = 0;
bogdanm 0:9b334a45a8ff 698
bogdanm 0:9b334a45a8ff 699 /* Check the parameters */
bogdanm 0:9b334a45a8ff 700 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 701
bogdanm 0:9b334a45a8ff 702 /* Process locked */
bogdanm 0:9b334a45a8ff 703 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 704
bogdanm 0:9b334a45a8ff 705 /* Change DAC state */
bogdanm 0:9b334a45a8ff 706 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 707
bogdanm 0:9b334a45a8ff 708 /* Enable the Peripharal */
bogdanm 0:9b334a45a8ff 709 __HAL_DAC_ENABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 710
bogdanm 0:9b334a45a8ff 711 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
bogdanm 0:9b334a45a8ff 712 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
bogdanm 0:9b334a45a8ff 713 /* Check if software trigger enabled */
bogdanm 0:9b334a45a8ff 714 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
bogdanm 0:9b334a45a8ff 715 {
bogdanm 0:9b334a45a8ff 716 /* Enable the selected DAC software conversion */
bogdanm 0:9b334a45a8ff 717 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
bogdanm 0:9b334a45a8ff 718 }
bogdanm 0:9b334a45a8ff 719
bogdanm 0:9b334a45a8ff 720 /* Change DAC state */
bogdanm 0:9b334a45a8ff 721 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 722
bogdanm 0:9b334a45a8ff 723 /* Process unlocked */
bogdanm 0:9b334a45a8ff 724 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 725
bogdanm 0:9b334a45a8ff 726 /* Return function status */
bogdanm 0:9b334a45a8ff 727 return HAL_OK;
bogdanm 0:9b334a45a8ff 728 }
bogdanm 0:9b334a45a8ff 729
bogdanm 0:9b334a45a8ff 730 /**
bogdanm 0:9b334a45a8ff 731 * @brief Enables DAC and starts conversion of channel using DMA.
bogdanm 0:9b334a45a8ff 732 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 733 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 734 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 735 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 736 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 737 * @param pData: The destination peripheral Buffer address.
bogdanm 0:9b334a45a8ff 738 * @param Length: The length of data to be transferred from memory to DAC peripheral
bogdanm 0:9b334a45a8ff 739 * @param Alignment: Specifies the data alignment for DAC channel.
bogdanm 0:9b334a45a8ff 740 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 741 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 742 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 743 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 744 * @retval HAL status
bogdanm 0:9b334a45a8ff 745 */
bogdanm 0:9b334a45a8ff 746 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
bogdanm 0:9b334a45a8ff 747 {
bogdanm 0:9b334a45a8ff 748 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 749
bogdanm 0:9b334a45a8ff 750 /* Check the parameters */
bogdanm 0:9b334a45a8ff 751 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 752 assert_param(IS_DAC_ALIGN(Alignment));
bogdanm 0:9b334a45a8ff 753
bogdanm 0:9b334a45a8ff 754 /* Process locked */
bogdanm 0:9b334a45a8ff 755 __HAL_LOCK(hdac);
bogdanm 0:9b334a45a8ff 756
bogdanm 0:9b334a45a8ff 757 /* Change DAC state */
bogdanm 0:9b334a45a8ff 758 hdac->State = HAL_DAC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 759
bogdanm 0:9b334a45a8ff 760 /* Set the DMA transfer complete callback for channel1 */
bogdanm 0:9b334a45a8ff 761 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
bogdanm 0:9b334a45a8ff 762
bogdanm 0:9b334a45a8ff 763 /* Set the DMA half transfer complete callback for channel1 */
bogdanm 0:9b334a45a8ff 764 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
bogdanm 0:9b334a45a8ff 765
bogdanm 0:9b334a45a8ff 766 /* Set the DMA error callback for channel1 */
bogdanm 0:9b334a45a8ff 767 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
bogdanm 0:9b334a45a8ff 768
bogdanm 0:9b334a45a8ff 769 /* Enable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 770 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
bogdanm 0:9b334a45a8ff 771
bogdanm 0:9b334a45a8ff 772 /* Case of use of channel 1 */
bogdanm 0:9b334a45a8ff 773 switch(Alignment)
bogdanm 0:9b334a45a8ff 774 {
bogdanm 0:9b334a45a8ff 775 case DAC_ALIGN_12B_R:
bogdanm 0:9b334a45a8ff 776 /* Get DHR12R1 address */
bogdanm 0:9b334a45a8ff 777 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
bogdanm 0:9b334a45a8ff 778 break;
bogdanm 0:9b334a45a8ff 779 case DAC_ALIGN_12B_L:
bogdanm 0:9b334a45a8ff 780 /* Get DHR12L1 address */
bogdanm 0:9b334a45a8ff 781 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
bogdanm 0:9b334a45a8ff 782 break;
bogdanm 0:9b334a45a8ff 783 case DAC_ALIGN_8B_R:
bogdanm 0:9b334a45a8ff 784 /* Get DHR8R1 address */
bogdanm 0:9b334a45a8ff 785 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
bogdanm 0:9b334a45a8ff 786 break;
bogdanm 0:9b334a45a8ff 787 default:
bogdanm 0:9b334a45a8ff 788 break;
bogdanm 0:9b334a45a8ff 789 }
bogdanm 0:9b334a45a8ff 790 UNUSED(tmpreg); /* avoid warning on tmpreg affectation with stupid compiler */
bogdanm 0:9b334a45a8ff 791
bogdanm 0:9b334a45a8ff 792 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 793 /* Enable the DAC DMA underrun interrupt */
bogdanm 0:9b334a45a8ff 794 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
bogdanm 0:9b334a45a8ff 795
bogdanm 0:9b334a45a8ff 796 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 797 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
bogdanm 0:9b334a45a8ff 798
bogdanm 0:9b334a45a8ff 799 /* Enable the Peripharal */
bogdanm 0:9b334a45a8ff 800 __HAL_DAC_ENABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 801
bogdanm 0:9b334a45a8ff 802 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 803 __HAL_UNLOCK(hdac);
bogdanm 0:9b334a45a8ff 804
bogdanm 0:9b334a45a8ff 805 /* Return function status */
bogdanm 0:9b334a45a8ff 806 return HAL_OK;
bogdanm 0:9b334a45a8ff 807 }
bogdanm 0:9b334a45a8ff 808
bogdanm 0:9b334a45a8ff 809 /**
bogdanm 0:9b334a45a8ff 810 * @brief Disables DAC and stop conversion of channel.
bogdanm 0:9b334a45a8ff 811 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 812 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 813 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 814 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 815 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 816 * @retval HAL status
bogdanm 0:9b334a45a8ff 817 */
bogdanm 0:9b334a45a8ff 818 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 819 {
bogdanm 0:9b334a45a8ff 820 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 /* Check the parameters */
bogdanm 0:9b334a45a8ff 823 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 824
bogdanm 0:9b334a45a8ff 825 /* Disable the selected DAC channel DMA request */
bogdanm 0:9b334a45a8ff 826 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
bogdanm 0:9b334a45a8ff 827
bogdanm 0:9b334a45a8ff 828 /* Disable the Peripharal */
bogdanm 0:9b334a45a8ff 829 __HAL_DAC_DISABLE(hdac, Channel);
bogdanm 0:9b334a45a8ff 830
bogdanm 0:9b334a45a8ff 831 /* Disable the DMA Channel */
bogdanm 0:9b334a45a8ff 832 status = HAL_DMA_Abort(hdac->DMA_Handle1);
bogdanm 0:9b334a45a8ff 833
bogdanm 0:9b334a45a8ff 834 /* Check if DMA Channel effectively disabled */
bogdanm 0:9b334a45a8ff 835 if(status != HAL_OK)
bogdanm 0:9b334a45a8ff 836 {
bogdanm 0:9b334a45a8ff 837 /* Update DAC state machine to error */
bogdanm 0:9b334a45a8ff 838 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 839 }
bogdanm 0:9b334a45a8ff 840 else
bogdanm 0:9b334a45a8ff 841 {
bogdanm 0:9b334a45a8ff 842 /* Change DAC state */
bogdanm 0:9b334a45a8ff 843 hdac->State = HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 844 }
bogdanm 0:9b334a45a8ff 845
bogdanm 0:9b334a45a8ff 846 /* Return function status */
bogdanm 0:9b334a45a8ff 847 return status;
bogdanm 0:9b334a45a8ff 848 }
bogdanm 0:9b334a45a8ff 849
bogdanm 0:9b334a45a8ff 850 /**
bogdanm 0:9b334a45a8ff 851 * @brief Returns the last data output value of the selected DAC channel.
bogdanm 0:9b334a45a8ff 852 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 853 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 854 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 855 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 856 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 857 * @retval The selected DAC channel data output value.
bogdanm 0:9b334a45a8ff 858 */
bogdanm 0:9b334a45a8ff 859 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
bogdanm 0:9b334a45a8ff 860 {
bogdanm 0:9b334a45a8ff 861 /* Check the parameters */
bogdanm 0:9b334a45a8ff 862 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 863
bogdanm 0:9b334a45a8ff 864 /* Returns the DAC channel data output register value */
bogdanm 0:9b334a45a8ff 865 return hdac->Instance->DOR1;
bogdanm 0:9b334a45a8ff 866 }
bogdanm 0:9b334a45a8ff 867
bogdanm 0:9b334a45a8ff 868 /**
bogdanm 0:9b334a45a8ff 869 * @brief Handles DAC interrupt request
bogdanm 0:9b334a45a8ff 870 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 871 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 872 * @retval None
bogdanm 0:9b334a45a8ff 873 */
bogdanm 0:9b334a45a8ff 874 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
bogdanm 0:9b334a45a8ff 875 {
bogdanm 0:9b334a45a8ff 876 /* Check underrun flag of DAC channel 1 */
bogdanm 0:9b334a45a8ff 877 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
bogdanm 0:9b334a45a8ff 878 {
bogdanm 0:9b334a45a8ff 879 /* Change DAC state to error state */
bogdanm 0:9b334a45a8ff 880 hdac->State = HAL_DAC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 881
bogdanm 0:9b334a45a8ff 882 /* Set DAC error code to chanel1 DMA underrun error */
bogdanm 0:9b334a45a8ff 883 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
bogdanm 0:9b334a45a8ff 884
bogdanm 0:9b334a45a8ff 885 /* Clear the underrun flag */
bogdanm 0:9b334a45a8ff 886 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
bogdanm 0:9b334a45a8ff 887
bogdanm 0:9b334a45a8ff 888 /* Disable the selected DAC channel1 DMA request */
bogdanm 0:9b334a45a8ff 889 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
bogdanm 0:9b334a45a8ff 890
bogdanm 0:9b334a45a8ff 891 /* Error callback */
bogdanm 0:9b334a45a8ff 892 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 893 }
bogdanm 0:9b334a45a8ff 894 }
bogdanm 0:9b334a45a8ff 895
bogdanm 0:9b334a45a8ff 896 /**
bogdanm 0:9b334a45a8ff 897 * @brief Set the specified data holding register value for DAC channel.
bogdanm 0:9b334a45a8ff 898 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 899 * the configuration information for the specified DAC.
bogdanm 0:9b334a45a8ff 900 * @param Channel: The selected DAC channel.
bogdanm 0:9b334a45a8ff 901 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 902 * @arg DAC_CHANNEL_1: DAC Channel1 selected
bogdanm 0:9b334a45a8ff 903 * @param Alignment: Specifies the data alignment.
bogdanm 0:9b334a45a8ff 904 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 905 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
bogdanm 0:9b334a45a8ff 906 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
bogdanm 0:9b334a45a8ff 907 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
bogdanm 0:9b334a45a8ff 908 * @param Data: Data to be loaded in the selected data holding register.
bogdanm 0:9b334a45a8ff 909 * @retval HAL status
bogdanm 0:9b334a45a8ff 910 */
bogdanm 0:9b334a45a8ff 911 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
bogdanm 0:9b334a45a8ff 912 {
bogdanm 0:9b334a45a8ff 913 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 914
bogdanm 0:9b334a45a8ff 915 /* Check the parameters */
bogdanm 0:9b334a45a8ff 916 assert_param(IS_DAC_CHANNEL(Channel));
bogdanm 0:9b334a45a8ff 917 assert_param(IS_DAC_ALIGN(Alignment));
bogdanm 0:9b334a45a8ff 918 assert_param(IS_DAC_DATA(Data));
bogdanm 0:9b334a45a8ff 919
bogdanm 0:9b334a45a8ff 920 tmp = (uint32_t)hdac->Instance;
mbed_official 113:b3775bf36a83 921 tmp += DAC_DHR12R1_ALIGNEMENT(Alignment);
bogdanm 0:9b334a45a8ff 922
bogdanm 0:9b334a45a8ff 923 /* Set the DAC channel selected data holding register */
bogdanm 0:9b334a45a8ff 924 *(__IO uint32_t *) tmp = Data;
bogdanm 0:9b334a45a8ff 925
bogdanm 0:9b334a45a8ff 926 /* Return function status */
bogdanm 0:9b334a45a8ff 927 return HAL_OK;
bogdanm 0:9b334a45a8ff 928 }
bogdanm 0:9b334a45a8ff 929
bogdanm 0:9b334a45a8ff 930 #endif /* #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) */
bogdanm 0:9b334a45a8ff 931
bogdanm 0:9b334a45a8ff 932 /**
bogdanm 0:9b334a45a8ff 933 * @}
bogdanm 0:9b334a45a8ff 934 */
bogdanm 0:9b334a45a8ff 935
bogdanm 0:9b334a45a8ff 936 /**
bogdanm 0:9b334a45a8ff 937 * @}
bogdanm 0:9b334a45a8ff 938 */
bogdanm 0:9b334a45a8ff 939
mbed_official 113:b3775bf36a83 940 /** @addtogroup DACEx_Private
bogdanm 0:9b334a45a8ff 941 * @{
bogdanm 0:9b334a45a8ff 942 */
bogdanm 0:9b334a45a8ff 943 #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
bogdanm 0:9b334a45a8ff 944 /**
bogdanm 0:9b334a45a8ff 945 * @brief DMA conversion complete callback.
bogdanm 0:9b334a45a8ff 946 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 947 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 948 * @retval None
bogdanm 0:9b334a45a8ff 949 */
bogdanm 0:9b334a45a8ff 950 static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 951 {
bogdanm 0:9b334a45a8ff 952 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 953
bogdanm 0:9b334a45a8ff 954 HAL_DACEx_ConvCpltCallbackCh2(hdac);
bogdanm 0:9b334a45a8ff 955
bogdanm 0:9b334a45a8ff 956 hdac->State= HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 957 }
bogdanm 0:9b334a45a8ff 958
bogdanm 0:9b334a45a8ff 959 /**
bogdanm 0:9b334a45a8ff 960 * @brief DMA half transfer complete callback.
bogdanm 0:9b334a45a8ff 961 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 962 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 963 * @retval None
bogdanm 0:9b334a45a8ff 964 */
bogdanm 0:9b334a45a8ff 965 static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 966 {
bogdanm 0:9b334a45a8ff 967 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 968 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 969 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
bogdanm 0:9b334a45a8ff 970 }
bogdanm 0:9b334a45a8ff 971
bogdanm 0:9b334a45a8ff 972 /**
bogdanm 0:9b334a45a8ff 973 * @brief DMA error callback
bogdanm 0:9b334a45a8ff 974 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 975 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 976 * @retval None
bogdanm 0:9b334a45a8ff 977 */
bogdanm 0:9b334a45a8ff 978 static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 979 {
bogdanm 0:9b334a45a8ff 980 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 981
bogdanm 0:9b334a45a8ff 982 /* Set DAC error code to DMA error */
bogdanm 0:9b334a45a8ff 983 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
bogdanm 0:9b334a45a8ff 984
bogdanm 0:9b334a45a8ff 985 HAL_DACEx_ErrorCallbackCh2(hdac);
bogdanm 0:9b334a45a8ff 986
bogdanm 0:9b334a45a8ff 987 hdac->State= HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 988 }
bogdanm 0:9b334a45a8ff 989 #endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */
bogdanm 0:9b334a45a8ff 990
bogdanm 0:9b334a45a8ff 991 /**
bogdanm 0:9b334a45a8ff 992 * @brief DMA conversion complete callback.
bogdanm 0:9b334a45a8ff 993 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 994 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 995 * @retval None
bogdanm 0:9b334a45a8ff 996 */
bogdanm 0:9b334a45a8ff 997 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 998 {
bogdanm 0:9b334a45a8ff 999 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1000
bogdanm 0:9b334a45a8ff 1001 HAL_DAC_ConvCpltCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 1002
bogdanm 0:9b334a45a8ff 1003 hdac->State= HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 1004 }
bogdanm 0:9b334a45a8ff 1005
bogdanm 0:9b334a45a8ff 1006 /**
bogdanm 0:9b334a45a8ff 1007 * @brief DMA half transfer complete callback.
bogdanm 0:9b334a45a8ff 1008 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1009 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1010 * @retval None
bogdanm 0:9b334a45a8ff 1011 */
bogdanm 0:9b334a45a8ff 1012 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1013 {
bogdanm 0:9b334a45a8ff 1014 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1015 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 1016 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 1017 }
bogdanm 0:9b334a45a8ff 1018
bogdanm 0:9b334a45a8ff 1019 /**
bogdanm 0:9b334a45a8ff 1020 * @brief DMA error callback
bogdanm 0:9b334a45a8ff 1021 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1022 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1023 * @retval None
bogdanm 0:9b334a45a8ff 1024 */
bogdanm 0:9b334a45a8ff 1025 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1026 {
bogdanm 0:9b334a45a8ff 1027 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1028
bogdanm 0:9b334a45a8ff 1029 /* Set DAC error code to DMA error */
bogdanm 0:9b334a45a8ff 1030 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1031
bogdanm 0:9b334a45a8ff 1032 HAL_DAC_ErrorCallbackCh1(hdac);
bogdanm 0:9b334a45a8ff 1033
bogdanm 0:9b334a45a8ff 1034 hdac->State= HAL_DAC_STATE_READY;
bogdanm 0:9b334a45a8ff 1035 }
bogdanm 0:9b334a45a8ff 1036
bogdanm 0:9b334a45a8ff 1037 /**
bogdanm 0:9b334a45a8ff 1038 * @}
bogdanm 0:9b334a45a8ff 1039 */
bogdanm 0:9b334a45a8ff 1040
bogdanm 0:9b334a45a8ff 1041 /**
bogdanm 0:9b334a45a8ff 1042 * @}
bogdanm 0:9b334a45a8ff 1043 */
bogdanm 0:9b334a45a8ff 1044
bogdanm 0:9b334a45a8ff 1045 /**
bogdanm 0:9b334a45a8ff 1046 * @}
bogdanm 0:9b334a45a8ff 1047 */
bogdanm 0:9b334a45a8ff 1048 #endif /* HAL_DAC_MODULE_ENABLED */
mbed_official 113:b3775bf36a83 1049 #endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
bogdanm 0:9b334a45a8ff 1050 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 1051