mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 113:b3775bf36a83

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32l0xx_hal_adc.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	113:b3775bf36a83	5	* @version V1.5.0
mbed_official	113:b3775bf36a83	6	* @date 8-January-2016
bogdanm	0:9b334a45a8ff	7	* @brief This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	8	* functionalities of the Analog to Digital Convertor (ADC)
bogdanm	0:9b334a45a8ff	9	* peripheral:
bogdanm	0:9b334a45a8ff	10	* + Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	11	* ++ Initialization and Configuration of ADC
bogdanm	0:9b334a45a8ff	12	* + Operation functions
bogdanm	0:9b334a45a8ff	13	* ++ Start, stop, get result of conversions of regular
mbed_official	113:b3775bf36a83	14	* group, using 3 possible modes : polling, interruption or DMA.
bogdanm	0:9b334a45a8ff	15	* + Control functions
mbed_official	113:b3775bf36a83	16	* ++ Channels configuration on regular group
bogdanm	0:9b334a45a8ff	17	* ++ Analog Watchdog configuration
bogdanm	0:9b334a45a8ff	18	* + State functions
bogdanm	0:9b334a45a8ff	19	* ++ ADC state machine management
bogdanm	0:9b334a45a8ff	20	* ++ Interrupts and flags management
mbed_official	113:b3775bf36a83	21	* Other functions (extended functions) are available in file
mbed_official	113:b3775bf36a83	22	* "stm32l0xx_hal_adc_ex.c".
bogdanm	0:9b334a45a8ff	23	*
bogdanm	0:9b334a45a8ff	24	@verbatim
bogdanm	0:9b334a45a8ff	25	==============================================================================
mbed_official	113:b3775bf36a83	26	##### ADC peripheral features #####
bogdanm	0:9b334a45a8ff	27	==============================================================================
bogdanm	0:9b334a45a8ff	28	[..]
mbed_official	113:b3775bf36a83	29	(+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
bogdanm	0:9b334a45a8ff	30
mbed_official	113:b3775bf36a83	31	(+) A built-in hardware oversampler can handle multiple conversions and average
mbed_official	113:b3775bf36a83	32	them into a single data with increased data width, up to 16-bit.
mbed_official	113:b3775bf36a83	33
mbed_official	113:b3775bf36a83	34	(+) Interrupt generation at the end of regular conversion and in case of
mbed_official	113:b3775bf36a83	35	analog watchdog or overrun events.
bogdanm	0:9b334a45a8ff	36
mbed_official	113:b3775bf36a83	37	(+) Single and continuous conversion modes.
mbed_official	113:b3775bf36a83	38
mbed_official	113:b3775bf36a83	39	(+) Scan mode for conversion of several channels sequentially.
bogdanm	0:9b334a45a8ff	40
mbed_official	113:b3775bf36a83	41	(+) Data alignment with in-built data coherency.
mbed_official	113:b3775bf36a83	42
mbed_official	113:b3775bf36a83	43	(+) Programmable sampling time (common for all channels)
bogdanm	0:9b334a45a8ff	44
mbed_official	113:b3775bf36a83	45	(+) ADC conversion of regular group.
mbed_official	113:b3775bf36a83	46
mbed_official	113:b3775bf36a83	47	(+) External trigger (timer or EXTI) with configurable polarity
bogdanm	0:9b334a45a8ff	48
mbed_official	113:b3775bf36a83	49	(+) DMA request generation for transfer of conversions data of regular group.
mbed_official	113:b3775bf36a83	50
mbed_official	113:b3775bf36a83	51	(+) ADC calibration
mbed_official	113:b3775bf36a83	52
mbed_official	113:b3775bf36a83	53	(+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
bogdanm	0:9b334a45a8ff	54	slower speed.
bogdanm	0:9b334a45a8ff	55
mbed_official	113:b3775bf36a83	56	(+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
mbed_official	113:b3775bf36a83	57	Vdda or to an external voltage reference).
bogdanm	0:9b334a45a8ff	58
bogdanm	0:9b334a45a8ff	59
bogdanm	0:9b334a45a8ff	60	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	61	==============================================================================
bogdanm	0:9b334a45a8ff	62	[..]
bogdanm	0:9b334a45a8ff	63
mbed_official	113:b3775bf36a83	64	* Configuration of top level parameters related to ADC *
mbed_official	113:b3775bf36a83	65	============================================================
mbed_official	113:b3775bf36a83	66	[..]
mbed_official	113:b3775bf36a83	67
bogdanm	0:9b334a45a8ff	68	(#) Enable the ADC interface
mbed_official	113:b3775bf36a83	69	(++) As prerequisite, ADC clock must be configured at RCC top level.
mbed_official	113:b3775bf36a83	70	Caution: On STM32L0, ADC clock frequency max is 16MHz (refer
mbed_official	113:b3775bf36a83	71	to device datasheet).
mbed_official	113:b3775bf36a83	72	Therefore, ADC clock prescaler must be configured in
mbed_official	113:b3775bf36a83	73	function of ADC clock source frequency to remain below
mbed_official	113:b3775bf36a83	74	this maximum frequency.
mbed_official	113:b3775bf36a83	75
mbed_official	113:b3775bf36a83	76	(++) Two clock settings are mandatory:
mbed_official	113:b3775bf36a83	77	(+++) ADC clock (core clock, also possibly conversion clock).
bogdanm	0:9b334a45a8ff	78
mbed_official	113:b3775bf36a83	79	(+++) ADC clock (conversions clock).
mbed_official	113:b3775bf36a83	80	Two possible clock sources: synchronous clock derived from APB clock
mbed_official	113:b3775bf36a83	81	or asynchronous clock derived from ADC dedicated HSI RC oscillator
mbed_official	113:b3775bf36a83	82	16MHz.
mbed_official	113:b3775bf36a83	83	If asynchronous clock is selected, parameter "HSIState" must be set either:
mbed_official	113:b3775bf36a83	84	- to "...HSIState = RCC_HSI_ON" to maintain the HSI16 oscillator
mbed_official	113:b3775bf36a83	85	always enabled: can be used to supply the main system clock.
bogdanm	0:9b334a45a8ff	86
mbed_official	113:b3775bf36a83	87	(+++) Example:
mbed_official	113:b3775bf36a83	88	Into HAL_ADC_MspInit() (recommended code location) or with
mbed_official	113:b3775bf36a83	89	other device clock parameters configuration:
mbed_official	113:b3775bf36a83	90	(+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory)
mbed_official	113:b3775bf36a83	91
mbed_official	113:b3775bf36a83	92	HSI16 enable : (optional: if asynchronous clock selected)
mbed_official	113:b3775bf36a83	93	(+++) RCC_OscInitTypeDef RCC_OscInitStructure;
mbed_official	113:b3775bf36a83	94	(+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
mbed_official	113:b3775bf36a83	95	(+++) RCC_OscInitStructure.HSI16CalibrationValue = RCC_HSICALIBRATION_DEFAULT;
mbed_official	113:b3775bf36a83	96	(+++) RCC_OscInitStructure.HSIState = RCC_HSI_ON;
mbed_official	113:b3775bf36a83	97	(+++) RCC_OscInitStructure.PLL... (optional if used for system clock)
mbed_official	113:b3775bf36a83	98	(+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
mbed_official	113:b3775bf36a83	99
mbed_official	113:b3775bf36a83	100	(++) ADC clock source and clock prescaler are configured at ADC level with
mbed_official	113:b3775bf36a83	101	parameter "ClockPrescaler" using function HAL_ADC_Init().
bogdanm	0:9b334a45a8ff	102
bogdanm	0:9b334a45a8ff	103	(#) ADC pins configuration
mbed_official	113:b3775bf36a83	104	(++) Enable the clock for the ADC GPIOs
mbed_official	113:b3775bf36a83	105	using macro __HAL_RCC_GPIOx_CLK_ENABLE()
mbed_official	113:b3775bf36a83	106	(++) Configure these ADC pins in analog mode
mbed_official	113:b3775bf36a83	107	using function HAL_GPIO_Init()
mbed_official	113:b3775bf36a83	108
mbed_official	113:b3775bf36a83	109	(#) Optionally, in case of usage of ADC with interruptions:
mbed_official	113:b3775bf36a83	110	(++) Configure the NVIC for ADC
mbed_official	113:b3775bf36a83	111	using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
mbed_official	113:b3775bf36a83	112	(++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
mbed_official	113:b3775bf36a83	113	into the function of corresponding ADC interruption vector
mbed_official	113:b3775bf36a83	114	ADCx_IRQHandler().
mbed_official	113:b3775bf36a83	115
mbed_official	113:b3775bf36a83	116	(#) Optionally, in case of usage of DMA:
mbed_official	113:b3775bf36a83	117	(++) Configure the DMA (DMA channel, mode normal or circular, ...)
mbed_official	113:b3775bf36a83	118	using function HAL_DMA_Init().
mbed_official	113:b3775bf36a83	119	(++) Configure the NVIC for DMA
mbed_official	113:b3775bf36a83	120	using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
mbed_official	113:b3775bf36a83	121	(++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
mbed_official	113:b3775bf36a83	122	into the function of corresponding DMA interruption vector
mbed_official	113:b3775bf36a83	123	DMAx_Channelx_IRQHandler().
mbed_official	113:b3775bf36a83	124
mbed_official	113:b3775bf36a83	125	* Configuration of ADC, group regular, channels parameters *
mbed_official	113:b3775bf36a83	126	================================================================
mbed_official	113:b3775bf36a83	127	[..]
mbed_official	113:b3775bf36a83	128
mbed_official	113:b3775bf36a83	129	(#) Configure the ADC parameters (resolution, data alignment, oversampler, continuous mode, ...)
mbed_official	113:b3775bf36a83	130	and regular group parameters (conversion trigger, sequencer, ...)
mbed_official	113:b3775bf36a83	131	using function HAL_ADC_Init().
mbed_official	113:b3775bf36a83	132
mbed_official	113:b3775bf36a83	133	(#) Configure the channels for regular group parameters (channel number,
mbed_official	113:b3775bf36a83	134	channel rank into sequencer, ..., into regular group)
mbed_official	113:b3775bf36a83	135	using function HAL_ADC_ConfigChannel().
mbed_official	113:b3775bf36a83	136
mbed_official	113:b3775bf36a83	137	(#) Optionally, configure the analog watchdog parameters (channels
mbed_official	113:b3775bf36a83	138	monitored, thresholds, ...)
mbed_official	113:b3775bf36a83	139	using function HAL_ADC_AnalogWDGConfig().
mbed_official	113:b3775bf36a83	140
mbed_official	113:b3775bf36a83	141
mbed_official	113:b3775bf36a83	142	(#) When device is in mode low-power (low-power run, low-power sleep or stop mode),
mbed_official	113:b3775bf36a83	143	function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init().
mbed_official	113:b3775bf36a83	144	In case of internal temperature sensor to be measured:
mbed_official	113:b3775bf36a83	145	function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly
bogdanm	0:9b334a45a8ff	146
mbed_official	113:b3775bf36a83	147	* Execution of ADC conversions *
mbed_official	113:b3775bf36a83	148	====================================
mbed_official	113:b3775bf36a83	149	[..]
mbed_official	113:b3775bf36a83	150
mbed_official	113:b3775bf36a83	151	(#) Optionally, perform an automatic ADC calibration to improve the
mbed_official	113:b3775bf36a83	152	conversion accuracy
mbed_official	113:b3775bf36a83	153	using function HAL_ADCEx_Calibration_Start().
mbed_official	113:b3775bf36a83	154
mbed_official	113:b3775bf36a83	155	(#) ADC driver can be used among three modes: polling, interruption,
mbed_official	113:b3775bf36a83	156	transfer by DMA.
mbed_official	113:b3775bf36a83	157
mbed_official	113:b3775bf36a83	158	(++) ADC conversion by polling:
mbed_official	113:b3775bf36a83	159	(+++) Activate the ADC peripheral and start conversions
mbed_official	113:b3775bf36a83	160	using function HAL_ADC_Start()
mbed_official	113:b3775bf36a83	161	(+++) Wait for ADC conversion completion
mbed_official	113:b3775bf36a83	162	using function HAL_ADC_PollForConversion()
mbed_official	113:b3775bf36a83	163	(+++) Retrieve conversion results
mbed_official	113:b3775bf36a83	164	using function HAL_ADC_GetValue()
mbed_official	113:b3775bf36a83	165	(+++) Stop conversion and disable the ADC peripheral
mbed_official	113:b3775bf36a83	166	using function HAL_ADC_Stop()
mbed_official	113:b3775bf36a83	167
mbed_official	113:b3775bf36a83	168	(++) ADC conversion by interruption:
mbed_official	113:b3775bf36a83	169	(+++) Activate the ADC peripheral and start conversions
mbed_official	113:b3775bf36a83	170	using function HAL_ADC_Start_IT()
mbed_official	113:b3775bf36a83	171	(+++) Wait for ADC conversion completion by call of function
mbed_official	113:b3775bf36a83	172	HAL_ADC_ConvCpltCallback()
mbed_official	113:b3775bf36a83	173	(this function must be implemented in user program)
mbed_official	113:b3775bf36a83	174	(+++) Retrieve conversion results
mbed_official	113:b3775bf36a83	175	using function HAL_ADC_GetValue()
mbed_official	113:b3775bf36a83	176	(+++) Stop conversion and disable the ADC peripheral
mbed_official	113:b3775bf36a83	177	using function HAL_ADC_Stop_IT()
mbed_official	113:b3775bf36a83	178
mbed_official	113:b3775bf36a83	179	(++) ADC conversion with transfer by DMA:
mbed_official	113:b3775bf36a83	180	(+++) Activate the ADC peripheral and start conversions
mbed_official	113:b3775bf36a83	181	using function HAL_ADC_Start_DMA()
mbed_official	113:b3775bf36a83	182	(+++) Wait for ADC conversion completion by call of function
mbed_official	113:b3775bf36a83	183	HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
mbed_official	113:b3775bf36a83	184	(these functions must be implemented in user program)
mbed_official	113:b3775bf36a83	185	(+++) Conversion results are automatically transferred by DMA into
mbed_official	113:b3775bf36a83	186	destination variable address.
mbed_official	113:b3775bf36a83	187	(+++) Stop conversion and disable the ADC peripheral
mbed_official	113:b3775bf36a83	188	using function HAL_ADC_Stop_DMA()
bogdanm	0:9b334a45a8ff	189
bogdanm	0:9b334a45a8ff	190	[..]
bogdanm	0:9b334a45a8ff	191
mbed_official	113:b3775bf36a83	192	(@) Callback functions must be implemented in user program:
mbed_official	113:b3775bf36a83	193	(+@) HAL_ADC_ErrorCallback()
mbed_official	113:b3775bf36a83	194	(+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
mbed_official	113:b3775bf36a83	195	(+@) HAL_ADC_ConvCpltCallback()
mbed_official	113:b3775bf36a83	196	(+@) HAL_ADC_ConvHalfCpltCallback
mbed_official	113:b3775bf36a83	197
mbed_official	113:b3775bf36a83	198	* Deinitialization of ADC *
mbed_official	113:b3775bf36a83	199	============================================================
bogdanm	0:9b334a45a8ff	200	[..]
mbed_official	113:b3775bf36a83	201
mbed_official	113:b3775bf36a83	202	(#) Disable the ADC interface
mbed_official	113:b3775bf36a83	203	(++) ADC clock can be hard reset and disabled at RCC top level.
mbed_official	113:b3775bf36a83	204	(++) Hard reset of ADC peripherals
mbed_official	113:b3775bf36a83	205	using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
mbed_official	113:b3775bf36a83	206	(++) ADC clock disable
mbed_official	113:b3775bf36a83	207	using the equivalent macro/functions as configuration step.
mbed_official	113:b3775bf36a83	208	(+++) Example:
mbed_official	113:b3775bf36a83	209	Into HAL_ADC_MspDeInit() (recommended code location) or with
mbed_official	113:b3775bf36a83	210	other device clock parameters configuration:
mbed_official	113:b3775bf36a83	211	(+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
mbed_official	113:b3775bf36a83	212	(+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
mbed_official	113:b3775bf36a83	213	(+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
bogdanm	0:9b334a45a8ff	214
mbed_official	113:b3775bf36a83	215	(#) ADC pins configuration
mbed_official	113:b3775bf36a83	216	(++) Disable the clock for the ADC GPIOs
mbed_official	113:b3775bf36a83	217	using macro __HAL_RCC_GPIOx_CLK_DISABLE()
mbed_official	113:b3775bf36a83	218
mbed_official	113:b3775bf36a83	219	(#) Optionally, in case of usage of ADC with interruptions:
mbed_official	113:b3775bf36a83	220	(++) Disable the NVIC for ADC
mbed_official	113:b3775bf36a83	221	using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
mbed_official	113:b3775bf36a83	222
mbed_official	113:b3775bf36a83	223	(#) Optionally, in case of usage of DMA:
mbed_official	113:b3775bf36a83	224	(++) Deinitialize the DMA
mbed_official	113:b3775bf36a83	225	using function HAL_DMA_Init().
mbed_official	113:b3775bf36a83	226	(++) Disable the NVIC for DMA
mbed_official	113:b3775bf36a83	227	using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
mbed_official	113:b3775bf36a83	228
mbed_official	113:b3775bf36a83	229	[..]
bogdanm	0:9b334a45a8ff	230
bogdanm	0:9b334a45a8ff	231	@endverbatim
bogdanm	0:9b334a45a8ff	232	******************************************************************************
bogdanm	0:9b334a45a8ff	233	* @attention
bogdanm	0:9b334a45a8ff	234	*
mbed_official	113:b3775bf36a83	235	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	236	*
bogdanm	0:9b334a45a8ff	237	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	238	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	239	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	240	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	241	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	242	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	243	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	244	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	245	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	246	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	247	*
bogdanm	0:9b334a45a8ff	248	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	249	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	250	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	251	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	252	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	253	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	254	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	255	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	256	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	257	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	258	*
bogdanm	0:9b334a45a8ff	259	******************************************************************************
bogdanm	0:9b334a45a8ff	260	*/
bogdanm	0:9b334a45a8ff	261
bogdanm	0:9b334a45a8ff	262	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	263	#include "stm32l0xx_hal.h"
bogdanm	0:9b334a45a8ff	264
bogdanm	0:9b334a45a8ff	265	/** @addtogroup STM32L0xx_HAL_Driver
bogdanm	0:9b334a45a8ff	266	* @{
bogdanm	0:9b334a45a8ff	267	*/
bogdanm	0:9b334a45a8ff	268
mbed_official	113:b3775bf36a83	269	#ifdef HAL_ADC_MODULE_ENABLED
mbed_official	113:b3775bf36a83	270
bogdanm	0:9b334a45a8ff	271	/** @addtogroup ADC
bogdanm	0:9b334a45a8ff	272	* @brief ADC driver modules
bogdanm	0:9b334a45a8ff	273	* @{
bogdanm	0:9b334a45a8ff	274	*/
bogdanm	0:9b334a45a8ff	275
mbed_official	113:b3775bf36a83	276	/** @addtogroup ADC_Private
mbed_official	113:b3775bf36a83	277	* @{
mbed_official	113:b3775bf36a83	278	*/
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	281	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	282
bogdanm	0:9b334a45a8ff	283	/* Delay for ADC stabilization time. */
bogdanm	0:9b334a45a8ff	284	/* Maximum delay is 1us (refer to device datasheet, parameter tSTART). */
bogdanm	0:9b334a45a8ff	285	/* Unit: us */
bogdanm	0:9b334a45a8ff	286	#define ADC_STAB_DELAY_US ((uint32_t) 1)
bogdanm	0:9b334a45a8ff	287
bogdanm	0:9b334a45a8ff	288	/* Delay for temperature sensor stabilization time. */
bogdanm	0:9b334a45a8ff	289	/* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
bogdanm	0:9b334a45a8ff	290	/* Unit: us */
bogdanm	0:9b334a45a8ff	291	#define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10)
mbed_official	113:b3775bf36a83	292	/**
mbed_official	113:b3775bf36a83	293	* @}
mbed_official	113:b3775bf36a83	294	*/
bogdanm	0:9b334a45a8ff	295
bogdanm	0:9b334a45a8ff	296	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	297	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	298	/* Private function prototypes -----------------------------------------------*/
mbed_official	113:b3775bf36a83	299	/** @addtogroup ADC_Private
mbed_official	113:b3775bf36a83	300	* @{
mbed_official	113:b3775bf36a83	301	*/
bogdanm	0:9b334a45a8ff	302	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
mbed_official	113:b3775bf36a83	303	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
mbed_official	113:b3775bf36a83	304	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
bogdanm	0:9b334a45a8ff	305	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	306	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	307	static void ADC_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	308	static void ADC_DelayMicroSecond(uint32_t microSecond);
mbed_official	113:b3775bf36a83	309	/**
mbed_official	113:b3775bf36a83	310	* @}
mbed_official	113:b3775bf36a83	311	*/
bogdanm	0:9b334a45a8ff	312
mbed_official	113:b3775bf36a83	313	/** @addtogroup ADC_Exported_Functions
bogdanm	0:9b334a45a8ff	314	* @{
bogdanm	0:9b334a45a8ff	315	*/
bogdanm	0:9b334a45a8ff	316
mbed_official	113:b3775bf36a83	317	/** @addtogroup ADC_Exported_Functions_Group1
bogdanm	0:9b334a45a8ff	318	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	319	*
bogdanm	0:9b334a45a8ff	320	@verbatim
bogdanm	0:9b334a45a8ff	321	===============================================================================
bogdanm	0:9b334a45a8ff	322	##### Initialization and de-initialization functions #####
bogdanm	0:9b334a45a8ff	323	===============================================================================
bogdanm	0:9b334a45a8ff	324	[..] This section provides functions allowing to:
bogdanm	0:9b334a45a8ff	325	(+) Initialize and configure the ADC.
bogdanm	0:9b334a45a8ff	326	(+) De-initialize the ADC.
bogdanm	0:9b334a45a8ff	327
bogdanm	0:9b334a45a8ff	328	@endverbatim
bogdanm	0:9b334a45a8ff	329	* @{
bogdanm	0:9b334a45a8ff	330	*/
bogdanm	0:9b334a45a8ff	331
bogdanm	0:9b334a45a8ff	332
bogdanm	0:9b334a45a8ff	333	/**
mbed_official	113:b3775bf36a83	334	* @brief Initializes the ADC peripheral and regular group according to
mbed_official	113:b3775bf36a83	335	* parameters specified in structure "ADC_InitTypeDef".
mbed_official	113:b3775bf36a83	336	* @note As prerequisite, ADC clock must be configured at RCC top level
mbed_official	113:b3775bf36a83	337	* depending on both possible clock sources: APB clock of HSI clock.
mbed_official	113:b3775bf36a83	338	* See commented example code below that can be copied and uncommented
mbed_official	113:b3775bf36a83	339	* into HAL_ADC_MspInit().
mbed_official	113:b3775bf36a83	340	* @note Possibility to update parameters on the fly:
mbed_official	113:b3775bf36a83	341	* This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
mbed_official	113:b3775bf36a83	342	* coming from ADC state reset. Following calls to this function can
mbed_official	113:b3775bf36a83	343	* be used to reconfigure some parameters of ADC_InitTypeDef
mbed_official	113:b3775bf36a83	344	* structure on the fly, without modifying MSP configuration. If ADC
mbed_official	113:b3775bf36a83	345	* MSP has to be modified again, HAL_ADC_DeInit() must be called
mbed_official	113:b3775bf36a83	346	* before HAL_ADC_Init().
mbed_official	113:b3775bf36a83	347	* The setting of these parameters is conditioned to ADC state.
mbed_official	113:b3775bf36a83	348	* For parameters constraints, see comments of structure
mbed_official	113:b3775bf36a83	349	* "ADC_InitTypeDef".
mbed_official	113:b3775bf36a83	350	* @note This function configures the ADC within 2 scopes: scope of entire
mbed_official	113:b3775bf36a83	351	* ADC and scope of regular group. For parameters details, see comments
mbed_official	113:b3775bf36a83	352	* of structure "ADC_InitTypeDef".
mbed_official	113:b3775bf36a83	353	* @note When device is in mode low-power (low-power run, low-power sleep or stop mode),
mbed_official	113:b3775bf36a83	354	* function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init()
mbed_official	113:b3775bf36a83	355	* (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first).
mbed_official	113:b3775bf36a83	356	* In case of internal temperature sensor to be measured:
mbed_official	113:b3775bf36a83	357	* function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly.
mbed_official	113:b3775bf36a83	358	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	359	* @retval HAL status
bogdanm	0:9b334a45a8ff	360	*/
bogdanm	0:9b334a45a8ff	361	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	362	{
mbed_official	113:b3775bf36a83	363
bogdanm	0:9b334a45a8ff	364	/* Check ADC handle */
bogdanm	0:9b334a45a8ff	365	if(hadc == NULL)
bogdanm	0:9b334a45a8ff	366	{
mbed_official	113:b3775bf36a83	367	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	368	}
bogdanm	0:9b334a45a8ff	369
bogdanm	0:9b334a45a8ff	370	/* Check the parameters */
bogdanm	0:9b334a45a8ff	371	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	372	assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
bogdanm	0:9b334a45a8ff	373	assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
bogdanm	0:9b334a45a8ff	374	assert_param(IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTime));
bogdanm	0:9b334a45a8ff	375	assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
bogdanm	0:9b334a45a8ff	376	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
bogdanm	0:9b334a45a8ff	377	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm	0:9b334a45a8ff	378	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
bogdanm	0:9b334a45a8ff	379	assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
mbed_official	113:b3775bf36a83	380	assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
bogdanm	0:9b334a45a8ff	381	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
bogdanm	0:9b334a45a8ff	382	assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
bogdanm	0:9b334a45a8ff	383	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
bogdanm	0:9b334a45a8ff	384	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerFrequencyMode));
bogdanm	0:9b334a45a8ff	385	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
bogdanm	0:9b334a45a8ff	386	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode));
bogdanm	0:9b334a45a8ff	387
mbed_official	113:b3775bf36a83	388	/* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
mbed_official	113:b3775bf36a83	389	/* at RCC top level depending on both possible clock sources: */
mbed_official	113:b3775bf36a83	390	/* APB clock or HSI clock. */
mbed_official	113:b3775bf36a83	391	/* Refer to header of this file for more details on clock enabling procedure*/
mbed_official	113:b3775bf36a83	392
mbed_official	113:b3775bf36a83	393	/* Actions performed only if ADC is coming from state reset: */
mbed_official	113:b3775bf36a83	394	/* - Initialization of ADC MSP */
mbed_official	113:b3775bf36a83	395	/* - ADC voltage regulator enable */
bogdanm	0:9b334a45a8ff	396	if(hadc->State == HAL_ADC_STATE_RESET)
bogdanm	0:9b334a45a8ff	397	{
mbed_official	113:b3775bf36a83	398	/* Initialize ADC error code */
mbed_official	113:b3775bf36a83	399	ADC_CLEAR_ERRORCODE(hadc);
mbed_official	113:b3775bf36a83	400
mbed_official	113:b3775bf36a83	401	/* Allocate lock resource and initialize it */
mbed_official	113:b3775bf36a83	402	hadc->Lock = HAL_UNLOCKED;
mbed_official	113:b3775bf36a83	403
bogdanm	0:9b334a45a8ff	404	/* Init the low level hardware */
bogdanm	0:9b334a45a8ff	405	HAL_ADC_MspInit(hadc);
bogdanm	0:9b334a45a8ff	406	}
bogdanm	0:9b334a45a8ff	407
bogdanm	0:9b334a45a8ff	408	/* Configuration of ADC parameters if previous preliminary actions are */
bogdanm	0:9b334a45a8ff	409	/* correctly completed. */
mbed_official	113:b3775bf36a83	410	/* and if there is no conversion on going on regular group (ADC can be */
mbed_official	113:b3775bf36a83	411	/* enabled anyway, in case of call of this function to update a parameter */
bogdanm	0:9b334a45a8ff	412	/* on the fly). */
mbed_official	113:b3775bf36a83	413	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) \|\|
mbed_official	113:b3775bf36a83	414	(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET) )
bogdanm	0:9b334a45a8ff	415	{
bogdanm	0:9b334a45a8ff	416	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	417	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
mbed_official	113:b3775bf36a83	418
bogdanm	0:9b334a45a8ff	419	/* Process unlocked */
bogdanm	0:9b334a45a8ff	420	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	421	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	422	}
bogdanm	0:9b334a45a8ff	423
mbed_official	113:b3775bf36a83	424	/* Set ADC state */
mbed_official	113:b3775bf36a83	425	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	426	HAL_ADC_STATE_REG_BUSY,
mbed_official	113:b3775bf36a83	427	HAL_ADC_STATE_BUSY_INTERNAL);
mbed_official	113:b3775bf36a83	428
mbed_official	113:b3775bf36a83	429	/* Parameters update conditioned to ADC state: */
mbed_official	113:b3775bf36a83	430	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	113:b3775bf36a83	431	/* - ADC clock mode */
mbed_official	113:b3775bf36a83	432	/* - ADC clock prescaler */
mbed_official	113:b3775bf36a83	433	/* - ADC Resolution */
mbed_official	113:b3775bf36a83	434	if (ADC_IS_ENABLE(hadc) == RESET)
mbed_official	113:b3775bf36a83	435	{
mbed_official	113:b3775bf36a83	436	/* Some parameters of this register are not reset, since they are set */
mbed_official	113:b3775bf36a83	437	/* by other functions and must be kept in case of usage of this */
mbed_official	113:b3775bf36a83	438	/* function on the fly (update of a parameter of ADC_InitTypeDef */
mbed_official	113:b3775bf36a83	439	/* without needing to reconfigure all other ADC groups/channels */
mbed_official	113:b3775bf36a83	440	/* parameters): */
mbed_official	113:b3775bf36a83	441	/* - internal measurement paths: Vbat, temperature sensor, Vref */
mbed_official	113:b3775bf36a83	442	/* (set into HAL_ADC_ConfigChannel() ) */
mbed_official	113:b3775bf36a83	443
mbed_official	113:b3775bf36a83	444	/* Configuration of ADC clock: clock source PCLK or asynchronous with
mbed_official	113:b3775bf36a83	445	selectable prescaler */
mbed_official	113:b3775bf36a83	446	__HAL_ADC_CLOCK_PRESCALER(hadc);
mbed_official	113:b3775bf36a83	447
mbed_official	113:b3775bf36a83	448	/* Configuration of ADC: */
mbed_official	113:b3775bf36a83	449	/* - Resolution */
mbed_official	113:b3775bf36a83	450	hadc->Instance->CFGR1 &= ~( ADC_CFGR1_RES);
mbed_official	113:b3775bf36a83	451	hadc->Instance->CFGR1 \|= hadc->Init.Resolution;
mbed_official	113:b3775bf36a83	452	}
bogdanm	0:9b334a45a8ff	453
bogdanm	0:9b334a45a8ff	454	/* Set the Low Frequency mode */
bogdanm	0:9b334a45a8ff	455	ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN;
bogdanm	0:9b334a45a8ff	456	ADC->CCR \|=__HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode);
bogdanm	0:9b334a45a8ff	457
bogdanm	0:9b334a45a8ff	458	/* Enable voltage regulator (if disabled at this step) */
bogdanm	0:9b334a45a8ff	459	if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
bogdanm	0:9b334a45a8ff	460	{
bogdanm	0:9b334a45a8ff	461	/* Set ADVREGEN bit */
bogdanm	0:9b334a45a8ff	462	hadc->Instance->CR \|= ADC_CR_ADVREGEN;
bogdanm	0:9b334a45a8ff	463	}
bogdanm	0:9b334a45a8ff	464
bogdanm	0:9b334a45a8ff	465	/* Configuration of ADC: */
bogdanm	0:9b334a45a8ff	466	/* - Resolution */
bogdanm	0:9b334a45a8ff	467	/* - Data alignment */
mbed_official	113:b3775bf36a83	468	/* - Scan direction */
bogdanm	0:9b334a45a8ff	469	/* - External trigger to start conversion */
bogdanm	0:9b334a45a8ff	470	/* - External trigger polarity */
bogdanm	0:9b334a45a8ff	471	/* - Continuous conversion mode */
bogdanm	0:9b334a45a8ff	472	/* - DMA continuous request */
bogdanm	0:9b334a45a8ff	473	/* - Overrun */
bogdanm	0:9b334a45a8ff	474	/* - AutoDelay feature */
bogdanm	0:9b334a45a8ff	475	/* - Discontinuous mode */
mbed_official	113:b3775bf36a83	476	hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN \|
bogdanm	0:9b334a45a8ff	477	ADC_CFGR1_SCANDIR \|
bogdanm	0:9b334a45a8ff	478	ADC_CFGR1_EXTSEL \|
bogdanm	0:9b334a45a8ff	479	ADC_CFGR1_EXTEN \|
bogdanm	0:9b334a45a8ff	480	ADC_CFGR1_CONT \|
bogdanm	0:9b334a45a8ff	481	ADC_CFGR1_DMACFG \|
bogdanm	0:9b334a45a8ff	482	ADC_CFGR1_OVRMOD \|
bogdanm	0:9b334a45a8ff	483	ADC_CFGR1_AUTDLY \|
bogdanm	0:9b334a45a8ff	484	ADC_CFGR1_AUTOFF \|
bogdanm	0:9b334a45a8ff	485	ADC_CFGR1_DISCEN);
bogdanm	0:9b334a45a8ff	486
mbed_official	113:b3775bf36a83	487	hadc->Instance->CFGR1 \|= (hadc->Init.DataAlign \|
bogdanm	0:9b334a45a8ff	488	ADC_SCANDIR(hadc->Init.ScanConvMode) \|
bogdanm	0:9b334a45a8ff	489	ADC_CONTINUOUS(hadc->Init.ContinuousConvMode) \|
bogdanm	0:9b334a45a8ff	490	ADC_DMACONTREQ(hadc->Init.DMAContinuousRequests) \|
mbed_official	113:b3775bf36a83	491	hadc->Init.Overrun \|
mbed_official	113:b3775bf36a83	492	__HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) \|
bogdanm	0:9b334a45a8ff	493	__HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff));
bogdanm	0:9b334a45a8ff	494
mbed_official	113:b3775bf36a83	495	/* Enable external trigger if trigger selection is different of software */
mbed_official	113:b3775bf36a83	496	/* start. */
mbed_official	113:b3775bf36a83	497	/* Note: This configuration keeps the hardware feature of parameter */
mbed_official	113:b3775bf36a83	498	/* ExternalTrigConvEdge "trigger edge none" equivalent to */
mbed_official	113:b3775bf36a83	499	/* software start. */
mbed_official	113:b3775bf36a83	500	if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
bogdanm	0:9b334a45a8ff	501	{
mbed_official	113:b3775bf36a83	502	hadc->Instance->CFGR1 \|= hadc->Init.ExternalTrigConv \|
mbed_official	113:b3775bf36a83	503	hadc->Init.ExternalTrigConvEdge;
bogdanm	0:9b334a45a8ff	504	}
bogdanm	0:9b334a45a8ff	505
bogdanm	0:9b334a45a8ff	506	/* Enable discontinuous mode only if continuous mode is disabled */
mbed_official	113:b3775bf36a83	507	if (hadc->Init.DiscontinuousConvMode == ENABLE)
mbed_official	113:b3775bf36a83	508	{
mbed_official	113:b3775bf36a83	509	if (hadc->Init.ContinuousConvMode == DISABLE)
mbed_official	113:b3775bf36a83	510	{
mbed_official	113:b3775bf36a83	511	/* Enable the selected ADC group regular discontinuous mode */
mbed_official	113:b3775bf36a83	512	hadc->Instance->CFGR1 \|= (ADC_CFGR1_DISCEN);
mbed_official	113:b3775bf36a83	513	}
mbed_official	113:b3775bf36a83	514	else
mbed_official	113:b3775bf36a83	515	{
mbed_official	113:b3775bf36a83	516	/* ADC regular group discontinuous was intended to be enabled, */
mbed_official	113:b3775bf36a83	517	/* but ADC regular group modes continuous and sequencer discontinuous */
mbed_official	113:b3775bf36a83	518	/* cannot be enabled simultaneously. */
mbed_official	113:b3775bf36a83	519
mbed_official	113:b3775bf36a83	520	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	521	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
mbed_official	113:b3775bf36a83	522
mbed_official	113:b3775bf36a83	523	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	524	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
mbed_official	113:b3775bf36a83	525	}
bogdanm	0:9b334a45a8ff	526	}
bogdanm	0:9b334a45a8ff	527
bogdanm	0:9b334a45a8ff	528	if (hadc->Init.OversamplingMode == ENABLE)
bogdanm	0:9b334a45a8ff	529	{
bogdanm	0:9b334a45a8ff	530	assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversample.Ratio));
bogdanm	0:9b334a45a8ff	531	assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversample.RightBitShift));
bogdanm	0:9b334a45a8ff	532	assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversample.TriggeredMode));
bogdanm	0:9b334a45a8ff	533
bogdanm	0:9b334a45a8ff	534	/* Configuration of Oversampler: */
bogdanm	0:9b334a45a8ff	535	/* - Oversampling Ratio */
bogdanm	0:9b334a45a8ff	536	/* - Right bit shift */
bogdanm	0:9b334a45a8ff	537	/* - Triggered mode */
bogdanm	0:9b334a45a8ff	538
bogdanm	0:9b334a45a8ff	539	hadc->Instance->CFGR2 &= ~( ADC_CFGR2_OVSR \|
bogdanm	0:9b334a45a8ff	540	ADC_CFGR2_OVSS \|
bogdanm	0:9b334a45a8ff	541	ADC_CFGR2_TOVS );
bogdanm	0:9b334a45a8ff	542
bogdanm	0:9b334a45a8ff	543	hadc->Instance->CFGR2 \|= ( hadc->Init.Oversample.Ratio \|
bogdanm	0:9b334a45a8ff	544	hadc->Init.Oversample.RightBitShift \|
bogdanm	0:9b334a45a8ff	545	hadc->Init.Oversample.TriggeredMode );
bogdanm	0:9b334a45a8ff	546
bogdanm	0:9b334a45a8ff	547	/* Enable OverSampling mode */
bogdanm	0:9b334a45a8ff	548	hadc->Instance->CFGR2 \|= ADC_CFGR2_OVSE;
bogdanm	0:9b334a45a8ff	549	}
bogdanm	0:9b334a45a8ff	550	else
bogdanm	0:9b334a45a8ff	551	{
mbed_official	113:b3775bf36a83	552	if(HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE))
mbed_official	113:b3775bf36a83	553	{
mbed_official	113:b3775bf36a83	554	/* Disable OverSampling mode if needed */
mbed_official	113:b3775bf36a83	555	hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE;
mbed_official	113:b3775bf36a83	556	}
bogdanm	0:9b334a45a8ff	557	}
bogdanm	0:9b334a45a8ff	558
bogdanm	0:9b334a45a8ff	559	/* Clear the old sampling time */
bogdanm	0:9b334a45a8ff	560	hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR);
bogdanm	0:9b334a45a8ff	561
bogdanm	0:9b334a45a8ff	562	/* Set the new sample time */
bogdanm	0:9b334a45a8ff	563	hadc->Instance->SMPR \|= hadc->Init.SamplingTime;
bogdanm	0:9b334a45a8ff	564
mbed_official	113:b3775bf36a83	565	/* Clear ADC error code */
mbed_official	113:b3775bf36a83	566	ADC_CLEAR_ERRORCODE(hadc);
mbed_official	113:b3775bf36a83	567
mbed_official	113:b3775bf36a83	568	/* Set the ADC state */
mbed_official	113:b3775bf36a83	569	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	570	HAL_ADC_STATE_BUSY_INTERNAL,
mbed_official	113:b3775bf36a83	571	HAL_ADC_STATE_READY);
mbed_official	113:b3775bf36a83	572
mbed_official	113:b3775bf36a83	573
bogdanm	0:9b334a45a8ff	574	/* Return function status */
bogdanm	0:9b334a45a8ff	575	return HAL_OK;
bogdanm	0:9b334a45a8ff	576	}
bogdanm	0:9b334a45a8ff	577
bogdanm	0:9b334a45a8ff	578	/**
mbed_official	113:b3775bf36a83	579	* @brief Deinitialize the ADC peripheral registers to their default reset
mbed_official	113:b3775bf36a83	580	* values, with deinitialization of the ADC MSP.
mbed_official	113:b3775bf36a83	581	* @note For devices with several ADCs: reset of ADC common registers is done
mbed_official	113:b3775bf36a83	582	* only if all ADCs sharing the same common group are disabled.
mbed_official	113:b3775bf36a83	583	* If this is not the case, reset of these common parameters reset is
mbed_official	113:b3775bf36a83	584	* bypassed without error reporting: it can be the intended behaviour in
mbed_official	113:b3775bf36a83	585	* case of reset of a single ADC while the other ADCs sharing the same
mbed_official	113:b3775bf36a83	586	* common group is still running.
mbed_official	113:b3775bf36a83	587	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	588	* @retval HAL status
bogdanm	0:9b334a45a8ff	589	*/
bogdanm	0:9b334a45a8ff	590	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	591	{
mbed_official	113:b3775bf36a83	592	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm	0:9b334a45a8ff	593
bogdanm	0:9b334a45a8ff	594	/* Check ADC handle */
bogdanm	0:9b334a45a8ff	595	if(hadc == NULL)
bogdanm	0:9b334a45a8ff	596	{
bogdanm	0:9b334a45a8ff	597	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	598	}
bogdanm	0:9b334a45a8ff	599
bogdanm	0:9b334a45a8ff	600	/* Check the parameters */
bogdanm	0:9b334a45a8ff	601	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	602
mbed_official	113:b3775bf36a83	603	/* Set ADC state */
mbed_official	113:b3775bf36a83	604	SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
bogdanm	0:9b334a45a8ff	605
mbed_official	113:b3775bf36a83	606	/* Stop potential conversion on going, on regular group */
mbed_official	113:b3775bf36a83	607	tmp_hal_status = ADC_ConversionStop(hadc);
bogdanm	0:9b334a45a8ff	608
mbed_official	113:b3775bf36a83	609	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	113:b3775bf36a83	610	if (tmp_hal_status == HAL_OK)
mbed_official	113:b3775bf36a83	611	{
mbed_official	113:b3775bf36a83	612	/* Disable the ADC peripheral */
mbed_official	113:b3775bf36a83	613	tmp_hal_status = ADC_Disable(hadc);
mbed_official	113:b3775bf36a83	614
mbed_official	113:b3775bf36a83	615	/* Check if ADC is effectively disabled */
mbed_official	113:b3775bf36a83	616	if (tmp_hal_status != HAL_ERROR)
mbed_official	113:b3775bf36a83	617	{
mbed_official	113:b3775bf36a83	618	/* Change ADC state */
mbed_official	113:b3775bf36a83	619	hadc->State = HAL_ADC_STATE_READY;
mbed_official	113:b3775bf36a83	620	}
mbed_official	113:b3775bf36a83	621	}
mbed_official	113:b3775bf36a83	622
mbed_official	113:b3775bf36a83	623
mbed_official	113:b3775bf36a83	624	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	113:b3775bf36a83	625	/* correctly completed. */
mbed_official	113:b3775bf36a83	626	if (tmp_hal_status != HAL_ERROR)
bogdanm	0:9b334a45a8ff	627	{
mbed_official	113:b3775bf36a83	628
mbed_official	113:b3775bf36a83	629	/* ========== Reset ADC registers ========== */
mbed_official	113:b3775bf36a83	630	/* Reset register IER */
mbed_official	113:b3775bf36a83	631	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD \| ADC_IT_OVR \| ADC_IT_EOCAL \| ADC_IT_EOS \| \
mbed_official	113:b3775bf36a83	632	ADC_IT_EOC \| ADC_IT_RDY \| ADC_IT_EOSMP ));
mbed_official	113:b3775bf36a83	633
bogdanm	0:9b334a45a8ff	634
mbed_official	113:b3775bf36a83	635	/* Reset register ISR */
mbed_official	113:b3775bf36a83	636	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD \| ADC_FLAG_EOCAL \| ADC_FLAG_OVR \| ADC_FLAG_EOS \| \
mbed_official	113:b3775bf36a83	637	ADC_FLAG_EOC \| ADC_FLAG_EOSMP \| ADC_FLAG_RDY));
bogdanm	0:9b334a45a8ff	638
bogdanm	0:9b334a45a8ff	639
mbed_official	113:b3775bf36a83	640	/* Reset register CR */
mbed_official	113:b3775bf36a83	641	/* Disable voltage regulator */
mbed_official	113:b3775bf36a83	642	/* Note: Regulator disable useful for power saving */
mbed_official	113:b3775bf36a83	643	/* Reset ADVREGEN bit */
mbed_official	113:b3775bf36a83	644	hadc->Instance->CR &= ~ADC_CR_ADVREGEN;
mbed_official	113:b3775bf36a83	645
mbed_official	113:b3775bf36a83	646	/* Bits ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode "read-set": no direct reset applicable */
mbed_official	113:b3775bf36a83	647	/* No action */
mbed_official	113:b3775bf36a83	648
mbed_official	113:b3775bf36a83	649	/* Reset register CFGR1 */
mbed_official	113:b3775bf36a83	650	hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL \| \
mbed_official	113:b3775bf36a83	651	ADC_CFGR1_DISCEN \| ADC_CFGR1_AUTOFF \| ADC_CFGR1_AUTDLY \| \
mbed_official	113:b3775bf36a83	652	ADC_CFGR1_CONT \| ADC_CFGR1_OVRMOD \| ADC_CFGR1_EXTEN \| \
mbed_official	113:b3775bf36a83	653	ADC_CFGR1_EXTSEL \| ADC_CFGR1_ALIGN \| ADC_CFGR1_RES \| \
mbed_official	113:b3775bf36a83	654	ADC_CFGR1_SCANDIR\| ADC_CFGR1_DMACFG \| ADC_CFGR1_DMAEN);
bogdanm	0:9b334a45a8ff	655
mbed_official	113:b3775bf36a83	656	/* Reset register CFGR2 */
mbed_official	113:b3775bf36a83	657	hadc->Instance->CFGR2 &= ~(ADC_CFGR2_TOVS \| ADC_CFGR2_OVSS \| ADC_CFGR2_OVSR \| \
mbed_official	113:b3775bf36a83	658	ADC_CFGR2_OVSE \| ADC_CFGR2_CKMODE );
bogdanm	0:9b334a45a8ff	659
mbed_official	113:b3775bf36a83	660
mbed_official	113:b3775bf36a83	661	/* Reset register SMPR */
mbed_official	113:b3775bf36a83	662	hadc->Instance->SMPR &= ~(ADC_SMPR_SMPR);
mbed_official	113:b3775bf36a83	663
mbed_official	113:b3775bf36a83	664	/* Reset register TR */
mbed_official	113:b3775bf36a83	665	hadc->Instance->TR &= ~(ADC_TR_LT \| ADC_TR_HT);
mbed_official	113:b3775bf36a83	666
mbed_official	113:b3775bf36a83	667	/* Reset register CALFACT */
mbed_official	113:b3775bf36a83	668	hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
mbed_official	113:b3775bf36a83	669
mbed_official	113:b3775bf36a83	670
mbed_official	113:b3775bf36a83	671
bogdanm	0:9b334a45a8ff	672
mbed_official	113:b3775bf36a83	673
mbed_official	113:b3775bf36a83	674	/* Reset register DR */
mbed_official	113:b3775bf36a83	675	/* bits in access mode read only, no direct reset applicable*/
mbed_official	113:b3775bf36a83	676
mbed_official	113:b3775bf36a83	677	/* Reset register CALFACT */
mbed_official	113:b3775bf36a83	678	hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
mbed_official	113:b3775bf36a83	679
mbed_official	113:b3775bf36a83	680	/* ========== Hard reset ADC peripheral ========== */
mbed_official	113:b3775bf36a83	681	/* Performs a global reset of the entire ADC peripheral: ADC state is */
mbed_official	113:b3775bf36a83	682	/* forced to a similar state after device power-on. */
mbed_official	113:b3775bf36a83	683	/* If needed, copy-paste and uncomment the following reset code into */
mbed_official	113:b3775bf36a83	684	/* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
mbed_official	113:b3775bf36a83	685	/* */
mbed_official	113:b3775bf36a83	686	/* __HAL_RCC_ADC1_FORCE_RESET() */
mbed_official	113:b3775bf36a83	687	/* __HAL_RCC_ADC1_RELEASE_RESET() */
bogdanm	0:9b334a45a8ff	688
mbed_official	113:b3775bf36a83	689	/* DeInit the low level hardware */
mbed_official	113:b3775bf36a83	690	HAL_ADC_MspDeInit(hadc);
mbed_official	113:b3775bf36a83	691
mbed_official	113:b3775bf36a83	692	/* Set ADC error code to none */
mbed_official	113:b3775bf36a83	693	ADC_CLEAR_ERRORCODE(hadc);
mbed_official	113:b3775bf36a83	694
mbed_official	113:b3775bf36a83	695	/* Set ADC state */
mbed_official	113:b3775bf36a83	696	hadc->State = HAL_ADC_STATE_RESET;
mbed_official	113:b3775bf36a83	697	}
bogdanm	0:9b334a45a8ff	698
mbed_official	113:b3775bf36a83	699	/* Process unlocked */
mbed_official	113:b3775bf36a83	700	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	701
mbed_official	113:b3775bf36a83	702	/* Return function status */
mbed_official	113:b3775bf36a83	703	return tmp_hal_status;
mbed_official	113:b3775bf36a83	704	}
bogdanm	0:9b334a45a8ff	705
bogdanm	0:9b334a45a8ff	706
bogdanm	0:9b334a45a8ff	707	/**
bogdanm	0:9b334a45a8ff	708	* @brief Initializes the ADC MSP.
mbed_official	113:b3775bf36a83	709	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	710	* @retval None
bogdanm	0:9b334a45a8ff	711	*/
bogdanm	0:9b334a45a8ff	712	__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	713	{
mbed_official	113:b3775bf36a83	714	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	715	UNUSED(hadc);
mbed_official	113:b3775bf36a83	716
bogdanm	0:9b334a45a8ff	717	/* NOTE : This function Should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	718	the HAL_ADC_MspInit could be implemented in the user file
bogdanm	0:9b334a45a8ff	719	*/
bogdanm	0:9b334a45a8ff	720	}
bogdanm	0:9b334a45a8ff	721
bogdanm	0:9b334a45a8ff	722	/**
bogdanm	0:9b334a45a8ff	723	* @brief DeInitializes the ADC MSP.
mbed_official	113:b3775bf36a83	724	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	725	* @retval None
bogdanm	0:9b334a45a8ff	726	*/
bogdanm	0:9b334a45a8ff	727	__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	728	{
mbed_official	113:b3775bf36a83	729	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	730	UNUSED(hadc);
mbed_official	113:b3775bf36a83	731
mbed_official	113:b3775bf36a83	732	/* NOTE : This function should not be modified. When the callback is needed,
mbed_official	113:b3775bf36a83	733	function HAL_ADC_MspDeInit must be implemented in the user file.
bogdanm	0:9b334a45a8ff	734	*/
bogdanm	0:9b334a45a8ff	735	}
bogdanm	0:9b334a45a8ff	736
bogdanm	0:9b334a45a8ff	737	/**
bogdanm	0:9b334a45a8ff	738	* @}
bogdanm	0:9b334a45a8ff	739	*/
bogdanm	0:9b334a45a8ff	740
mbed_official	113:b3775bf36a83	741	/** @addtogroup ADC_Exported_Functions_Group2
bogdanm	0:9b334a45a8ff	742	* @brief I/O operation functions
bogdanm	0:9b334a45a8ff	743	*
bogdanm	0:9b334a45a8ff	744	@verbatim
bogdanm	0:9b334a45a8ff	745	===============================================================================
bogdanm	0:9b334a45a8ff	746	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	747	===============================================================================
bogdanm	0:9b334a45a8ff	748	[..] This section provides functions allowing to:
mbed_official	113:b3775bf36a83	749	(+) Start conversion of regular group.
mbed_official	113:b3775bf36a83	750	(+) Stop conversion of regular group.
mbed_official	113:b3775bf36a83	751	(+) Poll for conversion complete on regular group.
bogdanm	0:9b334a45a8ff	752	(+) poll for conversion event.
bogdanm	0:9b334a45a8ff	753	(+) Get result of regular channel conversion.
mbed_official	113:b3775bf36a83	754	(+) Start conversion of regular group and enable interruptions.
mbed_official	113:b3775bf36a83	755	(+) Stop conversion of regular group and disable interruptions.
mbed_official	113:b3775bf36a83	756	(+) Handle ADC interrupt request
mbed_official	113:b3775bf36a83	757	(+) Start conversion of regular group and enable DMA transfer.
mbed_official	113:b3775bf36a83	758	(+) Stop conversion of regular group and disable ADC DMA transfer.
bogdanm	0:9b334a45a8ff	759	@endverbatim
bogdanm	0:9b334a45a8ff	760	* @{
bogdanm	0:9b334a45a8ff	761	*/
bogdanm	0:9b334a45a8ff	762
bogdanm	0:9b334a45a8ff	763
bogdanm	0:9b334a45a8ff	764	/**
mbed_official	113:b3775bf36a83	765	* @brief Enables ADC, starts conversion of regular group.
mbed_official	113:b3775bf36a83	766	* Interruptions enabled in this function: None.
mbed_official	113:b3775bf36a83	767	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	768	* @retval HAL status
bogdanm	0:9b334a45a8ff	769	*/
bogdanm	0:9b334a45a8ff	770	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	771	{
mbed_official	113:b3775bf36a83	772	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm	0:9b334a45a8ff	773
bogdanm	0:9b334a45a8ff	774	/* Check the parameters */
bogdanm	0:9b334a45a8ff	775	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	776
bogdanm	0:9b334a45a8ff	777	/* Perform ADC enable and conversion start if no conversion is on going */
mbed_official	113:b3775bf36a83	778	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
bogdanm	0:9b334a45a8ff	779	{
bogdanm	0:9b334a45a8ff	780	/* Process locked */
bogdanm	0:9b334a45a8ff	781	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	782
bogdanm	0:9b334a45a8ff	783	/* Enable the ADC peripheral */
bogdanm	0:9b334a45a8ff	784	/* If low power mode AutoPowerOff is enabled, power-on/off phases are */
bogdanm	0:9b334a45a8ff	785	/* performed automatically by hardware. */
bogdanm	0:9b334a45a8ff	786	if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
bogdanm	0:9b334a45a8ff	787	{
mbed_official	113:b3775bf36a83	788	tmp_hal_status = ADC_Enable(hadc);
bogdanm	0:9b334a45a8ff	789	}
bogdanm	0:9b334a45a8ff	790
bogdanm	0:9b334a45a8ff	791	/* Start conversion if ADC is effectively enabled */
mbed_official	113:b3775bf36a83	792	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	793	{
mbed_official	113:b3775bf36a83	794	/* Set ADC state */
mbed_official	113:b3775bf36a83	795	/* - Clear state bitfield related to regular group conversion results */
mbed_official	113:b3775bf36a83	796	/* - Set state bitfield related to regular operation */
mbed_official	113:b3775bf36a83	797	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	798	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR \| HAL_ADC_STATE_REG_EOSMP,
mbed_official	113:b3775bf36a83	799	HAL_ADC_STATE_REG_BUSY);
mbed_official	113:b3775bf36a83	800
mbed_official	113:b3775bf36a83	801	/* Reset ADC all error code fields */
mbed_official	113:b3775bf36a83	802	ADC_CLEAR_ERRORCODE(hadc);
mbed_official	113:b3775bf36a83	803
mbed_official	113:b3775bf36a83	804	/* Process unlocked */
mbed_official	113:b3775bf36a83	805	/* Unlock before starting ADC conversions: in case of potential */
mbed_official	113:b3775bf36a83	806	/* interruption, to let the process to ADC IRQ Handler. */
mbed_official	113:b3775bf36a83	807	__HAL_UNLOCK(hadc);
mbed_official	113:b3775bf36a83	808
mbed_official	113:b3775bf36a83	809	/* Clear regular group conversion flag and overrun flag */
mbed_official	113:b3775bf36a83	810	/* (To ensure of no unknown state from potential previous ADC */
mbed_official	113:b3775bf36a83	811	/* operations) */
mbed_official	113:b3775bf36a83	812	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	113:b3775bf36a83	813
mbed_official	113:b3775bf36a83	814	/* Enable conversion of regular group. */
mbed_official	113:b3775bf36a83	815	/* If software start has been selected, conversion starts immediately. */
mbed_official	113:b3775bf36a83	816	/* If external trigger has been selected, conversion will start at next */
mbed_official	113:b3775bf36a83	817	/* trigger event. */
bogdanm	0:9b334a45a8ff	818	hadc->Instance->CR \|= ADC_CR_ADSTART;
bogdanm	0:9b334a45a8ff	819	}
bogdanm	0:9b334a45a8ff	820	}
bogdanm	0:9b334a45a8ff	821	else
bogdanm	0:9b334a45a8ff	822	{
mbed_official	113:b3775bf36a83	823	tmp_hal_status = HAL_BUSY;
bogdanm	0:9b334a45a8ff	824	}
bogdanm	0:9b334a45a8ff	825
bogdanm	0:9b334a45a8ff	826	/* Return function status */
mbed_official	113:b3775bf36a83	827	return tmp_hal_status;
bogdanm	0:9b334a45a8ff	828	}
bogdanm	0:9b334a45a8ff	829
bogdanm	0:9b334a45a8ff	830	/**
mbed_official	113:b3775bf36a83	831	* @brief Stop ADC conversion of regular group, disable ADC peripheral.
mbed_official	113:b3775bf36a83	832	* @param hadc: ADC handle
mbed_official	113:b3775bf36a83	833	* @retval HAL status.
bogdanm	0:9b334a45a8ff	834	*/
bogdanm	0:9b334a45a8ff	835	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	836	{
mbed_official	113:b3775bf36a83	837	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official	113:b3775bf36a83	838
mbed_official	113:b3775bf36a83	839	/* Check the parameters */
mbed_official	113:b3775bf36a83	840	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	841
bogdanm	0:9b334a45a8ff	842	/* Process locked */
bogdanm	0:9b334a45a8ff	843	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	844
mbed_official	113:b3775bf36a83	845	/* 1. Stop potential conversion on going, on regular group */
mbed_official	113:b3775bf36a83	846	tmp_hal_status = ADC_ConversionStop(hadc);
bogdanm	0:9b334a45a8ff	847
mbed_official	113:b3775bf36a83	848	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	113:b3775bf36a83	849	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	850	{
mbed_official	113:b3775bf36a83	851	/* 2. Disable the ADC peripheral */
mbed_official	113:b3775bf36a83	852	tmp_hal_status = ADC_Disable(hadc);
bogdanm	0:9b334a45a8ff	853
bogdanm	0:9b334a45a8ff	854	/* Check if ADC is effectively disabled */
mbed_official	113:b3775bf36a83	855	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	856	{
mbed_official	113:b3775bf36a83	857	/* Set ADC state */
mbed_official	113:b3775bf36a83	858	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	859	HAL_ADC_STATE_REG_BUSY,
mbed_official	113:b3775bf36a83	860	HAL_ADC_STATE_READY);
bogdanm	0:9b334a45a8ff	861	}
bogdanm	0:9b334a45a8ff	862	}
bogdanm	0:9b334a45a8ff	863
bogdanm	0:9b334a45a8ff	864	/* Process unlocked */
bogdanm	0:9b334a45a8ff	865	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	866
bogdanm	0:9b334a45a8ff	867	/* Return function status */
mbed_official	113:b3775bf36a83	868	return tmp_hal_status;
bogdanm	0:9b334a45a8ff	869	}
bogdanm	0:9b334a45a8ff	870
bogdanm	0:9b334a45a8ff	871	/**
bogdanm	0:9b334a45a8ff	872	* @brief Wait for regular group conversion to be completed.
bogdanm	0:9b334a45a8ff	873	* @note ADC conversion flags EOS (end of sequence) and EOC (end of
bogdanm	0:9b334a45a8ff	874	* conversion) are cleared by this function, with an exception:
bogdanm	0:9b334a45a8ff	875	* if low power feature "LowPowerAutoWait" is enabled, flags are
bogdanm	0:9b334a45a8ff	876	* not cleared to not interfere with this feature until data register
bogdanm	0:9b334a45a8ff	877	* is read using function HAL_ADC_GetValue().
bogdanm	0:9b334a45a8ff	878	* @note This function cannot be used in a particular setup: ADC configured
bogdanm	0:9b334a45a8ff	879	* in DMA mode and polling for end of each conversion (ADC init
bogdanm	0:9b334a45a8ff	880	* parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
bogdanm	0:9b334a45a8ff	881	* In this case, DMA resets the flag EOC and polling cannot be
bogdanm	0:9b334a45a8ff	882	* performed on each conversion. Nevertheless, polling can still
mbed_official	113:b3775bf36a83	883	* be performed on the complete sequence (ADC init
mbed_official	113:b3775bf36a83	884	* parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
bogdanm	0:9b334a45a8ff	885	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	886	* @param Timeout: Timeout value in millisecond.
bogdanm	0:9b334a45a8ff	887	* @retval HAL status
bogdanm	0:9b334a45a8ff	888	*/
bogdanm	0:9b334a45a8ff	889	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	890	{
mbed_official	113:b3775bf36a83	891	uint32_t tickstart;
bogdanm	0:9b334a45a8ff	892	uint32_t tmp_Flag_EOC;
bogdanm	0:9b334a45a8ff	893
bogdanm	0:9b334a45a8ff	894	/* Check the parameters */
bogdanm	0:9b334a45a8ff	895	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	113:b3775bf36a83	896	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
bogdanm	0:9b334a45a8ff	897
bogdanm	0:9b334a45a8ff	898	/* If end of conversion selected to end of sequence */
bogdanm	0:9b334a45a8ff	899	if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
bogdanm	0:9b334a45a8ff	900	{
bogdanm	0:9b334a45a8ff	901	tmp_Flag_EOC = ADC_FLAG_EOS;
bogdanm	0:9b334a45a8ff	902	}
bogdanm	0:9b334a45a8ff	903	/* If end of conversion selected to end of each conversion */
bogdanm	0:9b334a45a8ff	904	else /* ADC_EOC_SINGLE_CONV */
bogdanm	0:9b334a45a8ff	905	{
bogdanm	0:9b334a45a8ff	906	/* Verification that ADC configuration is compliant with polling for */
bogdanm	0:9b334a45a8ff	907	/* each conversion: */
bogdanm	0:9b334a45a8ff	908	/* Particular case is ADC configured in DMA mode and ADC sequencer with */
bogdanm	0:9b334a45a8ff	909	/* several ranks and polling for end of each conversion. */
bogdanm	0:9b334a45a8ff	910	/* For code simplicity sake, this particular case is generalized to */
bogdanm	0:9b334a45a8ff	911	/* ADC configured in DMA mode and and polling for end of each conversion. */
bogdanm	0:9b334a45a8ff	912	if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
bogdanm	0:9b334a45a8ff	913	{
bogdanm	0:9b334a45a8ff	914	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	915	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm	0:9b334a45a8ff	916
bogdanm	0:9b334a45a8ff	917	/* Process unlocked */
bogdanm	0:9b334a45a8ff	918	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	919
bogdanm	0:9b334a45a8ff	920	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	921	}
bogdanm	0:9b334a45a8ff	922	else
bogdanm	0:9b334a45a8ff	923	{
bogdanm	0:9b334a45a8ff	924	tmp_Flag_EOC = (ADC_FLAG_EOC \| ADC_FLAG_EOS);
bogdanm	0:9b334a45a8ff	925	}
bogdanm	0:9b334a45a8ff	926	}
bogdanm	0:9b334a45a8ff	927
mbed_official	113:b3775bf36a83	928	/* Get tick count */
bogdanm	0:9b334a45a8ff	929	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	930
bogdanm	0:9b334a45a8ff	931	/* Wait until End of Conversion flag is raised */
bogdanm	0:9b334a45a8ff	932	while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
bogdanm	0:9b334a45a8ff	933	{
bogdanm	0:9b334a45a8ff	934	/* Check if timeout is disabled (set to infinite wait) */
bogdanm	0:9b334a45a8ff	935	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	936	{
bogdanm	0:9b334a45a8ff	937	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	938	{
bogdanm	0:9b334a45a8ff	939	/* Update ADC state machine to timeout */
mbed_official	113:b3775bf36a83	940	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
bogdanm	0:9b334a45a8ff	941
bogdanm	0:9b334a45a8ff	942	/* Process unlocked */
bogdanm	0:9b334a45a8ff	943	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	944
bogdanm	0:9b334a45a8ff	945	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	946	}
bogdanm	0:9b334a45a8ff	947	}
bogdanm	0:9b334a45a8ff	948	}
bogdanm	0:9b334a45a8ff	949
mbed_official	113:b3775bf36a83	950	/* Update ADC state machine */
mbed_official	113:b3775bf36a83	951	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
mbed_official	113:b3775bf36a83	952
mbed_official	113:b3775bf36a83	953	/* Determine whether any further conversion upcoming on group regular */
mbed_official	113:b3775bf36a83	954	/* by external trigger, continuous mode or scan sequence on going. */
mbed_official	113:b3775bf36a83	955	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	113:b3775bf36a83	956	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	113:b3775bf36a83	957	{
mbed_official	113:b3775bf36a83	958	/* If End of Sequence is reached, disable interrupts */
mbed_official	113:b3775bf36a83	959	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
mbed_official	113:b3775bf36a83	960	{
mbed_official	113:b3775bf36a83	961	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
mbed_official	113:b3775bf36a83	962	/* ADSTART==0 (no conversion on going) */
mbed_official	113:b3775bf36a83	963	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
mbed_official	113:b3775bf36a83	964	{
mbed_official	113:b3775bf36a83	965	/* Disable ADC end of single conversion interrupt on group regular */
mbed_official	113:b3775bf36a83	966	/* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official	113:b3775bf36a83	967	/* HAL_Start_IT(), but is not disabled here because can be used */
mbed_official	113:b3775bf36a83	968	/* by overrun IRQ process below. */
mbed_official	113:b3775bf36a83	969	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
mbed_official	113:b3775bf36a83	970
mbed_official	113:b3775bf36a83	971	/* Set ADC state */
mbed_official	113:b3775bf36a83	972	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	973	HAL_ADC_STATE_REG_BUSY,
mbed_official	113:b3775bf36a83	974	HAL_ADC_STATE_READY);
mbed_official	113:b3775bf36a83	975	}
mbed_official	113:b3775bf36a83	976	else
mbed_official	113:b3775bf36a83	977	{
mbed_official	113:b3775bf36a83	978	/* Change ADC state to error state */
mbed_official	113:b3775bf36a83	979	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
mbed_official	113:b3775bf36a83	980
mbed_official	113:b3775bf36a83	981	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	982	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
mbed_official	113:b3775bf36a83	983	}
mbed_official	113:b3775bf36a83	984	}
mbed_official	113:b3775bf36a83	985	}
mbed_official	113:b3775bf36a83	986
bogdanm	0:9b334a45a8ff	987	/* Clear end of conversion flag of regular group if low power feature */
bogdanm	0:9b334a45a8ff	988	/* "LowPowerAutoWait " is disabled, to not interfere with this feature */
bogdanm	0:9b334a45a8ff	989	/* until data register is read using function HAL_ADC_GetValue(). */
bogdanm	0:9b334a45a8ff	990	if (hadc->Init.LowPowerAutoWait == DISABLE)
bogdanm	0:9b334a45a8ff	991	{
bogdanm	0:9b334a45a8ff	992	/* Clear regular group conversion flag */
bogdanm	0:9b334a45a8ff	993	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS));
bogdanm	0:9b334a45a8ff	994	}
bogdanm	0:9b334a45a8ff	995
bogdanm	0:9b334a45a8ff	996	/* Return ADC state */
bogdanm	0:9b334a45a8ff	997	return HAL_OK;
bogdanm	0:9b334a45a8ff	998	}
bogdanm	0:9b334a45a8ff	999
bogdanm	0:9b334a45a8ff	1000	/**
bogdanm	0:9b334a45a8ff	1001	* @brief Poll for conversion event.
mbed_official	113:b3775bf36a83	1002	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1003	* @param EventType: the ADC event type.
bogdanm	0:9b334a45a8ff	1004	* This parameter can be one of the following values:
mbed_official	113:b3775bf36a83	1005	* @arg ADC_AWD_EVENT: ADC Analog watchdog event
mbed_official	113:b3775bf36a83	1006	* @arg ADC_OVR_EVENT: ADC Overrun event
bogdanm	0:9b334a45a8ff	1007	* @param Timeout: Timeout value in millisecond.
bogdanm	0:9b334a45a8ff	1008	* @retval HAL status
bogdanm	0:9b334a45a8ff	1009	*/
bogdanm	0:9b334a45a8ff	1010	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1011	{
bogdanm	0:9b334a45a8ff	1012	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	1013
bogdanm	0:9b334a45a8ff	1014	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1015	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	1016	assert_param(IS_ADC_EVENT_TYPE(EventType));
bogdanm	0:9b334a45a8ff	1017
mbed_official	113:b3775bf36a83	1018	/* Get tick count */
bogdanm	0:9b334a45a8ff	1019	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1020
bogdanm	0:9b334a45a8ff	1021	/* Check selected event flag */
mbed_official	113:b3775bf36a83	1022	while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
bogdanm	0:9b334a45a8ff	1023	{
bogdanm	0:9b334a45a8ff	1024	/* Check if timeout is disabled (set to infinite wait) */
bogdanm	0:9b334a45a8ff	1025	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1026	{
bogdanm	0:9b334a45a8ff	1027	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	1028	{
bogdanm	0:9b334a45a8ff	1029	/* Update ADC state machine to timeout */
mbed_official	113:b3775bf36a83	1030	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
bogdanm	0:9b334a45a8ff	1031
bogdanm	0:9b334a45a8ff	1032	/* Process unlocked */
bogdanm	0:9b334a45a8ff	1033	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	1034
bogdanm	0:9b334a45a8ff	1035	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1036	}
bogdanm	0:9b334a45a8ff	1037	}
bogdanm	0:9b334a45a8ff	1038	}
bogdanm	0:9b334a45a8ff	1039
bogdanm	0:9b334a45a8ff	1040	switch(EventType)
bogdanm	0:9b334a45a8ff	1041	{
mbed_official	113:b3775bf36a83	1042	/* Analog watchdog (level out of window) event */
bogdanm	0:9b334a45a8ff	1043	case ADC_AWD_EVENT:
mbed_official	113:b3775bf36a83	1044	/* Set ADC state */
mbed_official	113:b3775bf36a83	1045	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
bogdanm	0:9b334a45a8ff	1046
bogdanm	0:9b334a45a8ff	1047	/* Clear ADC analog watchdog flag */
bogdanm	0:9b334a45a8ff	1048	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
bogdanm	0:9b334a45a8ff	1049	break;
bogdanm	0:9b334a45a8ff	1050
mbed_official	113:b3775bf36a83	1051	/* Overrun event */
mbed_official	113:b3775bf36a83	1052	default: /* Case ADC_OVR_EVENT */
mbed_official	113:b3775bf36a83	1053	/* If overrun is set to overwrite previous data, overrun event is not */
mbed_official	113:b3775bf36a83	1054	/* considered as an error. */
mbed_official	113:b3775bf36a83	1055	/* (cf ref manual "Managing conversions without using the DMA and without */
mbed_official	113:b3775bf36a83	1056	/* overrun ") */
mbed_official	113:b3775bf36a83	1057	if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
mbed_official	113:b3775bf36a83	1058	{
mbed_official	113:b3775bf36a83	1059	/* Set ADC state */
mbed_official	113:b3775bf36a83	1060	SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
mbed_official	113:b3775bf36a83	1061
mbed_official	113:b3775bf36a83	1062	/* Set ADC error code to overrun */
mbed_official	113:b3775bf36a83	1063	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
mbed_official	113:b3775bf36a83	1064	}
bogdanm	0:9b334a45a8ff	1065
bogdanm	0:9b334a45a8ff	1066	/* Clear ADC Overrun flag */
bogdanm	0:9b334a45a8ff	1067	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
bogdanm	0:9b334a45a8ff	1068	break;
bogdanm	0:9b334a45a8ff	1069	}
bogdanm	0:9b334a45a8ff	1070
bogdanm	0:9b334a45a8ff	1071	/* Return ADC state */
bogdanm	0:9b334a45a8ff	1072	return HAL_OK;
bogdanm	0:9b334a45a8ff	1073	}
bogdanm	0:9b334a45a8ff	1074
bogdanm	0:9b334a45a8ff	1075	/**
mbed_official	113:b3775bf36a83	1076	* @brief Enables ADC, starts conversion of regular group with interruption.
mbed_official	113:b3775bf36a83	1077	* Interruptions enabled in this function:
mbed_official	113:b3775bf36a83	1078	* - EOC (end of conversion of regular group) or EOS (end of
mbed_official	113:b3775bf36a83	1079	* sequence of regular group) depending on ADC initialization
mbed_official	113:b3775bf36a83	1080	* parameter "EOCSelection"
mbed_official	113:b3775bf36a83	1081	* - overrun (if available)
mbed_official	113:b3775bf36a83	1082	* Each of these interruptions has its dedicated callback function.
mbed_official	113:b3775bf36a83	1083	* @param hadc: ADC handle
mbed_official	113:b3775bf36a83	1084	* @retval HAL status
bogdanm	0:9b334a45a8ff	1085	*/
bogdanm	0:9b334a45a8ff	1086	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1087	{
mbed_official	113:b3775bf36a83	1088	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm	0:9b334a45a8ff	1089
bogdanm	0:9b334a45a8ff	1090	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1091	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	1092
bogdanm	0:9b334a45a8ff	1093	/* Perform ADC enable and conversion start if no conversion is on going */
mbed_official	113:b3775bf36a83	1094	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
bogdanm	0:9b334a45a8ff	1095	{
bogdanm	0:9b334a45a8ff	1096	/* Process locked */
bogdanm	0:9b334a45a8ff	1097	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	1098
bogdanm	0:9b334a45a8ff	1099	/* Enable the ADC peripheral */
bogdanm	0:9b334a45a8ff	1100	/* If low power mode AutoPowerOff is enabled, power-on/off phases are */
bogdanm	0:9b334a45a8ff	1101	/* performed automatically by hardware. */
bogdanm	0:9b334a45a8ff	1102	if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
bogdanm	0:9b334a45a8ff	1103	{
mbed_official	113:b3775bf36a83	1104	tmp_hal_status = ADC_Enable(hadc);
bogdanm	0:9b334a45a8ff	1105	}
bogdanm	0:9b334a45a8ff	1106
bogdanm	0:9b334a45a8ff	1107	/* Start conversion if ADC is effectively enabled */
mbed_official	113:b3775bf36a83	1108	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	1109	{
mbed_official	113:b3775bf36a83	1110	/* Set ADC state */
mbed_official	113:b3775bf36a83	1111	/* - Clear state bitfield related to regular group conversion results */
mbed_official	113:b3775bf36a83	1112	/* - Set state bitfield related to regular operation */
mbed_official	113:b3775bf36a83	1113	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	1114	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR \| HAL_ADC_STATE_REG_EOSMP,
mbed_official	113:b3775bf36a83	1115	HAL_ADC_STATE_REG_BUSY);
mbed_official	113:b3775bf36a83	1116
mbed_official	113:b3775bf36a83	1117	/* Reset ADC all error code fields */
mbed_official	113:b3775bf36a83	1118	ADC_CLEAR_ERRORCODE(hadc);
mbed_official	113:b3775bf36a83	1119
mbed_official	113:b3775bf36a83	1120	/* Process unlocked */
mbed_official	113:b3775bf36a83	1121	/* Unlock before starting ADC conversions: in case of potential */
mbed_official	113:b3775bf36a83	1122	/* interruption, to let the process to ADC IRQ Handler. */
mbed_official	113:b3775bf36a83	1123	__HAL_UNLOCK(hadc);
mbed_official	113:b3775bf36a83	1124
mbed_official	113:b3775bf36a83	1125	/* Clear regular group conversion flag and overrun flag */
mbed_official	113:b3775bf36a83	1126	/* (To ensure of no unknown state from potential previous ADC */
mbed_official	113:b3775bf36a83	1127	/* operations) */
mbed_official	113:b3775bf36a83	1128	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
bogdanm	0:9b334a45a8ff	1129
bogdanm	0:9b334a45a8ff	1130	/* Enable ADC end of conversion interrupt */
mbed_official	113:b3775bf36a83	1131	/* Enable ADC overrun interrupt */
mbed_official	113:b3775bf36a83	1132	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
bogdanm	0:9b334a45a8ff	1133	switch(hadc->Init.EOCSelection)
bogdanm	0:9b334a45a8ff	1134	{
bogdanm	0:9b334a45a8ff	1135	case ADC_EOC_SEQ_CONV:
bogdanm	0:9b334a45a8ff	1136	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official	113:b3775bf36a83	1137	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS \| ADC_IT_OVR));
bogdanm	0:9b334a45a8ff	1138	break;
bogdanm	0:9b334a45a8ff	1139	/* case ADC_EOC_SINGLE_CONV */
bogdanm	0:9b334a45a8ff	1140	default:
mbed_official	113:b3775bf36a83	1141	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
bogdanm	0:9b334a45a8ff	1142	break;
bogdanm	0:9b334a45a8ff	1143	}
bogdanm	0:9b334a45a8ff	1144
mbed_official	113:b3775bf36a83	1145	/* Enable conversion of regular group. */
mbed_official	113:b3775bf36a83	1146	/* If software start has been selected, conversion starts immediately. */
mbed_official	113:b3775bf36a83	1147	/* If external trigger has been selected, conversion will start at next */
mbed_official	113:b3775bf36a83	1148	/* trigger event. */
bogdanm	0:9b334a45a8ff	1149	hadc->Instance->CR \|= ADC_CR_ADSTART;
bogdanm	0:9b334a45a8ff	1150	}
bogdanm	0:9b334a45a8ff	1151	}
bogdanm	0:9b334a45a8ff	1152	else
bogdanm	0:9b334a45a8ff	1153	{
mbed_official	113:b3775bf36a83	1154	tmp_hal_status = HAL_BUSY;
bogdanm	0:9b334a45a8ff	1155	}
bogdanm	0:9b334a45a8ff	1156
bogdanm	0:9b334a45a8ff	1157	/* Return function status */
mbed_official	113:b3775bf36a83	1158	return tmp_hal_status;
bogdanm	0:9b334a45a8ff	1159	}
bogdanm	0:9b334a45a8ff	1160
bogdanm	0:9b334a45a8ff	1161	/**
mbed_official	113:b3775bf36a83	1162	* @brief Stop ADC conversion of regular group, disable interruption of
mbed_official	113:b3775bf36a83	1163	* end-of-conversion, disable ADC peripheral.
mbed_official	113:b3775bf36a83	1164	* @param hadc: ADC handle
mbed_official	113:b3775bf36a83	1165	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1166	*/
bogdanm	0:9b334a45a8ff	1167	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1168	{
mbed_official	113:b3775bf36a83	1169	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official	113:b3775bf36a83	1170
mbed_official	113:b3775bf36a83	1171	/* Check the parameters */
mbed_official	113:b3775bf36a83	1172	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	1173
bogdanm	0:9b334a45a8ff	1174	/* Process locked */
bogdanm	0:9b334a45a8ff	1175	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	1176
mbed_official	113:b3775bf36a83	1177	/* 1. Stop potential conversion on going, on regular group */
mbed_official	113:b3775bf36a83	1178	tmp_hal_status = ADC_ConversionStop(hadc);
bogdanm	0:9b334a45a8ff	1179
mbed_official	113:b3775bf36a83	1180	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	113:b3775bf36a83	1181	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	1182	{
mbed_official	113:b3775bf36a83	1183	/* Disable ADC end of conversion interrupt for regular group */
mbed_official	113:b3775bf36a83	1184	/* Disable ADC overrun interrupt */
bogdanm	0:9b334a45a8ff	1185	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
bogdanm	0:9b334a45a8ff	1186
mbed_official	113:b3775bf36a83	1187	/* 2. Disable the ADC peripheral */
mbed_official	113:b3775bf36a83	1188	tmp_hal_status = ADC_Disable(hadc);
bogdanm	0:9b334a45a8ff	1189
bogdanm	0:9b334a45a8ff	1190	/* Check if ADC is effectively disabled */
mbed_official	113:b3775bf36a83	1191	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	1192	{
mbed_official	113:b3775bf36a83	1193	/* Set ADC state */
mbed_official	113:b3775bf36a83	1194	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	1195	HAL_ADC_STATE_REG_BUSY,
mbed_official	113:b3775bf36a83	1196	HAL_ADC_STATE_READY);
bogdanm	0:9b334a45a8ff	1197	}
bogdanm	0:9b334a45a8ff	1198	}
bogdanm	0:9b334a45a8ff	1199
bogdanm	0:9b334a45a8ff	1200	/* Process unlocked */
bogdanm	0:9b334a45a8ff	1201	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	1202
bogdanm	0:9b334a45a8ff	1203	/* Return function status */
mbed_official	113:b3775bf36a83	1204	return tmp_hal_status;
bogdanm	0:9b334a45a8ff	1205	}
bogdanm	0:9b334a45a8ff	1206
bogdanm	0:9b334a45a8ff	1207	/**
mbed_official	113:b3775bf36a83	1208	* @brief Enables ADC, starts conversion of regular group and transfers result
mbed_official	113:b3775bf36a83	1209	* through DMA.
mbed_official	113:b3775bf36a83	1210	* Interruptions enabled in this function:
mbed_official	113:b3775bf36a83	1211	* - DMA transfer complete
mbed_official	113:b3775bf36a83	1212	* - DMA half transfer
mbed_official	113:b3775bf36a83	1213	* - overrun
mbed_official	113:b3775bf36a83	1214	* Each of these interruptions has its dedicated callback function.
mbed_official	113:b3775bf36a83	1215	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1216	* @param pData: The destination Buffer address.
bogdanm	0:9b334a45a8ff	1217	* @param Length: The length of data to be transferred from ADC peripheral to memory.
bogdanm	0:9b334a45a8ff	1218	* @retval None
bogdanm	0:9b334a45a8ff	1219	*/
bogdanm	0:9b334a45a8ff	1220	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
bogdanm	0:9b334a45a8ff	1221	{
mbed_official	113:b3775bf36a83	1222	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm	0:9b334a45a8ff	1223
bogdanm	0:9b334a45a8ff	1224	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1225	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	1226
bogdanm	0:9b334a45a8ff	1227	/* Perform ADC enable and conversion start if no conversion is on going */
mbed_official	113:b3775bf36a83	1228	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
bogdanm	0:9b334a45a8ff	1229	{
bogdanm	0:9b334a45a8ff	1230	/* Process locked */
bogdanm	0:9b334a45a8ff	1231	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	1232
mbed_official	113:b3775bf36a83	1233	/* Enable the ADC peripheral */
bogdanm	0:9b334a45a8ff	1234	/* If low power mode AutoPowerOff is enabled, power-on/off phases are */
bogdanm	0:9b334a45a8ff	1235	/* performed automatically by hardware. */
bogdanm	0:9b334a45a8ff	1236	if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
bogdanm	0:9b334a45a8ff	1237	{
mbed_official	113:b3775bf36a83	1238	tmp_hal_status = ADC_Enable(hadc);
bogdanm	0:9b334a45a8ff	1239	}
bogdanm	0:9b334a45a8ff	1240
bogdanm	0:9b334a45a8ff	1241	/* Start conversion if ADC is effectively enabled */
mbed_official	113:b3775bf36a83	1242	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	1243	{
mbed_official	113:b3775bf36a83	1244	/* Set ADC state */
mbed_official	113:b3775bf36a83	1245	/* - Clear state bitfield related to regular group conversion results */
mbed_official	113:b3775bf36a83	1246	/* - Set state bitfield related to regular operation */
mbed_official	113:b3775bf36a83	1247	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	1248	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR \| HAL_ADC_STATE_REG_EOSMP,
mbed_official	113:b3775bf36a83	1249	HAL_ADC_STATE_REG_BUSY);
mbed_official	113:b3775bf36a83	1250
mbed_official	113:b3775bf36a83	1251	/* Reset ADC all error code fields */
mbed_official	113:b3775bf36a83	1252	ADC_CLEAR_ERRORCODE(hadc);
mbed_official	113:b3775bf36a83	1253
mbed_official	113:b3775bf36a83	1254	/* Process unlocked */
mbed_official	113:b3775bf36a83	1255	/* Unlock before starting ADC conversions: in case of potential */
mbed_official	113:b3775bf36a83	1256	/* interruption, to let the process to ADC IRQ Handler. */
mbed_official	113:b3775bf36a83	1257	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	1258
bogdanm	0:9b334a45a8ff	1259	/* Set the DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1260	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
bogdanm	0:9b334a45a8ff	1261
bogdanm	0:9b334a45a8ff	1262	/* Set the DMA half transfer complete callback */
bogdanm	0:9b334a45a8ff	1263	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
bogdanm	0:9b334a45a8ff	1264
bogdanm	0:9b334a45a8ff	1265	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1266	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
bogdanm	0:9b334a45a8ff	1267
mbed_official	113:b3775bf36a83	1268
mbed_official	113:b3775bf36a83	1269	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official	113:b3775bf36a83	1270	/* start (in case of SW start): */
mbed_official	113:b3775bf36a83	1271
mbed_official	113:b3775bf36a83	1272	/* Clear regular group conversion flag and overrun flag */
mbed_official	113:b3775bf36a83	1273	/* (To ensure of no unknown state from potential previous ADC */
mbed_official	113:b3775bf36a83	1274	/* operations) */
mbed_official	113:b3775bf36a83	1275	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
bogdanm	0:9b334a45a8ff	1276
bogdanm	0:9b334a45a8ff	1277	/* Enable ADC overrun interrupt */
bogdanm	0:9b334a45a8ff	1278	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
bogdanm	0:9b334a45a8ff	1279
mbed_official	113:b3775bf36a83	1280	/* Enable ADC DMA mode */
mbed_official	113:b3775bf36a83	1281	hadc->Instance->CFGR1 \|= ADC_CFGR1_DMAEN;
mbed_official	113:b3775bf36a83	1282
mbed_official	113:b3775bf36a83	1283	/* Start the DMA channel */
bogdanm	0:9b334a45a8ff	1284	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
bogdanm	0:9b334a45a8ff	1285
mbed_official	113:b3775bf36a83	1286	/* Enable conversion of regular group. */
mbed_official	113:b3775bf36a83	1287	/* If software start has been selected, conversion starts immediately. */
mbed_official	113:b3775bf36a83	1288	/* If external trigger has been selected, conversion will start at next */
mbed_official	113:b3775bf36a83	1289	/* trigger event. */
bogdanm	0:9b334a45a8ff	1290	hadc->Instance->CR \|= ADC_CR_ADSTART;
bogdanm	0:9b334a45a8ff	1291	}
bogdanm	0:9b334a45a8ff	1292	}
bogdanm	0:9b334a45a8ff	1293	else
bogdanm	0:9b334a45a8ff	1294	{
mbed_official	113:b3775bf36a83	1295	tmp_hal_status = HAL_BUSY;
bogdanm	0:9b334a45a8ff	1296	}
bogdanm	0:9b334a45a8ff	1297
bogdanm	0:9b334a45a8ff	1298	/* Return function status */
mbed_official	113:b3775bf36a83	1299	return tmp_hal_status;
bogdanm	0:9b334a45a8ff	1300	}
bogdanm	0:9b334a45a8ff	1301
bogdanm	0:9b334a45a8ff	1302	/**
mbed_official	113:b3775bf36a83	1303	* @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable
mbed_official	113:b3775bf36a83	1304	* ADC peripheral.
mbed_official	113:b3775bf36a83	1305	* Each of these interruptions has its dedicated callback function.
mbed_official	113:b3775bf36a83	1306	* @param hadc: ADC handle
mbed_official	113:b3775bf36a83	1307	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1308	*/
bogdanm	0:9b334a45a8ff	1309	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1310	{
mbed_official	113:b3775bf36a83	1311	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official	113:b3775bf36a83	1312
mbed_official	113:b3775bf36a83	1313	/* Check the parameters */
mbed_official	113:b3775bf36a83	1314	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	1315
bogdanm	0:9b334a45a8ff	1316	/* Process locked */
bogdanm	0:9b334a45a8ff	1317	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	1318
mbed_official	113:b3775bf36a83	1319	/* 1. Stop potential conversion on going, on regular group */
mbed_official	113:b3775bf36a83	1320	tmp_hal_status = ADC_ConversionStop(hadc);
bogdanm	0:9b334a45a8ff	1321
mbed_official	113:b3775bf36a83	1322	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	113:b3775bf36a83	1323	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	1324	{
bogdanm	0:9b334a45a8ff	1325	/* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
bogdanm	0:9b334a45a8ff	1326	hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN;
bogdanm	0:9b334a45a8ff	1327
mbed_official	113:b3775bf36a83	1328	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official	113:b3775bf36a83	1329	/* while DMA transfer is on going) */
mbed_official	113:b3775bf36a83	1330	tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official	113:b3775bf36a83	1331
mbed_official	113:b3775bf36a83	1332	/* Check if DMA channel effectively disabled */
mbed_official	113:b3775bf36a83	1333	if (tmp_hal_status != HAL_OK)
bogdanm	0:9b334a45a8ff	1334	{
bogdanm	0:9b334a45a8ff	1335	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	1336	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
bogdanm	0:9b334a45a8ff	1337	}
bogdanm	0:9b334a45a8ff	1338
bogdanm	0:9b334a45a8ff	1339	/* Disable ADC overrun interrupt */
bogdanm	0:9b334a45a8ff	1340	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
bogdanm	0:9b334a45a8ff	1341
mbed_official	113:b3775bf36a83	1342	/* 2. Disable the ADC peripheral */
mbed_official	113:b3775bf36a83	1343	/* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
mbed_official	113:b3775bf36a83	1344	/* in memory a potential failing status. */
mbed_official	113:b3775bf36a83	1345	if (tmp_hal_status == HAL_OK)
bogdanm	0:9b334a45a8ff	1346	{
mbed_official	113:b3775bf36a83	1347	tmp_hal_status = ADC_Disable(hadc);
bogdanm	0:9b334a45a8ff	1348	}
bogdanm	0:9b334a45a8ff	1349	else
bogdanm	0:9b334a45a8ff	1350	{
mbed_official	113:b3775bf36a83	1351	ADC_Disable(hadc);
bogdanm	0:9b334a45a8ff	1352	}
mbed_official	113:b3775bf36a83	1353
mbed_official	113:b3775bf36a83	1354	/* Check if ADC is effectively disabled */
mbed_official	113:b3775bf36a83	1355	if (tmp_hal_status == HAL_OK)
mbed_official	113:b3775bf36a83	1356	{
mbed_official	113:b3775bf36a83	1357	/* Set ADC state */
mbed_official	113:b3775bf36a83	1358	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	1359	HAL_ADC_STATE_REG_BUSY,
mbed_official	113:b3775bf36a83	1360	HAL_ADC_STATE_READY);
mbed_official	113:b3775bf36a83	1361	}
bogdanm	0:9b334a45a8ff	1362	}
bogdanm	0:9b334a45a8ff	1363
bogdanm	0:9b334a45a8ff	1364	/* Process unlocked */
bogdanm	0:9b334a45a8ff	1365	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	1366
bogdanm	0:9b334a45a8ff	1367	/* Return function status */
mbed_official	113:b3775bf36a83	1368	return tmp_hal_status;
bogdanm	0:9b334a45a8ff	1369	}
bogdanm	0:9b334a45a8ff	1370
bogdanm	0:9b334a45a8ff	1371	/**
mbed_official	113:b3775bf36a83	1372	* @brief Get ADC regular group conversion result.
mbed_official	113:b3775bf36a83	1373	* @note Reading DR register automatically clears EOC (end of conversion of
mbed_official	113:b3775bf36a83	1374	* regular group) flag.
mbed_official	113:b3775bf36a83	1375	* @note This function does not clear ADC flag EOS
mbed_official	113:b3775bf36a83	1376	* (ADC group regular end of sequence conversion).
mbed_official	113:b3775bf36a83	1377	* Occurrence of flag EOS rising:
mbed_official	113:b3775bf36a83	1378	* - If sequencer is composed of 1 rank, flag EOS is equivalent
mbed_official	113:b3775bf36a83	1379	* to flag EOC.
mbed_official	113:b3775bf36a83	1380	* - If sequencer is composed of several ranks, during the scan
mbed_official	113:b3775bf36a83	1381	* sequence flag EOC only is raised, at the end of the scan sequence
mbed_official	113:b3775bf36a83	1382	* both flags EOC and EOS are raised.
mbed_official	113:b3775bf36a83	1383	* To clear this flag, either use function:
mbed_official	113:b3775bf36a83	1384	* in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
mbed_official	113:b3775bf36a83	1385	* model polling: @ref HAL_ADC_PollForConversion()
mbed_official	113:b3775bf36a83	1386	* or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
mbed_official	113:b3775bf36a83	1387	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1388	* @retval Converted value
bogdanm	0:9b334a45a8ff	1389	*/
bogdanm	0:9b334a45a8ff	1390	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1391	{
mbed_official	113:b3775bf36a83	1392	/* Check the parameters */
mbed_official	113:b3775bf36a83	1393	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	113:b3775bf36a83	1394
mbed_official	113:b3775bf36a83	1395	/* Note: EOC flag is not cleared here by software because automatically */
mbed_official	113:b3775bf36a83	1396	/* cleared by hardware when reading register DR. */
mbed_official	113:b3775bf36a83	1397
mbed_official	113:b3775bf36a83	1398	/* Return ADC converted value */
bogdanm	0:9b334a45a8ff	1399	return hadc->Instance->DR;
bogdanm	0:9b334a45a8ff	1400	}
bogdanm	0:9b334a45a8ff	1401
bogdanm	0:9b334a45a8ff	1402	/**
mbed_official	113:b3775bf36a83	1403	* @brief Handles ADC interrupt request.
mbed_official	113:b3775bf36a83	1404	* @param hadc: ADC handle
mbed_official	113:b3775bf36a83	1405	* @retval None
mbed_official	113:b3775bf36a83	1406	*/
mbed_official	113:b3775bf36a83	1407	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
mbed_official	113:b3775bf36a83	1408	{
mbed_official	113:b3775bf36a83	1409	/* Check the parameters */
mbed_official	113:b3775bf36a83	1410	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	113:b3775bf36a83	1411	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	113:b3775bf36a83	1412
mbed_official	113:b3775bf36a83	1413	/* ========== Check End of Conversion flag for regular group ========== */
mbed_official	113:b3775bf36a83	1414	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) \|\|
mbed_official	113:b3775bf36a83	1415	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
mbed_official	113:b3775bf36a83	1416	{
mbed_official	113:b3775bf36a83	1417	/* Update state machine on conversion status if not in error state */
mbed_official	113:b3775bf36a83	1418	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
mbed_official	113:b3775bf36a83	1419	{
mbed_official	113:b3775bf36a83	1420	/* Set ADC state */
mbed_official	113:b3775bf36a83	1421	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
mbed_official	113:b3775bf36a83	1422	}
mbed_official	113:b3775bf36a83	1423
mbed_official	113:b3775bf36a83	1424	/* Determine whether any further conversion upcoming on group regular */
mbed_official	113:b3775bf36a83	1425	/* by external trigger, continuous mode or scan sequence on going. */
mbed_official	113:b3775bf36a83	1426	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	113:b3775bf36a83	1427	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	113:b3775bf36a83	1428	{
mbed_official	113:b3775bf36a83	1429	/* If End of Sequence is reached, disable interrupts */
mbed_official	113:b3775bf36a83	1430	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
mbed_official	113:b3775bf36a83	1431	{
mbed_official	113:b3775bf36a83	1432	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
mbed_official	113:b3775bf36a83	1433	/* ADSTART==0 (no conversion on going) */
mbed_official	113:b3775bf36a83	1434	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
mbed_official	113:b3775bf36a83	1435	{
mbed_official	113:b3775bf36a83	1436	/* Disable ADC end of single conversion interrupt on group regular */
mbed_official	113:b3775bf36a83	1437	/* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official	113:b3775bf36a83	1438	/* HAL_Start_IT(), but is not disabled here because can be used */
mbed_official	113:b3775bf36a83	1439	/* by overrun IRQ process below. */
mbed_official	113:b3775bf36a83	1440	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
mbed_official	113:b3775bf36a83	1441
mbed_official	113:b3775bf36a83	1442	/* Set ADC state */
mbed_official	113:b3775bf36a83	1443	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	1444	HAL_ADC_STATE_REG_BUSY,
mbed_official	113:b3775bf36a83	1445	HAL_ADC_STATE_READY);
mbed_official	113:b3775bf36a83	1446	}
mbed_official	113:b3775bf36a83	1447	else
mbed_official	113:b3775bf36a83	1448	{
mbed_official	113:b3775bf36a83	1449	/* Change ADC state to error state */
mbed_official	113:b3775bf36a83	1450	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
mbed_official	113:b3775bf36a83	1451
mbed_official	113:b3775bf36a83	1452	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	1453	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
mbed_official	113:b3775bf36a83	1454	}
mbed_official	113:b3775bf36a83	1455	}
mbed_official	113:b3775bf36a83	1456	}
mbed_official	113:b3775bf36a83	1457
mbed_official	113:b3775bf36a83	1458	/* Conversion complete callback */
mbed_official	113:b3775bf36a83	1459	/* Note: into callback, to determine if conversion has been triggered */
mbed_official	113:b3775bf36a83	1460	/* from EOC or EOS, possibility to use: */
mbed_official	113:b3775bf36a83	1461	/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
mbed_official	113:b3775bf36a83	1462	HAL_ADC_ConvCpltCallback(hadc);
mbed_official	113:b3775bf36a83	1463
mbed_official	113:b3775bf36a83	1464
mbed_official	113:b3775bf36a83	1465	/* Clear regular group conversion flag */
mbed_official	113:b3775bf36a83	1466	/* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */
mbed_official	113:b3775bf36a83	1467	/* conversion flags clear induces the release of the preserved data.*/
mbed_official	113:b3775bf36a83	1468	/* Therefore, if the preserved data value is needed, it must be */
mbed_official	113:b3775bf36a83	1469	/* read preliminarily into HAL_ADC_ConvCpltCallback(). */
mbed_official	113:b3775bf36a83	1470	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS) );
mbed_official	113:b3775bf36a83	1471	}
mbed_official	113:b3775bf36a83	1472
mbed_official	113:b3775bf36a83	1473	/* ========== Check Analog watchdog flags ========== */
mbed_official	113:b3775bf36a83	1474	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
mbed_official	113:b3775bf36a83	1475	{
mbed_official	113:b3775bf36a83	1476	/* Set ADC state */
mbed_official	113:b3775bf36a83	1477	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
mbed_official	113:b3775bf36a83	1478
mbed_official	113:b3775bf36a83	1479	/* Level out of window callback */
mbed_official	113:b3775bf36a83	1480	HAL_ADC_LevelOutOfWindowCallback(hadc);
mbed_official	113:b3775bf36a83	1481
mbed_official	113:b3775bf36a83	1482	/* Clear ADC Analog watchdog flag */
mbed_official	113:b3775bf36a83	1483	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
mbed_official	113:b3775bf36a83	1484
mbed_official	113:b3775bf36a83	1485	}
mbed_official	113:b3775bf36a83	1486
mbed_official	113:b3775bf36a83	1487
mbed_official	113:b3775bf36a83	1488	/* ========== Check Overrun flag ========== */
mbed_official	113:b3775bf36a83	1489	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
mbed_official	113:b3775bf36a83	1490	{
mbed_official	113:b3775bf36a83	1491	/* If overrun is set to overwrite previous data (default setting), */
mbed_official	113:b3775bf36a83	1492	/* overrun event is not considered as an error. */
mbed_official	113:b3775bf36a83	1493	/* (cf ref manual "Managing conversions without using the DMA and without */
mbed_official	113:b3775bf36a83	1494	/* overrun ") */
mbed_official	113:b3775bf36a83	1495	/* Exception for usage with DMA overrun event always considered as an */
mbed_official	113:b3775bf36a83	1496	/* error. */
mbed_official	113:b3775bf36a83	1497	if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) \|\|
mbed_official	113:b3775bf36a83	1498	HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
mbed_official	113:b3775bf36a83	1499	{
mbed_official	113:b3775bf36a83	1500	/* Set ADC error code to overrun */
mbed_official	113:b3775bf36a83	1501	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
mbed_official	113:b3775bf36a83	1502
mbed_official	113:b3775bf36a83	1503	/* Clear ADC overrun flag */
mbed_official	113:b3775bf36a83	1504	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
mbed_official	113:b3775bf36a83	1505
mbed_official	113:b3775bf36a83	1506	/* Error callback */
mbed_official	113:b3775bf36a83	1507	HAL_ADC_ErrorCallback(hadc);
mbed_official	113:b3775bf36a83	1508	}
mbed_official	113:b3775bf36a83	1509
mbed_official	113:b3775bf36a83	1510	/* Clear the Overrun flag */
mbed_official	113:b3775bf36a83	1511	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
mbed_official	113:b3775bf36a83	1512	}
mbed_official	113:b3775bf36a83	1513	}
mbed_official	113:b3775bf36a83	1514
mbed_official	113:b3775bf36a83	1515	/**
mbed_official	113:b3775bf36a83	1516	* @brief Conversion complete callback in non blocking mode
mbed_official	113:b3775bf36a83	1517	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1518	* @retval None
bogdanm	0:9b334a45a8ff	1519	*/
bogdanm	0:9b334a45a8ff	1520	__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1521	{
mbed_official	113:b3775bf36a83	1522	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1523	UNUSED(hadc);
mbed_official	113:b3775bf36a83	1524
mbed_official	113:b3775bf36a83	1525	/* NOTE : This function should not be modified. When the callback is needed,
mbed_official	113:b3775bf36a83	1526	function HAL_ADC_ConvCpltCallback must be implemented in the user file.
bogdanm	0:9b334a45a8ff	1527	*/
bogdanm	0:9b334a45a8ff	1528	}
bogdanm	0:9b334a45a8ff	1529
bogdanm	0:9b334a45a8ff	1530	/**
mbed_official	113:b3775bf36a83	1531	* @brief Conversion DMA half-transfer callback in non blocking mode
mbed_official	113:b3775bf36a83	1532	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1533	* @retval None
bogdanm	0:9b334a45a8ff	1534	*/
bogdanm	0:9b334a45a8ff	1535	__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1536	{
mbed_official	113:b3775bf36a83	1537	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1538	UNUSED(hadc);
mbed_official	113:b3775bf36a83	1539
mbed_official	113:b3775bf36a83	1540	/* NOTE : This function should not be modified. When the callback is needed,
mbed_official	113:b3775bf36a83	1541	function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
bogdanm	0:9b334a45a8ff	1542	*/
bogdanm	0:9b334a45a8ff	1543	}
bogdanm	0:9b334a45a8ff	1544
bogdanm	0:9b334a45a8ff	1545	/**
mbed_official	113:b3775bf36a83	1546	* @brief Analog watchdog callback in non blocking mode.
mbed_official	113:b3775bf36a83	1547	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1548	* @retval None
bogdanm	0:9b334a45a8ff	1549	*/
bogdanm	0:9b334a45a8ff	1550	__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1551	{
mbed_official	113:b3775bf36a83	1552	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1553	UNUSED(hadc);
mbed_official	113:b3775bf36a83	1554
mbed_official	113:b3775bf36a83	1555	/* NOTE : This function should not be modified. When the callback is needed,
mbed_official	113:b3775bf36a83	1556	function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file.
bogdanm	0:9b334a45a8ff	1557	*/
bogdanm	0:9b334a45a8ff	1558	}
bogdanm	0:9b334a45a8ff	1559
bogdanm	0:9b334a45a8ff	1560	/**
mbed_official	113:b3775bf36a83	1561	* @brief ADC error callback in non blocking mode
mbed_official	113:b3775bf36a83	1562	* (ADC conversion with interruption or transfer by DMA)
mbed_official	113:b3775bf36a83	1563	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1564	* @retval None
bogdanm	0:9b334a45a8ff	1565	*/
bogdanm	0:9b334a45a8ff	1566	__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
bogdanm	0:9b334a45a8ff	1567	{
mbed_official	113:b3775bf36a83	1568	/* Prevent unused argument(s) compilation warning */
mbed_official	113:b3775bf36a83	1569	UNUSED(hadc);
mbed_official	113:b3775bf36a83	1570
mbed_official	113:b3775bf36a83	1571	/* NOTE : This function should not be modified. When the callback is needed,
mbed_official	113:b3775bf36a83	1572	function HAL_ADC_ErrorCallback must be implemented in the user file.
bogdanm	0:9b334a45a8ff	1573	*/
bogdanm	0:9b334a45a8ff	1574	}
bogdanm	0:9b334a45a8ff	1575
bogdanm	0:9b334a45a8ff	1576	/**
bogdanm	0:9b334a45a8ff	1577	* @}
bogdanm	0:9b334a45a8ff	1578	*/
bogdanm	0:9b334a45a8ff	1579
mbed_official	113:b3775bf36a83	1580	/** @addtogroup ADC_Exported_Functions_Group3
bogdanm	0:9b334a45a8ff	1581	* @brief Peripheral Control functions
bogdanm	0:9b334a45a8ff	1582	*
bogdanm	0:9b334a45a8ff	1583	@verbatim
bogdanm	0:9b334a45a8ff	1584	===============================================================================
bogdanm	0:9b334a45a8ff	1585	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	1586	===============================================================================
bogdanm	0:9b334a45a8ff	1587	[..] This section provides functions allowing to:
mbed_official	113:b3775bf36a83	1588	(+) Configure channels on regular group
mbed_official	113:b3775bf36a83	1589	(+) Configure the analog watchdog
bogdanm	0:9b334a45a8ff	1590
bogdanm	0:9b334a45a8ff	1591	@endverbatim
bogdanm	0:9b334a45a8ff	1592	* @{
bogdanm	0:9b334a45a8ff	1593	*/
bogdanm	0:9b334a45a8ff	1594
bogdanm	0:9b334a45a8ff	1595
bogdanm	0:9b334a45a8ff	1596	/**
mbed_official	113:b3775bf36a83	1597	* @brief Configures the the selected channel to be linked to the regular
mbed_official	113:b3775bf36a83	1598	* group.
mbed_official	113:b3775bf36a83	1599	* @note In case of usage of internal measurement channels:
mbed_official	113:b3775bf36a83	1600	* VrefInt/Vlcd(STM32L0x3xx only)/TempSensor.
mbed_official	113:b3775bf36a83	1601	* Sampling time constraints must be respected (sampling time can be
mbed_official	113:b3775bf36a83	1602	* adjusted in function of ADC clock frequency and sampling time
mbed_official	113:b3775bf36a83	1603	* setting).
mbed_official	113:b3775bf36a83	1604	* Refer to device datasheet for timings values, parameters TS_vrefint,
mbed_official	113:b3775bf36a83	1605	* TS_vlcd (STM32L0x3xx only), TS_temp (values rough order: 5us to 17us).
mbed_official	113:b3775bf36a83	1606	* These internal paths can be be disabled using function
mbed_official	113:b3775bf36a83	1607	* HAL_ADC_DeInit().
mbed_official	113:b3775bf36a83	1608	* @note Possibility to update parameters on the fly:
mbed_official	113:b3775bf36a83	1609	* This function initializes channel into regular group, following
mbed_official	113:b3775bf36a83	1610	* calls to this function can be used to reconfigure some parameters
mbed_official	113:b3775bf36a83	1611	* of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
mbed_official	113:b3775bf36a83	1612	* the ADC.
mbed_official	113:b3775bf36a83	1613	* The setting of these parameters is conditioned to ADC state.
mbed_official	113:b3775bf36a83	1614	* For parameters constraints, see comments of structure
mbed_official	113:b3775bf36a83	1615	* "ADC_ChannelConfTypeDef".
mbed_official	113:b3775bf36a83	1616	* @param hadc: ADC handle
mbed_official	113:b3775bf36a83	1617	* @param sConfig: Structure of ADC channel for regular group.
bogdanm	0:9b334a45a8ff	1618	* @retval HAL status
bogdanm	0:9b334a45a8ff	1619	*/
bogdanm	0:9b334a45a8ff	1620	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
bogdanm	0:9b334a45a8ff	1621	{
bogdanm	0:9b334a45a8ff	1622	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1623	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	1624	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
mbed_official	113:b3775bf36a83	1625	assert_param(IS_ADC_RANK(sConfig->Rank));
bogdanm	0:9b334a45a8ff	1626
bogdanm	0:9b334a45a8ff	1627	/* Process locked */
bogdanm	0:9b334a45a8ff	1628	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	1629
bogdanm	0:9b334a45a8ff	1630	/* Parameters update conditioned to ADC state: */
bogdanm	0:9b334a45a8ff	1631	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	113:b3775bf36a83	1632	/* conversion on going on regular group: */
bogdanm	0:9b334a45a8ff	1633	/* - Channel number */
bogdanm	0:9b334a45a8ff	1634	/* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	113:b3775bf36a83	1635	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET)
bogdanm	0:9b334a45a8ff	1636	{
bogdanm	0:9b334a45a8ff	1637	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	1638	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm	0:9b334a45a8ff	1639	/* Process unlocked */
bogdanm	0:9b334a45a8ff	1640	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	1641	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1642	}
bogdanm	0:9b334a45a8ff	1643
mbed_official	113:b3775bf36a83	1644	if (sConfig->Rank != ADC_RANK_NONE)
bogdanm	0:9b334a45a8ff	1645	{
mbed_official	113:b3775bf36a83	1646	/* Enable selected channels */
mbed_official	113:b3775bf36a83	1647	hadc->Instance->CHSELR \|= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK);
mbed_official	113:b3775bf36a83	1648
mbed_official	113:b3775bf36a83	1649	/* Management of internal measurement channels: Vlcd (STM32L0x3xx only)/VrefInt/TempSensor */
mbed_official	113:b3775bf36a83	1650	/* internal measurement paths enable: If internal channel selected, enable */
mbed_official	113:b3775bf36a83	1651	/* dedicated internal buffers and path. */
mbed_official	113:b3775bf36a83	1652
mbed_official	113:b3775bf36a83	1653	/* If Temperature sensor channel is selected, then enable the internal */
mbed_official	113:b3775bf36a83	1654	/* buffers and path */
mbed_official	113:b3775bf36a83	1655	if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR ) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
mbed_official	113:b3775bf36a83	1656	{
mbed_official	113:b3775bf36a83	1657	ADC->CCR \|= ADC_CCR_TSEN;
mbed_official	113:b3775bf36a83	1658
mbed_official	113:b3775bf36a83	1659	/* Delay for temperature sensor stabilization time */
mbed_official	113:b3775bf36a83	1660	ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US);
mbed_official	113:b3775bf36a83	1661	}
mbed_official	113:b3775bf36a83	1662
mbed_official	113:b3775bf36a83	1663	/* If VRefInt channel is selected, then enable the internal buffers and path */
mbed_official	113:b3775bf36a83	1664	if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
mbed_official	113:b3775bf36a83	1665	{
mbed_official	113:b3775bf36a83	1666	ADC->CCR \|= ADC_CCR_VREFEN;
mbed_official	113:b3775bf36a83	1667	}
bogdanm	0:9b334a45a8ff	1668
mbed_official	113:b3775bf36a83	1669	#if defined (STM32L053xx) \|\| defined (STM32L063xx) \|\| defined (STM32L073xx) \|\| defined (STM32L083xx)
mbed_official	113:b3775bf36a83	1670	/* If Vlcd channel is selected, then enable the internal buffers and path */
mbed_official	113:b3775bf36a83	1671	if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
mbed_official	113:b3775bf36a83	1672	{
mbed_official	113:b3775bf36a83	1673	ADC->CCR \|= ADC_CCR_VLCDEN;
mbed_official	113:b3775bf36a83	1674	}
mbed_official	113:b3775bf36a83	1675	#endif
bogdanm	0:9b334a45a8ff	1676	}
mbed_official	113:b3775bf36a83	1677	else
bogdanm	0:9b334a45a8ff	1678	{
mbed_official	113:b3775bf36a83	1679	/* Regular sequence configuration */
mbed_official	113:b3775bf36a83	1680	/* Reset the channel selection register from the selected channel */
mbed_official	113:b3775bf36a83	1681	hadc->Instance->CHSELR &= ~((uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK));
mbed_official	113:b3775bf36a83	1682
mbed_official	113:b3775bf36a83	1683	/* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
mbed_official	113:b3775bf36a83	1684	/* internal measurement paths disable: If internal channel selected, */
mbed_official	113:b3775bf36a83	1685	/* disable dedicated internal buffers and path. */
mbed_official	113:b3775bf36a83	1686	if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR ) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
mbed_official	113:b3775bf36a83	1687	{
mbed_official	113:b3775bf36a83	1688	ADC->CCR &= ~ADC_CCR_TSEN;
mbed_official	113:b3775bf36a83	1689	}
mbed_official	113:b3775bf36a83	1690
mbed_official	113:b3775bf36a83	1691	/* If VRefInt channel is selected, then enable the internal buffers and path */
mbed_official	113:b3775bf36a83	1692	if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
mbed_official	113:b3775bf36a83	1693	{
mbed_official	113:b3775bf36a83	1694	ADC->CCR &= ~ADC_CCR_VREFEN;
mbed_official	113:b3775bf36a83	1695	}
mbed_official	113:b3775bf36a83	1696
mbed_official	113:b3775bf36a83	1697	#if defined (STM32L053xx) \|\| defined (STM32L063xx) \|\| defined (STM32L073xx) \|\| defined (STM32L083xx)
mbed_official	113:b3775bf36a83	1698	/* If Vlcd channel is selected, then enable the internal buffers and path */
mbed_official	113:b3775bf36a83	1699	if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
mbed_official	113:b3775bf36a83	1700	{
mbed_official	113:b3775bf36a83	1701	ADC->CCR &= ~ADC_CCR_VLCDEN;
mbed_official	113:b3775bf36a83	1702	}
mbed_official	113:b3775bf36a83	1703	#endif
bogdanm	0:9b334a45a8ff	1704	}
bogdanm	0:9b334a45a8ff	1705
bogdanm	0:9b334a45a8ff	1706	/* Process unlocked */
bogdanm	0:9b334a45a8ff	1707	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	1708
bogdanm	0:9b334a45a8ff	1709	/* Return function status */
bogdanm	0:9b334a45a8ff	1710	return HAL_OK;
bogdanm	0:9b334a45a8ff	1711	}
bogdanm	0:9b334a45a8ff	1712
bogdanm	0:9b334a45a8ff	1713	/**
bogdanm	0:9b334a45a8ff	1714	* @brief Configures the analog watchdog.
mbed_official	113:b3775bf36a83	1715	* @note Possibility to update parameters on the fly:
mbed_official	113:b3775bf36a83	1716	* This function initializes the selected analog watchdog, following
mbed_official	113:b3775bf36a83	1717	* calls to this function can be used to reconfigure some parameters
mbed_official	113:b3775bf36a83	1718	* of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting
mbed_official	113:b3775bf36a83	1719	* the ADC.
mbed_official	113:b3775bf36a83	1720	* The setting of these parameters is conditioned to ADC state.
mbed_official	113:b3775bf36a83	1721	* For parameters constraints, see comments of structure
mbed_official	113:b3775bf36a83	1722	* "ADC_AnalogWDGConfTypeDef".
mbed_official	113:b3775bf36a83	1723	* @param hadc: ADC handle
mbed_official	113:b3775bf36a83	1724	* @param AnalogWDGConfig: Structure of ADC analog watchdog configuration
bogdanm	0:9b334a45a8ff	1725	* @retval HAL status
bogdanm	0:9b334a45a8ff	1726	*/
bogdanm	0:9b334a45a8ff	1727	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
bogdanm	0:9b334a45a8ff	1728	{
mbed_official	113:b3775bf36a83	1729	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official	113:b3775bf36a83	1730
bogdanm	0:9b334a45a8ff	1731	uint32_t tmpAWDHighThresholdShifted;
bogdanm	0:9b334a45a8ff	1732	uint32_t tmpAWDLowThresholdShifted;
bogdanm	0:9b334a45a8ff	1733
bogdanm	0:9b334a45a8ff	1734	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1735	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm	0:9b334a45a8ff	1736	assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
bogdanm	0:9b334a45a8ff	1737	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
bogdanm	0:9b334a45a8ff	1738	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
bogdanm	0:9b334a45a8ff	1739
mbed_official	113:b3775bf36a83	1740	/* Verify if threshold is within the selected ADC resolution */
bogdanm	0:9b334a45a8ff	1741	assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
bogdanm	0:9b334a45a8ff	1742	assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
bogdanm	0:9b334a45a8ff	1743
mbed_official	113:b3775bf36a83	1744	if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
mbed_official	113:b3775bf36a83	1745	{
mbed_official	113:b3775bf36a83	1746	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
mbed_official	113:b3775bf36a83	1747	}
mbed_official	113:b3775bf36a83	1748
bogdanm	0:9b334a45a8ff	1749	/* Process locked */
bogdanm	0:9b334a45a8ff	1750	__HAL_LOCK(hadc);
bogdanm	0:9b334a45a8ff	1751
bogdanm	0:9b334a45a8ff	1752	/* Parameters update conditioned to ADC state: */
bogdanm	0:9b334a45a8ff	1753	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	113:b3775bf36a83	1754	/* conversion on going on regular group: */
bogdanm	0:9b334a45a8ff	1755	/* - Analog watchdog channels */
bogdanm	0:9b334a45a8ff	1756	/* - Analog watchdog thresholds */
mbed_official	113:b3775bf36a83	1757	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
bogdanm	0:9b334a45a8ff	1758	{
mbed_official	113:b3775bf36a83	1759	/* Configure ADC Analog watchdog interrupt */
mbed_official	113:b3775bf36a83	1760	if(AnalogWDGConfig->ITMode == ENABLE)
mbed_official	113:b3775bf36a83	1761	{
mbed_official	113:b3775bf36a83	1762	/* Enable the ADC Analog watchdog interrupt */
mbed_official	113:b3775bf36a83	1763	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
mbed_official	113:b3775bf36a83	1764	}
mbed_official	113:b3775bf36a83	1765	else
mbed_official	113:b3775bf36a83	1766	{
mbed_official	113:b3775bf36a83	1767	/* Disable the ADC Analog watchdog interrupt */
mbed_official	113:b3775bf36a83	1768	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
mbed_official	113:b3775bf36a83	1769	}
mbed_official	113:b3775bf36a83	1770
mbed_official	113:b3775bf36a83	1771	/* Configuration of analog watchdog: */
mbed_official	113:b3775bf36a83	1772	/* - Set the analog watchdog mode */
mbed_official	113:b3775bf36a83	1773	/* - Set the Analog watchdog channel (is not used if watchdog */
mbed_official	113:b3775bf36a83	1774	/* mode "all channels": ADC_CFGR1_AWD1SGL=0) */
mbed_official	113:b3775bf36a83	1775	hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL \|
mbed_official	113:b3775bf36a83	1776	ADC_CFGR1_AWDEN \|
mbed_official	113:b3775bf36a83	1777	ADC_CFGR1_AWDCH);
mbed_official	113:b3775bf36a83	1778
mbed_official	113:b3775bf36a83	1779	hadc->Instance->CFGR1 \|= ( AnalogWDGConfig->WatchdogMode \|
mbed_official	113:b3775bf36a83	1780	(AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK));
mbed_official	113:b3775bf36a83	1781
mbed_official	113:b3775bf36a83	1782
mbed_official	113:b3775bf36a83	1783	/* Shift the offset in function of the selected ADC resolution: Thresholds */
mbed_official	113:b3775bf36a83	1784	/* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
mbed_official	113:b3775bf36a83	1785	tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
mbed_official	113:b3775bf36a83	1786	tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
mbed_official	113:b3775bf36a83	1787
mbed_official	113:b3775bf36a83	1788	/* Clear High & Low high thresholds */
mbed_official	113:b3775bf36a83	1789	hadc->Instance->TR &= (uint32_t) ~ (ADC_TR_HT \| ADC_TR_LT);
mbed_official	113:b3775bf36a83	1790
mbed_official	113:b3775bf36a83	1791	/* Set the high threshold */
mbed_official	113:b3775bf36a83	1792	hadc->Instance->TR = ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted);
mbed_official	113:b3775bf36a83	1793	/* Set the low threshold */
mbed_official	113:b3775bf36a83	1794	hadc->Instance->TR \|= tmpAWDLowThresholdShifted;
bogdanm	0:9b334a45a8ff	1795	}
bogdanm	0:9b334a45a8ff	1796	else
bogdanm	0:9b334a45a8ff	1797	{
mbed_official	113:b3775bf36a83	1798	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	1799	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm	0:9b334a45a8ff	1800
mbed_official	113:b3775bf36a83	1801	tmp_hal_status = HAL_ERROR;
mbed_official	113:b3775bf36a83	1802	}
bogdanm	0:9b334a45a8ff	1803
bogdanm	0:9b334a45a8ff	1804
bogdanm	0:9b334a45a8ff	1805	/* Process unlocked */
bogdanm	0:9b334a45a8ff	1806	__HAL_UNLOCK(hadc);
bogdanm	0:9b334a45a8ff	1807
bogdanm	0:9b334a45a8ff	1808	/* Return function status */
mbed_official	113:b3775bf36a83	1809	return tmp_hal_status;
bogdanm	0:9b334a45a8ff	1810	}
bogdanm	0:9b334a45a8ff	1811
bogdanm	0:9b334a45a8ff	1812	/**
bogdanm	0:9b334a45a8ff	1813	* @}
bogdanm	0:9b334a45a8ff	1814	*/
bogdanm	0:9b334a45a8ff	1815
mbed_official	113:b3775bf36a83	1816	/** @addtogroup ADC_Exported_Functions_Group4
bogdanm	0:9b334a45a8ff	1817	* @brief ADC Peripheral State functions
bogdanm	0:9b334a45a8ff	1818	*
bogdanm	0:9b334a45a8ff	1819	@verbatim
bogdanm	0:9b334a45a8ff	1820	===============================================================================
bogdanm	0:9b334a45a8ff	1821	##### ADC Peripheral State functions #####
bogdanm	0:9b334a45a8ff	1822	===============================================================================
bogdanm	0:9b334a45a8ff	1823	[..]
bogdanm	0:9b334a45a8ff	1824	This subsection provides functions allowing to
bogdanm	0:9b334a45a8ff	1825	(+) Check the ADC state.
bogdanm	0:9b334a45a8ff	1826	(+) handle ADC interrupt request.
bogdanm	0:9b334a45a8ff	1827
bogdanm	0:9b334a45a8ff	1828	@endverbatim
bogdanm	0:9b334a45a8ff	1829	* @{
bogdanm	0:9b334a45a8ff	1830	*/
bogdanm	0:9b334a45a8ff	1831
bogdanm	0:9b334a45a8ff	1832	/**
bogdanm	0:9b334a45a8ff	1833	* @brief return the ADC state
mbed_official	113:b3775bf36a83	1834	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1835	* @retval HAL state
bogdanm	0:9b334a45a8ff	1836	*/
mbed_official	113:b3775bf36a83	1837	uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1838	{
mbed_official	113:b3775bf36a83	1839	/* Check the parameters */
mbed_official	113:b3775bf36a83	1840	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	113:b3775bf36a83	1841
bogdanm	0:9b334a45a8ff	1842	/* Return ADC state */
bogdanm	0:9b334a45a8ff	1843	return hadc->State;
bogdanm	0:9b334a45a8ff	1844	}
bogdanm	0:9b334a45a8ff	1845
bogdanm	0:9b334a45a8ff	1846	/**
bogdanm	0:9b334a45a8ff	1847	* @brief Return the ADC error code
mbed_official	113:b3775bf36a83	1848	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1849	* @retval ADC Error Code
bogdanm	0:9b334a45a8ff	1850	*/
bogdanm	0:9b334a45a8ff	1851	uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
bogdanm	0:9b334a45a8ff	1852	{
bogdanm	0:9b334a45a8ff	1853	return hadc->ErrorCode;
bogdanm	0:9b334a45a8ff	1854	}
bogdanm	0:9b334a45a8ff	1855
bogdanm	0:9b334a45a8ff	1856
bogdanm	0:9b334a45a8ff	1857	/**
bogdanm	0:9b334a45a8ff	1858	* @}
bogdanm	0:9b334a45a8ff	1859	*/
bogdanm	0:9b334a45a8ff	1860
bogdanm	0:9b334a45a8ff	1861	/**
mbed_official	113:b3775bf36a83	1862	* @}
mbed_official	113:b3775bf36a83	1863	*/
mbed_official	113:b3775bf36a83	1864
mbed_official	113:b3775bf36a83	1865
mbed_official	113:b3775bf36a83	1866	/** @addtogroup ADC_Private
mbed_official	113:b3775bf36a83	1867	* @{
mbed_official	113:b3775bf36a83	1868	*/
mbed_official	113:b3775bf36a83	1869
mbed_official	113:b3775bf36a83	1870	/**
bogdanm	0:9b334a45a8ff	1871	* @brief Enable the selected ADC.
bogdanm	0:9b334a45a8ff	1872	* @note Prerequisite condition to use this function: ADC must be disabled
bogdanm	0:9b334a45a8ff	1873	* and voltage regulator must be enabled (done into HAL_ADC_Init()).
bogdanm	0:9b334a45a8ff	1874	* @note If low power mode AutoPowerOff is enabled, power-on/off phases are
bogdanm	0:9b334a45a8ff	1875	* performed automatically by hardware.
bogdanm	0:9b334a45a8ff	1876	* In this mode, this function is useless and must not be called because
bogdanm	0:9b334a45a8ff	1877	* flag ADC_FLAG_RDY is not usable.
bogdanm	0:9b334a45a8ff	1878	* Therefore, this function must be called under condition of
bogdanm	0:9b334a45a8ff	1879	* "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
bogdanm	0:9b334a45a8ff	1880	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1881	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1882	*/
bogdanm	0:9b334a45a8ff	1883	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1884	{
bogdanm	0:9b334a45a8ff	1885	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	1886
bogdanm	0:9b334a45a8ff	1887	/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
bogdanm	0:9b334a45a8ff	1888	/* enabling phase not yet completed: flag ADC ready not yet set). */
bogdanm	0:9b334a45a8ff	1889	/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
bogdanm	0:9b334a45a8ff	1890	/* causes: ADC clock not running, ...). */
bogdanm	0:9b334a45a8ff	1891	if (ADC_IS_ENABLE(hadc) == RESET)
bogdanm	0:9b334a45a8ff	1892	{
bogdanm	0:9b334a45a8ff	1893	/* Check if conditions to enable the ADC are fulfilled */
bogdanm	0:9b334a45a8ff	1894	if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
bogdanm	0:9b334a45a8ff	1895	{
bogdanm	0:9b334a45a8ff	1896	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	1897	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1898
bogdanm	0:9b334a45a8ff	1899	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	1900	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1901
bogdanm	0:9b334a45a8ff	1902	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1903	}
bogdanm	0:9b334a45a8ff	1904
bogdanm	0:9b334a45a8ff	1905	/* Enable the ADC peripheral */
bogdanm	0:9b334a45a8ff	1906	__HAL_ADC_ENABLE(hadc);
bogdanm	0:9b334a45a8ff	1907
bogdanm	0:9b334a45a8ff	1908	/* Delay for ADC stabilization time. */
bogdanm	0:9b334a45a8ff	1909	ADC_DelayMicroSecond(ADC_STAB_DELAY_US);
bogdanm	0:9b334a45a8ff	1910
mbed_official	113:b3775bf36a83	1911	/* Get tick count */
bogdanm	0:9b334a45a8ff	1912	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1913
mbed_official	113:b3775bf36a83	1914	/* Wait for ADC effectively enabled */
bogdanm	0:9b334a45a8ff	1915	while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
bogdanm	0:9b334a45a8ff	1916	{
bogdanm	0:9b334a45a8ff	1917	if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT)
bogdanm	0:9b334a45a8ff	1918	{
bogdanm	0:9b334a45a8ff	1919	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	1920	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1921
bogdanm	0:9b334a45a8ff	1922	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	1923	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1924
bogdanm	0:9b334a45a8ff	1925	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1926	}
bogdanm	0:9b334a45a8ff	1927	}
mbed_official	113:b3775bf36a83	1928
bogdanm	0:9b334a45a8ff	1929	}
bogdanm	0:9b334a45a8ff	1930
bogdanm	0:9b334a45a8ff	1931	/* Return HAL status */
bogdanm	0:9b334a45a8ff	1932	return HAL_OK;
bogdanm	0:9b334a45a8ff	1933	}
bogdanm	0:9b334a45a8ff	1934
bogdanm	0:9b334a45a8ff	1935	/**
bogdanm	0:9b334a45a8ff	1936	* @brief Disable the selected ADC.
bogdanm	0:9b334a45a8ff	1937	* @note Prerequisite condition to use this function: ADC conversions must be
mbed_official	113:b3775bf36a83	1938	* stopped.
bogdanm	0:9b334a45a8ff	1939	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1940	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1941	*/
bogdanm	0:9b334a45a8ff	1942	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1943	{
bogdanm	0:9b334a45a8ff	1944	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	1945
bogdanm	0:9b334a45a8ff	1946	/* Verification if ADC is not already disabled: */
mbed_official	113:b3775bf36a83	1947	/* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
bogdanm	0:9b334a45a8ff	1948	/* disabled. */
bogdanm	0:9b334a45a8ff	1949	if (ADC_IS_ENABLE(hadc) != RESET )
bogdanm	0:9b334a45a8ff	1950	{
bogdanm	0:9b334a45a8ff	1951	/* Check if conditions to disable the ADC are fulfilled */
bogdanm	0:9b334a45a8ff	1952	if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
bogdanm	0:9b334a45a8ff	1953	{
bogdanm	0:9b334a45a8ff	1954	/* Disable the ADC peripheral */
bogdanm	0:9b334a45a8ff	1955	__HAL_ADC_DISABLE(hadc);
bogdanm	0:9b334a45a8ff	1956	}
bogdanm	0:9b334a45a8ff	1957	else
bogdanm	0:9b334a45a8ff	1958	{
bogdanm	0:9b334a45a8ff	1959	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	1960	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1961
mbed_official	113:b3775bf36a83	1962	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	1963	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1964
bogdanm	0:9b334a45a8ff	1965	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1966	}
bogdanm	0:9b334a45a8ff	1967
bogdanm	0:9b334a45a8ff	1968	/* Wait for ADC effectively disabled */
mbed_official	113:b3775bf36a83	1969	/* Get tick count */
bogdanm	0:9b334a45a8ff	1970	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1971
bogdanm	0:9b334a45a8ff	1972	while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
bogdanm	0:9b334a45a8ff	1973	{
bogdanm	0:9b334a45a8ff	1974	if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT)
bogdanm	0:9b334a45a8ff	1975	{
bogdanm	0:9b334a45a8ff	1976	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	1977	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1978
mbed_official	113:b3775bf36a83	1979	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	1980	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
bogdanm	0:9b334a45a8ff	1981
bogdanm	0:9b334a45a8ff	1982	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	1983	}
bogdanm	0:9b334a45a8ff	1984	}
bogdanm	0:9b334a45a8ff	1985	}
bogdanm	0:9b334a45a8ff	1986
bogdanm	0:9b334a45a8ff	1987	/* Return HAL status */
bogdanm	0:9b334a45a8ff	1988	return HAL_OK;
bogdanm	0:9b334a45a8ff	1989	}
bogdanm	0:9b334a45a8ff	1990
bogdanm	0:9b334a45a8ff	1991	/**
bogdanm	0:9b334a45a8ff	1992	* @brief Stop ADC conversion.
bogdanm	0:9b334a45a8ff	1993	* @note Prerequisite condition to use this function: ADC conversions must be
bogdanm	0:9b334a45a8ff	1994	* stopped to disable the ADC.
bogdanm	0:9b334a45a8ff	1995	* @param hadc: ADC handle
bogdanm	0:9b334a45a8ff	1996	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1997	*/
mbed_official	113:b3775bf36a83	1998	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
bogdanm	0:9b334a45a8ff	1999	{
mbed_official	113:b3775bf36a83	2000	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	2001
bogdanm	0:9b334a45a8ff	2002	/* Check the parameters */
bogdanm	0:9b334a45a8ff	2003	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	113:b3775bf36a83	2004
mbed_official	113:b3775bf36a83	2005	/* Verification if ADC is not already stopped on regular group to bypass */
mbed_official	113:b3775bf36a83	2006	/* this function if not needed. */
mbed_official	113:b3775bf36a83	2007	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
bogdanm	0:9b334a45a8ff	2008	{
mbed_official	113:b3775bf36a83	2009
mbed_official	113:b3775bf36a83	2010	/* Stop potential conversion on going on regular group */
mbed_official	113:b3775bf36a83	2011	/* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
mbed_official	113:b3775bf36a83	2012	if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
mbed_official	113:b3775bf36a83	2013	HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
bogdanm	0:9b334a45a8ff	2014	{
mbed_official	113:b3775bf36a83	2015	/* Stop conversions on regular group */
mbed_official	113:b3775bf36a83	2016	hadc->Instance->CR \|= ADC_CR_ADSTP;
bogdanm	0:9b334a45a8ff	2017	}
bogdanm	0:9b334a45a8ff	2018
bogdanm	0:9b334a45a8ff	2019	/* Wait for conversion effectively stopped */
mbed_official	113:b3775bf36a83	2020	/* Get tick count */
bogdanm	0:9b334a45a8ff	2021	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	2022
bogdanm	0:9b334a45a8ff	2023	while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
bogdanm	0:9b334a45a8ff	2024	{
mbed_official	113:b3775bf36a83	2025	if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
bogdanm	0:9b334a45a8ff	2026	{
mbed_official	113:b3775bf36a83	2027	/* Update ADC state machine to error */
mbed_official	113:b3775bf36a83	2028	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
mbed_official	113:b3775bf36a83	2029
mbed_official	113:b3775bf36a83	2030	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	2031	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
mbed_official	113:b3775bf36a83	2032
mbed_official	113:b3775bf36a83	2033	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	2034	}
mbed_official	113:b3775bf36a83	2035	}
mbed_official	113:b3775bf36a83	2036
bogdanm	0:9b334a45a8ff	2037	}
bogdanm	0:9b334a45a8ff	2038
bogdanm	0:9b334a45a8ff	2039	/* Return HAL status */
bogdanm	0:9b334a45a8ff	2040	return HAL_OK;
bogdanm	0:9b334a45a8ff	2041	}
bogdanm	0:9b334a45a8ff	2042
bogdanm	0:9b334a45a8ff	2043	/**
bogdanm	0:9b334a45a8ff	2044	* @brief DMA transfer complete callback.
bogdanm	0:9b334a45a8ff	2045	* @param hdma: pointer to DMA handle.
bogdanm	0:9b334a45a8ff	2046	* @retval None
bogdanm	0:9b334a45a8ff	2047	*/
bogdanm	0:9b334a45a8ff	2048	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2049	{
mbed_official	113:b3775bf36a83	2050	/* Retrieve ADC handle corresponding to current DMA handle */
bogdanm	0:9b334a45a8ff	2051	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	2052
mbed_official	113:b3775bf36a83	2053	/* Update state machine on conversion status if not in error state */
mbed_official	113:b3775bf36a83	2054	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL \| HAL_ADC_STATE_ERROR_DMA))
mbed_official	113:b3775bf36a83	2055	{
mbed_official	113:b3775bf36a83	2056	/* Set ADC state */
mbed_official	113:b3775bf36a83	2057	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
bogdanm	0:9b334a45a8ff	2058
mbed_official	113:b3775bf36a83	2059	/* Determine whether any further conversion upcoming on group regular */
mbed_official	113:b3775bf36a83	2060	/* by external trigger, continuous mode or scan sequence on going. */
mbed_official	113:b3775bf36a83	2061	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	113:b3775bf36a83	2062	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	113:b3775bf36a83	2063	{
mbed_official	113:b3775bf36a83	2064	/* If End of Sequence is reached, disable interrupts */
mbed_official	113:b3775bf36a83	2065	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
mbed_official	113:b3775bf36a83	2066	{
mbed_official	113:b3775bf36a83	2067	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
mbed_official	113:b3775bf36a83	2068	/* ADSTART==0 (no conversion on going) */
mbed_official	113:b3775bf36a83	2069	if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
mbed_official	113:b3775bf36a83	2070	{
mbed_official	113:b3775bf36a83	2071	/* Disable ADC end of single conversion interrupt on group regular */
mbed_official	113:b3775bf36a83	2072	/* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official	113:b3775bf36a83	2073	/* HAL_Start_IT(), but is not disabled here because can be used */
mbed_official	113:b3775bf36a83	2074	/* by overrun IRQ process below. */
mbed_official	113:b3775bf36a83	2075	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
mbed_official	113:b3775bf36a83	2076
mbed_official	113:b3775bf36a83	2077	/* Set ADC state */
mbed_official	113:b3775bf36a83	2078	ADC_STATE_CLR_SET(hadc->State,
mbed_official	113:b3775bf36a83	2079	HAL_ADC_STATE_REG_BUSY,
mbed_official	113:b3775bf36a83	2080	HAL_ADC_STATE_READY);
mbed_official	113:b3775bf36a83	2081	}
mbed_official	113:b3775bf36a83	2082	else
mbed_official	113:b3775bf36a83	2083	{
mbed_official	113:b3775bf36a83	2084	/* Change ADC state to error state */
mbed_official	113:b3775bf36a83	2085	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
mbed_official	113:b3775bf36a83	2086
mbed_official	113:b3775bf36a83	2087	/* Set ADC error code to ADC IP internal error */
mbed_official	113:b3775bf36a83	2088	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
mbed_official	113:b3775bf36a83	2089	}
mbed_official	113:b3775bf36a83	2090	}
mbed_official	113:b3775bf36a83	2091	}
mbed_official	113:b3775bf36a83	2092
mbed_official	113:b3775bf36a83	2093	/* Conversion complete callback */
bogdanm	0:9b334a45a8ff	2094	HAL_ADC_ConvCpltCallback(hadc);
bogdanm	0:9b334a45a8ff	2095	}
mbed_official	113:b3775bf36a83	2096	else
mbed_official	113:b3775bf36a83	2097	{
mbed_official	113:b3775bf36a83	2098	/* Call DMA error callback */
mbed_official	113:b3775bf36a83	2099	hadc->DMA_Handle->XferErrorCallback(hdma);
mbed_official	113:b3775bf36a83	2100	}
mbed_official	113:b3775bf36a83	2101
mbed_official	113:b3775bf36a83	2102	}
bogdanm	0:9b334a45a8ff	2103
bogdanm	0:9b334a45a8ff	2104	/**
bogdanm	0:9b334a45a8ff	2105	* @brief DMA half transfer complete callback.
bogdanm	0:9b334a45a8ff	2106	* @param hdma: pointer to DMA handle.
bogdanm	0:9b334a45a8ff	2107	* @retval None
bogdanm	0:9b334a45a8ff	2108	*/
bogdanm	0:9b334a45a8ff	2109	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2110	{
mbed_official	113:b3775bf36a83	2111	/* Retrieve ADC handle corresponding to current DMA handle */
bogdanm	0:9b334a45a8ff	2112	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	2113
mbed_official	113:b3775bf36a83	2114	/* Half conversion callback */
bogdanm	0:9b334a45a8ff	2115	HAL_ADC_ConvHalfCpltCallback(hadc);
bogdanm	0:9b334a45a8ff	2116	}
bogdanm	0:9b334a45a8ff	2117
bogdanm	0:9b334a45a8ff	2118	/**
bogdanm	0:9b334a45a8ff	2119	* @brief DMA error callback
bogdanm	0:9b334a45a8ff	2120	* @param hdma: pointer to DMA handle.
bogdanm	0:9b334a45a8ff	2121	* @retval None
bogdanm	0:9b334a45a8ff	2122	*/
bogdanm	0:9b334a45a8ff	2123	static void ADC_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	2124	{
mbed_official	113:b3775bf36a83	2125	/* Retrieve ADC handle corresponding to current DMA handle */
mbed_official	113:b3775bf36a83	2126	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	113:b3775bf36a83	2127
mbed_official	113:b3775bf36a83	2128	/* Set ADC state */
mbed_official	113:b3775bf36a83	2129	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
mbed_official	113:b3775bf36a83	2130
bogdanm	0:9b334a45a8ff	2131	/* Set ADC error code to DMA error */
mbed_official	113:b3775bf36a83	2132	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
mbed_official	113:b3775bf36a83	2133
mbed_official	113:b3775bf36a83	2134	/* Error callback */
mbed_official	113:b3775bf36a83	2135	HAL_ADC_ErrorCallback(hadc);
bogdanm	0:9b334a45a8ff	2136	}
bogdanm	0:9b334a45a8ff	2137
bogdanm	0:9b334a45a8ff	2138	/**
bogdanm	0:9b334a45a8ff	2139	* @brief Delay micro seconds
bogdanm	0:9b334a45a8ff	2140	* @param microSecond : delay
bogdanm	0:9b334a45a8ff	2141	* @retval None
bogdanm	0:9b334a45a8ff	2142	*/
bogdanm	0:9b334a45a8ff	2143	static void ADC_DelayMicroSecond(uint32_t microSecond)
bogdanm	0:9b334a45a8ff	2144	{
bogdanm	0:9b334a45a8ff	2145	/* Compute number of CPU cycles to wait for */
bogdanm	0:9b334a45a8ff	2146	__IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000));
bogdanm	0:9b334a45a8ff	2147
bogdanm	0:9b334a45a8ff	2148	while(waitLoopIndex != 0)
bogdanm	0:9b334a45a8ff	2149	{
bogdanm	0:9b334a45a8ff	2150	waitLoopIndex--;
bogdanm	0:9b334a45a8ff	2151	}
bogdanm	0:9b334a45a8ff	2152	}
bogdanm	0:9b334a45a8ff	2153
bogdanm	0:9b334a45a8ff	2154	/**
bogdanm	0:9b334a45a8ff	2155	* @}
bogdanm	0:9b334a45a8ff	2156	*/
bogdanm	0:9b334a45a8ff	2157
bogdanm	0:9b334a45a8ff	2158	/**
bogdanm	0:9b334a45a8ff	2159	* @}
bogdanm	0:9b334a45a8ff	2160	*/
bogdanm	0:9b334a45a8ff	2161
mbed_official	113:b3775bf36a83	2162	#endif /* HAL_ADC_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	2163	/**
bogdanm	0:9b334a45a8ff	2164	* @}
bogdanm	0:9b334a45a8ff	2165	*/
bogdanm	0:9b334a45a8ff	2166
bogdanm	0:9b334a45a8ff	2167	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.c@129:2e517c56bcfb, 2016-05-16 (annotated)

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