fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
83:a036322b8637
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_uart_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 83:a036322b8637 5 * @version V1.0.4
mbed_official 83:a036322b8637 6 * @date 09-December-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of UART HAL Extension module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F7xx_HAL_UART_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F7xx_HAL_UART_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f7xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup UARTEx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 /** @defgroup UARTEx_Word_Length UARTEx Word Length
bogdanm 0:9b334a45a8ff 64 * @{
bogdanm 0:9b334a45a8ff 65 */
bogdanm 0:9b334a45a8ff 66 #define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M_1)
bogdanm 0:9b334a45a8ff 67 #define UART_WORDLENGTH_8B ((uint32_t)0x0000)
bogdanm 0:9b334a45a8ff 68 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M_0)
bogdanm 0:9b334a45a8ff 69 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
bogdanm 0:9b334a45a8ff 70 ((__LENGTH__) == UART_WORDLENGTH_8B) || \
bogdanm 0:9b334a45a8ff 71 ((__LENGTH__) == UART_WORDLENGTH_9B))
bogdanm 0:9b334a45a8ff 72 #define IS_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
bogdanm 0:9b334a45a8ff 73 /**
bogdanm 0:9b334a45a8ff 74 * @}
bogdanm 0:9b334a45a8ff 75 */
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
bogdanm 0:9b334a45a8ff 79 * @{
bogdanm 0:9b334a45a8ff 80 */
bogdanm 0:9b334a45a8ff 81 #define UART_ADDRESS_DETECT_4B ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 82 #define UART_ADDRESS_DETECT_7B ((uint32_t)USART_CR2_ADDM7)
bogdanm 0:9b334a45a8ff 83 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
bogdanm 0:9b334a45a8ff 84 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
bogdanm 0:9b334a45a8ff 85 /**
bogdanm 0:9b334a45a8ff 86 * @}
bogdanm 0:9b334a45a8ff 87 */
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 /**
bogdanm 0:9b334a45a8ff 91 * @}
bogdanm 0:9b334a45a8ff 92 */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 /** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros
bogdanm 0:9b334a45a8ff 97 * @{
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /** @brief Reports the UART clock source.
bogdanm 0:9b334a45a8ff 101 * @param __HANDLE__: specifies the UART Handle
bogdanm 0:9b334a45a8ff 102 * @param __CLOCKSOURCE__: output variable
bogdanm 0:9b334a45a8ff 103 * @retval UART clocking source, written in __CLOCKSOURCE__.
bogdanm 0:9b334a45a8ff 104 */
bogdanm 0:9b334a45a8ff 105 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 0:9b334a45a8ff 106 do { \
bogdanm 0:9b334a45a8ff 107 if((__HANDLE__)->Instance == USART1) \
bogdanm 0:9b334a45a8ff 108 { \
bogdanm 0:9b334a45a8ff 109 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 0:9b334a45a8ff 110 { \
bogdanm 0:9b334a45a8ff 111 case RCC_USART1CLKSOURCE_PCLK2: \
bogdanm 0:9b334a45a8ff 112 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
bogdanm 0:9b334a45a8ff 113 break; \
bogdanm 0:9b334a45a8ff 114 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 115 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 116 break; \
bogdanm 0:9b334a45a8ff 117 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 118 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 119 break; \
bogdanm 0:9b334a45a8ff 120 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 121 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 122 break; \
bogdanm 0:9b334a45a8ff 123 default: \
bogdanm 0:9b334a45a8ff 124 break; \
bogdanm 0:9b334a45a8ff 125 } \
bogdanm 0:9b334a45a8ff 126 } \
bogdanm 0:9b334a45a8ff 127 else if((__HANDLE__)->Instance == USART2) \
bogdanm 0:9b334a45a8ff 128 { \
bogdanm 0:9b334a45a8ff 129 switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm 0:9b334a45a8ff 130 { \
bogdanm 0:9b334a45a8ff 131 case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 132 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 133 break; \
bogdanm 0:9b334a45a8ff 134 case RCC_USART2CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 135 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 136 break; \
bogdanm 0:9b334a45a8ff 137 case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 138 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 139 break; \
bogdanm 0:9b334a45a8ff 140 case RCC_USART2CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 141 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 142 break; \
bogdanm 0:9b334a45a8ff 143 default: \
bogdanm 0:9b334a45a8ff 144 break; \
bogdanm 0:9b334a45a8ff 145 } \
bogdanm 0:9b334a45a8ff 146 } \
bogdanm 0:9b334a45a8ff 147 else if((__HANDLE__)->Instance == USART3) \
bogdanm 0:9b334a45a8ff 148 { \
bogdanm 0:9b334a45a8ff 149 switch(__HAL_RCC_GET_USART3_SOURCE()) \
bogdanm 0:9b334a45a8ff 150 { \
bogdanm 0:9b334a45a8ff 151 case RCC_USART3CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 152 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 153 break; \
bogdanm 0:9b334a45a8ff 154 case RCC_USART3CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 155 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 156 break; \
bogdanm 0:9b334a45a8ff 157 case RCC_USART3CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 158 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 159 break; \
bogdanm 0:9b334a45a8ff 160 case RCC_USART3CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 161 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 162 break; \
bogdanm 0:9b334a45a8ff 163 default: \
bogdanm 0:9b334a45a8ff 164 break; \
bogdanm 0:9b334a45a8ff 165 } \
bogdanm 0:9b334a45a8ff 166 } \
bogdanm 0:9b334a45a8ff 167 else if((__HANDLE__)->Instance == UART4) \
bogdanm 0:9b334a45a8ff 168 { \
bogdanm 0:9b334a45a8ff 169 switch(__HAL_RCC_GET_UART4_SOURCE()) \
bogdanm 0:9b334a45a8ff 170 { \
bogdanm 0:9b334a45a8ff 171 case RCC_UART4CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 172 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 173 break; \
bogdanm 0:9b334a45a8ff 174 case RCC_UART4CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 175 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 176 break; \
bogdanm 0:9b334a45a8ff 177 case RCC_UART4CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 178 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 179 break; \
bogdanm 0:9b334a45a8ff 180 case RCC_UART4CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 181 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 182 break; \
bogdanm 0:9b334a45a8ff 183 default: \
bogdanm 0:9b334a45a8ff 184 break; \
bogdanm 0:9b334a45a8ff 185 } \
bogdanm 0:9b334a45a8ff 186 } \
bogdanm 0:9b334a45a8ff 187 else if ((__HANDLE__)->Instance == UART5) \
bogdanm 0:9b334a45a8ff 188 { \
bogdanm 0:9b334a45a8ff 189 switch(__HAL_RCC_GET_UART5_SOURCE()) \
bogdanm 0:9b334a45a8ff 190 { \
bogdanm 0:9b334a45a8ff 191 case RCC_UART5CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 192 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 193 break; \
bogdanm 0:9b334a45a8ff 194 case RCC_UART5CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 195 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 196 break; \
bogdanm 0:9b334a45a8ff 197 case RCC_UART5CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 198 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 199 break; \
bogdanm 0:9b334a45a8ff 200 case RCC_UART5CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 201 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 202 break; \
bogdanm 0:9b334a45a8ff 203 default: \
bogdanm 0:9b334a45a8ff 204 break; \
bogdanm 0:9b334a45a8ff 205 } \
bogdanm 0:9b334a45a8ff 206 } \
bogdanm 0:9b334a45a8ff 207 else if((__HANDLE__)->Instance == USART6) \
bogdanm 0:9b334a45a8ff 208 { \
bogdanm 0:9b334a45a8ff 209 switch(__HAL_RCC_GET_USART6_SOURCE()) \
bogdanm 0:9b334a45a8ff 210 { \
bogdanm 0:9b334a45a8ff 211 case RCC_USART6CLKSOURCE_PCLK2: \
bogdanm 0:9b334a45a8ff 212 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
bogdanm 0:9b334a45a8ff 213 break; \
bogdanm 0:9b334a45a8ff 214 case RCC_USART6CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 215 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 216 break; \
bogdanm 0:9b334a45a8ff 217 case RCC_USART6CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 218 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 219 break; \
bogdanm 0:9b334a45a8ff 220 case RCC_USART6CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 221 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 222 break; \
bogdanm 0:9b334a45a8ff 223 default: \
bogdanm 0:9b334a45a8ff 224 break; \
bogdanm 0:9b334a45a8ff 225 } \
bogdanm 0:9b334a45a8ff 226 } \
bogdanm 0:9b334a45a8ff 227 else if ((__HANDLE__)->Instance == UART7) \
bogdanm 0:9b334a45a8ff 228 { \
bogdanm 0:9b334a45a8ff 229 switch(__HAL_RCC_GET_UART7_SOURCE()) \
bogdanm 0:9b334a45a8ff 230 { \
bogdanm 0:9b334a45a8ff 231 case RCC_UART7CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 232 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 233 break; \
bogdanm 0:9b334a45a8ff 234 case RCC_UART7CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 235 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 236 break; \
bogdanm 0:9b334a45a8ff 237 case RCC_UART7CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 238 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 239 break; \
bogdanm 0:9b334a45a8ff 240 case RCC_UART7CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 241 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 242 break; \
bogdanm 0:9b334a45a8ff 243 default: \
bogdanm 0:9b334a45a8ff 244 break; \
bogdanm 0:9b334a45a8ff 245 } \
bogdanm 0:9b334a45a8ff 246 } \
bogdanm 0:9b334a45a8ff 247 else if ((__HANDLE__)->Instance == UART8) \
bogdanm 0:9b334a45a8ff 248 { \
bogdanm 0:9b334a45a8ff 249 switch(__HAL_RCC_GET_UART8_SOURCE()) \
bogdanm 0:9b334a45a8ff 250 { \
bogdanm 0:9b334a45a8ff 251 case RCC_UART8CLKSOURCE_PCLK1: \
bogdanm 0:9b334a45a8ff 252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 0:9b334a45a8ff 253 break; \
bogdanm 0:9b334a45a8ff 254 case RCC_UART8CLKSOURCE_HSI: \
bogdanm 0:9b334a45a8ff 255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 0:9b334a45a8ff 256 break; \
bogdanm 0:9b334a45a8ff 257 case RCC_UART8CLKSOURCE_SYSCLK: \
bogdanm 0:9b334a45a8ff 258 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 0:9b334a45a8ff 259 break; \
bogdanm 0:9b334a45a8ff 260 case RCC_UART8CLKSOURCE_LSE: \
bogdanm 0:9b334a45a8ff 261 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 0:9b334a45a8ff 262 break; \
bogdanm 0:9b334a45a8ff 263 default: \
bogdanm 0:9b334a45a8ff 264 break; \
bogdanm 0:9b334a45a8ff 265 } \
bogdanm 0:9b334a45a8ff 266 } \
bogdanm 0:9b334a45a8ff 267 } while(0)
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /** @brief Reports the UART mask to apply to retrieve the received data
bogdanm 0:9b334a45a8ff 270 * according to the word length and to the parity bits activation.
bogdanm 0:9b334a45a8ff 271 * If PCE = 1, the parity bit is not included in the data extracted
bogdanm 0:9b334a45a8ff 272 * by the reception API().
bogdanm 0:9b334a45a8ff 273 * This masking operation is not carried out in the case of
bogdanm 0:9b334a45a8ff 274 * DMA transfers.
bogdanm 0:9b334a45a8ff 275 * @param __HANDLE__: specifies the UART Handle
bogdanm 0:9b334a45a8ff 276 * @retval mask to apply to UART RDR register value.
bogdanm 0:9b334a45a8ff 277 */
bogdanm 0:9b334a45a8ff 278 #define UART_MASK_COMPUTATION(__HANDLE__) \
bogdanm 0:9b334a45a8ff 279 do { \
bogdanm 0:9b334a45a8ff 280 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
bogdanm 0:9b334a45a8ff 281 { \
bogdanm 0:9b334a45a8ff 282 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 283 { \
bogdanm 0:9b334a45a8ff 284 (__HANDLE__)->Mask = 0x01FF ; \
bogdanm 0:9b334a45a8ff 285 } \
bogdanm 0:9b334a45a8ff 286 else \
bogdanm 0:9b334a45a8ff 287 { \
bogdanm 0:9b334a45a8ff 288 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 0:9b334a45a8ff 289 } \
bogdanm 0:9b334a45a8ff 290 } \
bogdanm 0:9b334a45a8ff 291 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
bogdanm 0:9b334a45a8ff 292 { \
bogdanm 0:9b334a45a8ff 293 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 294 { \
bogdanm 0:9b334a45a8ff 295 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 0:9b334a45a8ff 296 } \
bogdanm 0:9b334a45a8ff 297 else \
bogdanm 0:9b334a45a8ff 298 { \
bogdanm 0:9b334a45a8ff 299 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 0:9b334a45a8ff 300 } \
bogdanm 0:9b334a45a8ff 301 } \
bogdanm 0:9b334a45a8ff 302 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
bogdanm 0:9b334a45a8ff 303 { \
bogdanm 0:9b334a45a8ff 304 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 0:9b334a45a8ff 305 { \
bogdanm 0:9b334a45a8ff 306 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 0:9b334a45a8ff 307 } \
bogdanm 0:9b334a45a8ff 308 else \
bogdanm 0:9b334a45a8ff 309 { \
bogdanm 0:9b334a45a8ff 310 (__HANDLE__)->Mask = 0x003F ; \
bogdanm 0:9b334a45a8ff 311 } \
bogdanm 0:9b334a45a8ff 312 } \
bogdanm 0:9b334a45a8ff 313 } while(0)
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 /**
bogdanm 0:9b334a45a8ff 316 * @}
bogdanm 0:9b334a45a8ff 317 */
bogdanm 0:9b334a45a8ff 318
bogdanm 0:9b334a45a8ff 319 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /**
bogdanm 0:9b334a45a8ff 322 * @}
bogdanm 0:9b334a45a8ff 323 */
bogdanm 0:9b334a45a8ff 324
bogdanm 0:9b334a45a8ff 325 /**
bogdanm 0:9b334a45a8ff 326 * @}
bogdanm 0:9b334a45a8ff 327 */
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 330 }
bogdanm 0:9b334a45a8ff 331 #endif
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 #endif /* __STM32F7xx_HAL_UART_EX_H */
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/