en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_spdifrx.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
83:a036322b8637 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_spdifrx.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 83:a036322b8637 5 * @version V1.0.4
mbed_official 83:a036322b8637 6 * @date 09-December-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of SPDIFRX HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F7xx_HAL_SPDIFRX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F7xx_HAL_SPDIFRX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f7xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup SPDIFRX
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief SPDIFRX Init structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65 typedef struct
bogdanm 0:9b334a45a8ff 66 {
bogdanm 0:9b334a45a8ff 67 uint32_t InputSelection; /*!< Specifies the SPDIF input selection.
bogdanm 0:9b334a45a8ff 68 This parameter can be a value of @ref SPDIFRX_Input_Selection */
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase.
bogdanm 0:9b334a45a8ff 71 This parameter can be a value of @ref SPDIFRX_Max_Retries */
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input.
bogdanm 0:9b334a45a8ff 74 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B.
bogdanm 0:9b334a45a8ff 77 This parameter can be a value of @ref SPDIFRX_Channel_Selection */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
bogdanm 0:9b334a45a8ff 80 This parameter can be a value of @ref SPDIFRX_Data_Format */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
bogdanm 0:9b334a45a8ff 83 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
bogdanm 0:9b334a45a8ff 86 This parameter can be a value of @ref SPDIFRX_PT_Mask */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
bogdanm 0:9b334a45a8ff 89 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
bogdanm 0:9b334a45a8ff 92 This parameter can be a value of @ref SPDIFRX_V_Mask */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
bogdanm 0:9b334a45a8ff 95 This parameter can be a value of @ref SPDIFRX_PE_Mask */
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 }SPDIFRX_InitTypeDef;
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /**
bogdanm 0:9b334a45a8ff 100 * @brief SPDIFRX SetDataFormat structure definition
bogdanm 0:9b334a45a8ff 101 */
bogdanm 0:9b334a45a8ff 102 typedef struct
bogdanm 0:9b334a45a8ff 103 {
bogdanm 0:9b334a45a8ff 104 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
bogdanm 0:9b334a45a8ff 105 This parameter can be a value of @ref SPDIFRX_Data_Format */
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
bogdanm 0:9b334a45a8ff 108 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
bogdanm 0:9b334a45a8ff 111 This parameter can be a value of @ref SPDIFRX_PT_Mask */
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
bogdanm 0:9b334a45a8ff 114 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
bogdanm 0:9b334a45a8ff 117 This parameter can be a value of @ref SPDIFRX_V_Mask */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
bogdanm 0:9b334a45a8ff 120 This parameter can be a value of @ref SPDIFRX_PE_Mask */
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 }SPDIFRX_SetDataFormatTypeDef;
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /**
bogdanm 0:9b334a45a8ff 125 * @brief HAL State structures definition
bogdanm 0:9b334a45a8ff 126 */
bogdanm 0:9b334a45a8ff 127 typedef enum
bogdanm 0:9b334a45a8ff 128 {
bogdanm 0:9b334a45a8ff 129 HAL_SPDIFRX_STATE_RESET = 0x00, /*!< SPDIFRX not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 130 HAL_SPDIFRX_STATE_READY = 0x01, /*!< SPDIFRX initialized and ready for use */
bogdanm 0:9b334a45a8ff 131 HAL_SPDIFRX_STATE_BUSY = 0x02, /*!< SPDIFRX internal process is ongoing */
bogdanm 0:9b334a45a8ff 132 HAL_SPDIFRX_STATE_BUSY_RX = 0x03, /*!< SPDIFRX internal Data Flow RX process is ongoing */
bogdanm 0:9b334a45a8ff 133 HAL_SPDIFRX_STATE_BUSY_CX = 0x04, /*!< SPDIFRX internal Control Flow RX process is ongoing */
bogdanm 0:9b334a45a8ff 134 HAL_SPDIFRX_STATE_ERROR = 0x07 /*!< SPDIFRX error state */
bogdanm 0:9b334a45a8ff 135 }HAL_SPDIFRX_StateTypeDef;
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 /**
bogdanm 0:9b334a45a8ff 138 * @brief SPDIFRX handle Structure definition
bogdanm 0:9b334a45a8ff 139 */
bogdanm 0:9b334a45a8ff 140 typedef struct
bogdanm 0:9b334a45a8ff 141 {
bogdanm 0:9b334a45a8ff 142 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter
bogdanm 0:9b334a45a8ff 153 (This field is initialized at the
bogdanm 0:9b334a45a8ff 154 same value as transfer size at the
bogdanm 0:9b334a45a8ff 155 beginning of the transfer and
bogdanm 0:9b334a45a8ff 156 decremented when a sample is received.
bogdanm 0:9b334a45a8ff 157 NbSamplesReceived = RxBufferSize-RxBufferCount) */
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter
bogdanm 0:9b334a45a8ff 162 (This field is initialized at the
bogdanm 0:9b334a45a8ff 163 same value as transfer size at the
bogdanm 0:9b334a45a8ff 164 beginning of the transfer and
bogdanm 0:9b334a45a8ff 165 decremented when a sample is received.
bogdanm 0:9b334a45a8ff 166 NbSamplesReceived = RxBufferSize-RxBufferCount) */
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 __IO uint32_t ErrorCode; /* SPDIFRX Error code */
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 }SPDIFRX_HandleTypeDef;
bogdanm 0:9b334a45a8ff 179 /**
bogdanm 0:9b334a45a8ff 180 * @}
bogdanm 0:9b334a45a8ff 181 */
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 184 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants
bogdanm 0:9b334a45a8ff 185 * @{
bogdanm 0:9b334a45a8ff 186 */
bogdanm 0:9b334a45a8ff 187 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code
bogdanm 0:9b334a45a8ff 188 * @{
bogdanm 0:9b334a45a8ff 189 */
bogdanm 0:9b334a45a8ff 190 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
bogdanm 0:9b334a45a8ff 191 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */
bogdanm 0:9b334a45a8ff 192 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002) /*!< OVR error */
bogdanm 0:9b334a45a8ff 193 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004) /*!< Parity error */
bogdanm 0:9b334a45a8ff 194 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008) /*!< DMA transfer error */
bogdanm 0:9b334a45a8ff 195 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010) /*!< Unknown Error error */
bogdanm 0:9b334a45a8ff 196 /**
bogdanm 0:9b334a45a8ff 197 * @}
bogdanm 0:9b334a45a8ff 198 */
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection
bogdanm 0:9b334a45a8ff 201 * @{
bogdanm 0:9b334a45a8ff 202 */
bogdanm 0:9b334a45a8ff 203 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 204 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000)
bogdanm 0:9b334a45a8ff 205 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000)
bogdanm 0:9b334a45a8ff 206 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000)
bogdanm 0:9b334a45a8ff 207 /**
bogdanm 0:9b334a45a8ff 208 * @}
bogdanm 0:9b334a45a8ff 209 */
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries
bogdanm 0:9b334a45a8ff 212 * @{
bogdanm 0:9b334a45a8ff 213 */
bogdanm 0:9b334a45a8ff 214 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 215 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000)
bogdanm 0:9b334a45a8ff 216 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000)
bogdanm 0:9b334a45a8ff 217 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000)
bogdanm 0:9b334a45a8ff 218 /**
bogdanm 0:9b334a45a8ff 219 * @}
bogdanm 0:9b334a45a8ff 220 */
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity
bogdanm 0:9b334a45a8ff 223 * @{
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 226 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA)
bogdanm 0:9b334a45a8ff 227 /**
bogdanm 0:9b334a45a8ff 228 * @}
bogdanm 0:9b334a45a8ff 229 */
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask
bogdanm 0:9b334a45a8ff 232 * @{
bogdanm 0:9b334a45a8ff 233 */
bogdanm 0:9b334a45a8ff 234 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 235 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK)
bogdanm 0:9b334a45a8ff 236 /**
bogdanm 0:9b334a45a8ff 237 * @}
bogdanm 0:9b334a45a8ff 238 */
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask
bogdanm 0:9b334a45a8ff 241 * @{
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000) /* The channel status and user bits are copied into the SPDIF_DR */
bogdanm 0:9b334a45a8ff 244 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
bogdanm 0:9b334a45a8ff 245 /**
bogdanm 0:9b334a45a8ff 246 * @}
bogdanm 0:9b334a45a8ff 247 */
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask
bogdanm 0:9b334a45a8ff 250 * @{
bogdanm 0:9b334a45a8ff 251 */
bogdanm 0:9b334a45a8ff 252 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 253 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK)
bogdanm 0:9b334a45a8ff 254 /**
bogdanm 0:9b334a45a8ff 255 * @}
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask
bogdanm 0:9b334a45a8ff 259 * @{
bogdanm 0:9b334a45a8ff 260 */
bogdanm 0:9b334a45a8ff 261 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 262 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK)
bogdanm 0:9b334a45a8ff 263 /**
bogdanm 0:9b334a45a8ff 264 * @}
bogdanm 0:9b334a45a8ff 265 */
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection
bogdanm 0:9b334a45a8ff 268 * @{
bogdanm 0:9b334a45a8ff 269 */
bogdanm 0:9b334a45a8ff 270 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 271 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL)
bogdanm 0:9b334a45a8ff 272 /**
bogdanm 0:9b334a45a8ff 273 * @}
bogdanm 0:9b334a45a8ff 274 */
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format
bogdanm 0:9b334a45a8ff 277 * @{
bogdanm 0:9b334a45a8ff 278 */
bogdanm 0:9b334a45a8ff 279 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 280 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010)
bogdanm 0:9b334a45a8ff 281 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020)
bogdanm 0:9b334a45a8ff 282 /**
bogdanm 0:9b334a45a8ff 283 * @}
bogdanm 0:9b334a45a8ff 284 */
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode
bogdanm 0:9b334a45a8ff 287 * @{
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 290 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO)
bogdanm 0:9b334a45a8ff 291 /**
bogdanm 0:9b334a45a8ff 292 * @}
bogdanm 0:9b334a45a8ff 293 */
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 /** @defgroup SPDIFRX_State SPDIFRX State
bogdanm 0:9b334a45a8ff 296 * @{
bogdanm 0:9b334a45a8ff 297 */
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFC)
bogdanm 0:9b334a45a8ff 300 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 301 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN)
bogdanm 0:9b334a45a8ff 302 /**
bogdanm 0:9b334a45a8ff 303 * @}
bogdanm 0:9b334a45a8ff 304 */
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition
bogdanm 0:9b334a45a8ff 307 * @{
bogdanm 0:9b334a45a8ff 308 */
bogdanm 0:9b334a45a8ff 309 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE)
bogdanm 0:9b334a45a8ff 310 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE)
bogdanm 0:9b334a45a8ff 311 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE)
bogdanm 0:9b334a45a8ff 312 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE)
bogdanm 0:9b334a45a8ff 313 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE)
bogdanm 0:9b334a45a8ff 314 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE)
bogdanm 0:9b334a45a8ff 315 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE )
bogdanm 0:9b334a45a8ff 316 /**
bogdanm 0:9b334a45a8ff 317 * @}
bogdanm 0:9b334a45a8ff 318 */
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition
bogdanm 0:9b334a45a8ff 321 * @{
bogdanm 0:9b334a45a8ff 322 */
bogdanm 0:9b334a45a8ff 323 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE)
bogdanm 0:9b334a45a8ff 324 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE)
bogdanm 0:9b334a45a8ff 325 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR)
bogdanm 0:9b334a45a8ff 326 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR)
bogdanm 0:9b334a45a8ff 327 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD)
bogdanm 0:9b334a45a8ff 328 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD)
bogdanm 0:9b334a45a8ff 329 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR)
bogdanm 0:9b334a45a8ff 330 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR)
bogdanm 0:9b334a45a8ff 331 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR)
bogdanm 0:9b334a45a8ff 332 /**
bogdanm 0:9b334a45a8ff 333 * @}
bogdanm 0:9b334a45a8ff 334 */
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 /**
bogdanm 0:9b334a45a8ff 337 * @}
bogdanm 0:9b334a45a8ff 338 */
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 /* Exported macros -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 341 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros
bogdanm 0:9b334a45a8ff 342 * @{
bogdanm 0:9b334a45a8ff 343 */
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /** @brief Reset SPDIFRX handle state
bogdanm 0:9b334a45a8ff 346 * @param __HANDLE__: SPDIFRX handle.
bogdanm 0:9b334a45a8ff 347 * @retval None
bogdanm 0:9b334a45a8ff 348 */
bogdanm 0:9b334a45a8ff 349 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = (uint16_t)SPDIFRX_CR_SPDIFEN)
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 /** @brief Disable the specified SPDIFRX peripheral (IDLE State).
bogdanm 0:9b334a45a8ff 352 * @param __HANDLE__: specifies the SPDIFRX Handle.
bogdanm 0:9b334a45a8ff 353 * @retval None
bogdanm 0:9b334a45a8ff 354 */
bogdanm 0:9b334a45a8ff 355 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /** @brief Enable the specified SPDIFRX peripheral (SYNC State).
bogdanm 0:9b334a45a8ff 358 * @param __HANDLE__: specifies the SPDIFRX Handle.
bogdanm 0:9b334a45a8ff 359 * @retval None
bogdanm 0:9b334a45a8ff 360 */
bogdanm 0:9b334a45a8ff 361 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 /** @brief Enable the specified SPDIFRX peripheral (RCV State).
bogdanm 0:9b334a45a8ff 365 * @param __HANDLE__: specifies the SPDIFRX Handle.
bogdanm 0:9b334a45a8ff 366 * @retval None
bogdanm 0:9b334a45a8ff 367 */
bogdanm 0:9b334a45a8ff 368 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
bogdanm 0:9b334a45a8ff 369
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 /** @brief Enable or disable the specified SPDIFRX interrupts.
bogdanm 0:9b334a45a8ff 372 * @param __HANDLE__: specifies the SPDIFRX Handle.
bogdanm 0:9b334a45a8ff 373 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 0:9b334a45a8ff 374 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 375 * @arg SPDIFRX_IT_RXNE
bogdanm 0:9b334a45a8ff 376 * @arg SPDIFRX_IT_CSRNE
bogdanm 0:9b334a45a8ff 377 * @arg SPDIFRX_IT_PERRIE
bogdanm 0:9b334a45a8ff 378 * @arg SPDIFRX_IT_OVRIE
bogdanm 0:9b334a45a8ff 379 * @arg SPDIFRX_IT_SBLKIE
bogdanm 0:9b334a45a8ff 380 * @arg SPDIFRX_IT_SYNCDIE
bogdanm 0:9b334a45a8ff 381 * @arg SPDIFRX_IT_IFEIE
bogdanm 0:9b334a45a8ff 382 * @retval None
bogdanm 0:9b334a45a8ff 383 */
bogdanm 0:9b334a45a8ff 384 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 385 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__)))
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled.
bogdanm 0:9b334a45a8ff 388 * @param __HANDLE__: specifies the SPDIFRX Handle.
bogdanm 0:9b334a45a8ff 389 * @param __INTERRUPT__: specifies the SPDIFRX interrupt source to check.
bogdanm 0:9b334a45a8ff 390 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 391 * @arg SPDIFRX_IT_RXNE
bogdanm 0:9b334a45a8ff 392 * @arg SPDIFRX_IT_CSRNE
bogdanm 0:9b334a45a8ff 393 * @arg SPDIFRX_IT_PERRIE
bogdanm 0:9b334a45a8ff 394 * @arg SPDIFRX_IT_OVRIE
bogdanm 0:9b334a45a8ff 395 * @arg SPDIFRX_IT_SBLKIE
bogdanm 0:9b334a45a8ff 396 * @arg SPDIFRX_IT_SYNCDIE
bogdanm 0:9b334a45a8ff 397 * @arg SPDIFRX_IT_IFEIE
bogdanm 0:9b334a45a8ff 398 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 399 */
bogdanm 0:9b334a45a8ff 400 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 0:9b334a45a8ff 401
bogdanm 0:9b334a45a8ff 402 /** @brief Checks whether the specified SPDIFRX flag is set or not.
bogdanm 0:9b334a45a8ff 403 * @param __HANDLE__: specifies the SPDIFRX Handle.
bogdanm 0:9b334a45a8ff 404 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 405 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 406 * @arg SPDIFRX_FLAG_RXNE
bogdanm 0:9b334a45a8ff 407 * @arg SPDIFRX_FLAG_CSRNE
bogdanm 0:9b334a45a8ff 408 * @arg SPDIFRX_FLAG_PERR
bogdanm 0:9b334a45a8ff 409 * @arg SPDIFRX_FLAG_OVR
bogdanm 0:9b334a45a8ff 410 * @arg SPDIFRX_FLAG_SBD
bogdanm 0:9b334a45a8ff 411 * @arg SPDIFRX_FLAG_SYNCD
bogdanm 0:9b334a45a8ff 412 * @arg SPDIFRX_FLAG_FERR
bogdanm 0:9b334a45a8ff 413 * @arg SPDIFRX_FLAG_SERR
bogdanm 0:9b334a45a8ff 414 * @arg SPDIFRX_FLAG_TERR
bogdanm 0:9b334a45a8ff 415 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 416 */
bogdanm 0:9b334a45a8ff 417 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
bogdanm 0:9b334a45a8ff 420 * @param __HANDLE__: specifies the USART Handle.
bogdanm 0:9b334a45a8ff 421 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
bogdanm 0:9b334a45a8ff 422 * to clear the corresponding interrupt
bogdanm 0:9b334a45a8ff 423 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 424 * @arg SPDIFRX_FLAG_PERR
bogdanm 0:9b334a45a8ff 425 * @arg SPDIFRX_FLAG_OVR
bogdanm 0:9b334a45a8ff 426 * @arg SPDIFRX_SR_SBD
bogdanm 0:9b334a45a8ff 427 * @arg SPDIFRX_SR_SYNCD
bogdanm 0:9b334a45a8ff 428 * @retval None
bogdanm 0:9b334a45a8ff 429 */
bogdanm 0:9b334a45a8ff 430 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 /**
bogdanm 0:9b334a45a8ff 433 * @}
bogdanm 0:9b334a45a8ff 434 */
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 437 /** @addtogroup SPDIFRX_Exported_Functions
bogdanm 0:9b334a45a8ff 438 * @{
bogdanm 0:9b334a45a8ff 439 */
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 /** @addtogroup SPDIFRX_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 442 * @{
bogdanm 0:9b334a45a8ff 443 */
bogdanm 0:9b334a45a8ff 444 /* Initialization/de-initialization functions **********************************/
bogdanm 0:9b334a45a8ff 445 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 446 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 447 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 448 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 449 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat);
bogdanm 0:9b334a45a8ff 450 /**
bogdanm 0:9b334a45a8ff 451 * @}
bogdanm 0:9b334a45a8ff 452 */
bogdanm 0:9b334a45a8ff 453
bogdanm 0:9b334a45a8ff 454 /** @addtogroup SPDIFRX_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 455 * @{
bogdanm 0:9b334a45a8ff 456 */
bogdanm 0:9b334a45a8ff 457 /* I/O operation functions ***************************************************/
bogdanm 0:9b334a45a8ff 458 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 459 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 460 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 463 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 464 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 465 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 466
bogdanm 0:9b334a45a8ff 467 /* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 468 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 469 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
bogdanm 0:9b334a45a8ff 474 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 475 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 476 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 477 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 478 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 479 /**
bogdanm 0:9b334a45a8ff 480 * @}
bogdanm 0:9b334a45a8ff 481 */
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 /** @addtogroup SPDIFRX_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 484 * @{
bogdanm 0:9b334a45a8ff 485 */
bogdanm 0:9b334a45a8ff 486 /* Peripheral Control and State functions ************************************/
bogdanm 0:9b334a45a8ff 487 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 488 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif);
bogdanm 0:9b334a45a8ff 489 /**
bogdanm 0:9b334a45a8ff 490 * @}
bogdanm 0:9b334a45a8ff 491 */
bogdanm 0:9b334a45a8ff 492
bogdanm 0:9b334a45a8ff 493 /**
bogdanm 0:9b334a45a8ff 494 * @}
bogdanm 0:9b334a45a8ff 495 */
bogdanm 0:9b334a45a8ff 496 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 497 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 498 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 499 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 500 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros
bogdanm 0:9b334a45a8ff 501 * @{
bogdanm 0:9b334a45a8ff 502 */
bogdanm 0:9b334a45a8ff 503 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \
bogdanm 0:9b334a45a8ff 504 ((INPUT) == SPDIFRX_INPUT_IN2) || \
bogdanm 0:9b334a45a8ff 505 ((INPUT) == SPDIFRX_INPUT_IN3) || \
bogdanm 0:9b334a45a8ff 506 ((INPUT) == SPDIFRX_INPUT_IN0))
bogdanm 0:9b334a45a8ff 507 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
bogdanm 0:9b334a45a8ff 508 ((RET) == SPDIFRX_MAXRETRIES_3) || \
bogdanm 0:9b334a45a8ff 509 ((RET) == SPDIFRX_MAXRETRIES_15) || \
bogdanm 0:9b334a45a8ff 510 ((RET) == SPDIFRX_MAXRETRIES_63))
bogdanm 0:9b334a45a8ff 511 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
bogdanm 0:9b334a45a8ff 512 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
bogdanm 0:9b334a45a8ff 513 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
bogdanm 0:9b334a45a8ff 514 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
bogdanm 0:9b334a45a8ff 515 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
bogdanm 0:9b334a45a8ff 516 ((VAL) == SPDIFRX_VALIDITYMASK_ON))
bogdanm 0:9b334a45a8ff 517 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
bogdanm 0:9b334a45a8ff 518 ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
bogdanm 0:9b334a45a8ff 519 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
bogdanm 0:9b334a45a8ff 520 ((CHANNEL) == SPDIFRX_CHANNEL_B))
bogdanm 0:9b334a45a8ff 521 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
bogdanm 0:9b334a45a8ff 522 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
bogdanm 0:9b334a45a8ff 523 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
bogdanm 0:9b334a45a8ff 524 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
bogdanm 0:9b334a45a8ff 525 ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
bogdanm 0:9b334a45a8ff 528 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
bogdanm 0:9b334a45a8ff 529 /**
bogdanm 0:9b334a45a8ff 530 * @}
bogdanm 0:9b334a45a8ff 531 */
bogdanm 0:9b334a45a8ff 532
bogdanm 0:9b334a45a8ff 533 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 534 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions
bogdanm 0:9b334a45a8ff 535 * @{
bogdanm 0:9b334a45a8ff 536 */
bogdanm 0:9b334a45a8ff 537 /**
bogdanm 0:9b334a45a8ff 538 * @}
bogdanm 0:9b334a45a8ff 539 */
bogdanm 0:9b334a45a8ff 540
bogdanm 0:9b334a45a8ff 541 /**
bogdanm 0:9b334a45a8ff 542 * @}
bogdanm 0:9b334a45a8ff 543 */
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /**
bogdanm 0:9b334a45a8ff 546 * @}
bogdanm 0:9b334a45a8ff 547 */
bogdanm 0:9b334a45a8ff 548
bogdanm 0:9b334a45a8ff 549 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 550 }
bogdanm 0:9b334a45a8ff 551 #endif
bogdanm 0:9b334a45a8ff 552
bogdanm 0:9b334a45a8ff 553
bogdanm 0:9b334a45a8ff 554 #endif /* __STM32F7xx_HAL_SPDIFRX_H */
bogdanm 0:9b334a45a8ff 555
bogdanm 0:9b334a45a8ff 556 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/