mbed-dev - fix LPC812 PWM

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fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_hash_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 83:a036322b8637

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f7xx_hal_hash_ex.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	83:a036322b8637	5	* @version V1.0.4
mbed_official	83:a036322b8637	6	* @date 09-December-2015
bogdanm	0:9b334a45a8ff	7	* @brief HASH HAL Extension module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of HASH peripheral:
bogdanm	0:9b334a45a8ff	10	* + Extended HASH processing functions based on SHA224 Algorithm
bogdanm	0:9b334a45a8ff	11	* + Extended HASH processing functions based on SHA256 Algorithm
bogdanm	0:9b334a45a8ff	12	*
bogdanm	0:9b334a45a8ff	13	@verbatim
bogdanm	0:9b334a45a8ff	14	==============================================================================
bogdanm	0:9b334a45a8ff	15	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	16	==============================================================================
bogdanm	0:9b334a45a8ff	17	[..]
bogdanm	0:9b334a45a8ff	18	The HASH HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	19	(#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit():
bogdanm	0:9b334a45a8ff	20	(##) Enable the HASH interface clock using __HAL_RCC_HASH_CLK_ENABLE()
bogdanm	0:9b334a45a8ff	21	(##) In case of using processing APIs based on interrupts (e.g. HAL_HMACEx_SHA224_Start())
bogdanm	0:9b334a45a8ff	22	(+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority()
bogdanm	0:9b334a45a8ff	23	(+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ()
bogdanm	0:9b334a45a8ff	24	(+++) In HASH IRQ handler, call HAL_HASH_IRQHandler()
bogdanm	0:9b334a45a8ff	25	(##) In case of using DMA to control data transfer (e.g. HAL_HMACEx_SH224_Start_DMA())
bogdanm	0:9b334a45a8ff	26	(+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
bogdanm	0:9b334a45a8ff	27	(+++) Configure and enable one DMA stream one for managing data transfer from
bogdanm	0:9b334a45a8ff	28	memory to peripheral (input stream). Managing data transfer from
bogdanm	0:9b334a45a8ff	29	peripheral to memory can be performed only using CPU
bogdanm	0:9b334a45a8ff	30	(+++) Associate the initialized DMA handle to the HASH DMA handle
bogdanm	0:9b334a45a8ff	31	using __HAL_LINKDMA()
bogdanm	0:9b334a45a8ff	32	(+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm	0:9b334a45a8ff	33	interrupt on the DMA Stream: HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
bogdanm	0:9b334a45a8ff	34	(#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly:
bogdanm	0:9b334a45a8ff	35	(##) The data type: 1-bit, 8-bit, 16-bit and 32-bit.
bogdanm	0:9b334a45a8ff	36	(##) For HMAC, the encryption key.
bogdanm	0:9b334a45a8ff	37	(##) For HMAC, the key size used for encryption.
bogdanm	0:9b334a45a8ff	38	(#)Three processing functions are available:
bogdanm	0:9b334a45a8ff	39	(##) Polling mode: processing APIs are blocking functions
bogdanm	0:9b334a45a8ff	40	i.e. they process the data and wait till the digest computation is finished
bogdanm	0:9b334a45a8ff	41	e.g. HAL_HASHEx_SHA224_Start()
bogdanm	0:9b334a45a8ff	42	(##) Interrupt mode: encryption and decryption APIs are not blocking functions
bogdanm	0:9b334a45a8ff	43	i.e. they process the data under interrupt
bogdanm	0:9b334a45a8ff	44	e.g. HAL_HASHEx_SHA224_Start_IT()
bogdanm	0:9b334a45a8ff	45	(##) DMA mode: processing APIs are not blocking functions and the CPU is
bogdanm	0:9b334a45a8ff	46	not used for data transfer i.e. the data transfer is ensured by DMA
bogdanm	0:9b334a45a8ff	47	e.g. HAL_HASHEx_SHA224_Start_DMA()
bogdanm	0:9b334a45a8ff	48	(#)When the processing function is called at first time after HAL_HASH_Init()
bogdanm	0:9b334a45a8ff	49	the HASH peripheral is initialized and processes the buffer in input.
bogdanm	0:9b334a45a8ff	50	After that, the digest computation is started.
bogdanm	0:9b334a45a8ff	51	When processing multi-buffer use the accumulate function to write the
bogdanm	0:9b334a45a8ff	52	data in the peripheral without starting the digest computation. In last
bogdanm	0:9b334a45a8ff	53	buffer use the start function to input the last buffer ans start the digest
bogdanm	0:9b334a45a8ff	54	computation.
bogdanm	0:9b334a45a8ff	55	(##) e.g. HAL_HASHEx_SHA224_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation
bogdanm	0:9b334a45a8ff	56	(##) write (n-1)th data buffer in the peripheral without starting the digest computation
bogdanm	0:9b334a45a8ff	57	(##) HAL_HASHEx_SHA224_Start() : write (n)th data buffer in the peripheral and start the digest computation
bogdanm	0:9b334a45a8ff	58	(#)In HMAC mode, there is no Accumulate API. Only Start API is available.
bogdanm	0:9b334a45a8ff	59	(#)In case of using DMA, call the DMA start processing e.g. HAL_HASHEx_SHA224_Start_DMA().
bogdanm	0:9b334a45a8ff	60	After that, call the finish function in order to get the digest value
bogdanm	0:9b334a45a8ff	61	e.g. HAL_HASHEx_SHA224_Finish()
bogdanm	0:9b334a45a8ff	62	(#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral.
bogdanm	0:9b334a45a8ff	63
bogdanm	0:9b334a45a8ff	64	@endverbatim
bogdanm	0:9b334a45a8ff	65	******************************************************************************
bogdanm	0:9b334a45a8ff	66	* @attention
bogdanm	0:9b334a45a8ff	67	*
bogdanm	0:9b334a45a8ff	68	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	69	*
bogdanm	0:9b334a45a8ff	70	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	71	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	72	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	73	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	74	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	75	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	76	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	77	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	78	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	79	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	80	*
bogdanm	0:9b334a45a8ff	81	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	82	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	83	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	84	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	85	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	86	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	87	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	88	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	89	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	90	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	91	*
bogdanm	0:9b334a45a8ff	92	******************************************************************************
bogdanm	0:9b334a45a8ff	93	*/
bogdanm	0:9b334a45a8ff	94
bogdanm	0:9b334a45a8ff	95	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	96	#include "stm32f7xx_hal.h"
bogdanm	0:9b334a45a8ff	97
bogdanm	0:9b334a45a8ff	98	/** @addtogroup STM32F7xx_HAL_Driver
bogdanm	0:9b334a45a8ff	99	* @{
bogdanm	0:9b334a45a8ff	100	*/
bogdanm	0:9b334a45a8ff	101	#if defined(STM32F756xx)
bogdanm	0:9b334a45a8ff	102
bogdanm	0:9b334a45a8ff	103	/** @defgroup HASHEx HASHEx
bogdanm	0:9b334a45a8ff	104	* @brief HASH Extension HAL module driver.
bogdanm	0:9b334a45a8ff	105	* @{
bogdanm	0:9b334a45a8ff	106	*/
bogdanm	0:9b334a45a8ff	107
bogdanm	0:9b334a45a8ff	108	#ifdef HAL_HASH_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	109
bogdanm	0:9b334a45a8ff	110	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	111	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	112	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	113	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	114	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	115	/** @addtogroup HASHEx_Private_Functions
bogdanm	0:9b334a45a8ff	116	* @{
bogdanm	0:9b334a45a8ff	117	*/
bogdanm	0:9b334a45a8ff	118	static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	119	static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size);
bogdanm	0:9b334a45a8ff	120	static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
bogdanm	0:9b334a45a8ff	121	static void HASHEx_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	122	/**
bogdanm	0:9b334a45a8ff	123	* @}
bogdanm	0:9b334a45a8ff	124	*/
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	/* Private functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	127
bogdanm	0:9b334a45a8ff	128	/** @addtogroup HASHEx_Private_Functions
bogdanm	0:9b334a45a8ff	129	* @{
bogdanm	0:9b334a45a8ff	130	*/
bogdanm	0:9b334a45a8ff	131
bogdanm	0:9b334a45a8ff	132	/**
bogdanm	0:9b334a45a8ff	133	* @brief Writes the input buffer in data register.
bogdanm	0:9b334a45a8ff	134	* @param pInBuffer: Pointer to input buffer
bogdanm	0:9b334a45a8ff	135	* @param Size: The size of input buffer
bogdanm	0:9b334a45a8ff	136	* @retval None
bogdanm	0:9b334a45a8ff	137	*/
bogdanm	0:9b334a45a8ff	138	static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size)
bogdanm	0:9b334a45a8ff	139	{
bogdanm	0:9b334a45a8ff	140	uint32_t buffercounter;
bogdanm	0:9b334a45a8ff	141	uint32_t inputaddr = (uint32_t) pInBuffer;
bogdanm	0:9b334a45a8ff	142
bogdanm	0:9b334a45a8ff	143	for(buffercounter = 0; buffercounter < Size; buffercounter+=4)
bogdanm	0:9b334a45a8ff	144	{
bogdanm	0:9b334a45a8ff	145	HASH->DIN = (uint32_t)inputaddr;
bogdanm	0:9b334a45a8ff	146	inputaddr+=4;
bogdanm	0:9b334a45a8ff	147	}
bogdanm	0:9b334a45a8ff	148	}
bogdanm	0:9b334a45a8ff	149
bogdanm	0:9b334a45a8ff	150	/**
bogdanm	0:9b334a45a8ff	151	* @brief Provides the message digest result.
bogdanm	0:9b334a45a8ff	152	* @param pMsgDigest: Pointer to the message digest
bogdanm	0:9b334a45a8ff	153	* @param Size: The size of the message digest in bytes
bogdanm	0:9b334a45a8ff	154	* @retval None
bogdanm	0:9b334a45a8ff	155	*/
bogdanm	0:9b334a45a8ff	156	static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
bogdanm	0:9b334a45a8ff	157	{
bogdanm	0:9b334a45a8ff	158	uint32_t msgdigest = (uint32_t)pMsgDigest;
bogdanm	0:9b334a45a8ff	159
bogdanm	0:9b334a45a8ff	160	switch(Size)
bogdanm	0:9b334a45a8ff	161	{
bogdanm	0:9b334a45a8ff	162	case 16:
bogdanm	0:9b334a45a8ff	163	/* Read the message digest */
bogdanm	0:9b334a45a8ff	164	(uint32_t)(msgdigest) = __REV(HASH->HR[0]);
bogdanm	0:9b334a45a8ff	165	msgdigest+=4;
bogdanm	0:9b334a45a8ff	166	(uint32_t)(msgdigest) = __REV(HASH->HR[1]);
bogdanm	0:9b334a45a8ff	167	msgdigest+=4;
bogdanm	0:9b334a45a8ff	168	(uint32_t)(msgdigest) = __REV(HASH->HR[2]);
bogdanm	0:9b334a45a8ff	169	msgdigest+=4;
bogdanm	0:9b334a45a8ff	170	(uint32_t)(msgdigest) = __REV(HASH->HR[3]);
bogdanm	0:9b334a45a8ff	171	break;
bogdanm	0:9b334a45a8ff	172	case 20:
bogdanm	0:9b334a45a8ff	173	/* Read the message digest */
bogdanm	0:9b334a45a8ff	174	(uint32_t)(msgdigest) = __REV(HASH->HR[0]);
bogdanm	0:9b334a45a8ff	175	msgdigest+=4;
bogdanm	0:9b334a45a8ff	176	(uint32_t)(msgdigest) = __REV(HASH->HR[1]);
bogdanm	0:9b334a45a8ff	177	msgdigest+=4;
bogdanm	0:9b334a45a8ff	178	(uint32_t)(msgdigest) = __REV(HASH->HR[2]);
bogdanm	0:9b334a45a8ff	179	msgdigest+=4;
bogdanm	0:9b334a45a8ff	180	(uint32_t)(msgdigest) = __REV(HASH->HR[3]);
bogdanm	0:9b334a45a8ff	181	msgdigest+=4;
bogdanm	0:9b334a45a8ff	182	(uint32_t)(msgdigest) = __REV(HASH->HR[4]);
bogdanm	0:9b334a45a8ff	183	break;
bogdanm	0:9b334a45a8ff	184	case 28:
bogdanm	0:9b334a45a8ff	185	/* Read the message digest */
bogdanm	0:9b334a45a8ff	186	(uint32_t)(msgdigest) = __REV(HASH->HR[0]);
bogdanm	0:9b334a45a8ff	187	msgdigest+=4;
bogdanm	0:9b334a45a8ff	188	(uint32_t)(msgdigest) = __REV(HASH->HR[1]);
bogdanm	0:9b334a45a8ff	189	msgdigest+=4;
bogdanm	0:9b334a45a8ff	190	(uint32_t)(msgdigest) = __REV(HASH->HR[2]);
bogdanm	0:9b334a45a8ff	191	msgdigest+=4;
bogdanm	0:9b334a45a8ff	192	(uint32_t)(msgdigest) = __REV(HASH->HR[3]);
bogdanm	0:9b334a45a8ff	193	msgdigest+=4;
bogdanm	0:9b334a45a8ff	194	(uint32_t)(msgdigest) = __REV(HASH->HR[4]);
bogdanm	0:9b334a45a8ff	195	msgdigest+=4;
bogdanm	0:9b334a45a8ff	196	(uint32_t)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
bogdanm	0:9b334a45a8ff	197	msgdigest+=4;
bogdanm	0:9b334a45a8ff	198	(uint32_t)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
bogdanm	0:9b334a45a8ff	199	break;
bogdanm	0:9b334a45a8ff	200	case 32:
bogdanm	0:9b334a45a8ff	201	/* Read the message digest */
bogdanm	0:9b334a45a8ff	202	(uint32_t)(msgdigest) = __REV(HASH->HR[0]);
bogdanm	0:9b334a45a8ff	203	msgdigest+=4;
bogdanm	0:9b334a45a8ff	204	(uint32_t)(msgdigest) = __REV(HASH->HR[1]);
bogdanm	0:9b334a45a8ff	205	msgdigest+=4;
bogdanm	0:9b334a45a8ff	206	(uint32_t)(msgdigest) = __REV(HASH->HR[2]);
bogdanm	0:9b334a45a8ff	207	msgdigest+=4;
bogdanm	0:9b334a45a8ff	208	(uint32_t)(msgdigest) = __REV(HASH->HR[3]);
bogdanm	0:9b334a45a8ff	209	msgdigest+=4;
bogdanm	0:9b334a45a8ff	210	(uint32_t)(msgdigest) = __REV(HASH->HR[4]);
bogdanm	0:9b334a45a8ff	211	msgdigest+=4;
bogdanm	0:9b334a45a8ff	212	(uint32_t)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
bogdanm	0:9b334a45a8ff	213	msgdigest+=4;
bogdanm	0:9b334a45a8ff	214	(uint32_t)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
bogdanm	0:9b334a45a8ff	215	msgdigest+=4;
bogdanm	0:9b334a45a8ff	216	(uint32_t)(msgdigest) = __REV(HASH_DIGEST->HR[7]);
bogdanm	0:9b334a45a8ff	217	break;
bogdanm	0:9b334a45a8ff	218	default:
bogdanm	0:9b334a45a8ff	219	break;
bogdanm	0:9b334a45a8ff	220	}
bogdanm	0:9b334a45a8ff	221	}
bogdanm	0:9b334a45a8ff	222
bogdanm	0:9b334a45a8ff	223	/**
bogdanm	0:9b334a45a8ff	224	* @brief DMA HASH Input Data complete callback.
bogdanm	0:9b334a45a8ff	225	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	226	* @retval None
bogdanm	0:9b334a45a8ff	227	*/
bogdanm	0:9b334a45a8ff	228	static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	229	{
bogdanm	0:9b334a45a8ff	230	HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	231	uint32_t inputaddr = 0;
bogdanm	0:9b334a45a8ff	232	uint32_t buffersize = 0;
bogdanm	0:9b334a45a8ff	233
bogdanm	0:9b334a45a8ff	234	if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE)
bogdanm	0:9b334a45a8ff	235	{
bogdanm	0:9b334a45a8ff	236	/* Disable the DMA transfer */
bogdanm	0:9b334a45a8ff	237	HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	238
bogdanm	0:9b334a45a8ff	239	/* Change HASH peripheral state */
bogdanm	0:9b334a45a8ff	240	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	241
bogdanm	0:9b334a45a8ff	242	/* Call Input data transfer complete callback */
bogdanm	0:9b334a45a8ff	243	HAL_HASH_InCpltCallback(hhash);
bogdanm	0:9b334a45a8ff	244	}
bogdanm	0:9b334a45a8ff	245	else
bogdanm	0:9b334a45a8ff	246	{
bogdanm	0:9b334a45a8ff	247	/* Increment Interrupt counter */
bogdanm	0:9b334a45a8ff	248	hhash->HashInCount++;
bogdanm	0:9b334a45a8ff	249	/* Disable the DMA transfer before starting the next transfer */
bogdanm	0:9b334a45a8ff	250	HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	251
bogdanm	0:9b334a45a8ff	252	if(hhash->HashInCount <= 2)
bogdanm	0:9b334a45a8ff	253	{
bogdanm	0:9b334a45a8ff	254	/* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */
bogdanm	0:9b334a45a8ff	255	if(hhash->HashInCount == 1)
bogdanm	0:9b334a45a8ff	256	{
bogdanm	0:9b334a45a8ff	257	inputaddr = (uint32_t)hhash->pHashInBuffPtr;
bogdanm	0:9b334a45a8ff	258	buffersize = hhash->HashBuffSize;
bogdanm	0:9b334a45a8ff	259	}
bogdanm	0:9b334a45a8ff	260	/* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */
bogdanm	0:9b334a45a8ff	261	else if(hhash->HashInCount == 2)
bogdanm	0:9b334a45a8ff	262	{
bogdanm	0:9b334a45a8ff	263	inputaddr = (uint32_t)hhash->Init.pKey;
bogdanm	0:9b334a45a8ff	264	buffersize = hhash->Init.KeySize;
bogdanm	0:9b334a45a8ff	265	}
bogdanm	0:9b334a45a8ff	266	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	267	MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8 * (buffersize % 4));
bogdanm	0:9b334a45a8ff	268
bogdanm	0:9b334a45a8ff	269	/* Set the HASH DMA transfer complete */
bogdanm	0:9b334a45a8ff	270	hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
bogdanm	0:9b334a45a8ff	271
bogdanm	0:9b334a45a8ff	272	/* Enable the DMA In DMA Stream */
bogdanm	0:9b334a45a8ff	273	HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4 ? (buffersize+3)/4:buffersize/4));
bogdanm	0:9b334a45a8ff	274
bogdanm	0:9b334a45a8ff	275	/* Enable DMA requests */
bogdanm	0:9b334a45a8ff	276	HASH->CR \|= (HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	277	}
bogdanm	0:9b334a45a8ff	278	else
bogdanm	0:9b334a45a8ff	279	{
bogdanm	0:9b334a45a8ff	280	/* Disable the DMA transfer */
bogdanm	0:9b334a45a8ff	281	HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	282
bogdanm	0:9b334a45a8ff	283	/* Reset the InCount */
bogdanm	0:9b334a45a8ff	284	hhash->HashInCount = 0;
bogdanm	0:9b334a45a8ff	285
bogdanm	0:9b334a45a8ff	286	/* Change HASH peripheral state */
bogdanm	0:9b334a45a8ff	287	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	288
bogdanm	0:9b334a45a8ff	289	/* Call Input data transfer complete callback */
bogdanm	0:9b334a45a8ff	290	HAL_HASH_InCpltCallback(hhash);
bogdanm	0:9b334a45a8ff	291	}
bogdanm	0:9b334a45a8ff	292	}
bogdanm	0:9b334a45a8ff	293	}
bogdanm	0:9b334a45a8ff	294
bogdanm	0:9b334a45a8ff	295	/**
bogdanm	0:9b334a45a8ff	296	* @brief DMA HASH communication error callback.
bogdanm	0:9b334a45a8ff	297	* @param hdma: DMA handle
bogdanm	0:9b334a45a8ff	298	* @retval None
bogdanm	0:9b334a45a8ff	299	*/
bogdanm	0:9b334a45a8ff	300	static void HASHEx_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	301	{
bogdanm	0:9b334a45a8ff	302	HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	303	hhash->State= HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	304	HAL_HASH_ErrorCallback(hhash);
bogdanm	0:9b334a45a8ff	305	}
bogdanm	0:9b334a45a8ff	306
bogdanm	0:9b334a45a8ff	307	/**
bogdanm	0:9b334a45a8ff	308	* @}
bogdanm	0:9b334a45a8ff	309	*/
bogdanm	0:9b334a45a8ff	310
bogdanm	0:9b334a45a8ff	311	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	312	/** @addtogroup HASHEx_Exported_Functions
bogdanm	0:9b334a45a8ff	313	* @{
bogdanm	0:9b334a45a8ff	314	*/
bogdanm	0:9b334a45a8ff	315
bogdanm	0:9b334a45a8ff	316	/** @defgroup HASHEx_Group1 HASH processing functions
bogdanm	0:9b334a45a8ff	317	* @brief processing functions using polling mode
bogdanm	0:9b334a45a8ff	318	*
bogdanm	0:9b334a45a8ff	319	@verbatim
bogdanm	0:9b334a45a8ff	320	===============================================================================
bogdanm	0:9b334a45a8ff	321	##### HASH processing using polling mode functions #####
bogdanm	0:9b334a45a8ff	322	===============================================================================
bogdanm	0:9b334a45a8ff	323	[..] This section provides functions allowing to calculate in polling mode
bogdanm	0:9b334a45a8ff	324	the hash value using one of the following algorithms:
bogdanm	0:9b334a45a8ff	325	(+) SHA224
bogdanm	0:9b334a45a8ff	326	(+) SHA256
bogdanm	0:9b334a45a8ff	327
bogdanm	0:9b334a45a8ff	328	@endverbatim
bogdanm	0:9b334a45a8ff	329	* @{
bogdanm	0:9b334a45a8ff	330	*/
bogdanm	0:9b334a45a8ff	331
bogdanm	0:9b334a45a8ff	332	/**
bogdanm	0:9b334a45a8ff	333	* @brief Initializes the HASH peripheral in SHA224 mode
bogdanm	0:9b334a45a8ff	334	* then processes pInBuffer. The digest is available in pOutBuffer
bogdanm	0:9b334a45a8ff	335	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	336	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	337	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	338	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	339	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	340	* @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
bogdanm	0:9b334a45a8ff	341	* @param Timeout: Specify Timeout value
bogdanm	0:9b334a45a8ff	342	* @retval HAL status
bogdanm	0:9b334a45a8ff	343	*/
bogdanm	0:9b334a45a8ff	344	HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	345	{
bogdanm	0:9b334a45a8ff	346	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	347
bogdanm	0:9b334a45a8ff	348	/* Process Locked */
bogdanm	0:9b334a45a8ff	349	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	350
bogdanm	0:9b334a45a8ff	351	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	352	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	353
bogdanm	0:9b334a45a8ff	354	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	355	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	356	{
bogdanm	0:9b334a45a8ff	357	/* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	358	the message digest of a new message */
bogdanm	0:9b334a45a8ff	359	HASH->CR \|= HASH_ALGOSELECTION_SHA224 \| HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	360	}
bogdanm	0:9b334a45a8ff	361
bogdanm	0:9b334a45a8ff	362	/* Set the phase */
bogdanm	0:9b334a45a8ff	363	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	364
bogdanm	0:9b334a45a8ff	365	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	366	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	367
bogdanm	0:9b334a45a8ff	368	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	369	HASHEx_WriteData(pInBuffer, Size);
bogdanm	0:9b334a45a8ff	370
bogdanm	0:9b334a45a8ff	371	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	372	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	373
bogdanm	0:9b334a45a8ff	374	/* Get tick */
bogdanm	0:9b334a45a8ff	375	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	376
bogdanm	0:9b334a45a8ff	377	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	378	{
bogdanm	0:9b334a45a8ff	379	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	380	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	381	{
bogdanm	0:9b334a45a8ff	382	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	383	{
bogdanm	0:9b334a45a8ff	384	/* Change state */
bogdanm	0:9b334a45a8ff	385	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	386
bogdanm	0:9b334a45a8ff	387	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	388	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	389
bogdanm	0:9b334a45a8ff	390	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	391	}
bogdanm	0:9b334a45a8ff	392	}
bogdanm	0:9b334a45a8ff	393	}
bogdanm	0:9b334a45a8ff	394
bogdanm	0:9b334a45a8ff	395	/* Read the message digest */
bogdanm	0:9b334a45a8ff	396	HASHEx_GetDigest(pOutBuffer, 28);
bogdanm	0:9b334a45a8ff	397
bogdanm	0:9b334a45a8ff	398	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	399	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	400
bogdanm	0:9b334a45a8ff	401	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	402	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	403
bogdanm	0:9b334a45a8ff	404	/* Return function status */
bogdanm	0:9b334a45a8ff	405	return HAL_OK;
bogdanm	0:9b334a45a8ff	406	}
bogdanm	0:9b334a45a8ff	407
bogdanm	0:9b334a45a8ff	408	/**
bogdanm	0:9b334a45a8ff	409	* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
bogdanm	0:9b334a45a8ff	410	The digest is available in pOutBuffer.
bogdanm	0:9b334a45a8ff	411	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	412	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	413	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	414	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	415	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	416	* @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
bogdanm	0:9b334a45a8ff	417	* @param Timeout: Specify Timeout value
bogdanm	0:9b334a45a8ff	418	* @retval HAL status
bogdanm	0:9b334a45a8ff	419	*/
bogdanm	0:9b334a45a8ff	420	HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	421	{
bogdanm	0:9b334a45a8ff	422	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	423
bogdanm	0:9b334a45a8ff	424	/* Process Locked */
bogdanm	0:9b334a45a8ff	425	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	426
bogdanm	0:9b334a45a8ff	427	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	428	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	429
bogdanm	0:9b334a45a8ff	430	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	431	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	432	{
bogdanm	0:9b334a45a8ff	433	/* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	434	the message digest of a new message */
bogdanm	0:9b334a45a8ff	435	HASH->CR \|= HASH_ALGOSELECTION_SHA256 \| HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	436	}
bogdanm	0:9b334a45a8ff	437
bogdanm	0:9b334a45a8ff	438	/* Set the phase */
bogdanm	0:9b334a45a8ff	439	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	440
bogdanm	0:9b334a45a8ff	441	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	442	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	443
bogdanm	0:9b334a45a8ff	444	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	445	HASHEx_WriteData(pInBuffer, Size);
bogdanm	0:9b334a45a8ff	446
bogdanm	0:9b334a45a8ff	447	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	448	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	449
bogdanm	0:9b334a45a8ff	450	/* Get tick */
bogdanm	0:9b334a45a8ff	451	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	452
bogdanm	0:9b334a45a8ff	453	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	454	{
bogdanm	0:9b334a45a8ff	455	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	456	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	457	{
bogdanm	0:9b334a45a8ff	458	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	459	{
bogdanm	0:9b334a45a8ff	460	/* Change state */
bogdanm	0:9b334a45a8ff	461	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	462
bogdanm	0:9b334a45a8ff	463	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	464	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	465
bogdanm	0:9b334a45a8ff	466	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	467	}
bogdanm	0:9b334a45a8ff	468	}
bogdanm	0:9b334a45a8ff	469	}
bogdanm	0:9b334a45a8ff	470
bogdanm	0:9b334a45a8ff	471	/* Read the message digest */
bogdanm	0:9b334a45a8ff	472	HASHEx_GetDigest(pOutBuffer, 32);
bogdanm	0:9b334a45a8ff	473
bogdanm	0:9b334a45a8ff	474	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	475	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	476
bogdanm	0:9b334a45a8ff	477	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	478	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	479
bogdanm	0:9b334a45a8ff	480	/* Return function status */
bogdanm	0:9b334a45a8ff	481	return HAL_OK;
bogdanm	0:9b334a45a8ff	482	}
bogdanm	0:9b334a45a8ff	483
bogdanm	0:9b334a45a8ff	484
bogdanm	0:9b334a45a8ff	485	/**
bogdanm	0:9b334a45a8ff	486	* @brief Initializes the HASH peripheral in SHA224 mode
bogdanm	0:9b334a45a8ff	487	* then processes pInBuffer. The digest is available in pOutBuffer
bogdanm	0:9b334a45a8ff	488	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	489	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	490	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	491	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	492	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	493	* @retval HAL status
bogdanm	0:9b334a45a8ff	494	*/
bogdanm	0:9b334a45a8ff	495	HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size)
bogdanm	0:9b334a45a8ff	496	{
bogdanm	0:9b334a45a8ff	497	/* Process Locked */
bogdanm	0:9b334a45a8ff	498	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	499
bogdanm	0:9b334a45a8ff	500	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	501	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	502
bogdanm	0:9b334a45a8ff	503	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	504	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	505	{
bogdanm	0:9b334a45a8ff	506	/* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	507	the message digest of a new message */
bogdanm	0:9b334a45a8ff	508	HASH->CR \|= HASH_ALGOSELECTION_SHA224 \| HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	509	}
bogdanm	0:9b334a45a8ff	510
bogdanm	0:9b334a45a8ff	511	/* Set the phase */
bogdanm	0:9b334a45a8ff	512	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	513
bogdanm	0:9b334a45a8ff	514	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	515	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	516
bogdanm	0:9b334a45a8ff	517	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	518	HASHEx_WriteData(pInBuffer, Size);
bogdanm	0:9b334a45a8ff	519
bogdanm	0:9b334a45a8ff	520	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	521	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	522
bogdanm	0:9b334a45a8ff	523	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	524	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	525
bogdanm	0:9b334a45a8ff	526	/* Return function status */
bogdanm	0:9b334a45a8ff	527	return HAL_OK;
bogdanm	0:9b334a45a8ff	528	}
bogdanm	0:9b334a45a8ff	529
bogdanm	0:9b334a45a8ff	530
bogdanm	0:9b334a45a8ff	531	/**
bogdanm	0:9b334a45a8ff	532	* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
bogdanm	0:9b334a45a8ff	533	The digest is available in pOutBuffer.
bogdanm	0:9b334a45a8ff	534	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	535	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	536	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	537	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	538	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	539	* @retval HAL status
bogdanm	0:9b334a45a8ff	540	*/
bogdanm	0:9b334a45a8ff	541	HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size)
bogdanm	0:9b334a45a8ff	542	{
bogdanm	0:9b334a45a8ff	543	/* Process Locked */
bogdanm	0:9b334a45a8ff	544	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	545
bogdanm	0:9b334a45a8ff	546	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	547	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	548
bogdanm	0:9b334a45a8ff	549	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	550	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	551	{
bogdanm	0:9b334a45a8ff	552	/* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	553	the message digest of a new message */
bogdanm	0:9b334a45a8ff	554	HASH->CR \|= HASH_ALGOSELECTION_SHA256 \| HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	555	}
bogdanm	0:9b334a45a8ff	556
bogdanm	0:9b334a45a8ff	557	/* Set the phase */
bogdanm	0:9b334a45a8ff	558	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	559
bogdanm	0:9b334a45a8ff	560	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	561	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	562
bogdanm	0:9b334a45a8ff	563	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	564	HASHEx_WriteData(pInBuffer, Size);
bogdanm	0:9b334a45a8ff	565
bogdanm	0:9b334a45a8ff	566	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	567	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	568
bogdanm	0:9b334a45a8ff	569	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	570	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	571
bogdanm	0:9b334a45a8ff	572	/* Return function status */
bogdanm	0:9b334a45a8ff	573	return HAL_OK;
bogdanm	0:9b334a45a8ff	574	}
bogdanm	0:9b334a45a8ff	575
bogdanm	0:9b334a45a8ff	576
bogdanm	0:9b334a45a8ff	577	/**
bogdanm	0:9b334a45a8ff	578	* @}
bogdanm	0:9b334a45a8ff	579	*/
bogdanm	0:9b334a45a8ff	580
bogdanm	0:9b334a45a8ff	581	/** @defgroup HASHEx_Group2 HMAC processing functions using polling mode
bogdanm	0:9b334a45a8ff	582	* @brief HMAC processing functions using polling mode .
bogdanm	0:9b334a45a8ff	583	*
bogdanm	0:9b334a45a8ff	584	@verbatim
bogdanm	0:9b334a45a8ff	585	===============================================================================
bogdanm	0:9b334a45a8ff	586	##### HMAC processing using polling mode functions #####
bogdanm	0:9b334a45a8ff	587	===============================================================================
bogdanm	0:9b334a45a8ff	588	[..] This section provides functions allowing to calculate in polling mode
bogdanm	0:9b334a45a8ff	589	the HMAC value using one of the following algorithms:
bogdanm	0:9b334a45a8ff	590	(+) SHA224
bogdanm	0:9b334a45a8ff	591	(+) SHA256
bogdanm	0:9b334a45a8ff	592
bogdanm	0:9b334a45a8ff	593	@endverbatim
bogdanm	0:9b334a45a8ff	594	* @{
bogdanm	0:9b334a45a8ff	595	*/
bogdanm	0:9b334a45a8ff	596
bogdanm	0:9b334a45a8ff	597	/**
bogdanm	0:9b334a45a8ff	598	* @brief Initializes the HASH peripheral in HMAC SHA224 mode
bogdanm	0:9b334a45a8ff	599	* then processes pInBuffer. The digest is available in pOutBuffer.
bogdanm	0:9b334a45a8ff	600	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	601	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	602	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	603	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	604	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	605	* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
bogdanm	0:9b334a45a8ff	606	* @param Timeout: Timeout value
bogdanm	0:9b334a45a8ff	607	* @retval HAL status
bogdanm	0:9b334a45a8ff	608	*/
bogdanm	0:9b334a45a8ff	609	HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	610	{
bogdanm	0:9b334a45a8ff	611	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	612
bogdanm	0:9b334a45a8ff	613	/* Process Locked */
bogdanm	0:9b334a45a8ff	614	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	615
bogdanm	0:9b334a45a8ff	616	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	617	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	618
bogdanm	0:9b334a45a8ff	619	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	620	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	621	{
bogdanm	0:9b334a45a8ff	622	/* Check if key size is greater than 64 bytes */
bogdanm	0:9b334a45a8ff	623	if(hhash->Init.KeySize > 64)
bogdanm	0:9b334a45a8ff	624	{
bogdanm	0:9b334a45a8ff	625	/* Select the HMAC SHA224 mode */
bogdanm	0:9b334a45a8ff	626	HASH->CR \|= (HASH_ALGOSELECTION_SHA224 \| HASH_ALGOMODE_HMAC \| HASH_HMAC_KEYTYPE_LONGKEY \| HASH_CR_INIT);
bogdanm	0:9b334a45a8ff	627	}
bogdanm	0:9b334a45a8ff	628	else
bogdanm	0:9b334a45a8ff	629	{
bogdanm	0:9b334a45a8ff	630	/* Select the HMAC SHA224 mode */
bogdanm	0:9b334a45a8ff	631	HASH->CR \|= (HASH_ALGOSELECTION_SHA224 \| HASH_ALGOMODE_HMAC \| HASH_CR_INIT);
bogdanm	0:9b334a45a8ff	632	}
bogdanm	0:9b334a45a8ff	633	}
bogdanm	0:9b334a45a8ff	634
bogdanm	0:9b334a45a8ff	635	/* Set the phase */
bogdanm	0:9b334a45a8ff	636	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	637
bogdanm	0:9b334a45a8ff	638	/************************ STEP 1 ****************************************/
bogdanm	0:9b334a45a8ff	639	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	640	__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	641
bogdanm	0:9b334a45a8ff	642	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	643	HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	644
bogdanm	0:9b334a45a8ff	645	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	646	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	647
bogdanm	0:9b334a45a8ff	648	/* Get tick */
bogdanm	0:9b334a45a8ff	649	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	650
bogdanm	0:9b334a45a8ff	651	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	652	{
bogdanm	0:9b334a45a8ff	653	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	654	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	655	{
bogdanm	0:9b334a45a8ff	656	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	657	{
bogdanm	0:9b334a45a8ff	658	/* Change state */
bogdanm	0:9b334a45a8ff	659	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	660
bogdanm	0:9b334a45a8ff	661	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	662	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	663
bogdanm	0:9b334a45a8ff	664	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	665	}
bogdanm	0:9b334a45a8ff	666	}
bogdanm	0:9b334a45a8ff	667	}
bogdanm	0:9b334a45a8ff	668	/************************ STEP 2 ****************************************/
bogdanm	0:9b334a45a8ff	669	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	670	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	671
bogdanm	0:9b334a45a8ff	672	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	673	HASHEx_WriteData(pInBuffer, Size);
bogdanm	0:9b334a45a8ff	674
bogdanm	0:9b334a45a8ff	675	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	676	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	677
bogdanm	0:9b334a45a8ff	678	/* Get tick */
bogdanm	0:9b334a45a8ff	679	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	680
bogdanm	0:9b334a45a8ff	681	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	682	{
bogdanm	0:9b334a45a8ff	683	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	684	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	685	{
bogdanm	0:9b334a45a8ff	686	if((HAL_GetTick() - tickstart ) > Timeout)
bogdanm	0:9b334a45a8ff	687	{
bogdanm	0:9b334a45a8ff	688	/* Change state */
bogdanm	0:9b334a45a8ff	689	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	690
bogdanm	0:9b334a45a8ff	691	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	692	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	693
bogdanm	0:9b334a45a8ff	694	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	695	}
bogdanm	0:9b334a45a8ff	696	}
bogdanm	0:9b334a45a8ff	697	}
bogdanm	0:9b334a45a8ff	698	/************************ STEP 3 ****************************************/
bogdanm	0:9b334a45a8ff	699	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	700	__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	701
bogdanm	0:9b334a45a8ff	702	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	703	HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	704
bogdanm	0:9b334a45a8ff	705	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	706	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	707
bogdanm	0:9b334a45a8ff	708	/* Get tick */
bogdanm	0:9b334a45a8ff	709	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	710
bogdanm	0:9b334a45a8ff	711	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	712	{
bogdanm	0:9b334a45a8ff	713	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	714	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	715	{
bogdanm	0:9b334a45a8ff	716	if((HAL_GetTick() - tickstart ) > Timeout)
bogdanm	0:9b334a45a8ff	717	{
bogdanm	0:9b334a45a8ff	718	/* Change state */
bogdanm	0:9b334a45a8ff	719	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	720
bogdanm	0:9b334a45a8ff	721	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	722	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	723
bogdanm	0:9b334a45a8ff	724	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	725	}
bogdanm	0:9b334a45a8ff	726	}
bogdanm	0:9b334a45a8ff	727	}
bogdanm	0:9b334a45a8ff	728	/* Read the message digest */
bogdanm	0:9b334a45a8ff	729	HASHEx_GetDigest(pOutBuffer, 28);
bogdanm	0:9b334a45a8ff	730
bogdanm	0:9b334a45a8ff	731	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	732	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	733
bogdanm	0:9b334a45a8ff	734	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	735	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	736
bogdanm	0:9b334a45a8ff	737	/* Return function status */
bogdanm	0:9b334a45a8ff	738	return HAL_OK;
bogdanm	0:9b334a45a8ff	739	}
bogdanm	0:9b334a45a8ff	740
bogdanm	0:9b334a45a8ff	741	/**
bogdanm	0:9b334a45a8ff	742	* @brief Initializes the HASH peripheral in HMAC SHA256 mode
bogdanm	0:9b334a45a8ff	743	* then processes pInBuffer. The digest is available in pOutBuffer
bogdanm	0:9b334a45a8ff	744	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	745	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	746	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	747	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	748	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	749	* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
bogdanm	0:9b334a45a8ff	750	* @param Timeout: Timeout value
bogdanm	0:9b334a45a8ff	751	* @retval HAL status
bogdanm	0:9b334a45a8ff	752	*/
bogdanm	0:9b334a45a8ff	753	HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	754	{
bogdanm	0:9b334a45a8ff	755	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	756
bogdanm	0:9b334a45a8ff	757	/* Process Locked */
bogdanm	0:9b334a45a8ff	758	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	759
bogdanm	0:9b334a45a8ff	760	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	761	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	762
bogdanm	0:9b334a45a8ff	763	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	764	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	765	{
bogdanm	0:9b334a45a8ff	766	/* Check if key size is greater than 64 bytes */
bogdanm	0:9b334a45a8ff	767	if(hhash->Init.KeySize > 64)
bogdanm	0:9b334a45a8ff	768	{
bogdanm	0:9b334a45a8ff	769	/* Select the HMAC SHA256 mode */
bogdanm	0:9b334a45a8ff	770	HASH->CR \|= (HASH_ALGOSELECTION_SHA256 \| HASH_ALGOMODE_HMAC \| HASH_HMAC_KEYTYPE_LONGKEY);
bogdanm	0:9b334a45a8ff	771	}
bogdanm	0:9b334a45a8ff	772	else
bogdanm	0:9b334a45a8ff	773	{
bogdanm	0:9b334a45a8ff	774	/* Select the HMAC SHA256 mode */
bogdanm	0:9b334a45a8ff	775	HASH->CR \|= (HASH_ALGOSELECTION_SHA256 \| HASH_ALGOMODE_HMAC);
bogdanm	0:9b334a45a8ff	776	}
bogdanm	0:9b334a45a8ff	777	/* Reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	778	the message digest of a new message */
bogdanm	0:9b334a45a8ff	779	HASH->CR \|= HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	780	}
bogdanm	0:9b334a45a8ff	781
bogdanm	0:9b334a45a8ff	782	/* Set the phase */
bogdanm	0:9b334a45a8ff	783	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	784
bogdanm	0:9b334a45a8ff	785	/************************ STEP 1 ****************************************/
bogdanm	0:9b334a45a8ff	786	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	787	__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	788
bogdanm	0:9b334a45a8ff	789	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	790	HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	791
bogdanm	0:9b334a45a8ff	792	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	793	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	794
bogdanm	0:9b334a45a8ff	795	/* Get tick */
bogdanm	0:9b334a45a8ff	796	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	797
bogdanm	0:9b334a45a8ff	798	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	799	{
bogdanm	0:9b334a45a8ff	800	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	801	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	802	{
bogdanm	0:9b334a45a8ff	803	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	804	{
bogdanm	0:9b334a45a8ff	805	/* Change state */
bogdanm	0:9b334a45a8ff	806	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	807
bogdanm	0:9b334a45a8ff	808	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	809	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	810
bogdanm	0:9b334a45a8ff	811	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	812	}
bogdanm	0:9b334a45a8ff	813	}
bogdanm	0:9b334a45a8ff	814	}
bogdanm	0:9b334a45a8ff	815	/************************ STEP 2 ****************************************/
bogdanm	0:9b334a45a8ff	816	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	817	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	818
bogdanm	0:9b334a45a8ff	819	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	820	HASHEx_WriteData(pInBuffer, Size);
bogdanm	0:9b334a45a8ff	821
bogdanm	0:9b334a45a8ff	822	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	823	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	824
bogdanm	0:9b334a45a8ff	825	/* Get tick */
bogdanm	0:9b334a45a8ff	826	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	827
bogdanm	0:9b334a45a8ff	828	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	829	{
bogdanm	0:9b334a45a8ff	830	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	831	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	832	{
bogdanm	0:9b334a45a8ff	833	if((HAL_GetTick() - tickstart ) > Timeout)
bogdanm	0:9b334a45a8ff	834	{
bogdanm	0:9b334a45a8ff	835	/* Change state */
bogdanm	0:9b334a45a8ff	836	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	837
bogdanm	0:9b334a45a8ff	838	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	839	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	840
bogdanm	0:9b334a45a8ff	841	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	842	}
bogdanm	0:9b334a45a8ff	843	}
bogdanm	0:9b334a45a8ff	844	}
bogdanm	0:9b334a45a8ff	845	/************************ STEP 3 ****************************************/
bogdanm	0:9b334a45a8ff	846	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	847	__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	848
bogdanm	0:9b334a45a8ff	849	/* Write input buffer in data register */
bogdanm	0:9b334a45a8ff	850	HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	851
bogdanm	0:9b334a45a8ff	852	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	853	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	854
bogdanm	0:9b334a45a8ff	855	/* Get tick */
bogdanm	0:9b334a45a8ff	856	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	857
bogdanm	0:9b334a45a8ff	858	while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
bogdanm	0:9b334a45a8ff	859	{
bogdanm	0:9b334a45a8ff	860	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	861	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	862	{
bogdanm	0:9b334a45a8ff	863	if((HAL_GetTick() - tickstart ) > Timeout)
bogdanm	0:9b334a45a8ff	864	{
bogdanm	0:9b334a45a8ff	865	/* Change state */
bogdanm	0:9b334a45a8ff	866	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	867
bogdanm	0:9b334a45a8ff	868	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	869	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	870
bogdanm	0:9b334a45a8ff	871	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	872	}
bogdanm	0:9b334a45a8ff	873	}
bogdanm	0:9b334a45a8ff	874	}
bogdanm	0:9b334a45a8ff	875	/* Read the message digest */
bogdanm	0:9b334a45a8ff	876	HASHEx_GetDigest(pOutBuffer, 32);
bogdanm	0:9b334a45a8ff	877
bogdanm	0:9b334a45a8ff	878	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	879	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	880
bogdanm	0:9b334a45a8ff	881	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	882	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	883
bogdanm	0:9b334a45a8ff	884	/* Return function status */
bogdanm	0:9b334a45a8ff	885	return HAL_OK;
bogdanm	0:9b334a45a8ff	886	}
bogdanm	0:9b334a45a8ff	887
bogdanm	0:9b334a45a8ff	888	/**
bogdanm	0:9b334a45a8ff	889	* @}
bogdanm	0:9b334a45a8ff	890	*/
bogdanm	0:9b334a45a8ff	891
bogdanm	0:9b334a45a8ff	892	/** @defgroup HASHEx_Group3 HASH processing functions using interrupt mode
bogdanm	0:9b334a45a8ff	893	* @brief processing functions using interrupt mode.
bogdanm	0:9b334a45a8ff	894	*
bogdanm	0:9b334a45a8ff	895	@verbatim
bogdanm	0:9b334a45a8ff	896	===============================================================================
bogdanm	0:9b334a45a8ff	897	##### HASH processing using interrupt functions #####
bogdanm	0:9b334a45a8ff	898	===============================================================================
bogdanm	0:9b334a45a8ff	899	[..] This section provides functions allowing to calculate in interrupt mode
bogdanm	0:9b334a45a8ff	900	the hash value using one of the following algorithms:
bogdanm	0:9b334a45a8ff	901	(+) SHA224
bogdanm	0:9b334a45a8ff	902	(+) SHA256
bogdanm	0:9b334a45a8ff	903
bogdanm	0:9b334a45a8ff	904	@endverbatim
bogdanm	0:9b334a45a8ff	905	* @{
bogdanm	0:9b334a45a8ff	906	*/
bogdanm	0:9b334a45a8ff	907
bogdanm	0:9b334a45a8ff	908	/**
bogdanm	0:9b334a45a8ff	909	* @brief Initializes the HASH peripheral in SHA224 mode then processes pInBuffer.
bogdanm	0:9b334a45a8ff	910	* The digest is available in pOutBuffer.
bogdanm	0:9b334a45a8ff	911	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	912	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	913	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	914	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	915	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	916	* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
bogdanm	0:9b334a45a8ff	917	* @retval HAL status
bogdanm	0:9b334a45a8ff	918	*/
bogdanm	0:9b334a45a8ff	919	HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
bogdanm	0:9b334a45a8ff	920	{
bogdanm	0:9b334a45a8ff	921	uint32_t inputaddr;
bogdanm	0:9b334a45a8ff	922	uint32_t buffercounter;
bogdanm	0:9b334a45a8ff	923	uint32_t inputcounter;
bogdanm	0:9b334a45a8ff	924
bogdanm	0:9b334a45a8ff	925	/* Process Locked */
bogdanm	0:9b334a45a8ff	926	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	927
bogdanm	0:9b334a45a8ff	928	if(hhash->State == HAL_HASH_STATE_READY)
bogdanm	0:9b334a45a8ff	929	{
bogdanm	0:9b334a45a8ff	930	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	931	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	932
bogdanm	0:9b334a45a8ff	933	hhash->HashInCount = Size;
bogdanm	0:9b334a45a8ff	934	hhash->pHashInBuffPtr = pInBuffer;
bogdanm	0:9b334a45a8ff	935	hhash->pHashOutBuffPtr = pOutBuffer;
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	938	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	939	{
bogdanm	0:9b334a45a8ff	940	/* Select the SHA224 mode */
bogdanm	0:9b334a45a8ff	941	HASH->CR \|= HASH_ALGOSELECTION_SHA224;
bogdanm	0:9b334a45a8ff	942	/* Reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	943	the message digest of a new message */
bogdanm	0:9b334a45a8ff	944	HASH->CR \|= HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	945	}
bogdanm	0:9b334a45a8ff	946	/* Reset interrupt counter */
bogdanm	0:9b334a45a8ff	947	hhash->HashITCounter = 0;
bogdanm	0:9b334a45a8ff	948	/* Set the phase */
bogdanm	0:9b334a45a8ff	949	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	950
bogdanm	0:9b334a45a8ff	951	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	952	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	953
bogdanm	0:9b334a45a8ff	954	/* Enable Interrupts */
bogdanm	0:9b334a45a8ff	955	HASH->IMR = (HASH_IT_DINI \| HASH_IT_DCI);
bogdanm	0:9b334a45a8ff	956
bogdanm	0:9b334a45a8ff	957	/* Return function status */
bogdanm	0:9b334a45a8ff	958	return HAL_OK;
bogdanm	0:9b334a45a8ff	959	}
bogdanm	0:9b334a45a8ff	960	if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
bogdanm	0:9b334a45a8ff	961	{
bogdanm	0:9b334a45a8ff	962	/* Read the message digest */
bogdanm	0:9b334a45a8ff	963	HASHEx_GetDigest(hhash->pHashOutBuffPtr, 28);
bogdanm	0:9b334a45a8ff	964	if(hhash->HashInCount == 0)
bogdanm	0:9b334a45a8ff	965	{
bogdanm	0:9b334a45a8ff	966	/* Disable Interrupts */
bogdanm	0:9b334a45a8ff	967	HASH->IMR = 0;
bogdanm	0:9b334a45a8ff	968	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	969	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	970	/* Call digest computation complete callback */
bogdanm	0:9b334a45a8ff	971	HAL_HASH_DgstCpltCallback(hhash);
bogdanm	0:9b334a45a8ff	972	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	973	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	974
bogdanm	0:9b334a45a8ff	975	/* Return function status */
bogdanm	0:9b334a45a8ff	976	return HAL_OK;
bogdanm	0:9b334a45a8ff	977	}
bogdanm	0:9b334a45a8ff	978	}
bogdanm	0:9b334a45a8ff	979	if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
bogdanm	0:9b334a45a8ff	980	{
bogdanm	0:9b334a45a8ff	981	if(hhash->HashInCount >= 68)
bogdanm	0:9b334a45a8ff	982	{
bogdanm	0:9b334a45a8ff	983	inputaddr = (uint32_t)hhash->pHashInBuffPtr;
bogdanm	0:9b334a45a8ff	984	/* Write the Input block in the Data IN register */
bogdanm	0:9b334a45a8ff	985	for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
bogdanm	0:9b334a45a8ff	986	{
bogdanm	0:9b334a45a8ff	987	HASH->DIN = (uint32_t)inputaddr;
bogdanm	0:9b334a45a8ff	988	inputaddr+=4;
bogdanm	0:9b334a45a8ff	989	}
bogdanm	0:9b334a45a8ff	990	if(hhash->HashITCounter == 0)
bogdanm	0:9b334a45a8ff	991	{
bogdanm	0:9b334a45a8ff	992	HASH->DIN = (uint32_t)inputaddr;
bogdanm	0:9b334a45a8ff	993	if(hhash->HashInCount >= 68)
bogdanm	0:9b334a45a8ff	994	{
bogdanm	0:9b334a45a8ff	995	/* Decrement buffer counter */
bogdanm	0:9b334a45a8ff	996	hhash->HashInCount -= 68;
bogdanm	0:9b334a45a8ff	997	hhash->pHashInBuffPtr+= 68;
bogdanm	0:9b334a45a8ff	998	}
bogdanm	0:9b334a45a8ff	999	else
bogdanm	0:9b334a45a8ff	1000	{
bogdanm	0:9b334a45a8ff	1001	hhash->HashInCount = 0;
bogdanm	0:9b334a45a8ff	1002	hhash->pHashInBuffPtr+= hhash->HashInCount;
bogdanm	0:9b334a45a8ff	1003	}
bogdanm	0:9b334a45a8ff	1004	/* Set Interrupt counter */
bogdanm	0:9b334a45a8ff	1005	hhash->HashITCounter = 1;
bogdanm	0:9b334a45a8ff	1006	}
bogdanm	0:9b334a45a8ff	1007	else
bogdanm	0:9b334a45a8ff	1008	{
bogdanm	0:9b334a45a8ff	1009	/* Decrement buffer counter */
bogdanm	0:9b334a45a8ff	1010	hhash->HashInCount -= 64;
bogdanm	0:9b334a45a8ff	1011	hhash->pHashInBuffPtr+= 64;
bogdanm	0:9b334a45a8ff	1012	}
bogdanm	0:9b334a45a8ff	1013	}
bogdanm	0:9b334a45a8ff	1014	else
bogdanm	0:9b334a45a8ff	1015	{
bogdanm	0:9b334a45a8ff	1016	/* Get the buffer address */
bogdanm	0:9b334a45a8ff	1017	inputaddr = (uint32_t)hhash->pHashInBuffPtr;
bogdanm	0:9b334a45a8ff	1018	/* Get the buffer counter */
bogdanm	0:9b334a45a8ff	1019	inputcounter = hhash->HashInCount;
bogdanm	0:9b334a45a8ff	1020	/* Disable Interrupts */
bogdanm	0:9b334a45a8ff	1021	HASH->IMR &= ~(HASH_IT_DINI);
bogdanm	0:9b334a45a8ff	1022	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	1023	__HAL_HASH_SET_NBVALIDBITS(inputcounter);
bogdanm	0:9b334a45a8ff	1024
bogdanm	0:9b334a45a8ff	1025	if((inputcounter > 4) && (inputcounter%4))
bogdanm	0:9b334a45a8ff	1026	{
bogdanm	0:9b334a45a8ff	1027	inputcounter = (inputcounter+4-inputcounter%4);
bogdanm	0:9b334a45a8ff	1028	}
bogdanm	0:9b334a45a8ff	1029	else if ((inputcounter < 4) && (inputcounter != 0))
bogdanm	0:9b334a45a8ff	1030	{
bogdanm	0:9b334a45a8ff	1031	inputcounter = 4;
bogdanm	0:9b334a45a8ff	1032	}
bogdanm	0:9b334a45a8ff	1033	/* Write the Input block in the Data IN register */
bogdanm	0:9b334a45a8ff	1034	for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
bogdanm	0:9b334a45a8ff	1035	{
bogdanm	0:9b334a45a8ff	1036	HASH->DIN = (uint32_t)inputaddr;
bogdanm	0:9b334a45a8ff	1037	inputaddr+=4;
bogdanm	0:9b334a45a8ff	1038	}
bogdanm	0:9b334a45a8ff	1039	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	1040	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	1041	/* Reset buffer counter */
bogdanm	0:9b334a45a8ff	1042	hhash->HashInCount = 0;
bogdanm	0:9b334a45a8ff	1043	/* Call Input data transfer complete callback */
bogdanm	0:9b334a45a8ff	1044	HAL_HASH_InCpltCallback(hhash);
bogdanm	0:9b334a45a8ff	1045	}
bogdanm	0:9b334a45a8ff	1046	}
bogdanm	0:9b334a45a8ff	1047
bogdanm	0:9b334a45a8ff	1048	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1049	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1050
bogdanm	0:9b334a45a8ff	1051	/* Return function status */
bogdanm	0:9b334a45a8ff	1052	return HAL_OK;
bogdanm	0:9b334a45a8ff	1053	}
bogdanm	0:9b334a45a8ff	1054
bogdanm	0:9b334a45a8ff	1055
bogdanm	0:9b334a45a8ff	1056	/**
bogdanm	0:9b334a45a8ff	1057	* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
bogdanm	0:9b334a45a8ff	1058	* The digest is available in pOutBuffer.
bogdanm	0:9b334a45a8ff	1059	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1060	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1061	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	1062	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	1063	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	1064	* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
bogdanm	0:9b334a45a8ff	1065	* @retval HAL status
bogdanm	0:9b334a45a8ff	1066	*/
bogdanm	0:9b334a45a8ff	1067	HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
bogdanm	0:9b334a45a8ff	1068	{
bogdanm	0:9b334a45a8ff	1069	uint32_t inputaddr;
bogdanm	0:9b334a45a8ff	1070	uint32_t buffercounter;
bogdanm	0:9b334a45a8ff	1071	uint32_t inputcounter;
bogdanm	0:9b334a45a8ff	1072
bogdanm	0:9b334a45a8ff	1073	/* Process Locked */
bogdanm	0:9b334a45a8ff	1074	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	1075
bogdanm	0:9b334a45a8ff	1076	if(hhash->State == HAL_HASH_STATE_READY)
bogdanm	0:9b334a45a8ff	1077	{
bogdanm	0:9b334a45a8ff	1078	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	1079	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1080
bogdanm	0:9b334a45a8ff	1081	hhash->HashInCount = Size;
bogdanm	0:9b334a45a8ff	1082	hhash->pHashInBuffPtr = pInBuffer;
bogdanm	0:9b334a45a8ff	1083	hhash->pHashOutBuffPtr = pOutBuffer;
bogdanm	0:9b334a45a8ff	1084
bogdanm	0:9b334a45a8ff	1085	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	1086	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	1087	{
bogdanm	0:9b334a45a8ff	1088	/* Select the SHA256 mode */
bogdanm	0:9b334a45a8ff	1089	HASH->CR \|= HASH_ALGOSELECTION_SHA256;
bogdanm	0:9b334a45a8ff	1090	/* Reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	1091	the message digest of a new message */
bogdanm	0:9b334a45a8ff	1092	HASH->CR \|= HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	1093	}
bogdanm	0:9b334a45a8ff	1094
bogdanm	0:9b334a45a8ff	1095	/* Reset interrupt counter */
bogdanm	0:9b334a45a8ff	1096	hhash->HashITCounter = 0;
bogdanm	0:9b334a45a8ff	1097
bogdanm	0:9b334a45a8ff	1098	/* Set the phase */
bogdanm	0:9b334a45a8ff	1099	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	1100
bogdanm	0:9b334a45a8ff	1101	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1102	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1103
bogdanm	0:9b334a45a8ff	1104	/* Enable Interrupts */
bogdanm	0:9b334a45a8ff	1105	HASH->IMR = (HASH_IT_DINI \| HASH_IT_DCI);
bogdanm	0:9b334a45a8ff	1106
bogdanm	0:9b334a45a8ff	1107	/* Return function status */
bogdanm	0:9b334a45a8ff	1108	return HAL_OK;
bogdanm	0:9b334a45a8ff	1109	}
bogdanm	0:9b334a45a8ff	1110	if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
bogdanm	0:9b334a45a8ff	1111	{
bogdanm	0:9b334a45a8ff	1112	/* Read the message digest */
bogdanm	0:9b334a45a8ff	1113	HASHEx_GetDigest(hhash->pHashOutBuffPtr, 32);
bogdanm	0:9b334a45a8ff	1114	if(hhash->HashInCount == 0)
bogdanm	0:9b334a45a8ff	1115	{
bogdanm	0:9b334a45a8ff	1116	/* Disable Interrupts */
bogdanm	0:9b334a45a8ff	1117	HASH->IMR = 0;
bogdanm	0:9b334a45a8ff	1118	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	1119	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	1120	/* Call digest computation complete callback */
bogdanm	0:9b334a45a8ff	1121	HAL_HASH_DgstCpltCallback(hhash);
bogdanm	0:9b334a45a8ff	1122
bogdanm	0:9b334a45a8ff	1123	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1124	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1125
bogdanm	0:9b334a45a8ff	1126	/* Return function status */
bogdanm	0:9b334a45a8ff	1127	return HAL_OK;
bogdanm	0:9b334a45a8ff	1128	}
bogdanm	0:9b334a45a8ff	1129	}
bogdanm	0:9b334a45a8ff	1130	if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
bogdanm	0:9b334a45a8ff	1131	{
bogdanm	0:9b334a45a8ff	1132	if(hhash->HashInCount >= 68)
bogdanm	0:9b334a45a8ff	1133	{
bogdanm	0:9b334a45a8ff	1134	inputaddr = (uint32_t)hhash->pHashInBuffPtr;
bogdanm	0:9b334a45a8ff	1135	/* Write the Input block in the Data IN register */
bogdanm	0:9b334a45a8ff	1136	for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
bogdanm	0:9b334a45a8ff	1137	{
bogdanm	0:9b334a45a8ff	1138	HASH->DIN = (uint32_t)inputaddr;
bogdanm	0:9b334a45a8ff	1139	inputaddr+=4;
bogdanm	0:9b334a45a8ff	1140	}
bogdanm	0:9b334a45a8ff	1141	if(hhash->HashITCounter == 0)
bogdanm	0:9b334a45a8ff	1142	{
bogdanm	0:9b334a45a8ff	1143	HASH->DIN = (uint32_t)inputaddr;
bogdanm	0:9b334a45a8ff	1144
bogdanm	0:9b334a45a8ff	1145	if(hhash->HashInCount >= 68)
bogdanm	0:9b334a45a8ff	1146	{
bogdanm	0:9b334a45a8ff	1147	/* Decrement buffer counter */
bogdanm	0:9b334a45a8ff	1148	hhash->HashInCount -= 68;
bogdanm	0:9b334a45a8ff	1149	hhash->pHashInBuffPtr+= 68;
bogdanm	0:9b334a45a8ff	1150	}
bogdanm	0:9b334a45a8ff	1151	else
bogdanm	0:9b334a45a8ff	1152	{
bogdanm	0:9b334a45a8ff	1153	hhash->HashInCount = 0;
bogdanm	0:9b334a45a8ff	1154	hhash->pHashInBuffPtr+= hhash->HashInCount;
bogdanm	0:9b334a45a8ff	1155	}
bogdanm	0:9b334a45a8ff	1156	/* Set Interrupt counter */
bogdanm	0:9b334a45a8ff	1157	hhash->HashITCounter = 1;
bogdanm	0:9b334a45a8ff	1158	}
bogdanm	0:9b334a45a8ff	1159	else
bogdanm	0:9b334a45a8ff	1160	{
bogdanm	0:9b334a45a8ff	1161	/* Decrement buffer counter */
bogdanm	0:9b334a45a8ff	1162	hhash->HashInCount -= 64;
bogdanm	0:9b334a45a8ff	1163	hhash->pHashInBuffPtr+= 64;
bogdanm	0:9b334a45a8ff	1164	}
bogdanm	0:9b334a45a8ff	1165	}
bogdanm	0:9b334a45a8ff	1166	else
bogdanm	0:9b334a45a8ff	1167	{
bogdanm	0:9b334a45a8ff	1168	/* Get the buffer address */
bogdanm	0:9b334a45a8ff	1169	inputaddr = (uint32_t)hhash->pHashInBuffPtr;
bogdanm	0:9b334a45a8ff	1170	/* Get the buffer counter */
bogdanm	0:9b334a45a8ff	1171	inputcounter = hhash->HashInCount;
bogdanm	0:9b334a45a8ff	1172	/* Disable Interrupts */
bogdanm	0:9b334a45a8ff	1173	HASH->IMR &= ~(HASH_IT_DINI);
bogdanm	0:9b334a45a8ff	1174	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	1175	__HAL_HASH_SET_NBVALIDBITS(inputcounter);
bogdanm	0:9b334a45a8ff	1176
bogdanm	0:9b334a45a8ff	1177	if((inputcounter > 4) && (inputcounter%4))
bogdanm	0:9b334a45a8ff	1178	{
bogdanm	0:9b334a45a8ff	1179	inputcounter = (inputcounter+4-inputcounter%4);
bogdanm	0:9b334a45a8ff	1180	}
bogdanm	0:9b334a45a8ff	1181	else if ((inputcounter < 4) && (inputcounter != 0))
bogdanm	0:9b334a45a8ff	1182	{
bogdanm	0:9b334a45a8ff	1183	inputcounter = 4;
bogdanm	0:9b334a45a8ff	1184	}
bogdanm	0:9b334a45a8ff	1185
bogdanm	0:9b334a45a8ff	1186	/* Write the Input block in the Data IN register */
bogdanm	0:9b334a45a8ff	1187	for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
bogdanm	0:9b334a45a8ff	1188	{
bogdanm	0:9b334a45a8ff	1189	HASH->DIN = (uint32_t)inputaddr;
bogdanm	0:9b334a45a8ff	1190	inputaddr+=4;
bogdanm	0:9b334a45a8ff	1191	}
bogdanm	0:9b334a45a8ff	1192	/* Start the digest calculation */
bogdanm	0:9b334a45a8ff	1193	__HAL_HASH_START_DIGEST();
bogdanm	0:9b334a45a8ff	1194	/* Reset buffer counter */
bogdanm	0:9b334a45a8ff	1195	hhash->HashInCount = 0;
bogdanm	0:9b334a45a8ff	1196	/* Call Input data transfer complete callback */
bogdanm	0:9b334a45a8ff	1197	HAL_HASH_InCpltCallback(hhash);
bogdanm	0:9b334a45a8ff	1198	}
bogdanm	0:9b334a45a8ff	1199	}
bogdanm	0:9b334a45a8ff	1200
bogdanm	0:9b334a45a8ff	1201	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1202	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1203
bogdanm	0:9b334a45a8ff	1204	/* Return function status */
bogdanm	0:9b334a45a8ff	1205	return HAL_OK;
bogdanm	0:9b334a45a8ff	1206	}
bogdanm	0:9b334a45a8ff	1207
bogdanm	0:9b334a45a8ff	1208	/**
bogdanm	0:9b334a45a8ff	1209	* @brief This function handles HASH interrupt request.
bogdanm	0:9b334a45a8ff	1210	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1211	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1212	* @retval None
bogdanm	0:9b334a45a8ff	1213	*/
bogdanm	0:9b334a45a8ff	1214	void HAL_HASHEx_IRQHandler(HASH_HandleTypeDef *hhash)
bogdanm	0:9b334a45a8ff	1215	{
bogdanm	0:9b334a45a8ff	1216	switch(HASH->CR & HASH_CR_ALGO)
bogdanm	0:9b334a45a8ff	1217	{
bogdanm	0:9b334a45a8ff	1218
bogdanm	0:9b334a45a8ff	1219	case HASH_ALGOSELECTION_SHA224:
bogdanm	0:9b334a45a8ff	1220	HAL_HASHEx_SHA224_Start_IT(hhash, NULL, 0, NULL);
bogdanm	0:9b334a45a8ff	1221	break;
bogdanm	0:9b334a45a8ff	1222
bogdanm	0:9b334a45a8ff	1223	case HASH_ALGOSELECTION_SHA256:
bogdanm	0:9b334a45a8ff	1224	HAL_HASHEx_SHA256_Start_IT(hhash, NULL, 0, NULL);
bogdanm	0:9b334a45a8ff	1225	break;
bogdanm	0:9b334a45a8ff	1226
bogdanm	0:9b334a45a8ff	1227	default:
bogdanm	0:9b334a45a8ff	1228	break;
bogdanm	0:9b334a45a8ff	1229	}
bogdanm	0:9b334a45a8ff	1230	}
bogdanm	0:9b334a45a8ff	1231
bogdanm	0:9b334a45a8ff	1232	/**
bogdanm	0:9b334a45a8ff	1233	* @}
bogdanm	0:9b334a45a8ff	1234	*/
bogdanm	0:9b334a45a8ff	1235
bogdanm	0:9b334a45a8ff	1236	/** @defgroup HASHEx_Group4 HASH processing functions using DMA mode
bogdanm	0:9b334a45a8ff	1237	* @brief processing functions using DMA mode.
bogdanm	0:9b334a45a8ff	1238	*
bogdanm	0:9b334a45a8ff	1239	@verbatim
bogdanm	0:9b334a45a8ff	1240	===============================================================================
bogdanm	0:9b334a45a8ff	1241	##### HASH processing using DMA functions #####
bogdanm	0:9b334a45a8ff	1242	===============================================================================
bogdanm	0:9b334a45a8ff	1243	[..] This section provides functions allowing to calculate in DMA mode
bogdanm	0:9b334a45a8ff	1244	the hash value using one of the following algorithms:
bogdanm	0:9b334a45a8ff	1245	(+) SHA224
bogdanm	0:9b334a45a8ff	1246	(+) SHA256
bogdanm	0:9b334a45a8ff	1247
bogdanm	0:9b334a45a8ff	1248	@endverbatim
bogdanm	0:9b334a45a8ff	1249	* @{
bogdanm	0:9b334a45a8ff	1250	*/
bogdanm	0:9b334a45a8ff	1251
bogdanm	0:9b334a45a8ff	1252
bogdanm	0:9b334a45a8ff	1253	/**
bogdanm	0:9b334a45a8ff	1254	* @brief Initializes the HASH peripheral in SHA224 mode then enables DMA to
bogdanm	0:9b334a45a8ff	1255	control data transfer. Use HAL_HASH_SHA224_Finish() to get the digest.
bogdanm	0:9b334a45a8ff	1256	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1257	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1258	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	1259	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	1260	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	1261	* @retval HAL status
bogdanm	0:9b334a45a8ff	1262	*/
bogdanm	0:9b334a45a8ff	1263	HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size)
bogdanm	0:9b334a45a8ff	1264	{
bogdanm	0:9b334a45a8ff	1265	uint32_t inputaddr = (uint32_t)pInBuffer;
bogdanm	0:9b334a45a8ff	1266
bogdanm	0:9b334a45a8ff	1267	/* Process Locked */
bogdanm	0:9b334a45a8ff	1268	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	1269
bogdanm	0:9b334a45a8ff	1270	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	1271	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1272
bogdanm	0:9b334a45a8ff	1273	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	1274	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	1275	{
bogdanm	0:9b334a45a8ff	1276	/* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	1277	the message digest of a new message */
bogdanm	0:9b334a45a8ff	1278	HASH->CR \|= HASH_ALGOSELECTION_SHA224 \| HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	1279	}
bogdanm	0:9b334a45a8ff	1280
bogdanm	0:9b334a45a8ff	1281	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	1282	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	1283
bogdanm	0:9b334a45a8ff	1284	/* Set the phase */
bogdanm	0:9b334a45a8ff	1285	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	1286
bogdanm	0:9b334a45a8ff	1287	/* Set the HASH DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1288	hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
bogdanm	0:9b334a45a8ff	1289	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1290	hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
bogdanm	0:9b334a45a8ff	1291
bogdanm	0:9b334a45a8ff	1292	/* Enable the DMA In DMA Stream */
bogdanm	0:9b334a45a8ff	1293	HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
bogdanm	0:9b334a45a8ff	1294
bogdanm	0:9b334a45a8ff	1295	/* Enable DMA requests */
bogdanm	0:9b334a45a8ff	1296	HASH->CR \|= (HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	1297
bogdanm	0:9b334a45a8ff	1298	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1299	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1300
bogdanm	0:9b334a45a8ff	1301	/* Return function status */
bogdanm	0:9b334a45a8ff	1302	return HAL_OK;
bogdanm	0:9b334a45a8ff	1303	}
bogdanm	0:9b334a45a8ff	1304
bogdanm	0:9b334a45a8ff	1305	/**
bogdanm	0:9b334a45a8ff	1306	* @brief Returns the computed digest in SHA224
bogdanm	0:9b334a45a8ff	1307	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1308	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1309	* @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
bogdanm	0:9b334a45a8ff	1310	* @param Timeout: Timeout value
bogdanm	0:9b334a45a8ff	1311	* @retval HAL status
bogdanm	0:9b334a45a8ff	1312	*/
bogdanm	0:9b334a45a8ff	1313	HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef hhash, uint8_t pOutBuffer, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1314	{
bogdanm	0:9b334a45a8ff	1315	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	1316
bogdanm	0:9b334a45a8ff	1317	/* Process Locked */
bogdanm	0:9b334a45a8ff	1318	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	1319
bogdanm	0:9b334a45a8ff	1320	/* Change HASH peripheral state */
bogdanm	0:9b334a45a8ff	1321	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1322
bogdanm	0:9b334a45a8ff	1323	/* Get tick */
bogdanm	0:9b334a45a8ff	1324	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1325
bogdanm	0:9b334a45a8ff	1326	while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
bogdanm	0:9b334a45a8ff	1327	{
bogdanm	0:9b334a45a8ff	1328	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1329	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1330	{
bogdanm	0:9b334a45a8ff	1331	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	1332	{
bogdanm	0:9b334a45a8ff	1333	/* Change state */
bogdanm	0:9b334a45a8ff	1334	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	1335
bogdanm	0:9b334a45a8ff	1336	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1337	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1338
bogdanm	0:9b334a45a8ff	1339	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1340	}
bogdanm	0:9b334a45a8ff	1341	}
bogdanm	0:9b334a45a8ff	1342	}
bogdanm	0:9b334a45a8ff	1343
bogdanm	0:9b334a45a8ff	1344	/* Read the message digest */
bogdanm	0:9b334a45a8ff	1345	HASHEx_GetDigest(pOutBuffer, 28);
bogdanm	0:9b334a45a8ff	1346
bogdanm	0:9b334a45a8ff	1347	/* Change HASH peripheral state */
bogdanm	0:9b334a45a8ff	1348	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	1349
bogdanm	0:9b334a45a8ff	1350	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1351	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1352
bogdanm	0:9b334a45a8ff	1353	/* Return function status */
bogdanm	0:9b334a45a8ff	1354	return HAL_OK;
bogdanm	0:9b334a45a8ff	1355	}
bogdanm	0:9b334a45a8ff	1356
bogdanm	0:9b334a45a8ff	1357	/**
bogdanm	0:9b334a45a8ff	1358	* @brief Initializes the HASH peripheral in SHA256 mode then enables DMA to
bogdanm	0:9b334a45a8ff	1359	control data transfer. Use HAL_HASH_SHA256_Finish() to get the digest.
bogdanm	0:9b334a45a8ff	1360	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1361	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1362	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	1363	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	1364	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	1365	* @retval HAL status
bogdanm	0:9b334a45a8ff	1366	*/
bogdanm	0:9b334a45a8ff	1367	HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size)
bogdanm	0:9b334a45a8ff	1368	{
bogdanm	0:9b334a45a8ff	1369	uint32_t inputaddr = (uint32_t)pInBuffer;
bogdanm	0:9b334a45a8ff	1370
bogdanm	0:9b334a45a8ff	1371	/* Process Locked */
bogdanm	0:9b334a45a8ff	1372	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	1373
bogdanm	0:9b334a45a8ff	1374	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	1375	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1376
bogdanm	0:9b334a45a8ff	1377	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	1378	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	1379	{
bogdanm	0:9b334a45a8ff	1380	/* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	1381	the message digest of a new message */
bogdanm	0:9b334a45a8ff	1382	HASH->CR \|= HASH_ALGOSELECTION_SHA256 \| HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	1383	}
bogdanm	0:9b334a45a8ff	1384
bogdanm	0:9b334a45a8ff	1385	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	1386	__HAL_HASH_SET_NBVALIDBITS(Size);
bogdanm	0:9b334a45a8ff	1387
bogdanm	0:9b334a45a8ff	1388	/* Set the phase */
bogdanm	0:9b334a45a8ff	1389	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	1390
bogdanm	0:9b334a45a8ff	1391	/* Set the HASH DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1392	hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
bogdanm	0:9b334a45a8ff	1393	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1394	hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
bogdanm	0:9b334a45a8ff	1395
bogdanm	0:9b334a45a8ff	1396	/* Enable the DMA In DMA Stream */
bogdanm	0:9b334a45a8ff	1397	HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
bogdanm	0:9b334a45a8ff	1398
bogdanm	0:9b334a45a8ff	1399	/* Enable DMA requests */
bogdanm	0:9b334a45a8ff	1400	HASH->CR \|= (HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	1401
bogdanm	0:9b334a45a8ff	1402	/* Process UnLock */
bogdanm	0:9b334a45a8ff	1403	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1404
bogdanm	0:9b334a45a8ff	1405	/* Return function status */
bogdanm	0:9b334a45a8ff	1406	return HAL_OK;
bogdanm	0:9b334a45a8ff	1407	}
bogdanm	0:9b334a45a8ff	1408
bogdanm	0:9b334a45a8ff	1409	/**
bogdanm	0:9b334a45a8ff	1410	* @brief Returns the computed digest in SHA256.
bogdanm	0:9b334a45a8ff	1411	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1412	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1413	* @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
bogdanm	0:9b334a45a8ff	1414	* @param Timeout: Timeout value
bogdanm	0:9b334a45a8ff	1415	* @retval HAL status
bogdanm	0:9b334a45a8ff	1416	*/
bogdanm	0:9b334a45a8ff	1417	HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef hhash, uint8_t pOutBuffer, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1418	{
bogdanm	0:9b334a45a8ff	1419	uint32_t tickstart = 0;
bogdanm	0:9b334a45a8ff	1420
bogdanm	0:9b334a45a8ff	1421	/* Process Locked */
bogdanm	0:9b334a45a8ff	1422	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	1423
bogdanm	0:9b334a45a8ff	1424	/* Change HASH peripheral state */
bogdanm	0:9b334a45a8ff	1425	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1426
bogdanm	0:9b334a45a8ff	1427	/* Get tick */
bogdanm	0:9b334a45a8ff	1428	tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1429
bogdanm	0:9b334a45a8ff	1430	while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
bogdanm	0:9b334a45a8ff	1431	{
bogdanm	0:9b334a45a8ff	1432	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1433	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1434	{
bogdanm	0:9b334a45a8ff	1435	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
bogdanm	0:9b334a45a8ff	1436	{
bogdanm	0:9b334a45a8ff	1437	/* Change state */
bogdanm	0:9b334a45a8ff	1438	hhash->State = HAL_HASH_STATE_TIMEOUT;
bogdanm	0:9b334a45a8ff	1439
bogdanm	0:9b334a45a8ff	1440	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1441	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1442
bogdanm	0:9b334a45a8ff	1443	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1444	}
bogdanm	0:9b334a45a8ff	1445	}
bogdanm	0:9b334a45a8ff	1446	}
bogdanm	0:9b334a45a8ff	1447
bogdanm	0:9b334a45a8ff	1448	/* Read the message digest */
bogdanm	0:9b334a45a8ff	1449	HASHEx_GetDigest(pOutBuffer, 32);
bogdanm	0:9b334a45a8ff	1450
bogdanm	0:9b334a45a8ff	1451	/* Change HASH peripheral state */
bogdanm	0:9b334a45a8ff	1452	hhash->State = HAL_HASH_STATE_READY;
bogdanm	0:9b334a45a8ff	1453
bogdanm	0:9b334a45a8ff	1454	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1455	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1456
bogdanm	0:9b334a45a8ff	1457	/* Return function status */
bogdanm	0:9b334a45a8ff	1458	return HAL_OK;
bogdanm	0:9b334a45a8ff	1459	}
bogdanm	0:9b334a45a8ff	1460
bogdanm	0:9b334a45a8ff	1461
bogdanm	0:9b334a45a8ff	1462	/**
bogdanm	0:9b334a45a8ff	1463	* @}
bogdanm	0:9b334a45a8ff	1464	*/
bogdanm	0:9b334a45a8ff	1465	/** @defgroup HASHEx_Group5 HMAC processing functions using DMA mode
bogdanm	0:9b334a45a8ff	1466	* @brief HMAC processing functions using DMA mode .
bogdanm	0:9b334a45a8ff	1467	*
bogdanm	0:9b334a45a8ff	1468	@verbatim
bogdanm	0:9b334a45a8ff	1469	===============================================================================
bogdanm	0:9b334a45a8ff	1470	##### HMAC processing using DMA functions #####
bogdanm	0:9b334a45a8ff	1471	===============================================================================
bogdanm	0:9b334a45a8ff	1472	[..] This section provides functions allowing to calculate in DMA mode
bogdanm	0:9b334a45a8ff	1473	the HMAC value using one of the following algorithms:
bogdanm	0:9b334a45a8ff	1474	(+) SHA224
bogdanm	0:9b334a45a8ff	1475	(+) SHA256
bogdanm	0:9b334a45a8ff	1476
bogdanm	0:9b334a45a8ff	1477	@endverbatim
bogdanm	0:9b334a45a8ff	1478	* @{
bogdanm	0:9b334a45a8ff	1479	*/
bogdanm	0:9b334a45a8ff	1480
bogdanm	0:9b334a45a8ff	1481	/**
bogdanm	0:9b334a45a8ff	1482	* @brief Initializes the HASH peripheral in HMAC SHA224 mode
bogdanm	0:9b334a45a8ff	1483	* then enables DMA to control data transfer.
bogdanm	0:9b334a45a8ff	1484	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1485	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1486	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	1487	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	1488	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	1489	* @retval HAL status
bogdanm	0:9b334a45a8ff	1490	*/
bogdanm	0:9b334a45a8ff	1491	HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size)
bogdanm	0:9b334a45a8ff	1492	{
bogdanm	0:9b334a45a8ff	1493	uint32_t inputaddr;
bogdanm	0:9b334a45a8ff	1494
bogdanm	0:9b334a45a8ff	1495	/* Process Locked */
bogdanm	0:9b334a45a8ff	1496	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	1497
bogdanm	0:9b334a45a8ff	1498	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	1499	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1500
bogdanm	0:9b334a45a8ff	1501	/* Save buffer pointer and size in handle */
bogdanm	0:9b334a45a8ff	1502	hhash->pHashInBuffPtr = pInBuffer;
bogdanm	0:9b334a45a8ff	1503	hhash->HashBuffSize = Size;
bogdanm	0:9b334a45a8ff	1504	hhash->HashInCount = 0;
bogdanm	0:9b334a45a8ff	1505
bogdanm	0:9b334a45a8ff	1506	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	1507	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	1508	{
bogdanm	0:9b334a45a8ff	1509	/* Check if key size is greater than 64 bytes */
bogdanm	0:9b334a45a8ff	1510	if(hhash->Init.KeySize > 64)
bogdanm	0:9b334a45a8ff	1511	{
bogdanm	0:9b334a45a8ff	1512	/* Select the HMAC SHA224 mode */
bogdanm	0:9b334a45a8ff	1513	HASH->CR \|= (HASH_ALGOSELECTION_SHA224 \| HASH_ALGOMODE_HMAC \| HASH_HMAC_KEYTYPE_LONGKEY \| HASH_CR_INIT);
bogdanm	0:9b334a45a8ff	1514	}
bogdanm	0:9b334a45a8ff	1515	else
bogdanm	0:9b334a45a8ff	1516	{
bogdanm	0:9b334a45a8ff	1517	/* Select the HMAC SHA224 mode */
bogdanm	0:9b334a45a8ff	1518	HASH->CR \|= (HASH_ALGOSELECTION_SHA224 \| HASH_ALGOMODE_HMAC \| HASH_CR_INIT);
bogdanm	0:9b334a45a8ff	1519	}
bogdanm	0:9b334a45a8ff	1520	}
bogdanm	0:9b334a45a8ff	1521
bogdanm	0:9b334a45a8ff	1522	/* Set the phase */
bogdanm	0:9b334a45a8ff	1523	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	1524
bogdanm	0:9b334a45a8ff	1525	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	1526	__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	1527
bogdanm	0:9b334a45a8ff	1528	/* Get the key address */
bogdanm	0:9b334a45a8ff	1529	inputaddr = (uint32_t)(hhash->Init.pKey);
bogdanm	0:9b334a45a8ff	1530
bogdanm	0:9b334a45a8ff	1531	/* Set the HASH DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1532	hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
bogdanm	0:9b334a45a8ff	1533	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1534	hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
bogdanm	0:9b334a45a8ff	1535
bogdanm	0:9b334a45a8ff	1536	/* Enable the DMA In DMA Stream */
bogdanm	0:9b334a45a8ff	1537	HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
bogdanm	0:9b334a45a8ff	1538	/* Enable DMA requests */
bogdanm	0:9b334a45a8ff	1539	HASH->CR \|= (HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	1540
bogdanm	0:9b334a45a8ff	1541	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1542	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1543
bogdanm	0:9b334a45a8ff	1544	/* Return function status */
bogdanm	0:9b334a45a8ff	1545	return HAL_OK;
bogdanm	0:9b334a45a8ff	1546	}
bogdanm	0:9b334a45a8ff	1547
bogdanm	0:9b334a45a8ff	1548	/**
bogdanm	0:9b334a45a8ff	1549	* @brief Initializes the HASH peripheral in HMAC SHA256 mode
bogdanm	0:9b334a45a8ff	1550	* then enables DMA to control data transfer.
bogdanm	0:9b334a45a8ff	1551	* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1552	* the configuration information for HASH module
bogdanm	0:9b334a45a8ff	1553	* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
bogdanm	0:9b334a45a8ff	1554	* @param Size: Length of the input buffer in bytes.
bogdanm	0:9b334a45a8ff	1555	* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
bogdanm	0:9b334a45a8ff	1556	* @retval HAL status
bogdanm	0:9b334a45a8ff	1557	*/
bogdanm	0:9b334a45a8ff	1558	HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef hhash, uint8_t pInBuffer, uint32_t Size)
bogdanm	0:9b334a45a8ff	1559	{
bogdanm	0:9b334a45a8ff	1560	uint32_t inputaddr;
bogdanm	0:9b334a45a8ff	1561
bogdanm	0:9b334a45a8ff	1562	/* Process Locked */
bogdanm	0:9b334a45a8ff	1563	__HAL_LOCK(hhash);
bogdanm	0:9b334a45a8ff	1564
bogdanm	0:9b334a45a8ff	1565	/* Change the HASH state */
bogdanm	0:9b334a45a8ff	1566	hhash->State = HAL_HASH_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1567
bogdanm	0:9b334a45a8ff	1568	/* Save buffer pointer and size in handle */
bogdanm	0:9b334a45a8ff	1569	hhash->pHashInBuffPtr = pInBuffer;
bogdanm	0:9b334a45a8ff	1570	hhash->HashBuffSize = Size;
bogdanm	0:9b334a45a8ff	1571	hhash->HashInCount = 0;
bogdanm	0:9b334a45a8ff	1572
bogdanm	0:9b334a45a8ff	1573	/* Check if initialization phase has already been performed */
bogdanm	0:9b334a45a8ff	1574	if(hhash->Phase == HAL_HASH_PHASE_READY)
bogdanm	0:9b334a45a8ff	1575	{
bogdanm	0:9b334a45a8ff	1576	/* Check if key size is greater than 64 bytes */
bogdanm	0:9b334a45a8ff	1577	if(hhash->Init.KeySize > 64)
bogdanm	0:9b334a45a8ff	1578	{
bogdanm	0:9b334a45a8ff	1579	/* Select the HMAC SHA256 mode */
bogdanm	0:9b334a45a8ff	1580	HASH->CR \|= (HASH_ALGOSELECTION_SHA256 \| HASH_ALGOMODE_HMAC \| HASH_HMAC_KEYTYPE_LONGKEY);
bogdanm	0:9b334a45a8ff	1581	}
bogdanm	0:9b334a45a8ff	1582	else
bogdanm	0:9b334a45a8ff	1583	{
bogdanm	0:9b334a45a8ff	1584	/* Select the HMAC SHA256 mode */
bogdanm	0:9b334a45a8ff	1585	HASH->CR \|= (HASH_ALGOSELECTION_SHA256 \| HASH_ALGOMODE_HMAC);
bogdanm	0:9b334a45a8ff	1586	}
bogdanm	0:9b334a45a8ff	1587	/* Reset the HASH processor core, so that the HASH will be ready to compute
bogdanm	0:9b334a45a8ff	1588	the message digest of a new message */
bogdanm	0:9b334a45a8ff	1589	HASH->CR \|= HASH_CR_INIT;
bogdanm	0:9b334a45a8ff	1590	}
bogdanm	0:9b334a45a8ff	1591
bogdanm	0:9b334a45a8ff	1592	/* Set the phase */
bogdanm	0:9b334a45a8ff	1593	hhash->Phase = HAL_HASH_PHASE_PROCESS;
bogdanm	0:9b334a45a8ff	1594
bogdanm	0:9b334a45a8ff	1595	/* Configure the number of valid bits in last word of the message */
bogdanm	0:9b334a45a8ff	1596	__HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
bogdanm	0:9b334a45a8ff	1597
bogdanm	0:9b334a45a8ff	1598	/* Get the key address */
bogdanm	0:9b334a45a8ff	1599	inputaddr = (uint32_t)(hhash->Init.pKey);
bogdanm	0:9b334a45a8ff	1600
bogdanm	0:9b334a45a8ff	1601	/* Set the HASH DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	1602	hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
bogdanm	0:9b334a45a8ff	1603	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	1604	hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
bogdanm	0:9b334a45a8ff	1605
bogdanm	0:9b334a45a8ff	1606	/* Enable the DMA In DMA Stream */
bogdanm	0:9b334a45a8ff	1607	HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
bogdanm	0:9b334a45a8ff	1608	/* Enable DMA requests */
bogdanm	0:9b334a45a8ff	1609	HASH->CR \|= (HASH_CR_DMAE);
bogdanm	0:9b334a45a8ff	1610
bogdanm	0:9b334a45a8ff	1611	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1612	__HAL_UNLOCK(hhash);
bogdanm	0:9b334a45a8ff	1613
bogdanm	0:9b334a45a8ff	1614	/* Return function status */
bogdanm	0:9b334a45a8ff	1615	return HAL_OK;
bogdanm	0:9b334a45a8ff	1616	}
bogdanm	0:9b334a45a8ff	1617
bogdanm	0:9b334a45a8ff	1618	/**
bogdanm	0:9b334a45a8ff	1619	* @}
bogdanm	0:9b334a45a8ff	1620	*/
bogdanm	0:9b334a45a8ff	1621
bogdanm	0:9b334a45a8ff	1622	/**
bogdanm	0:9b334a45a8ff	1623	* @}
bogdanm	0:9b334a45a8ff	1624	*/
bogdanm	0:9b334a45a8ff	1625	#endif /* HAL_HASH_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	1626
bogdanm	0:9b334a45a8ff	1627	/**
bogdanm	0:9b334a45a8ff	1628	* @}
bogdanm	0:9b334a45a8ff	1629	*/
bogdanm	0:9b334a45a8ff	1630	#endif /* STM32F756xx */
bogdanm	0:9b334a45a8ff	1631
bogdanm	0:9b334a45a8ff	1632	/**
bogdanm	0:9b334a45a8ff	1633	* @}
bogdanm	0:9b334a45a8ff	1634	*/
bogdanm	0:9b334a45a8ff	1635
bogdanm	0:9b334a45a8ff	1636	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_hash_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

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