en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_adc_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
83:a036322b8637 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_adc_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 83:a036322b8637 5 * @version V1.0.4
mbed_official 83:a036322b8637 6 * @date 09-December-2015
bogdanm 0:9b334a45a8ff 7 * @brief This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 8 * functionalities of the ADC extension peripheral:
bogdanm 0:9b334a45a8ff 9 * + Extended features functions
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 @verbatim
bogdanm 0:9b334a45a8ff 12 ==============================================================================
bogdanm 0:9b334a45a8ff 13 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 14 ==============================================================================
bogdanm 0:9b334a45a8ff 15 [..]
bogdanm 0:9b334a45a8ff 16 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
bogdanm 0:9b334a45a8ff 17 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 18 (##) ADC pins configuration
bogdanm 0:9b334a45a8ff 19 (+++) Enable the clock for the ADC GPIOs using the following function:
bogdanm 0:9b334a45a8ff 20 __HAL_RCC_GPIOx_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 21 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
bogdanm 0:9b334a45a8ff 22 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
bogdanm 0:9b334a45a8ff 23 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
bogdanm 0:9b334a45a8ff 24 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
bogdanm 0:9b334a45a8ff 25 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
bogdanm 0:9b334a45a8ff 26 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
bogdanm 0:9b334a45a8ff 27 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
bogdanm 0:9b334a45a8ff 28 (+++) Configure and enable two DMA streams stream for managing data
bogdanm 0:9b334a45a8ff 29 transfer from peripheral to memory (output stream)
bogdanm 0:9b334a45a8ff 30 (+++) Associate the initialized DMA handle to the ADC DMA handle
bogdanm 0:9b334a45a8ff 31 using __HAL_LINKDMA()
bogdanm 0:9b334a45a8ff 32 (+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm 0:9b334a45a8ff 33 interrupt on the two DMA Streams. The output stream should have higher
bogdanm 0:9b334a45a8ff 34 priority than the input stream.
bogdanm 0:9b334a45a8ff 35 (#) Configure the ADC Prescaler, conversion resolution and data alignment
bogdanm 0:9b334a45a8ff 36 using the HAL_ADC_Init() function.
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 (#) Configure the ADC Injected channels group features, use HAL_ADC_Init()
bogdanm 0:9b334a45a8ff 39 and HAL_ADC_ConfigChannel() functions.
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 (#) Three operation modes are available within this driver :
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 44 =================================
bogdanm 0:9b334a45a8ff 45 [..]
bogdanm 0:9b334a45a8ff 46 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart()
bogdanm 0:9b334a45a8ff 47 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
bogdanm 0:9b334a45a8ff 48 user can specify the value of timeout according to his end application
bogdanm 0:9b334a45a8ff 49 (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function.
bogdanm 0:9b334a45a8ff 50 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop()
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 53 ===================================
bogdanm 0:9b334a45a8ff 54 [..]
bogdanm 0:9b334a45a8ff 55 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT()
bogdanm 0:9b334a45a8ff 56 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
bogdanm 0:9b334a45a8ff 57 (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 58 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
bogdanm 0:9b334a45a8ff 59 (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 60 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
bogdanm 0:9b334a45a8ff 61 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT()
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 65 ==============================
bogdanm 0:9b334a45a8ff 66 [..]
bogdanm 0:9b334a45a8ff 67 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length
bogdanm 0:9b334a45a8ff 68 of data to be transferred at each end of conversion
bogdanm 0:9b334a45a8ff 69 (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 70 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
bogdanm 0:9b334a45a8ff 71 (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 72 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
bogdanm 0:9b334a45a8ff 73 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA()
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 *** Multi mode ADCs Regular channels configuration ***
bogdanm 0:9b334a45a8ff 76 ======================================================
bogdanm 0:9b334a45a8ff 77 [..]
bogdanm 0:9b334a45a8ff 78 (+) Select the Multi mode ADC regular channels features (dual or triple mode)
bogdanm 0:9b334a45a8ff 79 and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions.
bogdanm 0:9b334a45a8ff 80 (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length
bogdanm 0:9b334a45a8ff 81 of data to be transferred at each end of conversion
bogdanm 0:9b334a45a8ff 82 (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 @endverbatim
bogdanm 0:9b334a45a8ff 86 ******************************************************************************
bogdanm 0:9b334a45a8ff 87 * @attention
bogdanm 0:9b334a45a8ff 88 *
bogdanm 0:9b334a45a8ff 89 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 90 *
bogdanm 0:9b334a45a8ff 91 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 92 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 93 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 94 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 95 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 96 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 97 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 99 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 100 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 101 *
bogdanm 0:9b334a45a8ff 102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 112 *
bogdanm 0:9b334a45a8ff 113 ******************************************************************************
bogdanm 0:9b334a45a8ff 114 */
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 117 #include "stm32f7xx_hal.h"
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 120 * @{
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 /** @defgroup ADCEx ADCEx
bogdanm 0:9b334a45a8ff 124 * @brief ADC Extended driver modules
bogdanm 0:9b334a45a8ff 125 * @{
bogdanm 0:9b334a45a8ff 126 */
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 #ifdef HAL_ADC_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 131 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 132 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 133 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 134 /** @addtogroup ADCEx_Private_Functions
bogdanm 0:9b334a45a8ff 135 * @{
bogdanm 0:9b334a45a8ff 136 */
mbed_official 83:a036322b8637 137 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 138 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 139 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma);
mbed_official 83:a036322b8637 140 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 141 /**
bogdanm 0:9b334a45a8ff 142 * @}
bogdanm 0:9b334a45a8ff 143 */
bogdanm 0:9b334a45a8ff 144
mbed_official 83:a036322b8637 145 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 146 /** @defgroup ADCEx_Exported_Functions ADC Exported Functions
bogdanm 0:9b334a45a8ff 147 * @{
mbed_official 83:a036322b8637 148 */
bogdanm 0:9b334a45a8ff 149
mbed_official 83:a036322b8637 150 /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions
mbed_official 83:a036322b8637 151 * @brief Extended features functions
mbed_official 83:a036322b8637 152 *
bogdanm 0:9b334a45a8ff 153 @verbatim
bogdanm 0:9b334a45a8ff 154 ===============================================================================
bogdanm 0:9b334a45a8ff 155 ##### Extended features functions #####
bogdanm 0:9b334a45a8ff 156 ===============================================================================
bogdanm 0:9b334a45a8ff 157 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 158 (+) Start conversion of injected channel.
bogdanm 0:9b334a45a8ff 159 (+) Stop conversion of injected channel.
bogdanm 0:9b334a45a8ff 160 (+) Start multimode and enable DMA transfer.
bogdanm 0:9b334a45a8ff 161 (+) Stop multimode and disable DMA transfer.
bogdanm 0:9b334a45a8ff 162 (+) Get result of injected channel conversion.
bogdanm 0:9b334a45a8ff 163 (+) Get result of multimode conversion.
bogdanm 0:9b334a45a8ff 164 (+) Configure injected channels.
bogdanm 0:9b334a45a8ff 165 (+) Configure multimode.
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 @endverbatim
bogdanm 0:9b334a45a8ff 168 * @{
bogdanm 0:9b334a45a8ff 169 */
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 /**
bogdanm 0:9b334a45a8ff 172 * @brief Enables the selected ADC software start conversion of the injected channels.
bogdanm 0:9b334a45a8ff 173 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 174 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 175 * @retval HAL status
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 178 {
bogdanm 0:9b334a45a8ff 179 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 180 uint32_t tmp1 = 0, tmp2 = 0;
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /* Process locked */
bogdanm 0:9b334a45a8ff 183 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 184
mbed_official 83:a036322b8637 185 /* Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 188 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 189 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 190 {
bogdanm 0:9b334a45a8ff 191 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 192 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 193
mbed_official 83:a036322b8637 194 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 195 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 196 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 197 while(counter != 0)
bogdanm 0:9b334a45a8ff 198 {
bogdanm 0:9b334a45a8ff 199 counter--;
bogdanm 0:9b334a45a8ff 200 }
bogdanm 0:9b334a45a8ff 201 }
bogdanm 0:9b334a45a8ff 202
mbed_official 83:a036322b8637 203 /* Start conversion if ADC is effectively enabled */
mbed_official 83:a036322b8637 204 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
bogdanm 0:9b334a45a8ff 205 {
mbed_official 83:a036322b8637 206 /* Set ADC state */
mbed_official 83:a036322b8637 207 /* - Clear state bitfield related to injected group conversion results */
mbed_official 83:a036322b8637 208 /* - Set state bitfield related to injected operation */
mbed_official 83:a036322b8637 209 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 210 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
mbed_official 83:a036322b8637 211 HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 212
mbed_official 83:a036322b8637 213 /* Check if a regular conversion is ongoing */
mbed_official 83:a036322b8637 214 /* Note: On this device, there is no ADC error code fields related to */
mbed_official 83:a036322b8637 215 /* conversions on group injected only. In case of conversion on */
mbed_official 83:a036322b8637 216 /* going on group regular, no error code is reset. */
mbed_official 83:a036322b8637 217 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
bogdanm 0:9b334a45a8ff 218 {
mbed_official 83:a036322b8637 219 /* Reset ADC all error code fields */
mbed_official 83:a036322b8637 220 ADC_CLEAR_ERRORCODE(hadc);
mbed_official 83:a036322b8637 221 }
mbed_official 83:a036322b8637 222
mbed_official 83:a036322b8637 223 /* Process unlocked */
mbed_official 83:a036322b8637 224 /* Unlock before starting ADC conversions: in case of potential */
mbed_official 83:a036322b8637 225 /* interruption, to let the process to ADC IRQ Handler. */
mbed_official 83:a036322b8637 226 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 227
mbed_official 83:a036322b8637 228 /* Clear injected group conversion flag */
mbed_official 83:a036322b8637 229 /* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official 83:a036322b8637 230 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official 83:a036322b8637 231
mbed_official 83:a036322b8637 232 /* Check if Multimode enabled */
mbed_official 83:a036322b8637 233 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
mbed_official 83:a036322b8637 234 {
mbed_official 83:a036322b8637 235 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
mbed_official 83:a036322b8637 236 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
mbed_official 83:a036322b8637 237 if(tmp1 && tmp2)
mbed_official 83:a036322b8637 238 {
mbed_official 83:a036322b8637 239 /* Enable the selected ADC software conversion for injected group */
mbed_official 83:a036322b8637 240 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
mbed_official 83:a036322b8637 241 }
mbed_official 83:a036322b8637 242 }
mbed_official 83:a036322b8637 243 else
mbed_official 83:a036322b8637 244 {
mbed_official 83:a036322b8637 245 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
mbed_official 83:a036322b8637 246 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
mbed_official 83:a036322b8637 247 if((hadc->Instance == ADC1) && tmp1 && tmp2)
mbed_official 83:a036322b8637 248 {
mbed_official 83:a036322b8637 249 /* Enable the selected ADC software conversion for injected group */
mbed_official 83:a036322b8637 250 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
mbed_official 83:a036322b8637 251 }
bogdanm 0:9b334a45a8ff 252 }
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 /* Return function status */
bogdanm 0:9b334a45a8ff 256 return HAL_OK;
bogdanm 0:9b334a45a8ff 257 }
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 /**
bogdanm 0:9b334a45a8ff 260 * @brief Enables the interrupt and starts ADC conversion of injected channels.
bogdanm 0:9b334a45a8ff 261 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 262 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 263 *
bogdanm 0:9b334a45a8ff 264 * @retval HAL status.
bogdanm 0:9b334a45a8ff 265 */
bogdanm 0:9b334a45a8ff 266 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 267 {
bogdanm 0:9b334a45a8ff 268 __IO uint32_t counter = 0;
mbed_official 83:a036322b8637 269 uint32_t tmp1 = 0, tmp2 = 0;
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /* Process locked */
bogdanm 0:9b334a45a8ff 272 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 273
mbed_official 83:a036322b8637 274 /* Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 277 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 278 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 279 {
bogdanm 0:9b334a45a8ff 280 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 281 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 282
mbed_official 83:a036322b8637 283 /* Delay for ADC stabilization time */
bogdanm 0:9b334a45a8ff 284 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 285 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 286 while(counter != 0)
bogdanm 0:9b334a45a8ff 287 {
bogdanm 0:9b334a45a8ff 288 counter--;
bogdanm 0:9b334a45a8ff 289 }
bogdanm 0:9b334a45a8ff 290 }
bogdanm 0:9b334a45a8ff 291
mbed_official 83:a036322b8637 292 /* Start conversion if ADC is effectively enabled */
mbed_official 83:a036322b8637 293 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official 83:a036322b8637 294 {
mbed_official 83:a036322b8637 295 /* Set ADC state */
mbed_official 83:a036322b8637 296 /* - Clear state bitfield related to injected group conversion results */
mbed_official 83:a036322b8637 297 /* - Set state bitfield related to injected operation */
mbed_official 83:a036322b8637 298 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 299 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
mbed_official 83:a036322b8637 300 HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 301
mbed_official 83:a036322b8637 302 /* Check if a regular conversion is ongoing */
mbed_official 83:a036322b8637 303 /* Note: On this device, there is no ADC error code fields related to */
mbed_official 83:a036322b8637 304 /* conversions on group injected only. In case of conversion on */
mbed_official 83:a036322b8637 305 /* going on group regular, no error code is reset. */
mbed_official 83:a036322b8637 306 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
mbed_official 83:a036322b8637 307 {
mbed_official 83:a036322b8637 308 /* Reset ADC all error code fields */
mbed_official 83:a036322b8637 309 ADC_CLEAR_ERRORCODE(hadc);
mbed_official 83:a036322b8637 310 }
mbed_official 83:a036322b8637 311
mbed_official 83:a036322b8637 312 /* Process unlocked */
mbed_official 83:a036322b8637 313 /* Unlock before starting ADC conversions: in case of potential */
mbed_official 83:a036322b8637 314 /* interruption, to let the process to ADC IRQ Handler. */
mbed_official 83:a036322b8637 315 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 316
mbed_official 83:a036322b8637 317 /* Clear injected group conversion flag */
mbed_official 83:a036322b8637 318 /* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official 83:a036322b8637 319 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official 83:a036322b8637 320
mbed_official 83:a036322b8637 321 /* Enable end of conversion interrupt for injected channels */
mbed_official 83:a036322b8637 322 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
mbed_official 83:a036322b8637 323
mbed_official 83:a036322b8637 324 /* Check if Multimode enabled */
mbed_official 83:a036322b8637 325 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
mbed_official 83:a036322b8637 326 {
mbed_official 83:a036322b8637 327 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
mbed_official 83:a036322b8637 328 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
mbed_official 83:a036322b8637 329 if(tmp1 && tmp2)
mbed_official 83:a036322b8637 330 {
mbed_official 83:a036322b8637 331 /* Enable the selected ADC software conversion for injected group */
mbed_official 83:a036322b8637 332 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
mbed_official 83:a036322b8637 333 }
mbed_official 83:a036322b8637 334 }
mbed_official 83:a036322b8637 335 else
mbed_official 83:a036322b8637 336 {
mbed_official 83:a036322b8637 337 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
mbed_official 83:a036322b8637 338 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
mbed_official 83:a036322b8637 339 if((hadc->Instance == ADC1) && tmp1 && tmp2)
mbed_official 83:a036322b8637 340 {
mbed_official 83:a036322b8637 341 /* Enable the selected ADC software conversion for injected group */
mbed_official 83:a036322b8637 342 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
mbed_official 83:a036322b8637 343 }
mbed_official 83:a036322b8637 344 }
mbed_official 83:a036322b8637 345 }
bogdanm 0:9b334a45a8ff 346
mbed_official 83:a036322b8637 347 /* Return function status */
mbed_official 83:a036322b8637 348 return HAL_OK;
mbed_official 83:a036322b8637 349 }
mbed_official 83:a036322b8637 350
mbed_official 83:a036322b8637 351 /**
mbed_official 83:a036322b8637 352 * @brief Stop conversion of injected channels. Disable ADC peripheral if
mbed_official 83:a036322b8637 353 * no regular conversion is on going.
mbed_official 83:a036322b8637 354 * @note If ADC must be disabled and if conversion is on going on
mbed_official 83:a036322b8637 355 * regular group, function HAL_ADC_Stop must be used to stop both
mbed_official 83:a036322b8637 356 * injected and regular groups, and disable the ADC.
mbed_official 83:a036322b8637 357 * @note If injected group mode auto-injection is enabled,
mbed_official 83:a036322b8637 358 * function HAL_ADC_Stop must be used.
mbed_official 83:a036322b8637 359 * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
mbed_official 83:a036322b8637 360 * @param hadc: ADC handle
mbed_official 83:a036322b8637 361 * @retval None
mbed_official 83:a036322b8637 362 */
mbed_official 83:a036322b8637 363 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
mbed_official 83:a036322b8637 364 {
mbed_official 83:a036322b8637 365 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official 83:a036322b8637 366
mbed_official 83:a036322b8637 367 /* Check the parameters */
mbed_official 83:a036322b8637 368 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official 83:a036322b8637 369
mbed_official 83:a036322b8637 370 /* Process locked */
mbed_official 83:a036322b8637 371 __HAL_LOCK(hadc);
mbed_official 83:a036322b8637 372
mbed_official 83:a036322b8637 373 /* Stop potential conversion and disable ADC peripheral */
mbed_official 83:a036322b8637 374 /* Conditioned to: */
mbed_official 83:a036322b8637 375 /* - No conversion on the other group (regular group) is intended to */
mbed_official 83:a036322b8637 376 /* continue (injected and regular groups stop conversion and ADC disable */
mbed_official 83:a036322b8637 377 /* are common) */
mbed_official 83:a036322b8637 378 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official 83:a036322b8637 379 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
mbed_official 83:a036322b8637 380 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
bogdanm 0:9b334a45a8ff 381 {
mbed_official 83:a036322b8637 382 /* Stop potential conversion on going, on regular and injected groups */
mbed_official 83:a036322b8637 383 /* Disable ADC peripheral */
mbed_official 83:a036322b8637 384 __HAL_ADC_DISABLE(hadc);
mbed_official 83:a036322b8637 385
mbed_official 83:a036322b8637 386 /* Check if ADC is effectively disabled */
mbed_official 83:a036322b8637 387 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
bogdanm 0:9b334a45a8ff 388 {
mbed_official 83:a036322b8637 389 /* Set ADC state */
mbed_official 83:a036322b8637 390 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 391 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 83:a036322b8637 392 HAL_ADC_STATE_READY);
bogdanm 0:9b334a45a8ff 393 }
bogdanm 0:9b334a45a8ff 394 }
bogdanm 0:9b334a45a8ff 395 else
bogdanm 0:9b334a45a8ff 396 {
mbed_official 83:a036322b8637 397 /* Update ADC state machine to error */
mbed_official 83:a036322b8637 398 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
mbed_official 83:a036322b8637 399
mbed_official 83:a036322b8637 400 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 401 }
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403 /* Process unlocked */
bogdanm 0:9b334a45a8ff 404 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406 /* Return function status */
mbed_official 83:a036322b8637 407 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 408 }
bogdanm 0:9b334a45a8ff 409
bogdanm 0:9b334a45a8ff 410 /**
bogdanm 0:9b334a45a8ff 411 * @brief Poll for injected conversion complete
bogdanm 0:9b334a45a8ff 412 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 413 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 414 * @param Timeout: Timeout value in millisecond.
bogdanm 0:9b334a45a8ff 415 * @retval HAL status
bogdanm 0:9b334a45a8ff 416 */
bogdanm 0:9b334a45a8ff 417 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 418 {
bogdanm 0:9b334a45a8ff 419 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 /* Get tick */
bogdanm 0:9b334a45a8ff 422 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /* Check End of conversion flag */
bogdanm 0:9b334a45a8ff 425 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC)))
bogdanm 0:9b334a45a8ff 426 {
bogdanm 0:9b334a45a8ff 427 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 428 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 429 {
bogdanm 0:9b334a45a8ff 430 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 431 {
bogdanm 0:9b334a45a8ff 432 hadc->State= HAL_ADC_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 433 /* Process unlocked */
bogdanm 0:9b334a45a8ff 434 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 435 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 436 }
bogdanm 0:9b334a45a8ff 437 }
bogdanm 0:9b334a45a8ff 438 }
bogdanm 0:9b334a45a8ff 439
mbed_official 83:a036322b8637 440 /* Clear injected group conversion flag */
mbed_official 83:a036322b8637 441 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
mbed_official 83:a036322b8637 442
mbed_official 83:a036322b8637 443 /* Update ADC state machine */
mbed_official 83:a036322b8637 444 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
mbed_official 83:a036322b8637 445
mbed_official 83:a036322b8637 446 /* Determine whether any further conversion upcoming on group injected */
mbed_official 83:a036322b8637 447 /* by external trigger, continuous mode or scan sequence on going. */
mbed_official 83:a036322b8637 448 /* Note: On STM32F7, there is no independent flag of end of sequence. */
mbed_official 83:a036322b8637 449 /* The test of scan sequence on going is done either with scan */
mbed_official 83:a036322b8637 450 /* sequence disabled or with end of conversion flag set to */
mbed_official 83:a036322b8637 451 /* of end of sequence. */
mbed_official 83:a036322b8637 452 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
mbed_official 83:a036322b8637 453 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
mbed_official 83:a036322b8637 454 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
mbed_official 83:a036322b8637 455 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
mbed_official 83:a036322b8637 456 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official 83:a036322b8637 457 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
bogdanm 0:9b334a45a8ff 458 {
mbed_official 83:a036322b8637 459 /* Set ADC state */
mbed_official 83:a036322b8637 460 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 461
mbed_official 83:a036322b8637 462 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
mbed_official 83:a036322b8637 463 {
mbed_official 83:a036322b8637 464 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 465 }
bogdanm 0:9b334a45a8ff 466 }
bogdanm 0:9b334a45a8ff 467
bogdanm 0:9b334a45a8ff 468 /* Return ADC state */
bogdanm 0:9b334a45a8ff 469 return HAL_OK;
bogdanm 0:9b334a45a8ff 470 }
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 /**
mbed_official 83:a036322b8637 473 * @brief Stop conversion of injected channels, disable interruption of
mbed_official 83:a036322b8637 474 * end-of-conversion. Disable ADC peripheral if no regular conversion
mbed_official 83:a036322b8637 475 * is on going.
mbed_official 83:a036322b8637 476 * @note If ADC must be disabled and if conversion is on going on
mbed_official 83:a036322b8637 477 * regular group, function HAL_ADC_Stop must be used to stop both
mbed_official 83:a036322b8637 478 * injected and regular groups, and disable the ADC.
mbed_official 83:a036322b8637 479 * @note If injected group mode auto-injection is enabled,
mbed_official 83:a036322b8637 480 * function HAL_ADC_Stop must be used.
mbed_official 83:a036322b8637 481 * @param hadc: ADC handle
mbed_official 83:a036322b8637 482 * @retval None
bogdanm 0:9b334a45a8ff 483 */
bogdanm 0:9b334a45a8ff 484 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 485 {
mbed_official 83:a036322b8637 486 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 487
mbed_official 83:a036322b8637 488 /* Check the parameters */
mbed_official 83:a036322b8637 489 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official 83:a036322b8637 490
mbed_official 83:a036322b8637 491 /* Process locked */
mbed_official 83:a036322b8637 492 __HAL_LOCK(hadc);
mbed_official 83:a036322b8637 493
mbed_official 83:a036322b8637 494 /* Stop potential conversion and disable ADC peripheral */
mbed_official 83:a036322b8637 495 /* Conditioned to: */
mbed_official 83:a036322b8637 496 /* - No conversion on the other group (regular group) is intended to */
mbed_official 83:a036322b8637 497 /* continue (injected and regular groups stop conversion and ADC disable */
mbed_official 83:a036322b8637 498 /* are common) */
mbed_official 83:a036322b8637 499 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official 83:a036322b8637 500 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
mbed_official 83:a036322b8637 501 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official 83:a036322b8637 502 {
mbed_official 83:a036322b8637 503 /* Stop potential conversion on going, on regular and injected groups */
mbed_official 83:a036322b8637 504 /* Disable ADC peripheral */
mbed_official 83:a036322b8637 505 __HAL_ADC_DISABLE(hadc);
mbed_official 83:a036322b8637 506
mbed_official 83:a036322b8637 507 /* Check if ADC is effectively disabled */
mbed_official 83:a036322b8637 508 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official 83:a036322b8637 509 {
mbed_official 83:a036322b8637 510 /* Disable ADC end of conversion interrupt for injected channels */
mbed_official 83:a036322b8637 511 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official 83:a036322b8637 512
mbed_official 83:a036322b8637 513 /* Set ADC state */
mbed_official 83:a036322b8637 514 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 515 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 83:a036322b8637 516 HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 517 }
mbed_official 83:a036322b8637 518 }
mbed_official 83:a036322b8637 519 else
mbed_official 83:a036322b8637 520 {
mbed_official 83:a036322b8637 521 /* Update ADC state machine to error */
mbed_official 83:a036322b8637 522 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
mbed_official 83:a036322b8637 523
mbed_official 83:a036322b8637 524 tmp_hal_status = HAL_ERROR;
mbed_official 83:a036322b8637 525 }
bogdanm 0:9b334a45a8ff 526
mbed_official 83:a036322b8637 527 /* Process unlocked */
mbed_official 83:a036322b8637 528 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 529
bogdanm 0:9b334a45a8ff 530 /* Return function status */
mbed_official 83:a036322b8637 531 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 532 }
bogdanm 0:9b334a45a8ff 533
bogdanm 0:9b334a45a8ff 534 /**
bogdanm 0:9b334a45a8ff 535 * @brief Gets the converted value from data register of injected channel.
bogdanm 0:9b334a45a8ff 536 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 537 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 538 * @param InjectedRank: the ADC injected rank.
bogdanm 0:9b334a45a8ff 539 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 540 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
bogdanm 0:9b334a45a8ff 541 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
bogdanm 0:9b334a45a8ff 542 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
bogdanm 0:9b334a45a8ff 543 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
bogdanm 0:9b334a45a8ff 544 * @retval None
bogdanm 0:9b334a45a8ff 545 */
bogdanm 0:9b334a45a8ff 546 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
bogdanm 0:9b334a45a8ff 547 {
bogdanm 0:9b334a45a8ff 548 __IO uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 549
bogdanm 0:9b334a45a8ff 550 /* Check the parameters */
bogdanm 0:9b334a45a8ff 551 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
bogdanm 0:9b334a45a8ff 552
mbed_official 83:a036322b8637 553 /* Clear injected group conversion flag to have similar behaviour as */
mbed_official 83:a036322b8637 554 /* regular group: reading data register also clears end of conversion flag. */
mbed_official 83:a036322b8637 555 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
bogdanm 0:9b334a45a8ff 556
bogdanm 0:9b334a45a8ff 557 /* Return the selected ADC converted value */
bogdanm 0:9b334a45a8ff 558 switch(InjectedRank)
bogdanm 0:9b334a45a8ff 559 {
bogdanm 0:9b334a45a8ff 560 case ADC_INJECTED_RANK_4:
bogdanm 0:9b334a45a8ff 561 {
bogdanm 0:9b334a45a8ff 562 tmp = hadc->Instance->JDR4;
bogdanm 0:9b334a45a8ff 563 }
bogdanm 0:9b334a45a8ff 564 break;
bogdanm 0:9b334a45a8ff 565 case ADC_INJECTED_RANK_3:
bogdanm 0:9b334a45a8ff 566 {
bogdanm 0:9b334a45a8ff 567 tmp = hadc->Instance->JDR3;
bogdanm 0:9b334a45a8ff 568 }
bogdanm 0:9b334a45a8ff 569 break;
bogdanm 0:9b334a45a8ff 570 case ADC_INJECTED_RANK_2:
bogdanm 0:9b334a45a8ff 571 {
bogdanm 0:9b334a45a8ff 572 tmp = hadc->Instance->JDR2;
bogdanm 0:9b334a45a8ff 573 }
bogdanm 0:9b334a45a8ff 574 break;
bogdanm 0:9b334a45a8ff 575 case ADC_INJECTED_RANK_1:
bogdanm 0:9b334a45a8ff 576 {
bogdanm 0:9b334a45a8ff 577 tmp = hadc->Instance->JDR1;
bogdanm 0:9b334a45a8ff 578 }
bogdanm 0:9b334a45a8ff 579 break;
bogdanm 0:9b334a45a8ff 580 default:
bogdanm 0:9b334a45a8ff 581 break;
bogdanm 0:9b334a45a8ff 582 }
bogdanm 0:9b334a45a8ff 583 return tmp;
bogdanm 0:9b334a45a8ff 584 }
bogdanm 0:9b334a45a8ff 585
bogdanm 0:9b334a45a8ff 586 /**
bogdanm 0:9b334a45a8ff 587 * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral
bogdanm 0:9b334a45a8ff 588 *
bogdanm 0:9b334a45a8ff 589 * @note Caution: This function must be used only with the ADC master.
bogdanm 0:9b334a45a8ff 590 *
bogdanm 0:9b334a45a8ff 591 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 592 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 593 * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
bogdanm 0:9b334a45a8ff 594 * @param Length: The length of data to be transferred from ADC peripheral to memory.
bogdanm 0:9b334a45a8ff 595 * @retval HAL status
bogdanm 0:9b334a45a8ff 596 */
bogdanm 0:9b334a45a8ff 597 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
bogdanm 0:9b334a45a8ff 598 {
bogdanm 0:9b334a45a8ff 599 __IO uint32_t counter = 0;
bogdanm 0:9b334a45a8ff 600
bogdanm 0:9b334a45a8ff 601 /* Check the parameters */
bogdanm 0:9b334a45a8ff 602 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 603 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
bogdanm 0:9b334a45a8ff 604 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
bogdanm 0:9b334a45a8ff 605
bogdanm 0:9b334a45a8ff 606 /* Process locked */
bogdanm 0:9b334a45a8ff 607 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 608
bogdanm 0:9b334a45a8ff 609 /* Check if ADC peripheral is disabled in order to enable it and wait during
bogdanm 0:9b334a45a8ff 610 Tstab time the ADC's stabilization */
bogdanm 0:9b334a45a8ff 611 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
bogdanm 0:9b334a45a8ff 612 {
bogdanm 0:9b334a45a8ff 613 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 614 __HAL_ADC_ENABLE(hadc);
bogdanm 0:9b334a45a8ff 615
bogdanm 0:9b334a45a8ff 616 /* Delay for temperature sensor stabilization time */
bogdanm 0:9b334a45a8ff 617 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 618 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 619 while(counter != 0)
bogdanm 0:9b334a45a8ff 620 {
bogdanm 0:9b334a45a8ff 621 counter--;
bogdanm 0:9b334a45a8ff 622 }
bogdanm 0:9b334a45a8ff 623 }
bogdanm 0:9b334a45a8ff 624
mbed_official 83:a036322b8637 625 /* Start conversion if ADC is effectively enabled */
mbed_official 83:a036322b8637 626 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
bogdanm 0:9b334a45a8ff 627 {
mbed_official 83:a036322b8637 628 /* Set ADC state */
mbed_official 83:a036322b8637 629 /* - Clear state bitfield related to regular group conversion results */
mbed_official 83:a036322b8637 630 /* - Set state bitfield related to regular group operation */
mbed_official 83:a036322b8637 631 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 632 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
mbed_official 83:a036322b8637 633 HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 634
mbed_official 83:a036322b8637 635 /* If conversions on group regular are also triggering group injected, */
mbed_official 83:a036322b8637 636 /* update ADC state. */
mbed_official 83:a036322b8637 637 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
mbed_official 83:a036322b8637 638 {
mbed_official 83:a036322b8637 639 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
mbed_official 83:a036322b8637 640 }
mbed_official 83:a036322b8637 641
mbed_official 83:a036322b8637 642 /* State machine update: Check if an injected conversion is ongoing */
mbed_official 83:a036322b8637 643 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
mbed_official 83:a036322b8637 644 {
mbed_official 83:a036322b8637 645 /* Reset ADC error code fields related to conversions on group regular */
mbed_official 83:a036322b8637 646 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
mbed_official 83:a036322b8637 647 }
mbed_official 83:a036322b8637 648 else
mbed_official 83:a036322b8637 649 {
mbed_official 83:a036322b8637 650 /* Reset ADC all error code fields */
mbed_official 83:a036322b8637 651 ADC_CLEAR_ERRORCODE(hadc);
mbed_official 83:a036322b8637 652 }
mbed_official 83:a036322b8637 653
mbed_official 83:a036322b8637 654 /* Process unlocked */
mbed_official 83:a036322b8637 655 /* Unlock before starting ADC conversions: in case of potential */
mbed_official 83:a036322b8637 656 /* interruption, to let the process to ADC IRQ Handler. */
mbed_official 83:a036322b8637 657 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 658
mbed_official 83:a036322b8637 659 /* Set the DMA transfer complete callback */
mbed_official 83:a036322b8637 660 hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt;
mbed_official 83:a036322b8637 661
mbed_official 83:a036322b8637 662 /* Set the DMA half transfer complete callback */
mbed_official 83:a036322b8637 663 hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt;
mbed_official 83:a036322b8637 664
mbed_official 83:a036322b8637 665 /* Set the DMA error callback */
mbed_official 83:a036322b8637 666 hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
mbed_official 83:a036322b8637 667
mbed_official 83:a036322b8637 668 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official 83:a036322b8637 669 /* start (in case of SW start): */
mbed_official 83:a036322b8637 670
mbed_official 83:a036322b8637 671 /* Clear regular group conversion flag and overrun flag */
mbed_official 83:a036322b8637 672 /* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official 83:a036322b8637 673 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official 83:a036322b8637 674
mbed_official 83:a036322b8637 675 /* Enable ADC overrun interrupt */
mbed_official 83:a036322b8637 676 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
mbed_official 83:a036322b8637 677
mbed_official 83:a036322b8637 678 if (hadc->Init.DMAContinuousRequests != DISABLE)
mbed_official 83:a036322b8637 679 {
mbed_official 83:a036322b8637 680 /* Enable the selected ADC DMA request after last transfer */
mbed_official 83:a036322b8637 681 ADC->CCR |= ADC_CCR_DDS;
mbed_official 83:a036322b8637 682 }
mbed_official 83:a036322b8637 683 else
mbed_official 83:a036322b8637 684 {
mbed_official 83:a036322b8637 685 /* Disable the selected ADC EOC rising on each regular channel conversion */
mbed_official 83:a036322b8637 686 ADC->CCR &= ~ADC_CCR_DDS;
mbed_official 83:a036322b8637 687 }
mbed_official 83:a036322b8637 688
mbed_official 83:a036322b8637 689 /* Enable the DMA Stream */
mbed_official 83:a036322b8637 690 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length);
mbed_official 83:a036322b8637 691
mbed_official 83:a036322b8637 692 /* if no external trigger present enable software conversion of regular channels */
mbed_official 83:a036322b8637 693 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
mbed_official 83:a036322b8637 694 {
mbed_official 83:a036322b8637 695 /* Enable the selected ADC software conversion for regular group */
mbed_official 83:a036322b8637 696 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
mbed_official 83:a036322b8637 697 }
bogdanm 0:9b334a45a8ff 698 }
bogdanm 0:9b334a45a8ff 699
bogdanm 0:9b334a45a8ff 700 /* Return function status */
bogdanm 0:9b334a45a8ff 701 return HAL_OK;
bogdanm 0:9b334a45a8ff 702 }
bogdanm 0:9b334a45a8ff 703
bogdanm 0:9b334a45a8ff 704 /**
bogdanm 0:9b334a45a8ff 705 * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
bogdanm 0:9b334a45a8ff 706 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 707 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 708 * @retval HAL status
bogdanm 0:9b334a45a8ff 709 */
bogdanm 0:9b334a45a8ff 710 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 711 {
mbed_official 83:a036322b8637 712 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
mbed_official 83:a036322b8637 713
mbed_official 83:a036322b8637 714 /* Check the parameters */
mbed_official 83:a036322b8637 715 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official 83:a036322b8637 716
bogdanm 0:9b334a45a8ff 717 /* Process locked */
bogdanm 0:9b334a45a8ff 718 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 719
mbed_official 83:a036322b8637 720 /* Stop potential conversion on going, on regular and injected groups */
mbed_official 83:a036322b8637 721 /* Disable ADC peripheral */
bogdanm 0:9b334a45a8ff 722 __HAL_ADC_DISABLE(hadc);
bogdanm 0:9b334a45a8ff 723
mbed_official 83:a036322b8637 724 /* Check if ADC is effectively disabled */
mbed_official 83:a036322b8637 725 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official 83:a036322b8637 726 {
mbed_official 83:a036322b8637 727 /* Disable the selected ADC DMA mode for multimode */
mbed_official 83:a036322b8637 728 ADC->CCR &= ~ADC_CCR_DDS;
mbed_official 83:a036322b8637 729
mbed_official 83:a036322b8637 730 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official 83:a036322b8637 731 /* DMA transfer is on going) */
mbed_official 83:a036322b8637 732 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official 83:a036322b8637 733
mbed_official 83:a036322b8637 734 /* Disable ADC overrun interrupt */
mbed_official 83:a036322b8637 735 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
mbed_official 83:a036322b8637 736
mbed_official 83:a036322b8637 737 /* Set ADC state */
mbed_official 83:a036322b8637 738 ADC_STATE_CLR_SET(hadc->State,
mbed_official 83:a036322b8637 739 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 83:a036322b8637 740 HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 741 }
bogdanm 0:9b334a45a8ff 742
bogdanm 0:9b334a45a8ff 743 /* Process unlocked */
bogdanm 0:9b334a45a8ff 744 __HAL_UNLOCK(hadc);
mbed_official 83:a036322b8637 745
bogdanm 0:9b334a45a8ff 746 /* Return function status */
mbed_official 83:a036322b8637 747 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 748 }
bogdanm 0:9b334a45a8ff 749
bogdanm 0:9b334a45a8ff 750 /**
bogdanm 0:9b334a45a8ff 751 * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
bogdanm 0:9b334a45a8ff 752 * data in the selected multi mode.
bogdanm 0:9b334a45a8ff 753 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 754 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 755 * @retval The converted data value.
bogdanm 0:9b334a45a8ff 756 */
bogdanm 0:9b334a45a8ff 757 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 758 {
bogdanm 0:9b334a45a8ff 759 /* Return the multi mode conversion value */
bogdanm 0:9b334a45a8ff 760 return ADC->CDR;
bogdanm 0:9b334a45a8ff 761 }
bogdanm 0:9b334a45a8ff 762
bogdanm 0:9b334a45a8ff 763 /**
bogdanm 0:9b334a45a8ff 764 * @brief Injected conversion complete callback in non blocking mode
bogdanm 0:9b334a45a8ff 765 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 766 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 767 * @retval None
bogdanm 0:9b334a45a8ff 768 */
bogdanm 0:9b334a45a8ff 769 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 770 {
mbed_official 83:a036322b8637 771 /* Prevent unused argument(s) compilation warning */
mbed_official 83:a036322b8637 772 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 773 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 774 the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 775 */
bogdanm 0:9b334a45a8ff 776 }
bogdanm 0:9b334a45a8ff 777
bogdanm 0:9b334a45a8ff 778 /**
bogdanm 0:9b334a45a8ff 779 * @brief Configures for the selected ADC injected channel its corresponding
bogdanm 0:9b334a45a8ff 780 * rank in the sequencer and its sample time.
bogdanm 0:9b334a45a8ff 781 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 782 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 783 * @param sConfigInjected: ADC configuration structure for injected channel.
bogdanm 0:9b334a45a8ff 784 * @retval None
bogdanm 0:9b334a45a8ff 785 */
bogdanm 0:9b334a45a8ff 786 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
bogdanm 0:9b334a45a8ff 787 {
mbed_official 83:a036322b8637 788
bogdanm 0:9b334a45a8ff 789 #ifdef USE_FULL_ASSERT
bogdanm 0:9b334a45a8ff 790 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 791 #endif /* USE_FULL_ASSERT */
bogdanm 0:9b334a45a8ff 792
bogdanm 0:9b334a45a8ff 793 /* Check the parameters */
bogdanm 0:9b334a45a8ff 794 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
bogdanm 0:9b334a45a8ff 795 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
bogdanm 0:9b334a45a8ff 796 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
bogdanm 0:9b334a45a8ff 797 assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
bogdanm 0:9b334a45a8ff 798 assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
bogdanm 0:9b334a45a8ff 799 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
bogdanm 0:9b334a45a8ff 800 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
bogdanm 0:9b334a45a8ff 801
bogdanm 0:9b334a45a8ff 802 #ifdef USE_FULL_ASSERT
bogdanm 0:9b334a45a8ff 803 tmp = ADC_GET_RESOLUTION(hadc);
bogdanm 0:9b334a45a8ff 804 assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
bogdanm 0:9b334a45a8ff 805 #endif /* USE_FULL_ASSERT */
bogdanm 0:9b334a45a8ff 806
mbed_official 83:a036322b8637 807 if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
mbed_official 83:a036322b8637 808 {
mbed_official 83:a036322b8637 809 assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
mbed_official 83:a036322b8637 810 }
mbed_official 83:a036322b8637 811
bogdanm 0:9b334a45a8ff 812 /* Process locked */
bogdanm 0:9b334a45a8ff 813 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 814
bogdanm 0:9b334a45a8ff 815 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
bogdanm 0:9b334a45a8ff 816 if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9)
bogdanm 0:9b334a45a8ff 817 {
bogdanm 0:9b334a45a8ff 818 /* Clear the old sample time */
bogdanm 0:9b334a45a8ff 819 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
bogdanm 0:9b334a45a8ff 820
bogdanm 0:9b334a45a8ff 821 /* Set the new sample time */
bogdanm 0:9b334a45a8ff 822 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
bogdanm 0:9b334a45a8ff 823 }
bogdanm 0:9b334a45a8ff 824 else /* ADC_Channel include in ADC_Channel_[0..9] */
bogdanm 0:9b334a45a8ff 825 {
bogdanm 0:9b334a45a8ff 826 /* Clear the old sample time */
bogdanm 0:9b334a45a8ff 827 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
bogdanm 0:9b334a45a8ff 828
bogdanm 0:9b334a45a8ff 829 /* Set the new sample time */
bogdanm 0:9b334a45a8ff 830 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
bogdanm 0:9b334a45a8ff 831 }
bogdanm 0:9b334a45a8ff 832
bogdanm 0:9b334a45a8ff 833 /*---------------------------- ADCx JSQR Configuration -----------------*/
bogdanm 0:9b334a45a8ff 834 hadc->Instance->JSQR &= ~(ADC_JSQR_JL);
bogdanm 0:9b334a45a8ff 835 hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion);
bogdanm 0:9b334a45a8ff 836
bogdanm 0:9b334a45a8ff 837 /* Rank configuration */
bogdanm 0:9b334a45a8ff 838
bogdanm 0:9b334a45a8ff 839 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 840 hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
bogdanm 0:9b334a45a8ff 841
bogdanm 0:9b334a45a8ff 842 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 843 hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
bogdanm 0:9b334a45a8ff 844
mbed_official 83:a036322b8637 845 /* Enable external trigger if trigger selection is different of software */
mbed_official 83:a036322b8637 846 /* start. */
mbed_official 83:a036322b8637 847 /* Note: This configuration keeps the hardware feature of parameter */
mbed_official 83:a036322b8637 848 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
mbed_official 83:a036322b8637 849 /* software start. */
mbed_official 83:a036322b8637 850 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
mbed_official 83:a036322b8637 851 {
mbed_official 83:a036322b8637 852 /* Select external trigger to start conversion */
mbed_official 83:a036322b8637 853 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
mbed_official 83:a036322b8637 854 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv;
mbed_official 83:a036322b8637 855
mbed_official 83:a036322b8637 856 /* Select external trigger polarity */
mbed_official 83:a036322b8637 857 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
mbed_official 83:a036322b8637 858 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
mbed_official 83:a036322b8637 859 }
mbed_official 83:a036322b8637 860 else
mbed_official 83:a036322b8637 861 {
mbed_official 83:a036322b8637 862 /* Reset the external trigger */
mbed_official 83:a036322b8637 863 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
mbed_official 83:a036322b8637 864 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
mbed_official 83:a036322b8637 865 }
bogdanm 0:9b334a45a8ff 866
bogdanm 0:9b334a45a8ff 867 if (sConfigInjected->AutoInjectedConv != DISABLE)
bogdanm 0:9b334a45a8ff 868 {
bogdanm 0:9b334a45a8ff 869 /* Enable the selected ADC automatic injected group conversion */
bogdanm 0:9b334a45a8ff 870 hadc->Instance->CR1 |= ADC_CR1_JAUTO;
bogdanm 0:9b334a45a8ff 871 }
bogdanm 0:9b334a45a8ff 872 else
bogdanm 0:9b334a45a8ff 873 {
bogdanm 0:9b334a45a8ff 874 /* Disable the selected ADC automatic injected group conversion */
bogdanm 0:9b334a45a8ff 875 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO);
bogdanm 0:9b334a45a8ff 876 }
bogdanm 0:9b334a45a8ff 877
bogdanm 0:9b334a45a8ff 878 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE)
bogdanm 0:9b334a45a8ff 879 {
bogdanm 0:9b334a45a8ff 880 /* Enable the selected ADC injected discontinuous mode */
bogdanm 0:9b334a45a8ff 881 hadc->Instance->CR1 |= ADC_CR1_JDISCEN;
bogdanm 0:9b334a45a8ff 882 }
bogdanm 0:9b334a45a8ff 883 else
bogdanm 0:9b334a45a8ff 884 {
bogdanm 0:9b334a45a8ff 885 /* Disable the selected ADC injected discontinuous mode */
bogdanm 0:9b334a45a8ff 886 hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
bogdanm 0:9b334a45a8ff 887 }
bogdanm 0:9b334a45a8ff 888
bogdanm 0:9b334a45a8ff 889 switch(sConfigInjected->InjectedRank)
bogdanm 0:9b334a45a8ff 890 {
bogdanm 0:9b334a45a8ff 891 case 1:
bogdanm 0:9b334a45a8ff 892 /* Set injected channel 1 offset */
bogdanm 0:9b334a45a8ff 893 hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
bogdanm 0:9b334a45a8ff 894 hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset;
bogdanm 0:9b334a45a8ff 895 break;
bogdanm 0:9b334a45a8ff 896 case 2:
bogdanm 0:9b334a45a8ff 897 /* Set injected channel 2 offset */
bogdanm 0:9b334a45a8ff 898 hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
bogdanm 0:9b334a45a8ff 899 hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset;
bogdanm 0:9b334a45a8ff 900 break;
bogdanm 0:9b334a45a8ff 901 case 3:
bogdanm 0:9b334a45a8ff 902 /* Set injected channel 3 offset */
bogdanm 0:9b334a45a8ff 903 hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
bogdanm 0:9b334a45a8ff 904 hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset;
bogdanm 0:9b334a45a8ff 905 break;
bogdanm 0:9b334a45a8ff 906 default:
bogdanm 0:9b334a45a8ff 907 /* Set injected channel 4 offset */
bogdanm 0:9b334a45a8ff 908 hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
bogdanm 0:9b334a45a8ff 909 hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset;
bogdanm 0:9b334a45a8ff 910 break;
bogdanm 0:9b334a45a8ff 911 }
bogdanm 0:9b334a45a8ff 912
bogdanm 0:9b334a45a8ff 913 /* if ADC1 Channel_18 is selected enable VBAT Channel */
bogdanm 0:9b334a45a8ff 914 if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT))
bogdanm 0:9b334a45a8ff 915 {
bogdanm 0:9b334a45a8ff 916 /* Enable the VBAT channel*/
bogdanm 0:9b334a45a8ff 917 ADC->CCR |= ADC_CCR_VBATE;
bogdanm 0:9b334a45a8ff 918 }
bogdanm 0:9b334a45a8ff 919
bogdanm 0:9b334a45a8ff 920 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
bogdanm 0:9b334a45a8ff 921 if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)))
bogdanm 0:9b334a45a8ff 922 {
bogdanm 0:9b334a45a8ff 923 /* Enable the TSVREFE channel*/
bogdanm 0:9b334a45a8ff 924 ADC->CCR |= ADC_CCR_TSVREFE;
bogdanm 0:9b334a45a8ff 925 }
bogdanm 0:9b334a45a8ff 926
bogdanm 0:9b334a45a8ff 927 /* Process unlocked */
bogdanm 0:9b334a45a8ff 928 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 929
bogdanm 0:9b334a45a8ff 930 /* Return function status */
bogdanm 0:9b334a45a8ff 931 return HAL_OK;
bogdanm 0:9b334a45a8ff 932 }
bogdanm 0:9b334a45a8ff 933
bogdanm 0:9b334a45a8ff 934 /**
bogdanm 0:9b334a45a8ff 935 * @brief Configures the ADC multi-mode
bogdanm 0:9b334a45a8ff 936 * @param hadc : pointer to a ADC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 937 * the configuration information for the specified ADC.
bogdanm 0:9b334a45a8ff 938 * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
bogdanm 0:9b334a45a8ff 939 * the configuration information for multimode.
bogdanm 0:9b334a45a8ff 940 * @retval HAL status
bogdanm 0:9b334a45a8ff 941 */
bogdanm 0:9b334a45a8ff 942 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
bogdanm 0:9b334a45a8ff 943 {
bogdanm 0:9b334a45a8ff 944 /* Check the parameters */
bogdanm 0:9b334a45a8ff 945 assert_param(IS_ADC_MODE(multimode->Mode));
bogdanm 0:9b334a45a8ff 946 assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
bogdanm 0:9b334a45a8ff 947 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
bogdanm 0:9b334a45a8ff 948
bogdanm 0:9b334a45a8ff 949 /* Process locked */
bogdanm 0:9b334a45a8ff 950 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 951
bogdanm 0:9b334a45a8ff 952 /* Set ADC mode */
bogdanm 0:9b334a45a8ff 953 ADC->CCR &= ~(ADC_CCR_MULTI);
bogdanm 0:9b334a45a8ff 954 ADC->CCR |= multimode->Mode;
bogdanm 0:9b334a45a8ff 955
bogdanm 0:9b334a45a8ff 956 /* Set the ADC DMA access mode */
bogdanm 0:9b334a45a8ff 957 ADC->CCR &= ~(ADC_CCR_DMA);
bogdanm 0:9b334a45a8ff 958 ADC->CCR |= multimode->DMAAccessMode;
bogdanm 0:9b334a45a8ff 959
bogdanm 0:9b334a45a8ff 960 /* Set delay between two sampling phases */
bogdanm 0:9b334a45a8ff 961 ADC->CCR &= ~(ADC_CCR_DELAY);
bogdanm 0:9b334a45a8ff 962 ADC->CCR |= multimode->TwoSamplingDelay;
bogdanm 0:9b334a45a8ff 963
bogdanm 0:9b334a45a8ff 964 /* Process unlocked */
bogdanm 0:9b334a45a8ff 965 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 /* Return function status */
bogdanm 0:9b334a45a8ff 968 return HAL_OK;
bogdanm 0:9b334a45a8ff 969 }
bogdanm 0:9b334a45a8ff 970
bogdanm 0:9b334a45a8ff 971 /**
bogdanm 0:9b334a45a8ff 972 * @}
bogdanm 0:9b334a45a8ff 973 */
bogdanm 0:9b334a45a8ff 974
bogdanm 0:9b334a45a8ff 975 /**
bogdanm 0:9b334a45a8ff 976 * @brief DMA transfer complete callback.
bogdanm 0:9b334a45a8ff 977 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 978 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 979 * @retval None
bogdanm 0:9b334a45a8ff 980 */
bogdanm 0:9b334a45a8ff 981 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 982 {
mbed_official 83:a036322b8637 983 /* Retrieve ADC handle corresponding to current DMA handle */
mbed_official 83:a036322b8637 984 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 83:a036322b8637 985
mbed_official 83:a036322b8637 986 /* Update state machine on conversion status if not in error state */
mbed_official 83:a036322b8637 987 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
mbed_official 83:a036322b8637 988 {
mbed_official 83:a036322b8637 989 /* Update ADC state machine */
mbed_official 83:a036322b8637 990 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
bogdanm 0:9b334a45a8ff 991
mbed_official 83:a036322b8637 992 /* Determine whether any further conversion upcoming on group regular */
mbed_official 83:a036322b8637 993 /* by external trigger, continuous mode or scan sequence on going. */
mbed_official 83:a036322b8637 994 /* Note: On STM32F7, there is no independent flag of end of sequence. */
mbed_official 83:a036322b8637 995 /* The test of scan sequence on going is done either with scan */
mbed_official 83:a036322b8637 996 /* sequence disabled or with end of conversion flag set to */
mbed_official 83:a036322b8637 997 /* of end of sequence. */
mbed_official 83:a036322b8637 998 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official 83:a036322b8637 999 (hadc->Init.ContinuousConvMode == DISABLE) &&
mbed_official 83:a036322b8637 1000 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
mbed_official 83:a036322b8637 1001 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
mbed_official 83:a036322b8637 1002 {
mbed_official 83:a036322b8637 1003 /* Disable ADC end of single conversion interrupt on group regular */
mbed_official 83:a036322b8637 1004 /* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official 83:a036322b8637 1005 /* HAL_ADC_Start_IT(), but is not disabled here because can be used */
mbed_official 83:a036322b8637 1006 /* by overrun IRQ process below. */
mbed_official 83:a036322b8637 1007 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official 83:a036322b8637 1008
mbed_official 83:a036322b8637 1009 /* Set ADC state */
mbed_official 83:a036322b8637 1010 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
mbed_official 83:a036322b8637 1011
mbed_official 83:a036322b8637 1012 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
mbed_official 83:a036322b8637 1013 {
mbed_official 83:a036322b8637 1014 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
mbed_official 83:a036322b8637 1015 }
mbed_official 83:a036322b8637 1016 }
mbed_official 83:a036322b8637 1017
mbed_official 83:a036322b8637 1018 /* Conversion complete callback */
mbed_official 83:a036322b8637 1019 HAL_ADC_ConvCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 1020 }
bogdanm 0:9b334a45a8ff 1021 else
bogdanm 0:9b334a45a8ff 1022 {
mbed_official 83:a036322b8637 1023 /* Call DMA error callback */
mbed_official 83:a036322b8637 1024 hadc->DMA_Handle->XferErrorCallback(hdma);
bogdanm 0:9b334a45a8ff 1025 }
bogdanm 0:9b334a45a8ff 1026 }
bogdanm 0:9b334a45a8ff 1027
bogdanm 0:9b334a45a8ff 1028 /**
bogdanm 0:9b334a45a8ff 1029 * @brief DMA half transfer complete callback.
bogdanm 0:9b334a45a8ff 1030 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1031 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1032 * @retval None
bogdanm 0:9b334a45a8ff 1033 */
bogdanm 0:9b334a45a8ff 1034 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1035 {
bogdanm 0:9b334a45a8ff 1036 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1037 /* Conversion complete callback */
bogdanm 0:9b334a45a8ff 1038 HAL_ADC_ConvHalfCpltCallback(hadc);
bogdanm 0:9b334a45a8ff 1039 }
bogdanm 0:9b334a45a8ff 1040
bogdanm 0:9b334a45a8ff 1041 /**
bogdanm 0:9b334a45a8ff 1042 * @brief DMA error callback
bogdanm 0:9b334a45a8ff 1043 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1044 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1045 * @retval None
bogdanm 0:9b334a45a8ff 1046 */
bogdanm 0:9b334a45a8ff 1047 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1048 {
bogdanm 0:9b334a45a8ff 1049 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 83:a036322b8637 1050 hadc->State= HAL_ADC_STATE_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1051 /* Set ADC error code to DMA error */
bogdanm 0:9b334a45a8ff 1052 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1053 HAL_ADC_ErrorCallback(hadc);
bogdanm 0:9b334a45a8ff 1054 }
bogdanm 0:9b334a45a8ff 1055
bogdanm 0:9b334a45a8ff 1056 /**
bogdanm 0:9b334a45a8ff 1057 * @}
bogdanm 0:9b334a45a8ff 1058 */
bogdanm 0:9b334a45a8ff 1059
bogdanm 0:9b334a45a8ff 1060 #endif /* HAL_ADC_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1061 /**
bogdanm 0:9b334a45a8ff 1062 * @}
bogdanm 0:9b334a45a8ff 1063 */
bogdanm 0:9b334a45a8ff 1064
bogdanm 0:9b334a45a8ff 1065 /**
bogdanm 0:9b334a45a8ff 1066 * @}
bogdanm 0:9b334a45a8ff 1067 */
bogdanm 0:9b334a45a8ff 1068
bogdanm 0:9b334a45a8ff 1069 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/