en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
19:112740acecfa 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_sram.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 19:112740acecfa 5 * @version V1.4.1
mbed_official 19:112740acecfa 6 * @date 09-October-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of SRAM HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F4xx_HAL_SRAM_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F4xx_HAL_SRAM_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
mbed_official 19:112740acecfa 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
bogdanm 0:9b334a45a8ff 48 #include "stm32f4xx_ll_fsmc.h"
mbed_official 19:112740acecfa 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
bogdanm 0:9b334a45a8ff 50
mbed_official 19:112740acecfa 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
mbed_official 19:112740acecfa 52 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 53 #include "stm32f4xx_ll_fmc.h"
mbed_official 19:112740acecfa 54 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 58 * @{
bogdanm 0:9b334a45a8ff 59 */
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
bogdanm 0:9b334a45a8ff 62 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
mbed_official 19:112740acecfa 63 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
mbed_official 19:112740acecfa 64
bogdanm 0:9b334a45a8ff 65 /** @addtogroup SRAM
bogdanm 0:9b334a45a8ff 66 * @{
bogdanm 0:9b334a45a8ff 67 */
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 /* Exported typedef ----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /** @defgroup SRAM_Exported_Types SRAM Exported Types
bogdanm 0:9b334a45a8ff 72 * @{
bogdanm 0:9b334a45a8ff 73 */
bogdanm 0:9b334a45a8ff 74 /**
bogdanm 0:9b334a45a8ff 75 * @brief HAL SRAM State structures definition
bogdanm 0:9b334a45a8ff 76 */
bogdanm 0:9b334a45a8ff 77 typedef enum
bogdanm 0:9b334a45a8ff 78 {
bogdanm 0:9b334a45a8ff 79 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 80 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
bogdanm 0:9b334a45a8ff 81 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
bogdanm 0:9b334a45a8ff 82 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
bogdanm 0:9b334a45a8ff 83 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 }HAL_SRAM_StateTypeDef;
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 /**
bogdanm 0:9b334a45a8ff 88 * @brief SRAM handle Structure definition
bogdanm 0:9b334a45a8ff 89 */
bogdanm 0:9b334a45a8ff 90 typedef struct
bogdanm 0:9b334a45a8ff 91 {
bogdanm 0:9b334a45a8ff 92 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 HAL_LockTypeDef Lock; /*!< SRAM locking object */
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 }SRAM_HandleTypeDef;
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 /**
bogdanm 0:9b334a45a8ff 107 * @}
bogdanm 0:9b334a45a8ff 108 */
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 111 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
bogdanm 0:9b334a45a8ff 114 * @{
bogdanm 0:9b334a45a8ff 115 */
bogdanm 0:9b334a45a8ff 116 /** @brief Reset SRAM handle state
bogdanm 0:9b334a45a8ff 117 * @param __HANDLE__: SRAM handle
bogdanm 0:9b334a45a8ff 118 * @retval None
bogdanm 0:9b334a45a8ff 119 */
bogdanm 0:9b334a45a8ff 120 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 /**
bogdanm 0:9b334a45a8ff 123 * @}
bogdanm 0:9b334a45a8ff 124 */
bogdanm 0:9b334a45a8ff 125 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /** @addtogroup SRAM_Exported_Functions
bogdanm 0:9b334a45a8ff 128 * @{
bogdanm 0:9b334a45a8ff 129 */
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 /** @addtogroup SRAM_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 132 * @{
bogdanm 0:9b334a45a8ff 133 */
bogdanm 0:9b334a45a8ff 134 /* Initialization/de-initialization functions **********************************/
bogdanm 0:9b334a45a8ff 135 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
bogdanm 0:9b334a45a8ff 136 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
bogdanm 0:9b334a45a8ff 137 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
bogdanm 0:9b334a45a8ff 138 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 141 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 142 /**
bogdanm 0:9b334a45a8ff 143 * @}
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 /** @addtogroup SRAM_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 147 * @{
bogdanm 0:9b334a45a8ff 148 */
bogdanm 0:9b334a45a8ff 149 /* I/O operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 150 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 151 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 152 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 153 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 154 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 155 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 156 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 157 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 158 /**
bogdanm 0:9b334a45a8ff 159 * @}
bogdanm 0:9b334a45a8ff 160 */
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 /** @addtogroup SRAM_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 163 * @{
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165 /* SRAM Control functions ******************************************************/
bogdanm 0:9b334a45a8ff 166 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
bogdanm 0:9b334a45a8ff 167 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
bogdanm 0:9b334a45a8ff 168 /**
bogdanm 0:9b334a45a8ff 169 * @}
bogdanm 0:9b334a45a8ff 170 */
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 /** @addtogroup SRAM_Exported_Functions_Group4
bogdanm 0:9b334a45a8ff 173 * @{
bogdanm 0:9b334a45a8ff 174 */
bogdanm 0:9b334a45a8ff 175 /* SRAM State functions *********************************************************/
bogdanm 0:9b334a45a8ff 176 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
bogdanm 0:9b334a45a8ff 177 /**
bogdanm 0:9b334a45a8ff 178 * @}
bogdanm 0:9b334a45a8ff 179 */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /**
bogdanm 0:9b334a45a8ff 182 * @}
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 186 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 187 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 188 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 189 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 190 /**
bogdanm 0:9b334a45a8ff 191 * @}
bogdanm 0:9b334a45a8ff 192 */
bogdanm 0:9b334a45a8ff 193
mbed_official 19:112740acecfa 194 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
mbed_official 19:112740acecfa 195 STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 196 /**
bogdanm 0:9b334a45a8ff 197 * @}
bogdanm 0:9b334a45a8ff 198 */
bogdanm 0:9b334a45a8ff 199 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 200 }
bogdanm 0:9b334a45a8ff 201 #endif
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 #endif /* __STM32F4xx_HAL_SRAM_H */
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/