en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
19:112740acecfa 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_sdram.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 19:112740acecfa 5 * @version V1.4.1
mbed_official 19:112740acecfa 6 * @date 09-October-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of SDRAM HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F4xx_HAL_SDRAM_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F4xx_HAL_SDRAM_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
mbed_official 19:112740acecfa 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
mbed_official 19:112740acecfa 47 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 50 #include "stm32f4xx_ll_fmc.h"
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 53 * @{
bogdanm 0:9b334a45a8ff 54 */
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 /** @addtogroup SDRAM
bogdanm 0:9b334a45a8ff 57 * @{
bogdanm 0:9b334a45a8ff 58 */
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 /* Exported typedef ----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 61 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
bogdanm 0:9b334a45a8ff 62 * @{
bogdanm 0:9b334a45a8ff 63 */
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 /**
bogdanm 0:9b334a45a8ff 66 * @brief HAL SDRAM State structure definition
bogdanm 0:9b334a45a8ff 67 */
bogdanm 0:9b334a45a8ff 68 typedef enum
bogdanm 0:9b334a45a8ff 69 {
bogdanm 0:9b334a45a8ff 70 HAL_SDRAM_STATE_RESET = 0x00, /*!< SDRAM not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 71 HAL_SDRAM_STATE_READY = 0x01, /*!< SDRAM initialized and ready for use */
bogdanm 0:9b334a45a8ff 72 HAL_SDRAM_STATE_BUSY = 0x02, /*!< SDRAM internal process is ongoing */
bogdanm 0:9b334a45a8ff 73 HAL_SDRAM_STATE_ERROR = 0x03, /*!< SDRAM error state */
bogdanm 0:9b334a45a8ff 74 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04, /*!< SDRAM device write protected */
bogdanm 0:9b334a45a8ff 75 HAL_SDRAM_STATE_PRECHARGED = 0x05 /*!< SDRAM device precharged */
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 }HAL_SDRAM_StateTypeDef;
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 /**
bogdanm 0:9b334a45a8ff 80 * @brief SDRAM handle Structure definition
bogdanm 0:9b334a45a8ff 81 */
bogdanm 0:9b334a45a8ff 82 typedef struct
bogdanm 0:9b334a45a8ff 83 {
bogdanm 0:9b334a45a8ff 84 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 }SDRAM_HandleTypeDef;
bogdanm 0:9b334a45a8ff 95 /**
bogdanm 0:9b334a45a8ff 96 * @}
bogdanm 0:9b334a45a8ff 97 */
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 100 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 101 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
bogdanm 0:9b334a45a8ff 102 * @{
bogdanm 0:9b334a45a8ff 103 */
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /** @brief Reset SDRAM handle state
bogdanm 0:9b334a45a8ff 106 * @param __HANDLE__: specifies the SDRAM handle.
bogdanm 0:9b334a45a8ff 107 * @retval None
bogdanm 0:9b334a45a8ff 108 */
bogdanm 0:9b334a45a8ff 109 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
bogdanm 0:9b334a45a8ff 110 /**
bogdanm 0:9b334a45a8ff 111 * @}
bogdanm 0:9b334a45a8ff 112 */
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 115 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
bogdanm 0:9b334a45a8ff 116 * @{
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 /** @addtogroup SDRAM_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 120 * @{
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 /* Initialization/de-initialization functions *********************************/
bogdanm 0:9b334a45a8ff 124 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
bogdanm 0:9b334a45a8ff 125 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 126 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 127 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 130 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 131 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 132 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 133 /**
bogdanm 0:9b334a45a8ff 134 * @}
bogdanm 0:9b334a45a8ff 135 */
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 /** @addtogroup SDRAM_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 138 * @{
bogdanm 0:9b334a45a8ff 139 */
bogdanm 0:9b334a45a8ff 140 /* I/O operation functions ****************************************************/
bogdanm 0:9b334a45a8ff 141 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 142 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 143 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 144 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 145 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 146 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 149 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 0:9b334a45a8ff 150 /**
bogdanm 0:9b334a45a8ff 151 * @}
bogdanm 0:9b334a45a8ff 152 */
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 /** @addtogroup SDRAM_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 155 * @{
bogdanm 0:9b334a45a8ff 156 */
bogdanm 0:9b334a45a8ff 157 /* SDRAM Control functions *****************************************************/
bogdanm 0:9b334a45a8ff 158 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 159 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 160 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 161 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
bogdanm 0:9b334a45a8ff 162 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
bogdanm 0:9b334a45a8ff 163 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 164 /**
bogdanm 0:9b334a45a8ff 165 * @}
bogdanm 0:9b334a45a8ff 166 */
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 /** @addtogroup SDRAM_Exported_Functions_Group4
bogdanm 0:9b334a45a8ff 169 * @{
bogdanm 0:9b334a45a8ff 170 */
bogdanm 0:9b334a45a8ff 171 /* SDRAM State functions ********************************************************/
bogdanm 0:9b334a45a8ff 172 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
bogdanm 0:9b334a45a8ff 173 /**
bogdanm 0:9b334a45a8ff 174 * @}
bogdanm 0:9b334a45a8ff 175 */
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 /**
bogdanm 0:9b334a45a8ff 178 * @}
bogdanm 0:9b334a45a8ff 179 */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /**
bogdanm 0:9b334a45a8ff 182 * @}
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184
mbed_official 19:112740acecfa 185 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 /**
bogdanm 0:9b334a45a8ff 188 * @}
bogdanm 0:9b334a45a8ff 189 */
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 192 }
bogdanm 0:9b334a45a8ff 193 #endif
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 #endif /* __STM32F4xx_HAL_SDRAM_H */
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/