en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
19:112740acecfa 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_pwr_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 19:112740acecfa 5 * @version V1.4.1
mbed_official 19:112740acecfa 6 * @date 09-October-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of PWR HAL Extension module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F4xx_HAL_PWR_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F4xx_HAL_PWR_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f4xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup PWREx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
mbed_official 19:112740acecfa 62 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
mbed_official 19:112740acecfa 63 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
bogdanm 0:9b334a45a8ff 66 * @{
bogdanm 0:9b334a45a8ff 67 */
bogdanm 0:9b334a45a8ff 68 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
bogdanm 0:9b334a45a8ff 69 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
bogdanm 0:9b334a45a8ff 70 /**
bogdanm 0:9b334a45a8ff 71 * @}
bogdanm 0:9b334a45a8ff 72 */
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
bogdanm 0:9b334a45a8ff 75 * @{
bogdanm 0:9b334a45a8ff 76 */
bogdanm 0:9b334a45a8ff 77 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
bogdanm 0:9b334a45a8ff 78 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
bogdanm 0:9b334a45a8ff 79 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
bogdanm 0:9b334a45a8ff 80 /**
bogdanm 0:9b334a45a8ff 81 * @}
bogdanm 0:9b334a45a8ff 82 */
mbed_official 19:112740acecfa 83 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 84
mbed_official 19:112740acecfa 85 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
bogdanm 0:9b334a45a8ff 86 * @{
bogdanm 0:9b334a45a8ff 87 */
bogdanm 0:9b334a45a8ff 88 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
bogdanm 0:9b334a45a8ff 89 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
bogdanm 0:9b334a45a8ff 90 #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00000000) /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
bogdanm 0:9b334a45a8ff 91 #else
bogdanm 0:9b334a45a8ff 92 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
bogdanm 0:9b334a45a8ff 93 180 MHz by activating the over-drive mode. */
bogdanm 0:9b334a45a8ff 94 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
bogdanm 0:9b334a45a8ff 95 168 MHz by activating the over-drive mode. */
bogdanm 0:9b334a45a8ff 96 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
bogdanm 0:9b334a45a8ff 97 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
bogdanm 0:9b334a45a8ff 98 /**
bogdanm 0:9b334a45a8ff 99 * @}
bogdanm 0:9b334a45a8ff 100 */
mbed_official 19:112740acecfa 101 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx)
mbed_official 19:112740acecfa 102 /** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
mbed_official 19:112740acecfa 103 * @{
mbed_official 19:112740acecfa 104 */
mbed_official 19:112740acecfa 105 #define PWR_WAKEUP_PIN2 ((uint32_t)0x00000080)
mbed_official 19:112740acecfa 106 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
mbed_official 19:112740acecfa 107 #define PWR_WAKEUP_PIN3 ((uint32_t)0x00000040)
mbed_official 19:112740acecfa 108 #endif /* STM32F410xx */
mbed_official 19:112740acecfa 109 /**
mbed_official 19:112740acecfa 110 * @}
mbed_official 19:112740acecfa 111 */
mbed_official 19:112740acecfa 112 #endif /* STM32F410xx || STM32F446xx */
mbed_official 19:112740acecfa 113
bogdanm 0:9b334a45a8ff 114 /**
bogdanm 0:9b334a45a8ff 115 * @}
bogdanm 0:9b334a45a8ff 116 */
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 119 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
bogdanm 0:9b334a45a8ff 120 * @{
bogdanm 0:9b334a45a8ff 121 */
mbed_official 19:112740acecfa 122
mbed_official 19:112740acecfa 123 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
mbed_official 19:112740acecfa 124 /** @brief macros configure the main internal regulator output voltage.
mbed_official 19:112740acecfa 125 * @param __REGULATOR__: specifies the regulator output voltage to achieve
mbed_official 19:112740acecfa 126 * a tradeoff between performance and power consumption when the device does
mbed_official 19:112740acecfa 127 * not operate at the maximum frequency (refer to the datasheets for more details).
mbed_official 19:112740acecfa 128 * This parameter can be one of the following values:
mbed_official 19:112740acecfa 129 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
mbed_official 19:112740acecfa 130 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
mbed_official 19:112740acecfa 131 * @retval None
mbed_official 19:112740acecfa 132 */
mbed_official 19:112740acecfa 133 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
mbed_official 19:112740acecfa 134 __IO uint32_t tmpreg; \
mbed_official 19:112740acecfa 135 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
mbed_official 19:112740acecfa 136 /* Delay after an RCC peripheral clock enabling */ \
mbed_official 19:112740acecfa 137 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
mbed_official 19:112740acecfa 138 UNUSED(tmpreg); \
mbed_official 19:112740acecfa 139 } while(0)
mbed_official 19:112740acecfa 140 #else
mbed_official 19:112740acecfa 141 /** @brief macros configure the main internal regulator output voltage.
mbed_official 19:112740acecfa 142 * @param __REGULATOR__: specifies the regulator output voltage to achieve
mbed_official 19:112740acecfa 143 * a tradeoff between performance and power consumption when the device does
mbed_official 19:112740acecfa 144 * not operate at the maximum frequency (refer to the datasheets for more details).
mbed_official 19:112740acecfa 145 * This parameter can be one of the following values:
mbed_official 19:112740acecfa 146 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
mbed_official 19:112740acecfa 147 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
mbed_official 19:112740acecfa 148 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
mbed_official 19:112740acecfa 149 * @retval None
mbed_official 19:112740acecfa 150 */
mbed_official 19:112740acecfa 151 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
mbed_official 19:112740acecfa 152 __IO uint32_t tmpreg; \
mbed_official 19:112740acecfa 153 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
mbed_official 19:112740acecfa 154 /* Delay after an RCC peripheral clock enabling */ \
mbed_official 19:112740acecfa 155 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
mbed_official 19:112740acecfa 156 UNUSED(tmpreg); \
mbed_official 19:112740acecfa 157 } while(0)
mbed_official 19:112740acecfa 158 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
mbed_official 19:112740acecfa 159
mbed_official 19:112740acecfa 160 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
mbed_official 19:112740acecfa 161 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 162 /** @brief Macros to enable or disable the Over drive mode.
bogdanm 0:9b334a45a8ff 163 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 0:9b334a45a8ff 164 */
bogdanm 0:9b334a45a8ff 165 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
bogdanm 0:9b334a45a8ff 166 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 /** @brief Macros to enable or disable the Over drive switching.
bogdanm 0:9b334a45a8ff 169 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 0:9b334a45a8ff 170 */
bogdanm 0:9b334a45a8ff 171 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
bogdanm 0:9b334a45a8ff 172 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 /** @brief Macros to enable or disable the Under drive mode.
bogdanm 0:9b334a45a8ff 175 * @note This mode is enabled only with STOP low power mode.
bogdanm 0:9b334a45a8ff 176 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
bogdanm 0:9b334a45a8ff 177 * mode is only available when the main regulator or the low power regulator
bogdanm 0:9b334a45a8ff 178 * is in low voltage mode.
bogdanm 0:9b334a45a8ff 179 * @note If the Under-drive mode was enabled, it is automatically disabled after
bogdanm 0:9b334a45a8ff 180 * exiting Stop mode.
bogdanm 0:9b334a45a8ff 181 * When the voltage regulator operates in Under-drive mode, an additional
bogdanm 0:9b334a45a8ff 182 * startup delay is induced when waking up from Stop mode.
bogdanm 0:9b334a45a8ff 183 */
bogdanm 0:9b334a45a8ff 184 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
bogdanm 0:9b334a45a8ff 185 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 /** @brief Check PWR flag is set or not.
bogdanm 0:9b334a45a8ff 188 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 0:9b334a45a8ff 189 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 190 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 191 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
bogdanm 0:9b334a45a8ff 192 * is ready
bogdanm 0:9b334a45a8ff 193 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
bogdanm 0:9b334a45a8ff 194 * switching is ready
bogdanm 0:9b334a45a8ff 195 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
bogdanm 0:9b334a45a8ff 196 * is enabled in Stop mode
bogdanm 0:9b334a45a8ff 197 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 198 */
bogdanm 0:9b334a45a8ff 199 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /** @brief Clear the Under-Drive Ready flag.
bogdanm 0:9b334a45a8ff 202 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
bogdanm 0:9b334a45a8ff 203 */
bogdanm 0:9b334a45a8ff 204 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
bogdanm 0:9b334a45a8ff 205
mbed_official 19:112740acecfa 206 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 207 /**
bogdanm 0:9b334a45a8ff 208 * @}
bogdanm 0:9b334a45a8ff 209 */
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 212 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
bogdanm 0:9b334a45a8ff 213 * @{
bogdanm 0:9b334a45a8ff 214 */
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 /** @addtogroup PWREx_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 217 * @{
bogdanm 0:9b334a45a8ff 218 */
bogdanm 0:9b334a45a8ff 219 void HAL_PWREx_EnableFlashPowerDown(void);
bogdanm 0:9b334a45a8ff 220 void HAL_PWREx_DisableFlashPowerDown(void);
bogdanm 0:9b334a45a8ff 221 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
bogdanm 0:9b334a45a8ff 222 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
bogdanm 0:9b334a45a8ff 223 uint32_t HAL_PWREx_GetVoltageRange(void);
bogdanm 0:9b334a45a8ff 224 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
bogdanm 0:9b334a45a8ff 225
mbed_official 19:112740acecfa 226 #if defined(STM32F469xx) || defined(STM32F479xx)
mbed_official 19:112740acecfa 227 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void);
mbed_official 19:112740acecfa 228 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void);
mbed_official 19:112740acecfa 229 #endif /* STM32F469xx || STM32F479xx */
mbed_official 19:112740acecfa 230
mbed_official 19:112740acecfa 231 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
mbed_official 19:112740acecfa 232 defined(STM32F401xE) || defined(STM32F411xE)
bogdanm 0:9b334a45a8ff 233 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
bogdanm 0:9b334a45a8ff 234 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
bogdanm 0:9b334a45a8ff 235 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
bogdanm 0:9b334a45a8ff 236 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
mbed_official 19:112740acecfa 237 #endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE */
bogdanm 0:9b334a45a8ff 238
mbed_official 19:112740acecfa 239 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
mbed_official 19:112740acecfa 240 defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 241 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
bogdanm 0:9b334a45a8ff 242 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
bogdanm 0:9b334a45a8ff 243 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
mbed_official 19:112740acecfa 244 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 /**
bogdanm 0:9b334a45a8ff 247 * @}
bogdanm 0:9b334a45a8ff 248 */
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 /**
bogdanm 0:9b334a45a8ff 251 * @}
bogdanm 0:9b334a45a8ff 252 */
bogdanm 0:9b334a45a8ff 253 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 254 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 255 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 256 /** @defgroup PWREx_Private_Constants PWREx Private Constants
bogdanm 0:9b334a45a8ff 257 * @{
bogdanm 0:9b334a45a8ff 258 */
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /** @defgroup PWREx_register_alias_address PWREx Register alias address
bogdanm 0:9b334a45a8ff 261 * @{
bogdanm 0:9b334a45a8ff 262 */
bogdanm 0:9b334a45a8ff 263 /* ------------- PWR registers bit address in the alias region ---------------*/
bogdanm 0:9b334a45a8ff 264 /* --- CR Register ---*/
bogdanm 0:9b334a45a8ff 265 /* Alias word address of FPDS bit */
bogdanm 0:9b334a45a8ff 266 #define FPDS_BIT_NUMBER POSITION_VAL(PWR_CR_FPDS)
bogdanm 0:9b334a45a8ff 267 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FPDS_BIT_NUMBER * 4))
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /* Alias word address of ODEN bit */
bogdanm 0:9b334a45a8ff 270 #define ODEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODEN)
bogdanm 0:9b334a45a8ff 271 #define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODEN_BIT_NUMBER * 4))
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 /* Alias word address of ODSWEN bit */
bogdanm 0:9b334a45a8ff 274 #define ODSWEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODSWEN)
bogdanm 0:9b334a45a8ff 275 #define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODSWEN_BIT_NUMBER * 4))
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /* Alias word address of MRLVDS bit */
bogdanm 0:9b334a45a8ff 278 #define MRLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_MRLVDS)
bogdanm 0:9b334a45a8ff 279 #define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (MRLVDS_BIT_NUMBER * 4))
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 /* Alias word address of LPLVDS bit */
bogdanm 0:9b334a45a8ff 282 #define LPLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_LPLVDS)
bogdanm 0:9b334a45a8ff 283 #define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPLVDS_BIT_NUMBER * 4))
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /**
bogdanm 0:9b334a45a8ff 286 * @}
bogdanm 0:9b334a45a8ff 287 */
bogdanm 0:9b334a45a8ff 288
bogdanm 0:9b334a45a8ff 289 /** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
bogdanm 0:9b334a45a8ff 290 * @{
bogdanm 0:9b334a45a8ff 291 */
bogdanm 0:9b334a45a8ff 292 /* --- CSR Register ---*/
bogdanm 0:9b334a45a8ff 293 /* Alias word address of BRE bit */
bogdanm 0:9b334a45a8ff 294 #define BRE_BIT_NUMBER POSITION_VAL(PWR_CSR_BRE)
mbed_official 19:112740acecfa 295 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (BRE_BIT_NUMBER * 4))
mbed_official 19:112740acecfa 296
mbed_official 19:112740acecfa 297 #if defined(STM32F469xx) || defined(STM32F479xx)
mbed_official 19:112740acecfa 298 /* Alias word address of WUPP bit */
mbed_official 19:112740acecfa 299 #define WUPP_BIT_NUMBER POSITION_VAL(PWR_CSR_WUPP)
mbed_official 19:112740acecfa 300 #define CSR_WUPP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (WUPP_BIT_NUMBER * 4))
mbed_official 19:112740acecfa 301 #endif /* STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 302 /**
bogdanm 0:9b334a45a8ff 303 * @}
bogdanm 0:9b334a45a8ff 304 */
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 /**
bogdanm 0:9b334a45a8ff 307 * @}
bogdanm 0:9b334a45a8ff 308 */
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 311 /** @defgroup PWREx_Private_Macros PWREx Private Macros
bogdanm 0:9b334a45a8ff 312 * @{
bogdanm 0:9b334a45a8ff 313 */
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
bogdanm 0:9b334a45a8ff 316 * @{
bogdanm 0:9b334a45a8ff 317 */
mbed_official 19:112740acecfa 318 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
mbed_official 19:112740acecfa 319 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 320 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
bogdanm 0:9b334a45a8ff 321 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
mbed_official 19:112740acecfa 322 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
bogdanm 0:9b334a45a8ff 325 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
bogdanm 0:9b334a45a8ff 326 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
bogdanm 0:9b334a45a8ff 327 #else
bogdanm 0:9b334a45a8ff 328 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
bogdanm 0:9b334a45a8ff 329 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
bogdanm 0:9b334a45a8ff 330 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
bogdanm 0:9b334a45a8ff 331 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
bogdanm 0:9b334a45a8ff 332
mbed_official 19:112740acecfa 333 #if defined(STM32F446xx)
mbed_official 19:112740acecfa 334 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
mbed_official 19:112740acecfa 335 #elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
mbed_official 19:112740acecfa 336 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
mbed_official 19:112740acecfa 337 ((PIN) == PWR_WAKEUP_PIN3))
mbed_official 19:112740acecfa 338 #else
mbed_official 19:112740acecfa 339 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
mbed_official 19:112740acecfa 340 #endif /* STM32F446xx */
bogdanm 0:9b334a45a8ff 341 /**
bogdanm 0:9b334a45a8ff 342 * @}
bogdanm 0:9b334a45a8ff 343 */
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /**
bogdanm 0:9b334a45a8ff 346 * @}
bogdanm 0:9b334a45a8ff 347 */
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 /**
bogdanm 0:9b334a45a8ff 350 * @}
bogdanm 0:9b334a45a8ff 351 */
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 /**
bogdanm 0:9b334a45a8ff 354 * @}
bogdanm 0:9b334a45a8ff 355 */
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 358 }
bogdanm 0:9b334a45a8ff 359 #endif
bogdanm 0:9b334a45a8ff 360
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 #endif /* __STM32F4xx_HAL_PWR_EX_H */
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/