en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2s.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
19:112740acecfa 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_i2s.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 19:112740acecfa 5 * @version V1.4.1
mbed_official 19:112740acecfa 6 * @date 09-October-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of I2S HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F4xx_HAL_I2S_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F4xx_HAL_I2S_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f4xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup I2S
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /** @defgroup I2S_Exported_Types I2S Exported Types
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief I2S Init structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65 typedef struct
bogdanm 0:9b334a45a8ff 66 {
bogdanm 0:9b334a45a8ff 67 uint32_t Mode; /*!< Specifies the I2S operating mode.
bogdanm 0:9b334a45a8ff 68 This parameter can be a value of @ref I2S_Mode */
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
bogdanm 0:9b334a45a8ff 71 This parameter can be a value of @ref I2S_Standard */
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
bogdanm 0:9b334a45a8ff 74 This parameter can be a value of @ref I2S_Data_Format */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
bogdanm 0:9b334a45a8ff 77 This parameter can be a value of @ref I2S_MCLK_Output */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
bogdanm 0:9b334a45a8ff 80 This parameter can be a value of @ref I2S_Audio_Frequency */
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
bogdanm 0:9b334a45a8ff 83 This parameter can be a value of @ref I2S_Clock_Polarity */
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
bogdanm 0:9b334a45a8ff 86 This parameter can be a value of @ref I2S_Clock_Source */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
bogdanm 0:9b334a45a8ff 89 This parameter can be a value of @ref I2S_FullDuplex_Mode */
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 }I2S_InitTypeDef;
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 /**
bogdanm 0:9b334a45a8ff 94 * @brief HAL State structures definition
bogdanm 0:9b334a45a8ff 95 */
bogdanm 0:9b334a45a8ff 96 typedef enum
bogdanm 0:9b334a45a8ff 97 {
bogdanm 0:9b334a45a8ff 98 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
bogdanm 0:9b334a45a8ff 99 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
bogdanm 0:9b334a45a8ff 100 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
bogdanm 0:9b334a45a8ff 101 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 0:9b334a45a8ff 102 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 0:9b334a45a8ff 103 HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 0:9b334a45a8ff 104 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
bogdanm 0:9b334a45a8ff 105 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 }HAL_I2S_StateTypeDef;
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 /**
bogdanm 0:9b334a45a8ff 110 * @brief I2S handle Structure definition
bogdanm 0:9b334a45a8ff 111 */
bogdanm 0:9b334a45a8ff 112 typedef struct
bogdanm 0:9b334a45a8ff 113 {
bogdanm 0:9b334a45a8ff 114 SPI_TypeDef *Instance; /* I2S registers base address */
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 I2S_InitTypeDef Init; /* I2S communication parameters */
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 __IO HAL_LockTypeDef Lock; /* I2S locking object */
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 __IO uint32_t ErrorCode; /* I2S Error code */
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 }I2S_HandleTypeDef;
bogdanm 0:9b334a45a8ff 141 /**
bogdanm 0:9b334a45a8ff 142 * @}
bogdanm 0:9b334a45a8ff 143 */
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 146 /** @defgroup I2S_Exported_Constants I2S Exported Constants
bogdanm 0:9b334a45a8ff 147 * @{
bogdanm 0:9b334a45a8ff 148 */
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 /** @defgroup I2S_Error_Code I2S Error Code
bogdanm 0:9b334a45a8ff 151 * @brief I2S Error Code
bogdanm 0:9b334a45a8ff 152 * @{
bogdanm 0:9b334a45a8ff 153 */
bogdanm 0:9b334a45a8ff 154 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
bogdanm 0:9b334a45a8ff 155 #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000001) /*!< I2S Underrun error */
bogdanm 0:9b334a45a8ff 156 #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< I2S Overrun error */
bogdanm 0:9b334a45a8ff 157 #define HAL_I2SEX_ERROR_UDR ((uint32_t)0x00000004) /*!< I2S extended Underrun error */
bogdanm 0:9b334a45a8ff 158 #define HAL_I2SEX_ERROR_OVR ((uint32_t)0x00000008) /*!< I2S extended Overrun error */
bogdanm 0:9b334a45a8ff 159 #define HAL_I2S_ERROR_FRE ((uint32_t)0x00000010) /*!< I2S Frame format error */
bogdanm 0:9b334a45a8ff 160 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000020) /*!< DMA transfer error */
bogdanm 0:9b334a45a8ff 161 /**
bogdanm 0:9b334a45a8ff 162 * @}
bogdanm 0:9b334a45a8ff 163 */
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /** @defgroup I2S_Mode I2S Mode
bogdanm 0:9b334a45a8ff 166 * @{
bogdanm 0:9b334a45a8ff 167 */
bogdanm 0:9b334a45a8ff 168 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 169 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
bogdanm 0:9b334a45a8ff 170 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
bogdanm 0:9b334a45a8ff 171 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
bogdanm 0:9b334a45a8ff 172 /**
bogdanm 0:9b334a45a8ff 173 * @}
bogdanm 0:9b334a45a8ff 174 */
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /** @defgroup I2S_Standard I2S Standard
bogdanm 0:9b334a45a8ff 177 * @{
bogdanm 0:9b334a45a8ff 178 */
bogdanm 0:9b334a45a8ff 179 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 180 #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
bogdanm 0:9b334a45a8ff 181 #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
bogdanm 0:9b334a45a8ff 182 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
bogdanm 0:9b334a45a8ff 183 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
bogdanm 0:9b334a45a8ff 184 /**
bogdanm 0:9b334a45a8ff 185 * @}
bogdanm 0:9b334a45a8ff 186 */
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /** @defgroup I2S_Data_Format I2S Data Format
bogdanm 0:9b334a45a8ff 189 * @{
bogdanm 0:9b334a45a8ff 190 */
bogdanm 0:9b334a45a8ff 191 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 192 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 193 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
bogdanm 0:9b334a45a8ff 194 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
bogdanm 0:9b334a45a8ff 195 /**
bogdanm 0:9b334a45a8ff 196 * @}
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 /** @defgroup I2S_MCLK_Output I2S Mclk Output
bogdanm 0:9b334a45a8ff 200 * @{
bogdanm 0:9b334a45a8ff 201 */
bogdanm 0:9b334a45a8ff 202 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
bogdanm 0:9b334a45a8ff 203 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 204 /**
bogdanm 0:9b334a45a8ff 205 * @}
bogdanm 0:9b334a45a8ff 206 */
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
bogdanm 0:9b334a45a8ff 209 * @{
bogdanm 0:9b334a45a8ff 210 */
bogdanm 0:9b334a45a8ff 211 #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
bogdanm 0:9b334a45a8ff 212 #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
bogdanm 0:9b334a45a8ff 213 #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
bogdanm 0:9b334a45a8ff 214 #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
bogdanm 0:9b334a45a8ff 215 #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
bogdanm 0:9b334a45a8ff 216 #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
bogdanm 0:9b334a45a8ff 217 #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
bogdanm 0:9b334a45a8ff 218 #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
bogdanm 0:9b334a45a8ff 219 #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
bogdanm 0:9b334a45a8ff 220 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
bogdanm 0:9b334a45a8ff 221 /**
bogdanm 0:9b334a45a8ff 222 * @}
bogdanm 0:9b334a45a8ff 223 */
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
bogdanm 0:9b334a45a8ff 226 * @{
bogdanm 0:9b334a45a8ff 227 */
bogdanm 0:9b334a45a8ff 228 #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 229 #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 230 /**
bogdanm 0:9b334a45a8ff 231 * @}
bogdanm 0:9b334a45a8ff 232 */
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
bogdanm 0:9b334a45a8ff 235 * @{
bogdanm 0:9b334a45a8ff 236 */
bogdanm 0:9b334a45a8ff 237 #define I2S_CPOL_LOW ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 238 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
bogdanm 0:9b334a45a8ff 239 /**
bogdanm 0:9b334a45a8ff 240 * @}
bogdanm 0:9b334a45a8ff 241 */
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
bogdanm 0:9b334a45a8ff 244 * @{
bogdanm 0:9b334a45a8ff 245 */
bogdanm 0:9b334a45a8ff 246 #define I2S_IT_TXE SPI_CR2_TXEIE
bogdanm 0:9b334a45a8ff 247 #define I2S_IT_RXNE SPI_CR2_RXNEIE
bogdanm 0:9b334a45a8ff 248 #define I2S_IT_ERR SPI_CR2_ERRIE
bogdanm 0:9b334a45a8ff 249 /**
bogdanm 0:9b334a45a8ff 250 * @}
bogdanm 0:9b334a45a8ff 251 */
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 /** @defgroup I2S_Flags_Definition I2S Flags Definition
bogdanm 0:9b334a45a8ff 254 * @{
bogdanm 0:9b334a45a8ff 255 */
bogdanm 0:9b334a45a8ff 256 #define I2S_FLAG_TXE SPI_SR_TXE
bogdanm 0:9b334a45a8ff 257 #define I2S_FLAG_RXNE SPI_SR_RXNE
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 #define I2S_FLAG_UDR SPI_SR_UDR
bogdanm 0:9b334a45a8ff 260 #define I2S_FLAG_OVR SPI_SR_OVR
bogdanm 0:9b334a45a8ff 261 #define I2S_FLAG_FRE SPI_SR_FRE
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
bogdanm 0:9b334a45a8ff 264 #define I2S_FLAG_BSY SPI_SR_BSY
bogdanm 0:9b334a45a8ff 265 /**
bogdanm 0:9b334a45a8ff 266 * @}
bogdanm 0:9b334a45a8ff 267 */
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /**
bogdanm 0:9b334a45a8ff 270 * @}
bogdanm 0:9b334a45a8ff 271 */
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 274 /** @defgroup I2S_Exported_Macros I2S Exported Macros
bogdanm 0:9b334a45a8ff 275 * @{
bogdanm 0:9b334a45a8ff 276 */
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 /** @brief Reset I2S handle state
bogdanm 0:9b334a45a8ff 279 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 280 * @retval None
bogdanm 0:9b334a45a8ff 281 */
bogdanm 0:9b334a45a8ff 282 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
bogdanm 0:9b334a45a8ff 285 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 286 * @retval None
bogdanm 0:9b334a45a8ff 287 */
bogdanm 0:9b334a45a8ff 288 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 289 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 /** @brief Enable or disable the specified I2S interrupts.
bogdanm 0:9b334a45a8ff 292 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 293 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 0:9b334a45a8ff 294 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 295 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
bogdanm 0:9b334a45a8ff 296 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 0:9b334a45a8ff 297 * @arg I2S_IT_ERR: Error interrupt enable
bogdanm 0:9b334a45a8ff 298 * @retval None
bogdanm 0:9b334a45a8ff 299 */
bogdanm 0:9b334a45a8ff 300 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 301 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
bogdanm 0:9b334a45a8ff 304 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 305 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
bogdanm 0:9b334a45a8ff 306 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
bogdanm 0:9b334a45a8ff 307 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 308 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
bogdanm 0:9b334a45a8ff 309 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 0:9b334a45a8ff 310 * @arg I2S_IT_ERR: Error interrupt enable
bogdanm 0:9b334a45a8ff 311 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 312 */
bogdanm 0:9b334a45a8ff 313 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 /** @brief Checks whether the specified I2S flag is set or not.
bogdanm 0:9b334a45a8ff 316 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 317 * @param __FLAG__: specifies the flag to check.
bogdanm 0:9b334a45a8ff 318 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 319 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
bogdanm 0:9b334a45a8ff 320 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
bogdanm 0:9b334a45a8ff 321 * @arg I2S_FLAG_UDR: Underrun flag
bogdanm 0:9b334a45a8ff 322 * @arg I2S_FLAG_OVR: Overrun flag
bogdanm 0:9b334a45a8ff 323 * @arg I2S_FLAG_FRE: Frame error flag
bogdanm 0:9b334a45a8ff 324 * @arg I2S_FLAG_CHSIDE: Channel Side flag
bogdanm 0:9b334a45a8ff 325 * @arg I2S_FLAG_BSY: Busy flag
bogdanm 0:9b334a45a8ff 326 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 327 */
bogdanm 0:9b334a45a8ff 328 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 /** @brief Clears the I2S OVR pending flag.
bogdanm 0:9b334a45a8ff 331 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 332 * @retval None
bogdanm 0:9b334a45a8ff 333 */
bogdanm 0:9b334a45a8ff 334 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
bogdanm 0:9b334a45a8ff 335 do{ \
bogdanm 0:9b334a45a8ff 336 __IO uint32_t tmpreg; \
bogdanm 0:9b334a45a8ff 337 tmpreg = (__HANDLE__)->Instance->DR; \
bogdanm 0:9b334a45a8ff 338 tmpreg = (__HANDLE__)->Instance->SR; \
bogdanm 0:9b334a45a8ff 339 UNUSED(tmpreg); \
bogdanm 0:9b334a45a8ff 340 } while(0)
bogdanm 0:9b334a45a8ff 341
bogdanm 0:9b334a45a8ff 342 /** @brief Clears the I2S UDR pending flag.
bogdanm 0:9b334a45a8ff 343 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 0:9b334a45a8ff 344 * @retval None
bogdanm 0:9b334a45a8ff 345 */
bogdanm 0:9b334a45a8ff 346 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
bogdanm 0:9b334a45a8ff 347 do{ \
bogdanm 0:9b334a45a8ff 348 __IO uint32_t tmpreg; \
bogdanm 0:9b334a45a8ff 349 tmpreg = (__HANDLE__)->Instance->SR; \
bogdanm 0:9b334a45a8ff 350 UNUSED(tmpreg); \
bogdanm 0:9b334a45a8ff 351 } while(0)
bogdanm 0:9b334a45a8ff 352 /**
bogdanm 0:9b334a45a8ff 353 * @}
bogdanm 0:9b334a45a8ff 354 */
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 /* Include I2S Extension module */
bogdanm 0:9b334a45a8ff 357 #include "stm32f4xx_hal_i2s_ex.h"
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 360 /** @addtogroup I2S_Exported_Functions
bogdanm 0:9b334a45a8ff 361 * @{
bogdanm 0:9b334a45a8ff 362 */
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 /** @addtogroup I2S_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 365 * @{
bogdanm 0:9b334a45a8ff 366 */
bogdanm 0:9b334a45a8ff 367 /* Initialization/de-initialization functions **********************************/
bogdanm 0:9b334a45a8ff 368 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 369 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 370 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 371 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 372 /**
bogdanm 0:9b334a45a8ff 373 * @}
bogdanm 0:9b334a45a8ff 374 */
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 /** @addtogroup I2S_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 377 * @{
bogdanm 0:9b334a45a8ff 378 */
bogdanm 0:9b334a45a8ff 379 /* I/O operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 380 /* Blocking mode: Polling */
bogdanm 0:9b334a45a8ff 381 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 382 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 /* Non-Blocking mode: Interrupt */
bogdanm 0:9b334a45a8ff 385 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 386 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 387 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 /* Non-Blocking mode: DMA */
bogdanm 0:9b334a45a8ff 390 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 391 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 394 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 395 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397 /* Peripheral Control and State functions **************************************/
bogdanm 0:9b334a45a8ff 398 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 399 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
bogdanm 0:9b334a45a8ff 402 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 403 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 404 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 405 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 406 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 407 /**
bogdanm 0:9b334a45a8ff 408 * @}
bogdanm 0:9b334a45a8ff 409 */
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /**
bogdanm 0:9b334a45a8ff 412 * @}
bogdanm 0:9b334a45a8ff 413 */
bogdanm 0:9b334a45a8ff 414
bogdanm 0:9b334a45a8ff 415 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 416 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 417 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 418 /** @defgroup I2S_Private_Constants I2S Private Constants
bogdanm 0:9b334a45a8ff 419 * @{
bogdanm 0:9b334a45a8ff 420 */
bogdanm 0:9b334a45a8ff 421
bogdanm 0:9b334a45a8ff 422 /**
bogdanm 0:9b334a45a8ff 423 * @}
bogdanm 0:9b334a45a8ff 424 */
bogdanm 0:9b334a45a8ff 425
bogdanm 0:9b334a45a8ff 426 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 427 /** @defgroup I2S_Private_Macros I2S Private Macros
bogdanm 0:9b334a45a8ff 428 * @{
bogdanm 0:9b334a45a8ff 429 */
bogdanm 0:9b334a45a8ff 430 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
bogdanm 0:9b334a45a8ff 431 ((MODE) == I2S_MODE_SLAVE_RX) || \
bogdanm 0:9b334a45a8ff 432 ((MODE) == I2S_MODE_MASTER_TX) || \
bogdanm 0:9b334a45a8ff 433 ((MODE) == I2S_MODE_MASTER_RX))
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
bogdanm 0:9b334a45a8ff 436 ((STANDARD) == I2S_STANDARD_MSB) || \
bogdanm 0:9b334a45a8ff 437 ((STANDARD) == I2S_STANDARD_LSB) || \
bogdanm 0:9b334a45a8ff 438 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
bogdanm 0:9b334a45a8ff 439 ((STANDARD) == I2S_STANDARD_PCM_LONG))
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
bogdanm 0:9b334a45a8ff 442 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
bogdanm 0:9b334a45a8ff 443 ((FORMAT) == I2S_DATAFORMAT_24B) || \
bogdanm 0:9b334a45a8ff 444 ((FORMAT) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
bogdanm 0:9b334a45a8ff 447 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
bogdanm 0:9b334a45a8ff 450 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
bogdanm 0:9b334a45a8ff 451 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
bogdanm 0:9b334a45a8ff 454 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
bogdanm 0:9b334a45a8ff 457 ((CPOL) == I2S_CPOL_HIGH))
mbed_official 19:112740acecfa 458
bogdanm 0:9b334a45a8ff 459 /**
bogdanm 0:9b334a45a8ff 460 * @}
bogdanm 0:9b334a45a8ff 461 */
bogdanm 0:9b334a45a8ff 462
bogdanm 0:9b334a45a8ff 463 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 464 /** @defgroup I2S_Private_Functions I2S Private Functions
bogdanm 0:9b334a45a8ff 465 * @{
bogdanm 0:9b334a45a8ff 466 */
bogdanm 0:9b334a45a8ff 467 void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 468 void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 469 void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 470 void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 471 void I2S_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 472 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 473 HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 474 HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 475 /**
bogdanm 0:9b334a45a8ff 476 * @}
bogdanm 0:9b334a45a8ff 477 */
bogdanm 0:9b334a45a8ff 478
bogdanm 0:9b334a45a8ff 479 /**
bogdanm 0:9b334a45a8ff 480 * @}
bogdanm 0:9b334a45a8ff 481 */
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 /**
bogdanm 0:9b334a45a8ff 484 * @}
bogdanm 0:9b334a45a8ff 485 */
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 488 }
bogdanm 0:9b334a45a8ff 489 #endif
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492 #endif /* __STM32F4xx_HAL_I2S_H */
bogdanm 0:9b334a45a8ff 493
bogdanm 0:9b334a45a8ff 494 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/