en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_i2c.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
19:112740acecfa 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_i2c.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 19:112740acecfa 5 * @version V1.4.1
mbed_official 19:112740acecfa 6 * @date 09-October-2015
bogdanm 0:9b334a45a8ff 7 * @brief I2C HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + IO operation functions
bogdanm 0:9b334a45a8ff 12 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 13 * + Peripheral State functions
bogdanm 0:9b334a45a8ff 14 *
bogdanm 0:9b334a45a8ff 15 @verbatim
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 18 ==============================================================================
bogdanm 0:9b334a45a8ff 19 [..]
bogdanm 0:9b334a45a8ff 20 The I2C HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 (#) Declare a I2C_HandleTypeDef handle structure, for example:
bogdanm 0:9b334a45a8ff 23 I2C_HandleTypeDef hi2c;
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
bogdanm 0:9b334a45a8ff 26 (##) Enable the I2Cx interface clock
bogdanm 0:9b334a45a8ff 27 (##) I2C pins configuration
bogdanm 0:9b334a45a8ff 28 (+++) Enable the clock for the I2C GPIOs
bogdanm 0:9b334a45a8ff 29 (+++) Configure I2C pins as alternate function open-drain
bogdanm 0:9b334a45a8ff 30 (##) NVIC configuration if you need to use interrupt process
bogdanm 0:9b334a45a8ff 31 (+++) Configure the I2Cx interrupt priority
bogdanm 0:9b334a45a8ff 32 (+++) Enable the NVIC I2C IRQ Channel
bogdanm 0:9b334a45a8ff 33 (##) DMA Configuration if you need to use DMA process
bogdanm 0:9b334a45a8ff 34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
bogdanm 0:9b334a45a8ff 35 (+++) Enable the DMAx interface clock using
bogdanm 0:9b334a45a8ff 36 (+++) Configure the DMA handle parameters
bogdanm 0:9b334a45a8ff 37 (+++) Configure the DMA Tx or Rx Stream
bogdanm 0:9b334a45a8ff 38 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
bogdanm 0:9b334a45a8ff 39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
bogdanm 0:9b334a45a8ff 40 the DMA Tx or Rx Stream
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
bogdanm 0:9b334a45a8ff 43 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
bogdanm 0:9b334a45a8ff 46 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 53 =================================
bogdanm 0:9b334a45a8ff 54 [..]
bogdanm 0:9b334a45a8ff 55 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
bogdanm 0:9b334a45a8ff 56 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
bogdanm 0:9b334a45a8ff 57 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
bogdanm 0:9b334a45a8ff 58 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 *** Polling mode IO MEM operation ***
bogdanm 0:9b334a45a8ff 61 =====================================
bogdanm 0:9b334a45a8ff 62 [..]
bogdanm 0:9b334a45a8ff 63 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
bogdanm 0:9b334a45a8ff 64 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 68 ===================================
bogdanm 0:9b334a45a8ff 69 [..]
bogdanm 0:9b334a45a8ff 70 (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
bogdanm 0:9b334a45a8ff 71 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 72 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm 0:9b334a45a8ff 73 (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
bogdanm 0:9b334a45a8ff 74 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 75 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm 0:9b334a45a8ff 76 (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
bogdanm 0:9b334a45a8ff 77 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 78 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm 0:9b334a45a8ff 79 (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
bogdanm 0:9b334a45a8ff 80 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 81 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm 0:9b334a45a8ff 82 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 83 add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 *** Interrupt mode IO MEM operation ***
bogdanm 0:9b334a45a8ff 86 =======================================
bogdanm 0:9b334a45a8ff 87 [..]
bogdanm 0:9b334a45a8ff 88 (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
bogdanm 0:9b334a45a8ff 89 HAL_I2C_Mem_Write_IT()
bogdanm 0:9b334a45a8ff 90 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 91 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm 0:9b334a45a8ff 92 (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
bogdanm 0:9b334a45a8ff 93 HAL_I2C_Mem_Read_IT()
bogdanm 0:9b334a45a8ff 94 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 95 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm 0:9b334a45a8ff 96 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 97 add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 100 ==============================
bogdanm 0:9b334a45a8ff 101 [..]
bogdanm 0:9b334a45a8ff 102 (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 103 HAL_I2C_Master_Transmit_DMA()
bogdanm 0:9b334a45a8ff 104 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 105 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
bogdanm 0:9b334a45a8ff 106 (+) Receive in master mode an amount of data in non blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 107 HAL_I2C_Master_Receive_DMA()
bogdanm 0:9b334a45a8ff 108 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 109 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
bogdanm 0:9b334a45a8ff 110 (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 111 HAL_I2C_Slave_Transmit_DMA()
bogdanm 0:9b334a45a8ff 112 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 113 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
bogdanm 0:9b334a45a8ff 114 (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
bogdanm 0:9b334a45a8ff 115 HAL_I2C_Slave_Receive_DMA()
bogdanm 0:9b334a45a8ff 116 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 117 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
bogdanm 0:9b334a45a8ff 118 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 119 add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 *** DMA mode IO MEM operation ***
bogdanm 0:9b334a45a8ff 122 =================================
bogdanm 0:9b334a45a8ff 123 [..]
bogdanm 0:9b334a45a8ff 124 (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
bogdanm 0:9b334a45a8ff 125 HAL_I2C_Mem_Write_DMA()
bogdanm 0:9b334a45a8ff 126 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 127 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
bogdanm 0:9b334a45a8ff 128 (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
bogdanm 0:9b334a45a8ff 129 HAL_I2C_Mem_Read_DMA()
bogdanm 0:9b334a45a8ff 130 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 131 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
bogdanm 0:9b334a45a8ff 132 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 133 add his own code by customization of function pointer HAL_I2C_ErrorCallback
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 *** I2C HAL driver macros list ***
bogdanm 0:9b334a45a8ff 137 ==================================
bogdanm 0:9b334a45a8ff 138 [..]
bogdanm 0:9b334a45a8ff 139 Below the list of most used macros in I2C HAL driver.
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
bogdanm 0:9b334a45a8ff 142 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
bogdanm 0:9b334a45a8ff 143 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
bogdanm 0:9b334a45a8ff 144 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
bogdanm 0:9b334a45a8ff 145 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
bogdanm 0:9b334a45a8ff 146 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 [..]
bogdanm 0:9b334a45a8ff 149 (@) You can refer to the I2C HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 @endverbatim
bogdanm 0:9b334a45a8ff 153 ******************************************************************************
bogdanm 0:9b334a45a8ff 154 * @attention
bogdanm 0:9b334a45a8ff 155 *
bogdanm 0:9b334a45a8ff 156 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 157 *
bogdanm 0:9b334a45a8ff 158 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 159 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 160 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 161 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 162 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 163 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 164 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 165 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 166 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 167 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 168 *
bogdanm 0:9b334a45a8ff 169 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 170 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 171 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 172 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 173 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 174 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 175 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 176 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 177 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 178 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 179 *
bogdanm 0:9b334a45a8ff 180 ******************************************************************************
bogdanm 0:9b334a45a8ff 181 */
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 184 #include "stm32f4xx_hal.h"
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 187 * @{
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 /** @defgroup I2C I2C
bogdanm 0:9b334a45a8ff 191 * @brief I2C HAL module driver
bogdanm 0:9b334a45a8ff 192 * @{
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 #ifdef HAL_I2C_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 198 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 199 /** @addtogroup I2C_Private_Constants
bogdanm 0:9b334a45a8ff 200 * @{
bogdanm 0:9b334a45a8ff 201 */
bogdanm 0:9b334a45a8ff 202 #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */
bogdanm 0:9b334a45a8ff 203 #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */
bogdanm 0:9b334a45a8ff 204 #define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)10000) /* 10 s */
bogdanm 0:9b334a45a8ff 205 /**
bogdanm 0:9b334a45a8ff 206 * @}
bogdanm 0:9b334a45a8ff 207 */
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 210 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 211 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 212 /** @addtogroup I2C_Private_Functions
bogdanm 0:9b334a45a8ff 213 * @{
bogdanm 0:9b334a45a8ff 214 */
bogdanm 0:9b334a45a8ff 215 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 216 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 217 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 218 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 219 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 220 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 221 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 224 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 225 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 226 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 227 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 228 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 231 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 232 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 233 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 236 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 237 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 238 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 239 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 240 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 241 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
bogdanm 0:9b334a45a8ff 242 /**
bogdanm 0:9b334a45a8ff 243 * @}
bogdanm 0:9b334a45a8ff 244 */
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 247 /** @defgroup I2C_Exported_Functions I2C Exported Functions
bogdanm 0:9b334a45a8ff 248 * @{
bogdanm 0:9b334a45a8ff 249 */
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 252 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 253 *
bogdanm 0:9b334a45a8ff 254 @verbatim
bogdanm 0:9b334a45a8ff 255 ===============================================================================
bogdanm 0:9b334a45a8ff 256 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 257 ===============================================================================
bogdanm 0:9b334a45a8ff 258 [..] This subsection provides a set of functions allowing to initialize and
bogdanm 0:9b334a45a8ff 259 de-initialize the I2Cx peripheral:
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 (+) User must Implement HAL_I2C_MspInit() function in which he configures
bogdanm 0:9b334a45a8ff 262 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 (+) Call the function HAL_I2C_Init() to configure the selected device with
bogdanm 0:9b334a45a8ff 265 the selected configuration:
bogdanm 0:9b334a45a8ff 266 (++) Communication Speed
bogdanm 0:9b334a45a8ff 267 (++) Duty cycle
bogdanm 0:9b334a45a8ff 268 (++) Addressing mode
bogdanm 0:9b334a45a8ff 269 (++) Own Address 1
bogdanm 0:9b334a45a8ff 270 (++) Dual Addressing mode
bogdanm 0:9b334a45a8ff 271 (++) Own Address 2
bogdanm 0:9b334a45a8ff 272 (++) General call mode
bogdanm 0:9b334a45a8ff 273 (++) Nostretch mode
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
bogdanm 0:9b334a45a8ff 276 of the selected I2Cx peripheral.
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 @endverbatim
bogdanm 0:9b334a45a8ff 279 * @{
bogdanm 0:9b334a45a8ff 280 */
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 /**
bogdanm 0:9b334a45a8ff 283 * @brief Initializes the I2C according to the specified parameters
bogdanm 0:9b334a45a8ff 284 * in the I2C_InitTypeDef and create the associated handle.
bogdanm 0:9b334a45a8ff 285 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 286 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 287 * @retval HAL status
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 290 {
bogdanm 0:9b334a45a8ff 291 uint32_t freqrange = 0;
bogdanm 0:9b334a45a8ff 292 uint32_t pclk1 = 0;
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 /* Check the I2C handle allocation */
bogdanm 0:9b334a45a8ff 295 if(hi2c == NULL)
bogdanm 0:9b334a45a8ff 296 {
bogdanm 0:9b334a45a8ff 297 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 298 }
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 /* Check the parameters */
bogdanm 0:9b334a45a8ff 301 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm 0:9b334a45a8ff 302 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
bogdanm 0:9b334a45a8ff 303 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
bogdanm 0:9b334a45a8ff 304 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
bogdanm 0:9b334a45a8ff 305 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
bogdanm 0:9b334a45a8ff 306 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
bogdanm 0:9b334a45a8ff 307 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
bogdanm 0:9b334a45a8ff 308 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
bogdanm 0:9b334a45a8ff 309 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 if(hi2c->State == HAL_I2C_STATE_RESET)
bogdanm 0:9b334a45a8ff 312 {
bogdanm 0:9b334a45a8ff 313 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 314 hi2c->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 315 /* Init the low level hardware : GPIO, CLOCK, NVIC */
bogdanm 0:9b334a45a8ff 316 HAL_I2C_MspInit(hi2c);
bogdanm 0:9b334a45a8ff 317 }
bogdanm 0:9b334a45a8ff 318
bogdanm 0:9b334a45a8ff 319 hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /* Disable the selected I2C peripheral */
bogdanm 0:9b334a45a8ff 322 __HAL_I2C_DISABLE(hi2c);
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 /* Get PCLK1 frequency */
bogdanm 0:9b334a45a8ff 325 pclk1 = HAL_RCC_GetPCLK1Freq();
bogdanm 0:9b334a45a8ff 326
bogdanm 0:9b334a45a8ff 327 /* Calculate frequency range */
bogdanm 0:9b334a45a8ff 328 freqrange = I2C_FREQRANGE(pclk1);
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
bogdanm 0:9b334a45a8ff 331 /* Configure I2Cx: Frequency range */
bogdanm 0:9b334a45a8ff 332 hi2c->Instance->CR2 = freqrange;
bogdanm 0:9b334a45a8ff 333
bogdanm 0:9b334a45a8ff 334 /*---------------------------- I2Cx TRISE Configuration --------------------*/
bogdanm 0:9b334a45a8ff 335 /* Configure I2Cx: Rise Time */
bogdanm 0:9b334a45a8ff 336 hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /*---------------------------- I2Cx CCR Configuration ----------------------*/
bogdanm 0:9b334a45a8ff 339 /* Configure I2Cx: Speed */
bogdanm 0:9b334a45a8ff 340 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
bogdanm 0:9b334a45a8ff 341
bogdanm 0:9b334a45a8ff 342 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
bogdanm 0:9b334a45a8ff 343 /* Configure I2Cx: Generalcall and NoStretch mode */
bogdanm 0:9b334a45a8ff 344 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
bogdanm 0:9b334a45a8ff 345
bogdanm 0:9b334a45a8ff 346 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 347 /* Configure I2Cx: Own Address1 and addressing mode */
bogdanm 0:9b334a45a8ff 348 hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 351 /* Configure I2Cx: Dual mode and Own Address2 */
bogdanm 0:9b334a45a8ff 352 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 /* Enable the selected I2C peripheral */
bogdanm 0:9b334a45a8ff 355 __HAL_I2C_ENABLE(hi2c);
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 358 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 359
bogdanm 0:9b334a45a8ff 360 return HAL_OK;
bogdanm 0:9b334a45a8ff 361 }
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /**
bogdanm 0:9b334a45a8ff 364 * @brief DeInitializes the I2C peripheral.
bogdanm 0:9b334a45a8ff 365 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 366 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 367 * @retval HAL status
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 370 {
bogdanm 0:9b334a45a8ff 371 /* Check the I2C handle allocation */
bogdanm 0:9b334a45a8ff 372 if(hi2c == NULL)
bogdanm 0:9b334a45a8ff 373 {
bogdanm 0:9b334a45a8ff 374 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 375 }
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 /* Check the parameters */
bogdanm 0:9b334a45a8ff 378 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 /* Disable the I2C Peripheral Clock */
bogdanm 0:9b334a45a8ff 383 __HAL_I2C_DISABLE(hi2c);
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
bogdanm 0:9b334a45a8ff 386 HAL_I2C_MspDeInit(hi2c);
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 389
bogdanm 0:9b334a45a8ff 390 hi2c->State = HAL_I2C_STATE_RESET;
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /* Release Lock */
bogdanm 0:9b334a45a8ff 393 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 return HAL_OK;
bogdanm 0:9b334a45a8ff 396 }
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 /**
bogdanm 0:9b334a45a8ff 399 * @brief I2C MSP Init.
bogdanm 0:9b334a45a8ff 400 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 401 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 402 * @retval None
bogdanm 0:9b334a45a8ff 403 */
bogdanm 0:9b334a45a8ff 404 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 405 {
bogdanm 0:9b334a45a8ff 406 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 407 the HAL_I2C_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 408 */
bogdanm 0:9b334a45a8ff 409 }
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /**
bogdanm 0:9b334a45a8ff 412 * @brief I2C MSP DeInit
bogdanm 0:9b334a45a8ff 413 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 414 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 415 * @retval None
bogdanm 0:9b334a45a8ff 416 */
bogdanm 0:9b334a45a8ff 417 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 418 {
bogdanm 0:9b334a45a8ff 419 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 420 the HAL_I2C_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 421 */
bogdanm 0:9b334a45a8ff 422 }
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /**
bogdanm 0:9b334a45a8ff 425 * @}
bogdanm 0:9b334a45a8ff 426 */
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
bogdanm 0:9b334a45a8ff 429 * @brief Data transfers functions
bogdanm 0:9b334a45a8ff 430 *
bogdanm 0:9b334a45a8ff 431 @verbatim
bogdanm 0:9b334a45a8ff 432 ===============================================================================
bogdanm 0:9b334a45a8ff 433 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 434 ===============================================================================
bogdanm 0:9b334a45a8ff 435 [..]
bogdanm 0:9b334a45a8ff 436 This subsection provides a set of functions allowing to manage the I2C data
bogdanm 0:9b334a45a8ff 437 transfers.
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 (#) There are two modes of transfer:
bogdanm 0:9b334a45a8ff 440 (++) Blocking mode : The communication is performed in the polling mode.
bogdanm 0:9b334a45a8ff 441 The status of all data processing is returned by the same function
bogdanm 0:9b334a45a8ff 442 after finishing transfer.
bogdanm 0:9b334a45a8ff 443 (++) No-Blocking mode : The communication is performed using Interrupts
bogdanm 0:9b334a45a8ff 444 or DMA. These functions return the status of the transfer startup.
bogdanm 0:9b334a45a8ff 445 The end of the data processing will be indicated through the
bogdanm 0:9b334a45a8ff 446 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
bogdanm 0:9b334a45a8ff 447 using DMA mode.
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 (#) Blocking mode functions are :
bogdanm 0:9b334a45a8ff 450 (++) HAL_I2C_Master_Transmit()
bogdanm 0:9b334a45a8ff 451 (++) HAL_I2C_Master_Receive()
bogdanm 0:9b334a45a8ff 452 (++) HAL_I2C_Slave_Transmit()
bogdanm 0:9b334a45a8ff 453 (++) HAL_I2C_Slave_Receive()
bogdanm 0:9b334a45a8ff 454 (++) HAL_I2C_Mem_Write()
bogdanm 0:9b334a45a8ff 455 (++) HAL_I2C_Mem_Read()
bogdanm 0:9b334a45a8ff 456 (++) HAL_I2C_IsDeviceReady()
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 (#) No-Blocking mode functions with Interrupt are :
bogdanm 0:9b334a45a8ff 459 (++) HAL_I2C_Master_Transmit_IT()
bogdanm 0:9b334a45a8ff 460 (++) HAL_I2C_Master_Receive_IT()
bogdanm 0:9b334a45a8ff 461 (++) HAL_I2C_Slave_Transmit_IT()
bogdanm 0:9b334a45a8ff 462 (++) HAL_I2C_Slave_Receive_IT()
bogdanm 0:9b334a45a8ff 463 (++) HAL_I2C_Mem_Write_IT()
bogdanm 0:9b334a45a8ff 464 (++) HAL_I2C_Mem_Read_IT()
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 (#) No-Blocking mode functions with DMA are :
bogdanm 0:9b334a45a8ff 467 (++) HAL_I2C_Master_Transmit_DMA()
bogdanm 0:9b334a45a8ff 468 (++) HAL_I2C_Master_Receive_DMA()
bogdanm 0:9b334a45a8ff 469 (++) HAL_I2C_Slave_Transmit_DMA()
bogdanm 0:9b334a45a8ff 470 (++) HAL_I2C_Slave_Receive_DMA()
bogdanm 0:9b334a45a8ff 471 (++) HAL_I2C_Mem_Write_DMA()
bogdanm 0:9b334a45a8ff 472 (++) HAL_I2C_Mem_Read_DMA()
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
bogdanm 0:9b334a45a8ff 475 (++) HAL_I2C_MemTxCpltCallback()
bogdanm 0:9b334a45a8ff 476 (++) HAL_I2C_MemRxCpltCallback()
bogdanm 0:9b334a45a8ff 477 (++) HAL_I2C_MasterTxCpltCallback()
bogdanm 0:9b334a45a8ff 478 (++) HAL_I2C_MasterRxCpltCallback()
bogdanm 0:9b334a45a8ff 479 (++) HAL_I2C_SlaveTxCpltCallback()
bogdanm 0:9b334a45a8ff 480 (++) HAL_I2C_SlaveRxCpltCallback()
bogdanm 0:9b334a45a8ff 481 (++) HAL_I2C_ErrorCallback()
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 @endverbatim
bogdanm 0:9b334a45a8ff 484 * @{
bogdanm 0:9b334a45a8ff 485 */
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 /**
bogdanm 0:9b334a45a8ff 488 * @brief Transmits in master mode an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 489 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 490 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 491 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 492 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 493 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 494 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 495 * @retval HAL status
bogdanm 0:9b334a45a8ff 496 */
bogdanm 0:9b334a45a8ff 497 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 498 {
bogdanm 0:9b334a45a8ff 499 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 500 {
bogdanm 0:9b334a45a8ff 501 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 502 {
bogdanm 0:9b334a45a8ff 503 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 504 }
bogdanm 0:9b334a45a8ff 505
bogdanm 0:9b334a45a8ff 506 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 507 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 508 {
bogdanm 0:9b334a45a8ff 509 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 510 }
bogdanm 0:9b334a45a8ff 511
bogdanm 0:9b334a45a8ff 512 /* Process Locked */
bogdanm 0:9b334a45a8ff 513 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 /* Disable Pos */
bogdanm 0:9b334a45a8ff 516 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518 hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 519 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 520
bogdanm 0:9b334a45a8ff 521 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 522 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 523 {
bogdanm 0:9b334a45a8ff 524 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 525 {
bogdanm 0:9b334a45a8ff 526 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 527 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 528 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 529 }
bogdanm 0:9b334a45a8ff 530 else
bogdanm 0:9b334a45a8ff 531 {
bogdanm 0:9b334a45a8ff 532 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 533 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 534 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 535 }
bogdanm 0:9b334a45a8ff 536 }
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 539 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 540
bogdanm 0:9b334a45a8ff 541 while(Size > 0)
bogdanm 0:9b334a45a8ff 542 {
bogdanm 0:9b334a45a8ff 543 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 544 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 545 {
bogdanm 0:9b334a45a8ff 546 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 547 }
bogdanm 0:9b334a45a8ff 548
bogdanm 0:9b334a45a8ff 549 /* Write data to DR */
bogdanm 0:9b334a45a8ff 550 hi2c->Instance->DR = (*pData++);
bogdanm 0:9b334a45a8ff 551 Size--;
bogdanm 0:9b334a45a8ff 552
bogdanm 0:9b334a45a8ff 553 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm 0:9b334a45a8ff 554 {
bogdanm 0:9b334a45a8ff 555 /* Write data to DR */
bogdanm 0:9b334a45a8ff 556 hi2c->Instance->DR = (*pData++);
bogdanm 0:9b334a45a8ff 557 Size--;
bogdanm 0:9b334a45a8ff 558 }
bogdanm 0:9b334a45a8ff 559 }
bogdanm 0:9b334a45a8ff 560
bogdanm 0:9b334a45a8ff 561 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 562 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 563 {
bogdanm 0:9b334a45a8ff 564 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 565 }
bogdanm 0:9b334a45a8ff 566
bogdanm 0:9b334a45a8ff 567 /* Generate Stop */
bogdanm 0:9b334a45a8ff 568 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 569
bogdanm 0:9b334a45a8ff 570 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 571
bogdanm 0:9b334a45a8ff 572 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 573 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 574
bogdanm 0:9b334a45a8ff 575 return HAL_OK;
bogdanm 0:9b334a45a8ff 576 }
bogdanm 0:9b334a45a8ff 577 else
bogdanm 0:9b334a45a8ff 578 {
bogdanm 0:9b334a45a8ff 579 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 580 }
bogdanm 0:9b334a45a8ff 581 }
bogdanm 0:9b334a45a8ff 582
bogdanm 0:9b334a45a8ff 583 /**
bogdanm 0:9b334a45a8ff 584 * @brief Receives in master mode an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 585 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 586 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 587 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 588 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 589 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 590 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 591 * @retval HAL status
bogdanm 0:9b334a45a8ff 592 */
bogdanm 0:9b334a45a8ff 593 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 594 {
bogdanm 0:9b334a45a8ff 595 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 596 {
bogdanm 0:9b334a45a8ff 597 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 598 {
bogdanm 0:9b334a45a8ff 599 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 600 }
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 603 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 604 {
bogdanm 0:9b334a45a8ff 605 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 606 }
bogdanm 0:9b334a45a8ff 607
bogdanm 0:9b334a45a8ff 608 /* Process Locked */
bogdanm 0:9b334a45a8ff 609 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 610
bogdanm 0:9b334a45a8ff 611 /* Disable Pos */
bogdanm 0:9b334a45a8ff 612 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 613
bogdanm 0:9b334a45a8ff 614 hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 615 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 616
bogdanm 0:9b334a45a8ff 617 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 618 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 619 {
bogdanm 0:9b334a45a8ff 620 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 621 {
bogdanm 0:9b334a45a8ff 622 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 623 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 624 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 625 }
bogdanm 0:9b334a45a8ff 626 else
bogdanm 0:9b334a45a8ff 627 {
bogdanm 0:9b334a45a8ff 628 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 629 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 630 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 631 }
bogdanm 0:9b334a45a8ff 632 }
bogdanm 0:9b334a45a8ff 633
bogdanm 0:9b334a45a8ff 634 if(Size == 1)
bogdanm 0:9b334a45a8ff 635 {
bogdanm 0:9b334a45a8ff 636 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 637 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 638
bogdanm 0:9b334a45a8ff 639 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 640 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 641
bogdanm 0:9b334a45a8ff 642 /* Generate Stop */
bogdanm 0:9b334a45a8ff 643 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 644 }
bogdanm 0:9b334a45a8ff 645 else if(Size == 2)
bogdanm 0:9b334a45a8ff 646 {
bogdanm 0:9b334a45a8ff 647 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 648 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 649
bogdanm 0:9b334a45a8ff 650 /* Enable Pos */
bogdanm 0:9b334a45a8ff 651 hi2c->Instance->CR1 |= I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 652
bogdanm 0:9b334a45a8ff 653 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 654 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 655 }
bogdanm 0:9b334a45a8ff 656 else
bogdanm 0:9b334a45a8ff 657 {
bogdanm 0:9b334a45a8ff 658 /* Enable Acknowledge */
bogdanm 0:9b334a45a8ff 659 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 660
bogdanm 0:9b334a45a8ff 661 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 662 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 663 }
bogdanm 0:9b334a45a8ff 664
bogdanm 0:9b334a45a8ff 665 while(Size > 0)
bogdanm 0:9b334a45a8ff 666 {
bogdanm 0:9b334a45a8ff 667 if(Size <= 3)
bogdanm 0:9b334a45a8ff 668 {
bogdanm 0:9b334a45a8ff 669 /* One byte */
bogdanm 0:9b334a45a8ff 670 if(Size == 1)
bogdanm 0:9b334a45a8ff 671 {
bogdanm 0:9b334a45a8ff 672 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 673 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 674 {
bogdanm 0:9b334a45a8ff 675 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 676 }
bogdanm 0:9b334a45a8ff 677
bogdanm 0:9b334a45a8ff 678 /* Read data from DR */
bogdanm 0:9b334a45a8ff 679 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 680 Size--;
bogdanm 0:9b334a45a8ff 681 }
bogdanm 0:9b334a45a8ff 682 /* Two bytes */
bogdanm 0:9b334a45a8ff 683 else if(Size == 2)
bogdanm 0:9b334a45a8ff 684 {
bogdanm 0:9b334a45a8ff 685 /* Wait until BTF flag is set */
bogdanm 0:9b334a45a8ff 686 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 687 {
bogdanm 0:9b334a45a8ff 688 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 689 }
bogdanm 0:9b334a45a8ff 690
bogdanm 0:9b334a45a8ff 691 /* Generate Stop */
bogdanm 0:9b334a45a8ff 692 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 693
bogdanm 0:9b334a45a8ff 694 /* Read data from DR */
bogdanm 0:9b334a45a8ff 695 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 696 Size--;
bogdanm 0:9b334a45a8ff 697
bogdanm 0:9b334a45a8ff 698 /* Read data from DR */
bogdanm 0:9b334a45a8ff 699 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 700 Size--;
bogdanm 0:9b334a45a8ff 701 }
bogdanm 0:9b334a45a8ff 702 /* 3 Last bytes */
bogdanm 0:9b334a45a8ff 703 else
bogdanm 0:9b334a45a8ff 704 {
bogdanm 0:9b334a45a8ff 705 /* Wait until BTF flag is set */
bogdanm 0:9b334a45a8ff 706 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 707 {
bogdanm 0:9b334a45a8ff 708 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 709 }
bogdanm 0:9b334a45a8ff 710
bogdanm 0:9b334a45a8ff 711 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 712 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 713
bogdanm 0:9b334a45a8ff 714 /* Read data from DR */
bogdanm 0:9b334a45a8ff 715 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 716 Size--;
bogdanm 0:9b334a45a8ff 717
bogdanm 0:9b334a45a8ff 718 /* Wait until BTF flag is set */
bogdanm 0:9b334a45a8ff 719 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 720 {
bogdanm 0:9b334a45a8ff 721 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 722 }
bogdanm 0:9b334a45a8ff 723
bogdanm 0:9b334a45a8ff 724 /* Generate Stop */
bogdanm 0:9b334a45a8ff 725 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 726
bogdanm 0:9b334a45a8ff 727 /* Read data from DR */
bogdanm 0:9b334a45a8ff 728 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 729 Size--;
bogdanm 0:9b334a45a8ff 730
bogdanm 0:9b334a45a8ff 731 /* Read data from DR */
bogdanm 0:9b334a45a8ff 732 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 733 Size--;
bogdanm 0:9b334a45a8ff 734 }
bogdanm 0:9b334a45a8ff 735 }
bogdanm 0:9b334a45a8ff 736 else
bogdanm 0:9b334a45a8ff 737 {
bogdanm 0:9b334a45a8ff 738 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 739 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 740 {
bogdanm 0:9b334a45a8ff 741 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 742 }
bogdanm 0:9b334a45a8ff 743
bogdanm 0:9b334a45a8ff 744 /* Read data from DR */
bogdanm 0:9b334a45a8ff 745 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 746 Size--;
bogdanm 0:9b334a45a8ff 747
bogdanm 0:9b334a45a8ff 748 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
bogdanm 0:9b334a45a8ff 749 {
bogdanm 0:9b334a45a8ff 750 /* Read data from DR */
bogdanm 0:9b334a45a8ff 751 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 752 Size--;
bogdanm 0:9b334a45a8ff 753 }
bogdanm 0:9b334a45a8ff 754 }
bogdanm 0:9b334a45a8ff 755 }
bogdanm 0:9b334a45a8ff 756
bogdanm 0:9b334a45a8ff 757 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 758
bogdanm 0:9b334a45a8ff 759 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 760 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762 return HAL_OK;
bogdanm 0:9b334a45a8ff 763 }
bogdanm 0:9b334a45a8ff 764 else
bogdanm 0:9b334a45a8ff 765 {
bogdanm 0:9b334a45a8ff 766 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 767 }
bogdanm 0:9b334a45a8ff 768 }
bogdanm 0:9b334a45a8ff 769
bogdanm 0:9b334a45a8ff 770 /**
bogdanm 0:9b334a45a8ff 771 * @brief Transmits in slave mode an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 772 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 773 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 774 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 775 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 776 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 777 * @retval HAL status
bogdanm 0:9b334a45a8ff 778 */
bogdanm 0:9b334a45a8ff 779 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 780 {
bogdanm 0:9b334a45a8ff 781 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 782 {
bogdanm 0:9b334a45a8ff 783 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 784 {
bogdanm 0:9b334a45a8ff 785 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 786 }
bogdanm 0:9b334a45a8ff 787
bogdanm 0:9b334a45a8ff 788 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 789 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 790 {
bogdanm 0:9b334a45a8ff 791 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 792 }
bogdanm 0:9b334a45a8ff 793
bogdanm 0:9b334a45a8ff 794 /* Process Locked */
bogdanm 0:9b334a45a8ff 795 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 796
bogdanm 0:9b334a45a8ff 797 /* Disable Pos */
bogdanm 0:9b334a45a8ff 798 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 799
bogdanm 0:9b334a45a8ff 800 hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 801 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 802
bogdanm 0:9b334a45a8ff 803 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 804 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 805
bogdanm 0:9b334a45a8ff 806 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 807 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 808 {
bogdanm 0:9b334a45a8ff 809 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 810 }
bogdanm 0:9b334a45a8ff 811
bogdanm 0:9b334a45a8ff 812 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 813 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 814
bogdanm 0:9b334a45a8ff 815 /* If 10bit addressing mode is selected */
bogdanm 0:9b334a45a8ff 816 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
bogdanm 0:9b334a45a8ff 817 {
bogdanm 0:9b334a45a8ff 818 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 819 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 820 {
bogdanm 0:9b334a45a8ff 821 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 822 }
bogdanm 0:9b334a45a8ff 823
bogdanm 0:9b334a45a8ff 824 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 825 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 826 }
bogdanm 0:9b334a45a8ff 827
bogdanm 0:9b334a45a8ff 828 while(Size > 0)
bogdanm 0:9b334a45a8ff 829 {
bogdanm 0:9b334a45a8ff 830 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 831 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 832 {
bogdanm 0:9b334a45a8ff 833 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 834 }
bogdanm 0:9b334a45a8ff 835
bogdanm 0:9b334a45a8ff 836 /* Write data to DR */
bogdanm 0:9b334a45a8ff 837 hi2c->Instance->DR = (*pData++);
bogdanm 0:9b334a45a8ff 838 Size--;
bogdanm 0:9b334a45a8ff 839
bogdanm 0:9b334a45a8ff 840 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm 0:9b334a45a8ff 841 {
bogdanm 0:9b334a45a8ff 842 /* Write data to DR */
bogdanm 0:9b334a45a8ff 843 hi2c->Instance->DR = (*pData++);
bogdanm 0:9b334a45a8ff 844 Size--;
bogdanm 0:9b334a45a8ff 845 }
bogdanm 0:9b334a45a8ff 846 }
bogdanm 0:9b334a45a8ff 847
bogdanm 0:9b334a45a8ff 848 /* Wait until AF flag is set */
bogdanm 0:9b334a45a8ff 849 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 850 {
bogdanm 0:9b334a45a8ff 851 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 852 }
bogdanm 0:9b334a45a8ff 853
bogdanm 0:9b334a45a8ff 854 /* Clear AF flag */
bogdanm 0:9b334a45a8ff 855 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 856
bogdanm 0:9b334a45a8ff 857 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 858 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 859
bogdanm 0:9b334a45a8ff 860 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 861
bogdanm 0:9b334a45a8ff 862 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 863 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 864
bogdanm 0:9b334a45a8ff 865 return HAL_OK;
bogdanm 0:9b334a45a8ff 866 }
bogdanm 0:9b334a45a8ff 867 else
bogdanm 0:9b334a45a8ff 868 {
bogdanm 0:9b334a45a8ff 869 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 870 }
bogdanm 0:9b334a45a8ff 871 }
bogdanm 0:9b334a45a8ff 872
bogdanm 0:9b334a45a8ff 873 /**
bogdanm 0:9b334a45a8ff 874 * @brief Receive in slave mode an amount of data in blocking mode
bogdanm 0:9b334a45a8ff 875 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 876 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 877 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 878 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 879 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 880 * @retval HAL status
bogdanm 0:9b334a45a8ff 881 */
bogdanm 0:9b334a45a8ff 882 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 883 {
bogdanm 0:9b334a45a8ff 884 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 885 {
bogdanm 0:9b334a45a8ff 886 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 887 {
bogdanm 0:9b334a45a8ff 888 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 889 }
bogdanm 0:9b334a45a8ff 890
bogdanm 0:9b334a45a8ff 891 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 892 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 893 {
bogdanm 0:9b334a45a8ff 894 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 895 }
bogdanm 0:9b334a45a8ff 896
bogdanm 0:9b334a45a8ff 897 /* Process Locked */
bogdanm 0:9b334a45a8ff 898 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 899
bogdanm 0:9b334a45a8ff 900 /* Disable Pos */
bogdanm 0:9b334a45a8ff 901 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 902
bogdanm 0:9b334a45a8ff 903 hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 904 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 905
bogdanm 0:9b334a45a8ff 906 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 907 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 908
bogdanm 0:9b334a45a8ff 909 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 910 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 911 {
bogdanm 0:9b334a45a8ff 912 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 913 }
bogdanm 0:9b334a45a8ff 914
bogdanm 0:9b334a45a8ff 915 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 916 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 917
bogdanm 0:9b334a45a8ff 918 while(Size > 0)
bogdanm 0:9b334a45a8ff 919 {
bogdanm 0:9b334a45a8ff 920 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 921 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 922 {
bogdanm 0:9b334a45a8ff 923 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 924 }
bogdanm 0:9b334a45a8ff 925
bogdanm 0:9b334a45a8ff 926 /* Read data from DR */
bogdanm 0:9b334a45a8ff 927 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 928 Size--;
bogdanm 0:9b334a45a8ff 929
bogdanm 0:9b334a45a8ff 930 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm 0:9b334a45a8ff 931 {
bogdanm 0:9b334a45a8ff 932 /* Read data from DR */
bogdanm 0:9b334a45a8ff 933 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 934 Size--;
bogdanm 0:9b334a45a8ff 935 }
bogdanm 0:9b334a45a8ff 936 }
bogdanm 0:9b334a45a8ff 937
bogdanm 0:9b334a45a8ff 938 /* Wait until STOP flag is set */
bogdanm 0:9b334a45a8ff 939 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 940 {
bogdanm 0:9b334a45a8ff 941 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 942 }
bogdanm 0:9b334a45a8ff 943
bogdanm 0:9b334a45a8ff 944 /* Clear STOP flag */
bogdanm 0:9b334a45a8ff 945 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
bogdanm 0:9b334a45a8ff 946
bogdanm 0:9b334a45a8ff 947 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 948 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 949
bogdanm 0:9b334a45a8ff 950 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 951
bogdanm 0:9b334a45a8ff 952 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 953 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 954
bogdanm 0:9b334a45a8ff 955 return HAL_OK;
bogdanm 0:9b334a45a8ff 956 }
bogdanm 0:9b334a45a8ff 957 else
bogdanm 0:9b334a45a8ff 958 {
bogdanm 0:9b334a45a8ff 959 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 960 }
bogdanm 0:9b334a45a8ff 961 }
bogdanm 0:9b334a45a8ff 962
bogdanm 0:9b334a45a8ff 963 /**
bogdanm 0:9b334a45a8ff 964 * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 965 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 966 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 967 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 968 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 969 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 970 * @retval HAL status
bogdanm 0:9b334a45a8ff 971 */
bogdanm 0:9b334a45a8ff 972 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 973 {
bogdanm 0:9b334a45a8ff 974 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 975 {
bogdanm 0:9b334a45a8ff 976 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 977 {
bogdanm 0:9b334a45a8ff 978 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 979 }
bogdanm 0:9b334a45a8ff 980
bogdanm 0:9b334a45a8ff 981 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 982 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 983 {
bogdanm 0:9b334a45a8ff 984 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 985 }
bogdanm 0:9b334a45a8ff 986
bogdanm 0:9b334a45a8ff 987 /* Process Locked */
bogdanm 0:9b334a45a8ff 988 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 989
bogdanm 0:9b334a45a8ff 990 /* Disable Pos */
bogdanm 0:9b334a45a8ff 991 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 992
bogdanm 0:9b334a45a8ff 993 hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 994 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 995
bogdanm 0:9b334a45a8ff 996 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 997 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 998 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 999
bogdanm 0:9b334a45a8ff 1000 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1001 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1002 {
bogdanm 0:9b334a45a8ff 1003 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1004 {
bogdanm 0:9b334a45a8ff 1005 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1006 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1007 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1008 }
bogdanm 0:9b334a45a8ff 1009 else
bogdanm 0:9b334a45a8ff 1010 {
bogdanm 0:9b334a45a8ff 1011 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1012 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1013 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1014 }
bogdanm 0:9b334a45a8ff 1015 }
bogdanm 0:9b334a45a8ff 1016
bogdanm 0:9b334a45a8ff 1017 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1018 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1019
bogdanm 0:9b334a45a8ff 1020 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1021 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1022
bogdanm 0:9b334a45a8ff 1023 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1024 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1025 process unlock */
bogdanm 0:9b334a45a8ff 1026
bogdanm 0:9b334a45a8ff 1027 /* Enable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 1028 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 1029
bogdanm 0:9b334a45a8ff 1030 return HAL_OK;
bogdanm 0:9b334a45a8ff 1031 }
bogdanm 0:9b334a45a8ff 1032 else
bogdanm 0:9b334a45a8ff 1033 {
bogdanm 0:9b334a45a8ff 1034 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1035 }
bogdanm 0:9b334a45a8ff 1036 }
bogdanm 0:9b334a45a8ff 1037
bogdanm 0:9b334a45a8ff 1038 /**
bogdanm 0:9b334a45a8ff 1039 * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1040 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1041 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1042 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1043 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1044 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1045 * @retval HAL status
bogdanm 0:9b334a45a8ff 1046 */
bogdanm 0:9b334a45a8ff 1047 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1048 {
bogdanm 0:9b334a45a8ff 1049 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1050 {
bogdanm 0:9b334a45a8ff 1051 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1052 {
bogdanm 0:9b334a45a8ff 1053 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1054 }
bogdanm 0:9b334a45a8ff 1055
bogdanm 0:9b334a45a8ff 1056 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1057 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1058 {
bogdanm 0:9b334a45a8ff 1059 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1060 }
bogdanm 0:9b334a45a8ff 1061
bogdanm 0:9b334a45a8ff 1062 /* Process Locked */
bogdanm 0:9b334a45a8ff 1063 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1064
bogdanm 0:9b334a45a8ff 1065 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1066 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1067
bogdanm 0:9b334a45a8ff 1068 hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1069 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1070
bogdanm 0:9b334a45a8ff 1071 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1072 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1073 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1074
bogdanm 0:9b334a45a8ff 1075 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1076 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1077 {
bogdanm 0:9b334a45a8ff 1078 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1079 {
bogdanm 0:9b334a45a8ff 1080 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1081 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1082 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1083 }
bogdanm 0:9b334a45a8ff 1084 else
bogdanm 0:9b334a45a8ff 1085 {
bogdanm 0:9b334a45a8ff 1086 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1087 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1088 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1089 }
bogdanm 0:9b334a45a8ff 1090 }
bogdanm 0:9b334a45a8ff 1091
bogdanm 0:9b334a45a8ff 1092 if(hi2c->XferCount == 1)
bogdanm 0:9b334a45a8ff 1093 {
bogdanm 0:9b334a45a8ff 1094 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 1095 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1096
bogdanm 0:9b334a45a8ff 1097 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1098 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1099
bogdanm 0:9b334a45a8ff 1100 /* Generate Stop */
bogdanm 0:9b334a45a8ff 1101 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 1102 }
bogdanm 0:9b334a45a8ff 1103 else if(hi2c->XferCount == 2)
bogdanm 0:9b334a45a8ff 1104 {
bogdanm 0:9b334a45a8ff 1105 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 1106 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1107
bogdanm 0:9b334a45a8ff 1108 /* Enable Pos */
bogdanm 0:9b334a45a8ff 1109 hi2c->Instance->CR1 |= I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1110
bogdanm 0:9b334a45a8ff 1111 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1112 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1113 }
bogdanm 0:9b334a45a8ff 1114 else
bogdanm 0:9b334a45a8ff 1115 {
bogdanm 0:9b334a45a8ff 1116 /* Enable Acknowledge */
bogdanm 0:9b334a45a8ff 1117 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1118
bogdanm 0:9b334a45a8ff 1119 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1120 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1121 }
bogdanm 0:9b334a45a8ff 1122
bogdanm 0:9b334a45a8ff 1123 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1124 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1125
bogdanm 0:9b334a45a8ff 1126 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1127 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1128 process unlock */
bogdanm 0:9b334a45a8ff 1129
bogdanm 0:9b334a45a8ff 1130 /* Enable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 1131 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 1132
bogdanm 0:9b334a45a8ff 1133 return HAL_OK;
bogdanm 0:9b334a45a8ff 1134 }
bogdanm 0:9b334a45a8ff 1135 else
bogdanm 0:9b334a45a8ff 1136 {
bogdanm 0:9b334a45a8ff 1137 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1138 }
bogdanm 0:9b334a45a8ff 1139 }
bogdanm 0:9b334a45a8ff 1140
bogdanm 0:9b334a45a8ff 1141 /**
bogdanm 0:9b334a45a8ff 1142 * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1143 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1144 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1145 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1146 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1147 * @retval HAL status
bogdanm 0:9b334a45a8ff 1148 */
bogdanm 0:9b334a45a8ff 1149 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1150 {
bogdanm 0:9b334a45a8ff 1151 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1152 {
bogdanm 0:9b334a45a8ff 1153 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1154 {
bogdanm 0:9b334a45a8ff 1155 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1156 }
bogdanm 0:9b334a45a8ff 1157
bogdanm 0:9b334a45a8ff 1158 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1159 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1160 {
bogdanm 0:9b334a45a8ff 1161 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1162 }
bogdanm 0:9b334a45a8ff 1163
bogdanm 0:9b334a45a8ff 1164 /* Process Locked */
bogdanm 0:9b334a45a8ff 1165 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1166
bogdanm 0:9b334a45a8ff 1167 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1168 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1169
bogdanm 0:9b334a45a8ff 1170 hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1171 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1172
bogdanm 0:9b334a45a8ff 1173 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1174 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1175 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1176
bogdanm 0:9b334a45a8ff 1177 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1178 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1179
bogdanm 0:9b334a45a8ff 1180 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1181 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1182
bogdanm 0:9b334a45a8ff 1183 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1184 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1185 process unlock */
bogdanm 0:9b334a45a8ff 1186
bogdanm 0:9b334a45a8ff 1187 /* Enable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 1188 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 1189
bogdanm 0:9b334a45a8ff 1190 return HAL_OK;
bogdanm 0:9b334a45a8ff 1191 }
bogdanm 0:9b334a45a8ff 1192 else
bogdanm 0:9b334a45a8ff 1193 {
bogdanm 0:9b334a45a8ff 1194 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1195 }
bogdanm 0:9b334a45a8ff 1196 }
bogdanm 0:9b334a45a8ff 1197
bogdanm 0:9b334a45a8ff 1198 /**
bogdanm 0:9b334a45a8ff 1199 * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1200 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1201 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1202 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1203 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1204 * @retval HAL status
bogdanm 0:9b334a45a8ff 1205 */
bogdanm 0:9b334a45a8ff 1206 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1207 {
bogdanm 0:9b334a45a8ff 1208 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1209 {
bogdanm 0:9b334a45a8ff 1210 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1211 {
bogdanm 0:9b334a45a8ff 1212 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1213 }
bogdanm 0:9b334a45a8ff 1214
bogdanm 0:9b334a45a8ff 1215 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1216 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1217 {
bogdanm 0:9b334a45a8ff 1218 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1219 }
bogdanm 0:9b334a45a8ff 1220
bogdanm 0:9b334a45a8ff 1221 /* Process Locked */
bogdanm 0:9b334a45a8ff 1222 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1223
bogdanm 0:9b334a45a8ff 1224 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1225 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1226
bogdanm 0:9b334a45a8ff 1227 hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1228 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1229
bogdanm 0:9b334a45a8ff 1230 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1231 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1232 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1233
bogdanm 0:9b334a45a8ff 1234 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1235 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1236
bogdanm 0:9b334a45a8ff 1237 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1238 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1239
bogdanm 0:9b334a45a8ff 1240 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1241 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1242 process unlock */
bogdanm 0:9b334a45a8ff 1243
bogdanm 0:9b334a45a8ff 1244 /* Enable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 1245 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 1246
bogdanm 0:9b334a45a8ff 1247 return HAL_OK;
bogdanm 0:9b334a45a8ff 1248 }
bogdanm 0:9b334a45a8ff 1249 else
bogdanm 0:9b334a45a8ff 1250 {
bogdanm 0:9b334a45a8ff 1251 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1252 }
bogdanm 0:9b334a45a8ff 1253 }
bogdanm 0:9b334a45a8ff 1254
bogdanm 0:9b334a45a8ff 1255 /**
bogdanm 0:9b334a45a8ff 1256 * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1257 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1258 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1259 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1260 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1261 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1262 * @retval HAL status
bogdanm 0:9b334a45a8ff 1263 */
bogdanm 0:9b334a45a8ff 1264 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1265 {
bogdanm 0:9b334a45a8ff 1266 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1267 {
bogdanm 0:9b334a45a8ff 1268 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1269 {
bogdanm 0:9b334a45a8ff 1270 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1271 }
bogdanm 0:9b334a45a8ff 1272
bogdanm 0:9b334a45a8ff 1273 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1274 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1275 {
bogdanm 0:9b334a45a8ff 1276 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1277 }
bogdanm 0:9b334a45a8ff 1278
bogdanm 0:9b334a45a8ff 1279 /* Process Locked */
bogdanm 0:9b334a45a8ff 1280 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1281
bogdanm 0:9b334a45a8ff 1282 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1283 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1284
bogdanm 0:9b334a45a8ff 1285 hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1286 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1287
bogdanm 0:9b334a45a8ff 1288 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1289 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1290 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1291
bogdanm 0:9b334a45a8ff 1292 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1293 hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
bogdanm 0:9b334a45a8ff 1294
bogdanm 0:9b334a45a8ff 1295 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1296 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1297
bogdanm 0:9b334a45a8ff 1298 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 1299 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
bogdanm 0:9b334a45a8ff 1300
bogdanm 0:9b334a45a8ff 1301 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1302 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1303 {
bogdanm 0:9b334a45a8ff 1304 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1305 {
bogdanm 0:9b334a45a8ff 1306 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1307 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1308 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1309 }
bogdanm 0:9b334a45a8ff 1310 else
bogdanm 0:9b334a45a8ff 1311 {
bogdanm 0:9b334a45a8ff 1312 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1313 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1314 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1315 }
bogdanm 0:9b334a45a8ff 1316 }
bogdanm 0:9b334a45a8ff 1317
bogdanm 0:9b334a45a8ff 1318 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1319 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 1320
bogdanm 0:9b334a45a8ff 1321 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1322 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1323
bogdanm 0:9b334a45a8ff 1324 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1325 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1326
bogdanm 0:9b334a45a8ff 1327 return HAL_OK;
bogdanm 0:9b334a45a8ff 1328 }
bogdanm 0:9b334a45a8ff 1329 else
bogdanm 0:9b334a45a8ff 1330 {
bogdanm 0:9b334a45a8ff 1331 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1332 }
bogdanm 0:9b334a45a8ff 1333 }
bogdanm 0:9b334a45a8ff 1334
bogdanm 0:9b334a45a8ff 1335 /**
bogdanm 0:9b334a45a8ff 1336 * @brief Receive in master mode an amount of data in no-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1337 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1338 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1339 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1340 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1341 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1342 * @retval HAL status
bogdanm 0:9b334a45a8ff 1343 */
bogdanm 0:9b334a45a8ff 1344 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1345 {
bogdanm 0:9b334a45a8ff 1346 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1347 {
bogdanm 0:9b334a45a8ff 1348 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1349 {
bogdanm 0:9b334a45a8ff 1350 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1351 }
bogdanm 0:9b334a45a8ff 1352
bogdanm 0:9b334a45a8ff 1353 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1354 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1355 {
bogdanm 0:9b334a45a8ff 1356 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1357 }
bogdanm 0:9b334a45a8ff 1358
bogdanm 0:9b334a45a8ff 1359 /* Process Locked */
bogdanm 0:9b334a45a8ff 1360 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1361
bogdanm 0:9b334a45a8ff 1362 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1363 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1364
bogdanm 0:9b334a45a8ff 1365 hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1366 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1367
bogdanm 0:9b334a45a8ff 1368 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1369 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1370 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1371
bogdanm 0:9b334a45a8ff 1372 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1373 hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
bogdanm 0:9b334a45a8ff 1374
bogdanm 0:9b334a45a8ff 1375 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1376 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1377
bogdanm 0:9b334a45a8ff 1378 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 1379 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
bogdanm 0:9b334a45a8ff 1380
bogdanm 0:9b334a45a8ff 1381 /* Send Slave Address */
bogdanm 0:9b334a45a8ff 1382 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1383 {
bogdanm 0:9b334a45a8ff 1384 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1385 {
bogdanm 0:9b334a45a8ff 1386 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1387 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1388 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1389 }
bogdanm 0:9b334a45a8ff 1390 else
bogdanm 0:9b334a45a8ff 1391 {
bogdanm 0:9b334a45a8ff 1392 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1393 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1394 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1395 }
bogdanm 0:9b334a45a8ff 1396 }
bogdanm 0:9b334a45a8ff 1397
bogdanm 0:9b334a45a8ff 1398 if(Size == 1)
bogdanm 0:9b334a45a8ff 1399 {
bogdanm 0:9b334a45a8ff 1400 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 1401 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1402 }
bogdanm 0:9b334a45a8ff 1403 else
bogdanm 0:9b334a45a8ff 1404 {
bogdanm 0:9b334a45a8ff 1405 /* Enable Last DMA bit */
bogdanm 0:9b334a45a8ff 1406 hi2c->Instance->CR2 |= I2C_CR2_LAST;
bogdanm 0:9b334a45a8ff 1407 }
bogdanm 0:9b334a45a8ff 1408
bogdanm 0:9b334a45a8ff 1409 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1410 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 1411
bogdanm 0:9b334a45a8ff 1412 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1413 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1414
bogdanm 0:9b334a45a8ff 1415 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1416 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1417
bogdanm 0:9b334a45a8ff 1418 return HAL_OK;
bogdanm 0:9b334a45a8ff 1419 }
bogdanm 0:9b334a45a8ff 1420 else
bogdanm 0:9b334a45a8ff 1421 {
bogdanm 0:9b334a45a8ff 1422 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1423 }
bogdanm 0:9b334a45a8ff 1424 }
bogdanm 0:9b334a45a8ff 1425
bogdanm 0:9b334a45a8ff 1426 /**
bogdanm 0:9b334a45a8ff 1427 * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1428 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1429 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1430 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1431 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1432 * @retval HAL status
bogdanm 0:9b334a45a8ff 1433 */
bogdanm 0:9b334a45a8ff 1434 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1435 {
bogdanm 0:9b334a45a8ff 1436 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1437 {
bogdanm 0:9b334a45a8ff 1438 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1439 {
bogdanm 0:9b334a45a8ff 1440 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1441 }
bogdanm 0:9b334a45a8ff 1442
bogdanm 0:9b334a45a8ff 1443 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1444 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1445 {
bogdanm 0:9b334a45a8ff 1446 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1447 }
bogdanm 0:9b334a45a8ff 1448
bogdanm 0:9b334a45a8ff 1449 /* Process Locked */
bogdanm 0:9b334a45a8ff 1450 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1451
bogdanm 0:9b334a45a8ff 1452 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1453 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1454
bogdanm 0:9b334a45a8ff 1455 hi2c->State = HAL_I2C_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1456 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1457
bogdanm 0:9b334a45a8ff 1458 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1459 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1460 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1461
bogdanm 0:9b334a45a8ff 1462 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1463 hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
bogdanm 0:9b334a45a8ff 1464
bogdanm 0:9b334a45a8ff 1465 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1466 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1467
bogdanm 0:9b334a45a8ff 1468 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 1469 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
bogdanm 0:9b334a45a8ff 1470
bogdanm 0:9b334a45a8ff 1471 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1472 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 1473
bogdanm 0:9b334a45a8ff 1474 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1475 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1476
bogdanm 0:9b334a45a8ff 1477 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 1478 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1479 {
bogdanm 0:9b334a45a8ff 1480 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1481 }
bogdanm 0:9b334a45a8ff 1482
bogdanm 0:9b334a45a8ff 1483 /* If 7bit addressing mode is selected */
bogdanm 0:9b334a45a8ff 1484 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm 0:9b334a45a8ff 1485 {
bogdanm 0:9b334a45a8ff 1486 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1487 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1488 }
bogdanm 0:9b334a45a8ff 1489 else
bogdanm 0:9b334a45a8ff 1490 {
bogdanm 0:9b334a45a8ff 1491 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1492 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1493
bogdanm 0:9b334a45a8ff 1494 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 1495 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1496 {
bogdanm 0:9b334a45a8ff 1497 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1498 }
bogdanm 0:9b334a45a8ff 1499
bogdanm 0:9b334a45a8ff 1500 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1501 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1502 }
bogdanm 0:9b334a45a8ff 1503
bogdanm 0:9b334a45a8ff 1504 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1505 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1506
bogdanm 0:9b334a45a8ff 1507 return HAL_OK;
bogdanm 0:9b334a45a8ff 1508 }
bogdanm 0:9b334a45a8ff 1509 else
bogdanm 0:9b334a45a8ff 1510 {
bogdanm 0:9b334a45a8ff 1511 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1512 }
bogdanm 0:9b334a45a8ff 1513 }
bogdanm 0:9b334a45a8ff 1514
bogdanm 0:9b334a45a8ff 1515 /**
bogdanm 0:9b334a45a8ff 1516 * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
bogdanm 0:9b334a45a8ff 1517 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1518 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1519 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1520 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1521 * @retval HAL status
bogdanm 0:9b334a45a8ff 1522 */
bogdanm 0:9b334a45a8ff 1523 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1524 {
bogdanm 0:9b334a45a8ff 1525 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1526 {
bogdanm 0:9b334a45a8ff 1527 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1528 {
bogdanm 0:9b334a45a8ff 1529 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1530 }
bogdanm 0:9b334a45a8ff 1531
bogdanm 0:9b334a45a8ff 1532 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1533 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1534 {
bogdanm 0:9b334a45a8ff 1535 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1536 }
bogdanm 0:9b334a45a8ff 1537
bogdanm 0:9b334a45a8ff 1538 /* Process Locked */
bogdanm 0:9b334a45a8ff 1539 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1540
bogdanm 0:9b334a45a8ff 1541 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1542 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1543
bogdanm 0:9b334a45a8ff 1544 hi2c->State = HAL_I2C_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1545 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1546
bogdanm 0:9b334a45a8ff 1547 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1548 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1549 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1550
bogdanm 0:9b334a45a8ff 1551 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1552 hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
bogdanm 0:9b334a45a8ff 1553
bogdanm 0:9b334a45a8ff 1554 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1555 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 1556
bogdanm 0:9b334a45a8ff 1557 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 1558 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
bogdanm 0:9b334a45a8ff 1559
bogdanm 0:9b334a45a8ff 1560 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 1561 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 1562
bogdanm 0:9b334a45a8ff 1563 /* Enable Address Acknowledge */
bogdanm 0:9b334a45a8ff 1564 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1565
bogdanm 0:9b334a45a8ff 1566 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 1567 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1568 {
bogdanm 0:9b334a45a8ff 1569 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1570 }
bogdanm 0:9b334a45a8ff 1571
bogdanm 0:9b334a45a8ff 1572 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1573 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1574
bogdanm 0:9b334a45a8ff 1575 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1576 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1577
bogdanm 0:9b334a45a8ff 1578 return HAL_OK;
bogdanm 0:9b334a45a8ff 1579 }
bogdanm 0:9b334a45a8ff 1580 else
bogdanm 0:9b334a45a8ff 1581 {
bogdanm 0:9b334a45a8ff 1582 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1583 }
bogdanm 0:9b334a45a8ff 1584 }
bogdanm 0:9b334a45a8ff 1585 /**
bogdanm 0:9b334a45a8ff 1586 * @brief Write an amount of data in blocking mode to a specific memory address
bogdanm 0:9b334a45a8ff 1587 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1588 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1589 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1590 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1591 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1592 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1593 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1594 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 1595 * @retval HAL status
bogdanm 0:9b334a45a8ff 1596 */
bogdanm 0:9b334a45a8ff 1597 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1598 {
bogdanm 0:9b334a45a8ff 1599 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1600 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1601
bogdanm 0:9b334a45a8ff 1602 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1603 {
bogdanm 0:9b334a45a8ff 1604 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1605 {
bogdanm 0:9b334a45a8ff 1606 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1607 }
bogdanm 0:9b334a45a8ff 1608
bogdanm 0:9b334a45a8ff 1609 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1610 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1611 {
bogdanm 0:9b334a45a8ff 1612 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1613 }
bogdanm 0:9b334a45a8ff 1614
bogdanm 0:9b334a45a8ff 1615 /* Process Locked */
bogdanm 0:9b334a45a8ff 1616 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1617
bogdanm 0:9b334a45a8ff 1618 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1619 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1620
bogdanm 0:9b334a45a8ff 1621 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm 0:9b334a45a8ff 1622 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1623
bogdanm 0:9b334a45a8ff 1624 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1625 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1626 {
bogdanm 0:9b334a45a8ff 1627 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1628 {
bogdanm 0:9b334a45a8ff 1629 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1630 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1631 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1632 }
bogdanm 0:9b334a45a8ff 1633 else
bogdanm 0:9b334a45a8ff 1634 {
bogdanm 0:9b334a45a8ff 1635 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1636 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1637 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1638 }
bogdanm 0:9b334a45a8ff 1639 }
bogdanm 0:9b334a45a8ff 1640
bogdanm 0:9b334a45a8ff 1641 while(Size > 0)
bogdanm 0:9b334a45a8ff 1642 {
bogdanm 0:9b334a45a8ff 1643 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 1644 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1645 {
bogdanm 0:9b334a45a8ff 1646 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1647 }
bogdanm 0:9b334a45a8ff 1648
bogdanm 0:9b334a45a8ff 1649 /* Write data to DR */
bogdanm 0:9b334a45a8ff 1650 hi2c->Instance->DR = (*pData++);
bogdanm 0:9b334a45a8ff 1651 Size--;
bogdanm 0:9b334a45a8ff 1652
bogdanm 0:9b334a45a8ff 1653 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
bogdanm 0:9b334a45a8ff 1654 {
bogdanm 0:9b334a45a8ff 1655 /* Write data to DR */
bogdanm 0:9b334a45a8ff 1656 hi2c->Instance->DR = (*pData++);
bogdanm 0:9b334a45a8ff 1657 Size--;
bogdanm 0:9b334a45a8ff 1658 }
bogdanm 0:9b334a45a8ff 1659 }
bogdanm 0:9b334a45a8ff 1660
bogdanm 0:9b334a45a8ff 1661 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 1662 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1663 {
bogdanm 0:9b334a45a8ff 1664 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1665 }
bogdanm 0:9b334a45a8ff 1666
bogdanm 0:9b334a45a8ff 1667 /* Generate Stop */
bogdanm 0:9b334a45a8ff 1668 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 1669
bogdanm 0:9b334a45a8ff 1670 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 1671
bogdanm 0:9b334a45a8ff 1672 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1673 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1674
bogdanm 0:9b334a45a8ff 1675 return HAL_OK;
bogdanm 0:9b334a45a8ff 1676 }
bogdanm 0:9b334a45a8ff 1677 else
bogdanm 0:9b334a45a8ff 1678 {
bogdanm 0:9b334a45a8ff 1679 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1680 }
bogdanm 0:9b334a45a8ff 1681 }
bogdanm 0:9b334a45a8ff 1682
bogdanm 0:9b334a45a8ff 1683 /**
bogdanm 0:9b334a45a8ff 1684 * @brief Read an amount of data in blocking mode from a specific memory address
bogdanm 0:9b334a45a8ff 1685 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1686 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1687 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1688 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1689 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1690 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1691 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1692 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 1693 * @retval HAL status
bogdanm 0:9b334a45a8ff 1694 */
bogdanm 0:9b334a45a8ff 1695 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1696 {
bogdanm 0:9b334a45a8ff 1697 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1698 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1699
bogdanm 0:9b334a45a8ff 1700 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1701 {
bogdanm 0:9b334a45a8ff 1702 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1703 {
bogdanm 0:9b334a45a8ff 1704 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1705 }
bogdanm 0:9b334a45a8ff 1706
bogdanm 0:9b334a45a8ff 1707 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1708 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1709 {
bogdanm 0:9b334a45a8ff 1710 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1711 }
bogdanm 0:9b334a45a8ff 1712
bogdanm 0:9b334a45a8ff 1713 /* Process Locked */
bogdanm 0:9b334a45a8ff 1714 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1715
bogdanm 0:9b334a45a8ff 1716 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1717 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1718
bogdanm 0:9b334a45a8ff 1719 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm 0:9b334a45a8ff 1720 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1721
bogdanm 0:9b334a45a8ff 1722 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1723 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1724 {
bogdanm 0:9b334a45a8ff 1725 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1726 {
bogdanm 0:9b334a45a8ff 1727 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1728 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1729 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1730 }
bogdanm 0:9b334a45a8ff 1731 else
bogdanm 0:9b334a45a8ff 1732 {
bogdanm 0:9b334a45a8ff 1733 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1734 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1735 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1736 }
bogdanm 0:9b334a45a8ff 1737 }
bogdanm 0:9b334a45a8ff 1738
bogdanm 0:9b334a45a8ff 1739 if(Size == 1)
bogdanm 0:9b334a45a8ff 1740 {
bogdanm 0:9b334a45a8ff 1741 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 1742 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1743
bogdanm 0:9b334a45a8ff 1744 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1745 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1746
bogdanm 0:9b334a45a8ff 1747 /* Generate Stop */
bogdanm 0:9b334a45a8ff 1748 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 1749 }
bogdanm 0:9b334a45a8ff 1750 else if(Size == 2)
bogdanm 0:9b334a45a8ff 1751 {
bogdanm 0:9b334a45a8ff 1752 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 1753 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1754
bogdanm 0:9b334a45a8ff 1755 /* Enable Pos */
bogdanm 0:9b334a45a8ff 1756 hi2c->Instance->CR1 |= I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1757
bogdanm 0:9b334a45a8ff 1758 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1759 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1760 }
bogdanm 0:9b334a45a8ff 1761 else
bogdanm 0:9b334a45a8ff 1762 {
bogdanm 0:9b334a45a8ff 1763 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 1764 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 1765 }
bogdanm 0:9b334a45a8ff 1766
bogdanm 0:9b334a45a8ff 1767 while(Size > 0)
bogdanm 0:9b334a45a8ff 1768 {
bogdanm 0:9b334a45a8ff 1769 if(Size <= 3)
bogdanm 0:9b334a45a8ff 1770 {
bogdanm 0:9b334a45a8ff 1771 /* One byte */
bogdanm 0:9b334a45a8ff 1772 if(Size== 1)
bogdanm 0:9b334a45a8ff 1773 {
bogdanm 0:9b334a45a8ff 1774 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 1775 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1776 {
bogdanm 0:9b334a45a8ff 1777 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1778 }
bogdanm 0:9b334a45a8ff 1779
bogdanm 0:9b334a45a8ff 1780 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1781 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1782 Size--;
bogdanm 0:9b334a45a8ff 1783 }
bogdanm 0:9b334a45a8ff 1784 /* Two bytes */
bogdanm 0:9b334a45a8ff 1785 else if(Size == 2)
bogdanm 0:9b334a45a8ff 1786 {
bogdanm 0:9b334a45a8ff 1787 /* Wait until BTF flag is set */
bogdanm 0:9b334a45a8ff 1788 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1789 {
bogdanm 0:9b334a45a8ff 1790 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1791 }
bogdanm 0:9b334a45a8ff 1792
bogdanm 0:9b334a45a8ff 1793 /* Generate Stop */
bogdanm 0:9b334a45a8ff 1794 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 1795
bogdanm 0:9b334a45a8ff 1796 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1797 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1798 Size--;
bogdanm 0:9b334a45a8ff 1799
bogdanm 0:9b334a45a8ff 1800 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1801 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1802 Size--;
bogdanm 0:9b334a45a8ff 1803 }
bogdanm 0:9b334a45a8ff 1804 /* 3 Last bytes */
bogdanm 0:9b334a45a8ff 1805 else
bogdanm 0:9b334a45a8ff 1806 {
bogdanm 0:9b334a45a8ff 1807 /* Wait until BTF flag is set */
bogdanm 0:9b334a45a8ff 1808 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1809 {
bogdanm 0:9b334a45a8ff 1810 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1811 }
bogdanm 0:9b334a45a8ff 1812
bogdanm 0:9b334a45a8ff 1813 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 1814 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 1815
bogdanm 0:9b334a45a8ff 1816 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1817 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1818 Size--;
bogdanm 0:9b334a45a8ff 1819
bogdanm 0:9b334a45a8ff 1820 /* Wait until BTF flag is set */
bogdanm 0:9b334a45a8ff 1821 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1822 {
bogdanm 0:9b334a45a8ff 1823 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1824 }
bogdanm 0:9b334a45a8ff 1825
bogdanm 0:9b334a45a8ff 1826 /* Generate Stop */
bogdanm 0:9b334a45a8ff 1827 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 1828
bogdanm 0:9b334a45a8ff 1829 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1830 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1831 Size--;
bogdanm 0:9b334a45a8ff 1832
bogdanm 0:9b334a45a8ff 1833 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1834 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1835 Size--;
bogdanm 0:9b334a45a8ff 1836 }
bogdanm 0:9b334a45a8ff 1837 }
bogdanm 0:9b334a45a8ff 1838 else
bogdanm 0:9b334a45a8ff 1839 {
bogdanm 0:9b334a45a8ff 1840 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 1841 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 1842 {
bogdanm 0:9b334a45a8ff 1843 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1844 }
bogdanm 0:9b334a45a8ff 1845
bogdanm 0:9b334a45a8ff 1846 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1847 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1848 Size--;
bogdanm 0:9b334a45a8ff 1849
bogdanm 0:9b334a45a8ff 1850 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
bogdanm 0:9b334a45a8ff 1851 {
bogdanm 0:9b334a45a8ff 1852 /* Read data from DR */
bogdanm 0:9b334a45a8ff 1853 (*pData++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 1854 Size--;
bogdanm 0:9b334a45a8ff 1855 }
bogdanm 0:9b334a45a8ff 1856 }
bogdanm 0:9b334a45a8ff 1857 }
bogdanm 0:9b334a45a8ff 1858
bogdanm 0:9b334a45a8ff 1859 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 1860
bogdanm 0:9b334a45a8ff 1861 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1862 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1863
bogdanm 0:9b334a45a8ff 1864 return HAL_OK;
bogdanm 0:9b334a45a8ff 1865 }
bogdanm 0:9b334a45a8ff 1866 else
bogdanm 0:9b334a45a8ff 1867 {
bogdanm 0:9b334a45a8ff 1868 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1869 }
bogdanm 0:9b334a45a8ff 1870 }
bogdanm 0:9b334a45a8ff 1871 /**
bogdanm 0:9b334a45a8ff 1872 * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
bogdanm 0:9b334a45a8ff 1873 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1874 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1875 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1876 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1877 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1878 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1879 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1880 * @retval HAL status
bogdanm 0:9b334a45a8ff 1881 */
bogdanm 0:9b334a45a8ff 1882 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1883 {
bogdanm 0:9b334a45a8ff 1884 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1885 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1886
bogdanm 0:9b334a45a8ff 1887 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1888 {
bogdanm 0:9b334a45a8ff 1889 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1890 {
bogdanm 0:9b334a45a8ff 1891 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1892 }
bogdanm 0:9b334a45a8ff 1893
bogdanm 0:9b334a45a8ff 1894 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1895 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1896 {
bogdanm 0:9b334a45a8ff 1897 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1898 }
bogdanm 0:9b334a45a8ff 1899
bogdanm 0:9b334a45a8ff 1900 /* Process Locked */
bogdanm 0:9b334a45a8ff 1901 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1902
bogdanm 0:9b334a45a8ff 1903 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1904 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1905
bogdanm 0:9b334a45a8ff 1906 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm 0:9b334a45a8ff 1907 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1908
bogdanm 0:9b334a45a8ff 1909 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1910 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1911 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1912
bogdanm 0:9b334a45a8ff 1913 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1914 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1915 {
bogdanm 0:9b334a45a8ff 1916 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1917 {
bogdanm 0:9b334a45a8ff 1918 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1919 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1920 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1921 }
bogdanm 0:9b334a45a8ff 1922 else
bogdanm 0:9b334a45a8ff 1923 {
bogdanm 0:9b334a45a8ff 1924 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1925 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1926 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1927 }
bogdanm 0:9b334a45a8ff 1928 }
bogdanm 0:9b334a45a8ff 1929
bogdanm 0:9b334a45a8ff 1930 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1931 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1932
bogdanm 0:9b334a45a8ff 1933 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 1934 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 1935 process unlock */
bogdanm 0:9b334a45a8ff 1936
bogdanm 0:9b334a45a8ff 1937 /* Enable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 1938 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 1939
bogdanm 0:9b334a45a8ff 1940 return HAL_OK;
bogdanm 0:9b334a45a8ff 1941 }
bogdanm 0:9b334a45a8ff 1942 else
bogdanm 0:9b334a45a8ff 1943 {
bogdanm 0:9b334a45a8ff 1944 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1945 }
bogdanm 0:9b334a45a8ff 1946 }
bogdanm 0:9b334a45a8ff 1947
bogdanm 0:9b334a45a8ff 1948 /**
bogdanm 0:9b334a45a8ff 1949 * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
bogdanm 0:9b334a45a8ff 1950 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1951 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 1952 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 1953 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 1954 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 1955 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 1956 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 1957 * @retval HAL status
bogdanm 0:9b334a45a8ff 1958 */
bogdanm 0:9b334a45a8ff 1959 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 1960 {
bogdanm 0:9b334a45a8ff 1961 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1962 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 1963
bogdanm 0:9b334a45a8ff 1964 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 1965 {
bogdanm 0:9b334a45a8ff 1966 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 1967 {
bogdanm 0:9b334a45a8ff 1968 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1969 }
bogdanm 0:9b334a45a8ff 1970
bogdanm 0:9b334a45a8ff 1971 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 1972 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1973 {
bogdanm 0:9b334a45a8ff 1974 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1975 }
bogdanm 0:9b334a45a8ff 1976
bogdanm 0:9b334a45a8ff 1977 /* Process Locked */
bogdanm 0:9b334a45a8ff 1978 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 1979
bogdanm 0:9b334a45a8ff 1980 /* Disable Pos */
bogdanm 0:9b334a45a8ff 1981 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 1982
bogdanm 0:9b334a45a8ff 1983 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm 0:9b334a45a8ff 1984 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1985
bogdanm 0:9b334a45a8ff 1986 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1987 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 1988 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 1989
bogdanm 0:9b334a45a8ff 1990 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 1991 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 1992 {
bogdanm 0:9b334a45a8ff 1993 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 1994 {
bogdanm 0:9b334a45a8ff 1995 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1996 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 1997 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1998 }
bogdanm 0:9b334a45a8ff 1999 else
bogdanm 0:9b334a45a8ff 2000 {
bogdanm 0:9b334a45a8ff 2001 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2002 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2003 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2004 }
bogdanm 0:9b334a45a8ff 2005 }
bogdanm 0:9b334a45a8ff 2006
bogdanm 0:9b334a45a8ff 2007 if(hi2c->XferCount == 1)
bogdanm 0:9b334a45a8ff 2008 {
bogdanm 0:9b334a45a8ff 2009 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 2010 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 2011
bogdanm 0:9b334a45a8ff 2012 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 2013 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 2014
bogdanm 0:9b334a45a8ff 2015 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2016 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 2017 }
bogdanm 0:9b334a45a8ff 2018 else if(hi2c->XferCount == 2)
bogdanm 0:9b334a45a8ff 2019 {
bogdanm 0:9b334a45a8ff 2020 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 2021 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 2022
bogdanm 0:9b334a45a8ff 2023 /* Enable Pos */
bogdanm 0:9b334a45a8ff 2024 hi2c->Instance->CR1 |= I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 2025
bogdanm 0:9b334a45a8ff 2026 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 2027 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 2028 }
bogdanm 0:9b334a45a8ff 2029 else
bogdanm 0:9b334a45a8ff 2030 {
bogdanm 0:9b334a45a8ff 2031 /* Enable Acknowledge */
bogdanm 0:9b334a45a8ff 2032 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 2033
bogdanm 0:9b334a45a8ff 2034 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 2035 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 2036 }
bogdanm 0:9b334a45a8ff 2037
bogdanm 0:9b334a45a8ff 2038 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2039 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2040
bogdanm 0:9b334a45a8ff 2041 /* Note : The I2C interrupts must be enabled after unlocking current process
bogdanm 0:9b334a45a8ff 2042 to avoid the risk of I2C interrupt handle execution before current
bogdanm 0:9b334a45a8ff 2043 process unlock */
bogdanm 0:9b334a45a8ff 2044
bogdanm 0:9b334a45a8ff 2045 /* Enable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 2046 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2047
bogdanm 0:9b334a45a8ff 2048 return HAL_OK;
bogdanm 0:9b334a45a8ff 2049 }
bogdanm 0:9b334a45a8ff 2050 else
bogdanm 0:9b334a45a8ff 2051 {
bogdanm 0:9b334a45a8ff 2052 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2053 }
bogdanm 0:9b334a45a8ff 2054 }
bogdanm 0:9b334a45a8ff 2055 /**
bogdanm 0:9b334a45a8ff 2056 * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
bogdanm 0:9b334a45a8ff 2057 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2058 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2059 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2060 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 2061 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 2062 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 2063 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 2064 * @retval HAL status
bogdanm 0:9b334a45a8ff 2065 */
bogdanm 0:9b334a45a8ff 2066 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 2067 {
bogdanm 0:9b334a45a8ff 2068 /* Check the parameters */
bogdanm 0:9b334a45a8ff 2069 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 2070
bogdanm 0:9b334a45a8ff 2071 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 2072 {
bogdanm 0:9b334a45a8ff 2073 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 2074 {
bogdanm 0:9b334a45a8ff 2075 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2076 }
bogdanm 0:9b334a45a8ff 2077
bogdanm 0:9b334a45a8ff 2078 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 2079 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2080 {
bogdanm 0:9b334a45a8ff 2081 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2082 }
bogdanm 0:9b334a45a8ff 2083
bogdanm 0:9b334a45a8ff 2084 /* Process Locked */
bogdanm 0:9b334a45a8ff 2085 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2086
bogdanm 0:9b334a45a8ff 2087 /* Disable Pos */
bogdanm 0:9b334a45a8ff 2088 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 2089
bogdanm 0:9b334a45a8ff 2090 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
bogdanm 0:9b334a45a8ff 2091 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 2092
bogdanm 0:9b334a45a8ff 2093 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 2094 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 2095 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 2096
bogdanm 0:9b334a45a8ff 2097 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 2098 hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
bogdanm 0:9b334a45a8ff 2099
bogdanm 0:9b334a45a8ff 2100 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 2101 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 2102
bogdanm 0:9b334a45a8ff 2103 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 2104 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
bogdanm 0:9b334a45a8ff 2105
bogdanm 0:9b334a45a8ff 2106 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 2107 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2108 {
bogdanm 0:9b334a45a8ff 2109 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2110 {
bogdanm 0:9b334a45a8ff 2111 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2112 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2113 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2114 }
bogdanm 0:9b334a45a8ff 2115 else
bogdanm 0:9b334a45a8ff 2116 {
bogdanm 0:9b334a45a8ff 2117 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2118 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2119 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2120 }
bogdanm 0:9b334a45a8ff 2121 }
bogdanm 0:9b334a45a8ff 2122
bogdanm 0:9b334a45a8ff 2123 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 2124 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 2125
bogdanm 0:9b334a45a8ff 2126 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2127 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2128
bogdanm 0:9b334a45a8ff 2129 return HAL_OK;
bogdanm 0:9b334a45a8ff 2130 }
bogdanm 0:9b334a45a8ff 2131 else
bogdanm 0:9b334a45a8ff 2132 {
bogdanm 0:9b334a45a8ff 2133 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2134 }
bogdanm 0:9b334a45a8ff 2135 }
bogdanm 0:9b334a45a8ff 2136
bogdanm 0:9b334a45a8ff 2137 /**
bogdanm 0:9b334a45a8ff 2138 * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
bogdanm 0:9b334a45a8ff 2139 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2140 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2141 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2142 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 2143 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 2144 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 2145 * @param Size: Amount of data to be read
bogdanm 0:9b334a45a8ff 2146 * @retval HAL status
bogdanm 0:9b334a45a8ff 2147 */
bogdanm 0:9b334a45a8ff 2148 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 2149 {
bogdanm 0:9b334a45a8ff 2150 /* Check the parameters */
bogdanm 0:9b334a45a8ff 2151 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
bogdanm 0:9b334a45a8ff 2152
bogdanm 0:9b334a45a8ff 2153 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 2154 {
bogdanm 0:9b334a45a8ff 2155 if((pData == NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 2156 {
bogdanm 0:9b334a45a8ff 2157 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2158 }
bogdanm 0:9b334a45a8ff 2159
bogdanm 0:9b334a45a8ff 2160 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 2161 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2162 {
bogdanm 0:9b334a45a8ff 2163 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2164 }
bogdanm 0:9b334a45a8ff 2165
bogdanm 0:9b334a45a8ff 2166 /* Process Locked */
bogdanm 0:9b334a45a8ff 2167 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2168
bogdanm 0:9b334a45a8ff 2169 /* Disable Pos */
bogdanm 0:9b334a45a8ff 2170 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 2171
bogdanm 0:9b334a45a8ff 2172 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
bogdanm 0:9b334a45a8ff 2173 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 2174
bogdanm 0:9b334a45a8ff 2175 hi2c->pBuffPtr = pData;
bogdanm 0:9b334a45a8ff 2176 hi2c->XferSize = Size;
bogdanm 0:9b334a45a8ff 2177 hi2c->XferCount = Size;
bogdanm 0:9b334a45a8ff 2178
bogdanm 0:9b334a45a8ff 2179 /* Set the I2C DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 2180 hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
bogdanm 0:9b334a45a8ff 2181
bogdanm 0:9b334a45a8ff 2182 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 2183 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
bogdanm 0:9b334a45a8ff 2184
bogdanm 0:9b334a45a8ff 2185 /* Enable the DMA Stream */
bogdanm 0:9b334a45a8ff 2186 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
bogdanm 0:9b334a45a8ff 2187
bogdanm 0:9b334a45a8ff 2188 /* Send Slave Address and Memory Address */
bogdanm 0:9b334a45a8ff 2189 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2190 {
bogdanm 0:9b334a45a8ff 2191 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2192 {
bogdanm 0:9b334a45a8ff 2193 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2194 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2195 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2196 }
bogdanm 0:9b334a45a8ff 2197 else
bogdanm 0:9b334a45a8ff 2198 {
bogdanm 0:9b334a45a8ff 2199 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2200 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2201 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2202 }
bogdanm 0:9b334a45a8ff 2203 }
bogdanm 0:9b334a45a8ff 2204
bogdanm 0:9b334a45a8ff 2205 if(Size == 1)
bogdanm 0:9b334a45a8ff 2206 {
bogdanm 0:9b334a45a8ff 2207 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 2208 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 2209 }
bogdanm 0:9b334a45a8ff 2210 else
bogdanm 0:9b334a45a8ff 2211 {
bogdanm 0:9b334a45a8ff 2212 /* Enable Last DMA bit */
bogdanm 0:9b334a45a8ff 2213 hi2c->Instance->CR2 |= I2C_CR2_LAST;
bogdanm 0:9b334a45a8ff 2214 }
bogdanm 0:9b334a45a8ff 2215
bogdanm 0:9b334a45a8ff 2216 /* Enable DMA Request */
bogdanm 0:9b334a45a8ff 2217 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 2218
bogdanm 0:9b334a45a8ff 2219 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 2220 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 2221
bogdanm 0:9b334a45a8ff 2222 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2223 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2224
bogdanm 0:9b334a45a8ff 2225 return HAL_OK;
bogdanm 0:9b334a45a8ff 2226 }
bogdanm 0:9b334a45a8ff 2227 else
bogdanm 0:9b334a45a8ff 2228 {
bogdanm 0:9b334a45a8ff 2229 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2230 }
bogdanm 0:9b334a45a8ff 2231 }
bogdanm 0:9b334a45a8ff 2232
bogdanm 0:9b334a45a8ff 2233 /**
bogdanm 0:9b334a45a8ff 2234 * @brief Checks if target device is ready for communication.
bogdanm 0:9b334a45a8ff 2235 * @note This function is used with Memory devices
bogdanm 0:9b334a45a8ff 2236 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2237 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2238 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2239 * @param Trials: Number of trials
bogdanm 0:9b334a45a8ff 2240 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 2241 * @retval HAL status
bogdanm 0:9b334a45a8ff 2242 */
bogdanm 0:9b334a45a8ff 2243 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 2244 {
bogdanm 0:9b334a45a8ff 2245 uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1;
bogdanm 0:9b334a45a8ff 2246
bogdanm 0:9b334a45a8ff 2247 if(hi2c->State == HAL_I2C_STATE_READY)
bogdanm 0:9b334a45a8ff 2248 {
bogdanm 0:9b334a45a8ff 2249 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 2250 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2251 {
bogdanm 0:9b334a45a8ff 2252 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2253 }
bogdanm 0:9b334a45a8ff 2254
bogdanm 0:9b334a45a8ff 2255 /* Process Locked */
bogdanm 0:9b334a45a8ff 2256 __HAL_LOCK(hi2c);
bogdanm 0:9b334a45a8ff 2257
bogdanm 0:9b334a45a8ff 2258 /* Disable Pos */
bogdanm 0:9b334a45a8ff 2259 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 2260
bogdanm 0:9b334a45a8ff 2261 hi2c->State = HAL_I2C_STATE_BUSY;
bogdanm 0:9b334a45a8ff 2262 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
bogdanm 0:9b334a45a8ff 2263
bogdanm 0:9b334a45a8ff 2264 do
bogdanm 0:9b334a45a8ff 2265 {
bogdanm 0:9b334a45a8ff 2266 /* Generate Start */
bogdanm 0:9b334a45a8ff 2267 hi2c->Instance->CR1 |= I2C_CR1_START;
bogdanm 0:9b334a45a8ff 2268
bogdanm 0:9b334a45a8ff 2269 /* Wait until SB flag is set */
bogdanm 0:9b334a45a8ff 2270 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2271 {
bogdanm 0:9b334a45a8ff 2272 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2273 }
bogdanm 0:9b334a45a8ff 2274
bogdanm 0:9b334a45a8ff 2275 /* Send slave address */
bogdanm 0:9b334a45a8ff 2276 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm 0:9b334a45a8ff 2277
bogdanm 0:9b334a45a8ff 2278 /* Wait until ADDR or AF flag are set */
bogdanm 0:9b334a45a8ff 2279 /* Get tick */
bogdanm 0:9b334a45a8ff 2280 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 2281
bogdanm 0:9b334a45a8ff 2282 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 2283 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2284 tmp3 = hi2c->State;
bogdanm 0:9b334a45a8ff 2285 while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
bogdanm 0:9b334a45a8ff 2286 {
bogdanm 0:9b334a45a8ff 2287 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 2288 {
bogdanm 0:9b334a45a8ff 2289 hi2c->State = HAL_I2C_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 2290 }
bogdanm 0:9b334a45a8ff 2291 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 2292 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2293 tmp3 = hi2c->State;
bogdanm 0:9b334a45a8ff 2294 }
bogdanm 0:9b334a45a8ff 2295
bogdanm 0:9b334a45a8ff 2296 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2297
bogdanm 0:9b334a45a8ff 2298 /* Check if the ADDR flag has been set */
bogdanm 0:9b334a45a8ff 2299 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
bogdanm 0:9b334a45a8ff 2300 {
bogdanm 0:9b334a45a8ff 2301 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2302 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 2303
bogdanm 0:9b334a45a8ff 2304 /* Clear ADDR Flag */
bogdanm 0:9b334a45a8ff 2305 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 2306
bogdanm 0:9b334a45a8ff 2307 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 2308 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2309 {
bogdanm 0:9b334a45a8ff 2310 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2311 }
bogdanm 0:9b334a45a8ff 2312
bogdanm 0:9b334a45a8ff 2313 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2314
bogdanm 0:9b334a45a8ff 2315 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2316 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2317
bogdanm 0:9b334a45a8ff 2318 return HAL_OK;
bogdanm 0:9b334a45a8ff 2319 }
bogdanm 0:9b334a45a8ff 2320 else
bogdanm 0:9b334a45a8ff 2321 {
bogdanm 0:9b334a45a8ff 2322 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2323 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 2324
bogdanm 0:9b334a45a8ff 2325 /* Clear AF Flag */
bogdanm 0:9b334a45a8ff 2326 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2327
bogdanm 0:9b334a45a8ff 2328 /* Wait until BUSY flag is reset */
bogdanm 0:9b334a45a8ff 2329 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 2330 {
bogdanm 0:9b334a45a8ff 2331 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2332 }
bogdanm 0:9b334a45a8ff 2333
bogdanm 0:9b334a45a8ff 2334 }
bogdanm 0:9b334a45a8ff 2335 }while(I2C_Trials++ < Trials);
bogdanm 0:9b334a45a8ff 2336
bogdanm 0:9b334a45a8ff 2337 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2338
bogdanm 0:9b334a45a8ff 2339 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 2340 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 2341
bogdanm 0:9b334a45a8ff 2342 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2343 }
bogdanm 0:9b334a45a8ff 2344 else
bogdanm 0:9b334a45a8ff 2345 {
bogdanm 0:9b334a45a8ff 2346 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 2347 }
bogdanm 0:9b334a45a8ff 2348 }
bogdanm 0:9b334a45a8ff 2349
bogdanm 0:9b334a45a8ff 2350 /**
bogdanm 0:9b334a45a8ff 2351 * @brief This function handles I2C event interrupt request.
bogdanm 0:9b334a45a8ff 2352 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2353 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2354 * @retval HAL status
bogdanm 0:9b334a45a8ff 2355 */
bogdanm 0:9b334a45a8ff 2356 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2357 {
bogdanm 0:9b334a45a8ff 2358 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0;
bogdanm 0:9b334a45a8ff 2359 /* Master mode selected */
bogdanm 0:9b334a45a8ff 2360 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
bogdanm 0:9b334a45a8ff 2361 {
bogdanm 0:9b334a45a8ff 2362 /* I2C in mode Transmitter -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 2363 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
bogdanm 0:9b334a45a8ff 2364 {
bogdanm 0:9b334a45a8ff 2365 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
bogdanm 0:9b334a45a8ff 2366 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
bogdanm 0:9b334a45a8ff 2367 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
bogdanm 0:9b334a45a8ff 2368 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
bogdanm 0:9b334a45a8ff 2369 /* TXE set and BTF reset -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 2370 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
bogdanm 0:9b334a45a8ff 2371 {
bogdanm 0:9b334a45a8ff 2372 I2C_MasterTransmit_TXE(hi2c);
bogdanm 0:9b334a45a8ff 2373 }
bogdanm 0:9b334a45a8ff 2374 /* BTF set -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2375 else if((tmp3 == SET) && (tmp4 == SET))
bogdanm 0:9b334a45a8ff 2376 {
bogdanm 0:9b334a45a8ff 2377 I2C_MasterTransmit_BTF(hi2c);
bogdanm 0:9b334a45a8ff 2378 }
bogdanm 0:9b334a45a8ff 2379 }
bogdanm 0:9b334a45a8ff 2380 /* I2C in mode Receiver --------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2381 else
bogdanm 0:9b334a45a8ff 2382 {
bogdanm 0:9b334a45a8ff 2383 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
bogdanm 0:9b334a45a8ff 2384 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
bogdanm 0:9b334a45a8ff 2385 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
bogdanm 0:9b334a45a8ff 2386 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
bogdanm 0:9b334a45a8ff 2387 /* RXNE set and BTF reset -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 2388 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
bogdanm 0:9b334a45a8ff 2389 {
bogdanm 0:9b334a45a8ff 2390 I2C_MasterReceive_RXNE(hi2c);
bogdanm 0:9b334a45a8ff 2391 }
bogdanm 0:9b334a45a8ff 2392 /* BTF set -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2393 else if((tmp3 == SET) && (tmp4 == SET))
bogdanm 0:9b334a45a8ff 2394 {
bogdanm 0:9b334a45a8ff 2395 I2C_MasterReceive_BTF(hi2c);
bogdanm 0:9b334a45a8ff 2396 }
bogdanm 0:9b334a45a8ff 2397 }
bogdanm 0:9b334a45a8ff 2398 }
bogdanm 0:9b334a45a8ff 2399 /* Slave mode selected */
bogdanm 0:9b334a45a8ff 2400 else
bogdanm 0:9b334a45a8ff 2401 {
bogdanm 0:9b334a45a8ff 2402 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
bogdanm 0:9b334a45a8ff 2403 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT));
bogdanm 0:9b334a45a8ff 2404 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);
bogdanm 0:9b334a45a8ff 2405 tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA);
bogdanm 0:9b334a45a8ff 2406 /* ADDR set --------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2407 if((tmp1 == SET) && (tmp2 == SET))
bogdanm 0:9b334a45a8ff 2408 {
bogdanm 0:9b334a45a8ff 2409 I2C_Slave_ADDR(hi2c);
bogdanm 0:9b334a45a8ff 2410 }
bogdanm 0:9b334a45a8ff 2411 /* STOPF set --------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2412 else if((tmp3 == SET) && (tmp2 == SET))
bogdanm 0:9b334a45a8ff 2413 {
bogdanm 0:9b334a45a8ff 2414 I2C_Slave_STOPF(hi2c);
bogdanm 0:9b334a45a8ff 2415 }
bogdanm 0:9b334a45a8ff 2416 /* I2C in mode Transmitter -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 2417 else if(tmp4 == SET)
bogdanm 0:9b334a45a8ff 2418 {
bogdanm 0:9b334a45a8ff 2419 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
bogdanm 0:9b334a45a8ff 2420 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
bogdanm 0:9b334a45a8ff 2421 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
bogdanm 0:9b334a45a8ff 2422 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
bogdanm 0:9b334a45a8ff 2423 /* TXE set and BTF reset -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 2424 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
bogdanm 0:9b334a45a8ff 2425 {
bogdanm 0:9b334a45a8ff 2426 I2C_SlaveTransmit_TXE(hi2c);
bogdanm 0:9b334a45a8ff 2427 }
bogdanm 0:9b334a45a8ff 2428 /* BTF set -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2429 else if((tmp3 == SET) && (tmp4 == SET))
bogdanm 0:9b334a45a8ff 2430 {
bogdanm 0:9b334a45a8ff 2431 I2C_SlaveTransmit_BTF(hi2c);
bogdanm 0:9b334a45a8ff 2432 }
bogdanm 0:9b334a45a8ff 2433 }
bogdanm 0:9b334a45a8ff 2434 /* I2C in mode Receiver --------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2435 else
bogdanm 0:9b334a45a8ff 2436 {
bogdanm 0:9b334a45a8ff 2437 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
bogdanm 0:9b334a45a8ff 2438 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
bogdanm 0:9b334a45a8ff 2439 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
bogdanm 0:9b334a45a8ff 2440 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
bogdanm 0:9b334a45a8ff 2441 /* RXNE set and BTF reset ----------------------------------------------*/
bogdanm 0:9b334a45a8ff 2442 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
bogdanm 0:9b334a45a8ff 2443 {
bogdanm 0:9b334a45a8ff 2444 I2C_SlaveReceive_RXNE(hi2c);
bogdanm 0:9b334a45a8ff 2445 }
bogdanm 0:9b334a45a8ff 2446 /* BTF set -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 2447 else if((tmp3 == SET) && (tmp4 == SET))
bogdanm 0:9b334a45a8ff 2448 {
bogdanm 0:9b334a45a8ff 2449 I2C_SlaveReceive_BTF(hi2c);
bogdanm 0:9b334a45a8ff 2450 }
bogdanm 0:9b334a45a8ff 2451 }
bogdanm 0:9b334a45a8ff 2452 }
bogdanm 0:9b334a45a8ff 2453 }
bogdanm 0:9b334a45a8ff 2454
bogdanm 0:9b334a45a8ff 2455 /**
bogdanm 0:9b334a45a8ff 2456 * @brief This function handles I2C error interrupt request.
bogdanm 0:9b334a45a8ff 2457 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2458 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2459 * @retval HAL status
bogdanm 0:9b334a45a8ff 2460 */
bogdanm 0:9b334a45a8ff 2461 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2462 {
bogdanm 0:9b334a45a8ff 2463 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
bogdanm 0:9b334a45a8ff 2464
bogdanm 0:9b334a45a8ff 2465 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR);
bogdanm 0:9b334a45a8ff 2466 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2467 /* I2C Bus error interrupt occurred ----------------------------------------*/
bogdanm 0:9b334a45a8ff 2468 if((tmp1 == SET) && (tmp2 == SET))
bogdanm 0:9b334a45a8ff 2469 {
bogdanm 0:9b334a45a8ff 2470 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
bogdanm 0:9b334a45a8ff 2471
bogdanm 0:9b334a45a8ff 2472 /* Clear BERR flag */
bogdanm 0:9b334a45a8ff 2473 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
bogdanm 0:9b334a45a8ff 2474 }
bogdanm 0:9b334a45a8ff 2475
bogdanm 0:9b334a45a8ff 2476 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO);
bogdanm 0:9b334a45a8ff 2477 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2478 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
bogdanm 0:9b334a45a8ff 2479 if((tmp1 == SET) && (tmp2 == SET))
bogdanm 0:9b334a45a8ff 2480 {
bogdanm 0:9b334a45a8ff 2481 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
bogdanm 0:9b334a45a8ff 2482
bogdanm 0:9b334a45a8ff 2483 /* Clear ARLO flag */
bogdanm 0:9b334a45a8ff 2484 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
bogdanm 0:9b334a45a8ff 2485 }
bogdanm 0:9b334a45a8ff 2486
bogdanm 0:9b334a45a8ff 2487 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2488 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2489 /* I2C Acknowledge failure error interrupt occurred ------------------------*/
bogdanm 0:9b334a45a8ff 2490 if((tmp1 == SET) && (tmp2 == SET))
bogdanm 0:9b334a45a8ff 2491 {
bogdanm 0:9b334a45a8ff 2492 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL);
bogdanm 0:9b334a45a8ff 2493 tmp2 = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 2494 tmp3 = hi2c->State;
bogdanm 0:9b334a45a8ff 2495 if((tmp1 == RESET) && (tmp2 == 0) && (tmp3 == HAL_I2C_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 2496 {
bogdanm 0:9b334a45a8ff 2497 I2C_Slave_AF(hi2c);
bogdanm 0:9b334a45a8ff 2498 }
bogdanm 0:9b334a45a8ff 2499 else
bogdanm 0:9b334a45a8ff 2500 {
bogdanm 0:9b334a45a8ff 2501 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 2502 /* Clear AF flag */
bogdanm 0:9b334a45a8ff 2503 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2504 }
bogdanm 0:9b334a45a8ff 2505 }
bogdanm 0:9b334a45a8ff 2506
bogdanm 0:9b334a45a8ff 2507 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR);
bogdanm 0:9b334a45a8ff 2508 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2509 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
bogdanm 0:9b334a45a8ff 2510 if((tmp1 == SET) && (tmp2 == SET))
bogdanm 0:9b334a45a8ff 2511 {
bogdanm 0:9b334a45a8ff 2512 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
bogdanm 0:9b334a45a8ff 2513 /* Clear OVR flag */
bogdanm 0:9b334a45a8ff 2514 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
bogdanm 0:9b334a45a8ff 2515 }
bogdanm 0:9b334a45a8ff 2516
bogdanm 0:9b334a45a8ff 2517 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 2518 {
bogdanm 0:9b334a45a8ff 2519 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2520
bogdanm 0:9b334a45a8ff 2521 /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
bogdanm 0:9b334a45a8ff 2522 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
bogdanm 0:9b334a45a8ff 2523
bogdanm 0:9b334a45a8ff 2524 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 2525 }
bogdanm 0:9b334a45a8ff 2526 }
bogdanm 0:9b334a45a8ff 2527
bogdanm 0:9b334a45a8ff 2528 /**
bogdanm 0:9b334a45a8ff 2529 * @brief Master Tx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2530 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2531 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2532 * @retval None
bogdanm 0:9b334a45a8ff 2533 */
bogdanm 0:9b334a45a8ff 2534 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2535 {
bogdanm 0:9b334a45a8ff 2536 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2537 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2538 */
bogdanm 0:9b334a45a8ff 2539 }
bogdanm 0:9b334a45a8ff 2540
bogdanm 0:9b334a45a8ff 2541 /**
bogdanm 0:9b334a45a8ff 2542 * @brief Master Rx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2543 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2544 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2545 * @retval None
bogdanm 0:9b334a45a8ff 2546 */
bogdanm 0:9b334a45a8ff 2547 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2548 {
bogdanm 0:9b334a45a8ff 2549 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2550 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2551 */
bogdanm 0:9b334a45a8ff 2552 }
bogdanm 0:9b334a45a8ff 2553
bogdanm 0:9b334a45a8ff 2554 /** @brief Slave Tx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2555 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2556 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2557 * @retval None
bogdanm 0:9b334a45a8ff 2558 */
bogdanm 0:9b334a45a8ff 2559 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2560 {
bogdanm 0:9b334a45a8ff 2561 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2562 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2563 */
bogdanm 0:9b334a45a8ff 2564 }
bogdanm 0:9b334a45a8ff 2565
bogdanm 0:9b334a45a8ff 2566 /**
bogdanm 0:9b334a45a8ff 2567 * @brief Slave Rx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2568 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2569 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2570 * @retval None
bogdanm 0:9b334a45a8ff 2571 */
bogdanm 0:9b334a45a8ff 2572 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2573 {
bogdanm 0:9b334a45a8ff 2574 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2575 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2576 */
bogdanm 0:9b334a45a8ff 2577 }
bogdanm 0:9b334a45a8ff 2578
bogdanm 0:9b334a45a8ff 2579 /**
bogdanm 0:9b334a45a8ff 2580 * @brief Memory Tx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2581 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2582 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2583 * @retval None
bogdanm 0:9b334a45a8ff 2584 */
bogdanm 0:9b334a45a8ff 2585 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2586 {
bogdanm 0:9b334a45a8ff 2587 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2588 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2589 */
bogdanm 0:9b334a45a8ff 2590 }
bogdanm 0:9b334a45a8ff 2591
bogdanm 0:9b334a45a8ff 2592 /**
bogdanm 0:9b334a45a8ff 2593 * @brief Memory Rx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 2594 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2595 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2596 * @retval None
bogdanm 0:9b334a45a8ff 2597 */
bogdanm 0:9b334a45a8ff 2598 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2599 {
bogdanm 0:9b334a45a8ff 2600 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2601 the HAL_I2C_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2602 */
bogdanm 0:9b334a45a8ff 2603 }
bogdanm 0:9b334a45a8ff 2604
bogdanm 0:9b334a45a8ff 2605 /**
bogdanm 0:9b334a45a8ff 2606 * @brief I2C error callbacks.
bogdanm 0:9b334a45a8ff 2607 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2608 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2609 * @retval None
bogdanm 0:9b334a45a8ff 2610 */
bogdanm 0:9b334a45a8ff 2611 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2612 {
bogdanm 0:9b334a45a8ff 2613 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 2614 the HAL_I2C_ErrorCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 2615 */
bogdanm 0:9b334a45a8ff 2616 }
bogdanm 0:9b334a45a8ff 2617
bogdanm 0:9b334a45a8ff 2618 /**
bogdanm 0:9b334a45a8ff 2619 * @}
bogdanm 0:9b334a45a8ff 2620 */
bogdanm 0:9b334a45a8ff 2621
bogdanm 0:9b334a45a8ff 2622 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 2623 * @brief Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 2624 *
bogdanm 0:9b334a45a8ff 2625 @verbatim
bogdanm 0:9b334a45a8ff 2626 ===============================================================================
bogdanm 0:9b334a45a8ff 2627 ##### Peripheral State and Errors functions #####
bogdanm 0:9b334a45a8ff 2628 ===============================================================================
bogdanm 0:9b334a45a8ff 2629 [..]
bogdanm 0:9b334a45a8ff 2630 This subsection permits to get in run-time the status of the peripheral
bogdanm 0:9b334a45a8ff 2631 and the data flow.
bogdanm 0:9b334a45a8ff 2632
bogdanm 0:9b334a45a8ff 2633 @endverbatim
bogdanm 0:9b334a45a8ff 2634 * @{
bogdanm 0:9b334a45a8ff 2635 */
bogdanm 0:9b334a45a8ff 2636
bogdanm 0:9b334a45a8ff 2637 /**
bogdanm 0:9b334a45a8ff 2638 * @brief Returns the I2C state.
bogdanm 0:9b334a45a8ff 2639 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2640 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2641 * @retval HAL state
bogdanm 0:9b334a45a8ff 2642 */
bogdanm 0:9b334a45a8ff 2643 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2644 {
bogdanm 0:9b334a45a8ff 2645 return hi2c->State;
bogdanm 0:9b334a45a8ff 2646 }
bogdanm 0:9b334a45a8ff 2647
bogdanm 0:9b334a45a8ff 2648 /**
bogdanm 0:9b334a45a8ff 2649 * @brief Return the I2C error code
bogdanm 0:9b334a45a8ff 2650 * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2651 * the configuration information for the specified I2C.
bogdanm 0:9b334a45a8ff 2652 * @retval I2C Error Code
bogdanm 0:9b334a45a8ff 2653 */
bogdanm 0:9b334a45a8ff 2654 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2655 {
bogdanm 0:9b334a45a8ff 2656 return hi2c->ErrorCode;
bogdanm 0:9b334a45a8ff 2657 }
bogdanm 0:9b334a45a8ff 2658
bogdanm 0:9b334a45a8ff 2659 /**
bogdanm 0:9b334a45a8ff 2660 * @}
bogdanm 0:9b334a45a8ff 2661 */
bogdanm 0:9b334a45a8ff 2662
bogdanm 0:9b334a45a8ff 2663 /**
bogdanm 0:9b334a45a8ff 2664 * @brief Handle TXE flag for Master
bogdanm 0:9b334a45a8ff 2665 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2666 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2667 * @retval HAL status
bogdanm 0:9b334a45a8ff 2668 */
bogdanm 0:9b334a45a8ff 2669 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2670 {
bogdanm 0:9b334a45a8ff 2671 /* Write data to DR */
bogdanm 0:9b334a45a8ff 2672 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm 0:9b334a45a8ff 2673 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2674
bogdanm 0:9b334a45a8ff 2675 if(hi2c->XferCount == 0)
bogdanm 0:9b334a45a8ff 2676 {
bogdanm 0:9b334a45a8ff 2677 /* Disable BUF interrupt */
bogdanm 0:9b334a45a8ff 2678 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
bogdanm 0:9b334a45a8ff 2679 }
bogdanm 0:9b334a45a8ff 2680
bogdanm 0:9b334a45a8ff 2681 return HAL_OK;
bogdanm 0:9b334a45a8ff 2682 }
bogdanm 0:9b334a45a8ff 2683
bogdanm 0:9b334a45a8ff 2684 /**
bogdanm 0:9b334a45a8ff 2685 * @brief Handle BTF flag for Master transmitter
bogdanm 0:9b334a45a8ff 2686 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2687 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2688 * @retval HAL status
bogdanm 0:9b334a45a8ff 2689 */
bogdanm 0:9b334a45a8ff 2690 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2691 {
bogdanm 0:9b334a45a8ff 2692 if(hi2c->XferCount != 0)
bogdanm 0:9b334a45a8ff 2693 {
bogdanm 0:9b334a45a8ff 2694 /* Write data to DR */
bogdanm 0:9b334a45a8ff 2695 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm 0:9b334a45a8ff 2696 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2697 }
bogdanm 0:9b334a45a8ff 2698 else
bogdanm 0:9b334a45a8ff 2699 {
bogdanm 0:9b334a45a8ff 2700 /* Disable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 2701 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2702
bogdanm 0:9b334a45a8ff 2703 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2704 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 2705
bogdanm 0:9b334a45a8ff 2706 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
bogdanm 0:9b334a45a8ff 2707 {
bogdanm 0:9b334a45a8ff 2708 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2709
bogdanm 0:9b334a45a8ff 2710 HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2711 }
bogdanm 0:9b334a45a8ff 2712 else
bogdanm 0:9b334a45a8ff 2713 {
bogdanm 0:9b334a45a8ff 2714 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2715
bogdanm 0:9b334a45a8ff 2716 HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2717 }
bogdanm 0:9b334a45a8ff 2718 }
bogdanm 0:9b334a45a8ff 2719 return HAL_OK;
bogdanm 0:9b334a45a8ff 2720 }
bogdanm 0:9b334a45a8ff 2721
bogdanm 0:9b334a45a8ff 2722 /**
bogdanm 0:9b334a45a8ff 2723 * @brief Handle RXNE flag for Master
bogdanm 0:9b334a45a8ff 2724 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2725 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2726 * @retval HAL status
bogdanm 0:9b334a45a8ff 2727 */
bogdanm 0:9b334a45a8ff 2728 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2729 {
bogdanm 0:9b334a45a8ff 2730 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 2731
bogdanm 0:9b334a45a8ff 2732 tmp = hi2c->XferCount;
bogdanm 0:9b334a45a8ff 2733 if(tmp > 3)
bogdanm 0:9b334a45a8ff 2734 {
bogdanm 0:9b334a45a8ff 2735 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2736 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2737 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2738 }
bogdanm 0:9b334a45a8ff 2739 else if((tmp == 2) || (tmp == 3))
bogdanm 0:9b334a45a8ff 2740 {
bogdanm 0:9b334a45a8ff 2741 /* Disable BUF interrupt */
bogdanm 0:9b334a45a8ff 2742 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
bogdanm 0:9b334a45a8ff 2743 }
bogdanm 0:9b334a45a8ff 2744 else
bogdanm 0:9b334a45a8ff 2745 {
bogdanm 0:9b334a45a8ff 2746 /* Disable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 2747 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2748
bogdanm 0:9b334a45a8ff 2749 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2750 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2751 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2752
bogdanm 0:9b334a45a8ff 2753 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
bogdanm 0:9b334a45a8ff 2754 {
bogdanm 0:9b334a45a8ff 2755 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2756
bogdanm 0:9b334a45a8ff 2757 HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2758 }
bogdanm 0:9b334a45a8ff 2759 else
bogdanm 0:9b334a45a8ff 2760 {
bogdanm 0:9b334a45a8ff 2761 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2762
bogdanm 0:9b334a45a8ff 2763 HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2764 }
bogdanm 0:9b334a45a8ff 2765 }
bogdanm 0:9b334a45a8ff 2766 return HAL_OK;
bogdanm 0:9b334a45a8ff 2767 }
bogdanm 0:9b334a45a8ff 2768
bogdanm 0:9b334a45a8ff 2769 /**
bogdanm 0:9b334a45a8ff 2770 * @brief Handle BTF flag for Master receiver
bogdanm 0:9b334a45a8ff 2771 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2772 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2773 * @retval HAL status
bogdanm 0:9b334a45a8ff 2774 */
bogdanm 0:9b334a45a8ff 2775 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2776 {
bogdanm 0:9b334a45a8ff 2777 if(hi2c->XferCount == 3)
bogdanm 0:9b334a45a8ff 2778 {
bogdanm 0:9b334a45a8ff 2779 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 2780 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 2781
bogdanm 0:9b334a45a8ff 2782 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2783 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2784 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2785 }
bogdanm 0:9b334a45a8ff 2786 else if(hi2c->XferCount == 2)
bogdanm 0:9b334a45a8ff 2787 {
bogdanm 0:9b334a45a8ff 2788 /* Generate Stop */
bogdanm 0:9b334a45a8ff 2789 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 2790
bogdanm 0:9b334a45a8ff 2791 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2792 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2793 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2794
bogdanm 0:9b334a45a8ff 2795 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2796 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2797 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2798
bogdanm 0:9b334a45a8ff 2799 /* Disable EVT and ERR interrupt */
bogdanm 0:9b334a45a8ff 2800 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2801
bogdanm 0:9b334a45a8ff 2802 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
bogdanm 0:9b334a45a8ff 2803 {
bogdanm 0:9b334a45a8ff 2804 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2805
bogdanm 0:9b334a45a8ff 2806 HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2807 }
bogdanm 0:9b334a45a8ff 2808 else
bogdanm 0:9b334a45a8ff 2809 {
bogdanm 0:9b334a45a8ff 2810 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2811
bogdanm 0:9b334a45a8ff 2812 HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2813 }
bogdanm 0:9b334a45a8ff 2814 }
bogdanm 0:9b334a45a8ff 2815 else
bogdanm 0:9b334a45a8ff 2816 {
bogdanm 0:9b334a45a8ff 2817 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2818 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2819 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2820 }
bogdanm 0:9b334a45a8ff 2821 return HAL_OK;
bogdanm 0:9b334a45a8ff 2822 }
bogdanm 0:9b334a45a8ff 2823
bogdanm 0:9b334a45a8ff 2824 /**
bogdanm 0:9b334a45a8ff 2825 * @brief Handle TXE flag for Slave
bogdanm 0:9b334a45a8ff 2826 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2827 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2828 * @retval HAL status
bogdanm 0:9b334a45a8ff 2829 */
bogdanm 0:9b334a45a8ff 2830 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2831 {
bogdanm 0:9b334a45a8ff 2832 if(hi2c->XferCount != 0)
bogdanm 0:9b334a45a8ff 2833 {
bogdanm 0:9b334a45a8ff 2834 /* Write data to DR */
bogdanm 0:9b334a45a8ff 2835 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm 0:9b334a45a8ff 2836 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2837 }
bogdanm 0:9b334a45a8ff 2838 return HAL_OK;
bogdanm 0:9b334a45a8ff 2839 }
bogdanm 0:9b334a45a8ff 2840
bogdanm 0:9b334a45a8ff 2841 /**
bogdanm 0:9b334a45a8ff 2842 * @brief Handle BTF flag for Slave transmitter
bogdanm 0:9b334a45a8ff 2843 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2844 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2845 * @retval HAL status
bogdanm 0:9b334a45a8ff 2846 */
bogdanm 0:9b334a45a8ff 2847 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2848 {
bogdanm 0:9b334a45a8ff 2849 if(hi2c->XferCount != 0)
bogdanm 0:9b334a45a8ff 2850 {
bogdanm 0:9b334a45a8ff 2851 /* Write data to DR */
bogdanm 0:9b334a45a8ff 2852 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
bogdanm 0:9b334a45a8ff 2853 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2854 }
bogdanm 0:9b334a45a8ff 2855 return HAL_OK;
bogdanm 0:9b334a45a8ff 2856 }
bogdanm 0:9b334a45a8ff 2857
bogdanm 0:9b334a45a8ff 2858 /**
bogdanm 0:9b334a45a8ff 2859 * @brief Handle RXNE flag for Slave
bogdanm 0:9b334a45a8ff 2860 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2861 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2862 * @retval HAL status
bogdanm 0:9b334a45a8ff 2863 */
bogdanm 0:9b334a45a8ff 2864 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2865 {
bogdanm 0:9b334a45a8ff 2866 if(hi2c->XferCount != 0)
bogdanm 0:9b334a45a8ff 2867 {
bogdanm 0:9b334a45a8ff 2868 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2869 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2870 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2871 }
bogdanm 0:9b334a45a8ff 2872 return HAL_OK;
bogdanm 0:9b334a45a8ff 2873 }
bogdanm 0:9b334a45a8ff 2874
bogdanm 0:9b334a45a8ff 2875 /**
bogdanm 0:9b334a45a8ff 2876 * @brief Handle BTF flag for Slave receiver
bogdanm 0:9b334a45a8ff 2877 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2878 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2879 * @retval HAL status
bogdanm 0:9b334a45a8ff 2880 */
bogdanm 0:9b334a45a8ff 2881 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2882 {
bogdanm 0:9b334a45a8ff 2883 if(hi2c->XferCount != 0)
bogdanm 0:9b334a45a8ff 2884 {
bogdanm 0:9b334a45a8ff 2885 /* Read data from DR */
bogdanm 0:9b334a45a8ff 2886 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
bogdanm 0:9b334a45a8ff 2887 hi2c->XferCount--;
bogdanm 0:9b334a45a8ff 2888 }
bogdanm 0:9b334a45a8ff 2889 return HAL_OK;
bogdanm 0:9b334a45a8ff 2890 }
bogdanm 0:9b334a45a8ff 2891
bogdanm 0:9b334a45a8ff 2892 /**
bogdanm 0:9b334a45a8ff 2893 * @brief Handle ADD flag for Slave
bogdanm 0:9b334a45a8ff 2894 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2895 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2896 * @retval HAL status
bogdanm 0:9b334a45a8ff 2897 */
bogdanm 0:9b334a45a8ff 2898 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2899 {
bogdanm 0:9b334a45a8ff 2900 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 2901 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 2902
bogdanm 0:9b334a45a8ff 2903 return HAL_OK;
bogdanm 0:9b334a45a8ff 2904 }
bogdanm 0:9b334a45a8ff 2905
bogdanm 0:9b334a45a8ff 2906 /**
bogdanm 0:9b334a45a8ff 2907 * @brief Handle STOPF flag for Slave
bogdanm 0:9b334a45a8ff 2908 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2909 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2910 * @retval HAL status
bogdanm 0:9b334a45a8ff 2911 */
bogdanm 0:9b334a45a8ff 2912 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2913 {
bogdanm 0:9b334a45a8ff 2914 /* Disable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 2915 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2916
bogdanm 0:9b334a45a8ff 2917 /* Clear STOPF flag */
bogdanm 0:9b334a45a8ff 2918 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
bogdanm 0:9b334a45a8ff 2919
bogdanm 0:9b334a45a8ff 2920 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 2921 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 2922
bogdanm 0:9b334a45a8ff 2923 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2924
bogdanm 0:9b334a45a8ff 2925 HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2926
bogdanm 0:9b334a45a8ff 2927 return HAL_OK;
bogdanm 0:9b334a45a8ff 2928 }
bogdanm 0:9b334a45a8ff 2929
bogdanm 0:9b334a45a8ff 2930 /**
bogdanm 0:9b334a45a8ff 2931 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2932 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2933 * @retval HAL status
bogdanm 0:9b334a45a8ff 2934 */
bogdanm 0:9b334a45a8ff 2935 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
bogdanm 0:9b334a45a8ff 2936 {
bogdanm 0:9b334a45a8ff 2937 /* Disable EVT, BUF and ERR interrupt */
bogdanm 0:9b334a45a8ff 2938 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
bogdanm 0:9b334a45a8ff 2939
bogdanm 0:9b334a45a8ff 2940 /* Clear AF flag */
bogdanm 0:9b334a45a8ff 2941 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 2942
bogdanm 0:9b334a45a8ff 2943 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 2944 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 2945
bogdanm 0:9b334a45a8ff 2946 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 2947
bogdanm 0:9b334a45a8ff 2948 HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 2949
bogdanm 0:9b334a45a8ff 2950 return HAL_OK;
bogdanm 0:9b334a45a8ff 2951 }
bogdanm 0:9b334a45a8ff 2952
bogdanm 0:9b334a45a8ff 2953 /**
bogdanm 0:9b334a45a8ff 2954 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 2955 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 2956 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 2957 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 2958 * @retval HAL status
bogdanm 0:9b334a45a8ff 2959 */
bogdanm 0:9b334a45a8ff 2960 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 2961 {
bogdanm 0:9b334a45a8ff 2962 /* Generate Start */
bogdanm 0:9b334a45a8ff 2963 hi2c->Instance->CR1 |= I2C_CR1_START;
bogdanm 0:9b334a45a8ff 2964
bogdanm 0:9b334a45a8ff 2965 /* Wait until SB flag is set */
bogdanm 0:9b334a45a8ff 2966 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2967 {
bogdanm 0:9b334a45a8ff 2968 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2969 }
bogdanm 0:9b334a45a8ff 2970
bogdanm 0:9b334a45a8ff 2971 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm 0:9b334a45a8ff 2972 {
bogdanm 0:9b334a45a8ff 2973 /* Send slave address */
bogdanm 0:9b334a45a8ff 2974 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm 0:9b334a45a8ff 2975 }
bogdanm 0:9b334a45a8ff 2976 else
bogdanm 0:9b334a45a8ff 2977 {
bogdanm 0:9b334a45a8ff 2978 /* Send header of slave address */
bogdanm 0:9b334a45a8ff 2979 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
bogdanm 0:9b334a45a8ff 2980
bogdanm 0:9b334a45a8ff 2981 /* Wait until ADD10 flag is set */
bogdanm 0:9b334a45a8ff 2982 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 2983 {
bogdanm 0:9b334a45a8ff 2984 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 2985 {
bogdanm 0:9b334a45a8ff 2986 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 2987 }
bogdanm 0:9b334a45a8ff 2988 else
bogdanm 0:9b334a45a8ff 2989 {
bogdanm 0:9b334a45a8ff 2990 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 2991 }
bogdanm 0:9b334a45a8ff 2992 }
bogdanm 0:9b334a45a8ff 2993
bogdanm 0:9b334a45a8ff 2994 /* Send slave address */
bogdanm 0:9b334a45a8ff 2995 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
bogdanm 0:9b334a45a8ff 2996 }
bogdanm 0:9b334a45a8ff 2997
bogdanm 0:9b334a45a8ff 2998 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 2999 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3000 {
bogdanm 0:9b334a45a8ff 3001 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3002 {
bogdanm 0:9b334a45a8ff 3003 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3004 }
bogdanm 0:9b334a45a8ff 3005 else
bogdanm 0:9b334a45a8ff 3006 {
bogdanm 0:9b334a45a8ff 3007 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3008 }
bogdanm 0:9b334a45a8ff 3009 }
bogdanm 0:9b334a45a8ff 3010
bogdanm 0:9b334a45a8ff 3011 return HAL_OK;
bogdanm 0:9b334a45a8ff 3012 }
bogdanm 0:9b334a45a8ff 3013
bogdanm 0:9b334a45a8ff 3014 /**
bogdanm 0:9b334a45a8ff 3015 * @brief Master sends target device address for read request.
bogdanm 0:9b334a45a8ff 3016 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3017 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 3018 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 3019 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3020 * @retval HAL status
bogdanm 0:9b334a45a8ff 3021 */
bogdanm 0:9b334a45a8ff 3022 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3023 {
bogdanm 0:9b334a45a8ff 3024 /* Enable Acknowledge */
bogdanm 0:9b334a45a8ff 3025 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 3026
bogdanm 0:9b334a45a8ff 3027 /* Generate Start */
bogdanm 0:9b334a45a8ff 3028 hi2c->Instance->CR1 |= I2C_CR1_START;
bogdanm 0:9b334a45a8ff 3029
bogdanm 0:9b334a45a8ff 3030 /* Wait until SB flag is set */
bogdanm 0:9b334a45a8ff 3031 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3032 {
bogdanm 0:9b334a45a8ff 3033 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3034 }
bogdanm 0:9b334a45a8ff 3035
bogdanm 0:9b334a45a8ff 3036 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
bogdanm 0:9b334a45a8ff 3037 {
bogdanm 0:9b334a45a8ff 3038 /* Send slave address */
bogdanm 0:9b334a45a8ff 3039 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
bogdanm 0:9b334a45a8ff 3040 }
bogdanm 0:9b334a45a8ff 3041 else
bogdanm 0:9b334a45a8ff 3042 {
bogdanm 0:9b334a45a8ff 3043 /* Send header of slave address */
bogdanm 0:9b334a45a8ff 3044 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
bogdanm 0:9b334a45a8ff 3045
bogdanm 0:9b334a45a8ff 3046 /* Wait until ADD10 flag is set */
bogdanm 0:9b334a45a8ff 3047 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3048 {
bogdanm 0:9b334a45a8ff 3049 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3050 {
bogdanm 0:9b334a45a8ff 3051 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3052 }
bogdanm 0:9b334a45a8ff 3053 else
bogdanm 0:9b334a45a8ff 3054 {
bogdanm 0:9b334a45a8ff 3055 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3056 }
bogdanm 0:9b334a45a8ff 3057 }
bogdanm 0:9b334a45a8ff 3058
bogdanm 0:9b334a45a8ff 3059 /* Send slave address */
bogdanm 0:9b334a45a8ff 3060 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
bogdanm 0:9b334a45a8ff 3061
bogdanm 0:9b334a45a8ff 3062 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 3063 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3064 {
bogdanm 0:9b334a45a8ff 3065 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3066 {
bogdanm 0:9b334a45a8ff 3067 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3068 }
bogdanm 0:9b334a45a8ff 3069 else
bogdanm 0:9b334a45a8ff 3070 {
bogdanm 0:9b334a45a8ff 3071 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3072 }
bogdanm 0:9b334a45a8ff 3073 }
bogdanm 0:9b334a45a8ff 3074
bogdanm 0:9b334a45a8ff 3075 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 3076 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 3077
bogdanm 0:9b334a45a8ff 3078 /* Generate Restart */
bogdanm 0:9b334a45a8ff 3079 hi2c->Instance->CR1 |= I2C_CR1_START;
bogdanm 0:9b334a45a8ff 3080
bogdanm 0:9b334a45a8ff 3081 /* Wait until SB flag is set */
bogdanm 0:9b334a45a8ff 3082 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3083 {
bogdanm 0:9b334a45a8ff 3084 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3085 }
bogdanm 0:9b334a45a8ff 3086
bogdanm 0:9b334a45a8ff 3087 /* Send header of slave address */
bogdanm 0:9b334a45a8ff 3088 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
bogdanm 0:9b334a45a8ff 3089 }
bogdanm 0:9b334a45a8ff 3090
bogdanm 0:9b334a45a8ff 3091 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 3092 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3093 {
bogdanm 0:9b334a45a8ff 3094 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3095 {
bogdanm 0:9b334a45a8ff 3096 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3097 }
bogdanm 0:9b334a45a8ff 3098 else
bogdanm 0:9b334a45a8ff 3099 {
bogdanm 0:9b334a45a8ff 3100 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3101 }
bogdanm 0:9b334a45a8ff 3102 }
bogdanm 0:9b334a45a8ff 3103
bogdanm 0:9b334a45a8ff 3104 return HAL_OK;
bogdanm 0:9b334a45a8ff 3105 }
bogdanm 0:9b334a45a8ff 3106
bogdanm 0:9b334a45a8ff 3107 /**
bogdanm 0:9b334a45a8ff 3108 * @brief Master sends target device address followed by internal memory address for write request.
bogdanm 0:9b334a45a8ff 3109 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3110 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 3111 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 3112 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 3113 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 3114 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3115 * @retval HAL status
bogdanm 0:9b334a45a8ff 3116 */
bogdanm 0:9b334a45a8ff 3117 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3118 {
bogdanm 0:9b334a45a8ff 3119 /* Generate Start */
bogdanm 0:9b334a45a8ff 3120 hi2c->Instance->CR1 |= I2C_CR1_START;
bogdanm 0:9b334a45a8ff 3121
bogdanm 0:9b334a45a8ff 3122 /* Wait until SB flag is set */
bogdanm 0:9b334a45a8ff 3123 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3124 {
bogdanm 0:9b334a45a8ff 3125 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3126 }
bogdanm 0:9b334a45a8ff 3127
bogdanm 0:9b334a45a8ff 3128 /* Send slave address */
bogdanm 0:9b334a45a8ff 3129 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm 0:9b334a45a8ff 3130
bogdanm 0:9b334a45a8ff 3131 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 3132 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3133 {
bogdanm 0:9b334a45a8ff 3134 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3135 {
bogdanm 0:9b334a45a8ff 3136 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3137 }
bogdanm 0:9b334a45a8ff 3138 else
bogdanm 0:9b334a45a8ff 3139 {
bogdanm 0:9b334a45a8ff 3140 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3141 }
bogdanm 0:9b334a45a8ff 3142 }
bogdanm 0:9b334a45a8ff 3143
bogdanm 0:9b334a45a8ff 3144 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 3145 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 3146
bogdanm 0:9b334a45a8ff 3147 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 3148 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3149 {
bogdanm 0:9b334a45a8ff 3150 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3151 }
bogdanm 0:9b334a45a8ff 3152
bogdanm 0:9b334a45a8ff 3153 /* If Memory address size is 8Bit */
bogdanm 0:9b334a45a8ff 3154 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm 0:9b334a45a8ff 3155 {
bogdanm 0:9b334a45a8ff 3156 /* Send Memory Address */
bogdanm 0:9b334a45a8ff 3157 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 3158 }
bogdanm 0:9b334a45a8ff 3159 /* If Memory address size is 16Bit */
bogdanm 0:9b334a45a8ff 3160 else
bogdanm 0:9b334a45a8ff 3161 {
bogdanm 0:9b334a45a8ff 3162 /* Send MSB of Memory Address */
bogdanm 0:9b334a45a8ff 3163 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm 0:9b334a45a8ff 3164
bogdanm 0:9b334a45a8ff 3165 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 3166 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3167 {
bogdanm 0:9b334a45a8ff 3168 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3169 }
bogdanm 0:9b334a45a8ff 3170
bogdanm 0:9b334a45a8ff 3171 /* Send LSB of Memory Address */
bogdanm 0:9b334a45a8ff 3172 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 3173 }
bogdanm 0:9b334a45a8ff 3174
bogdanm 0:9b334a45a8ff 3175 return HAL_OK;
bogdanm 0:9b334a45a8ff 3176 }
bogdanm 0:9b334a45a8ff 3177
bogdanm 0:9b334a45a8ff 3178 /**
bogdanm 0:9b334a45a8ff 3179 * @brief Master sends target device address followed by internal memory address for read request.
bogdanm 0:9b334a45a8ff 3180 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3181 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 3182 * @param DevAddress: Target device address
bogdanm 0:9b334a45a8ff 3183 * @param MemAddress: Internal memory address
bogdanm 0:9b334a45a8ff 3184 * @param MemAddSize: Size of internal memory address
bogdanm 0:9b334a45a8ff 3185 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3186 * @retval HAL status
bogdanm 0:9b334a45a8ff 3187 */
bogdanm 0:9b334a45a8ff 3188 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3189 {
bogdanm 0:9b334a45a8ff 3190 /* Enable Acknowledge */
bogdanm 0:9b334a45a8ff 3191 hi2c->Instance->CR1 |= I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 3192
bogdanm 0:9b334a45a8ff 3193 /* Generate Start */
bogdanm 0:9b334a45a8ff 3194 hi2c->Instance->CR1 |= I2C_CR1_START;
bogdanm 0:9b334a45a8ff 3195
bogdanm 0:9b334a45a8ff 3196 /* Wait until SB flag is set */
bogdanm 0:9b334a45a8ff 3197 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3198 {
bogdanm 0:9b334a45a8ff 3199 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3200 }
bogdanm 0:9b334a45a8ff 3201
bogdanm 0:9b334a45a8ff 3202 /* Send slave address */
bogdanm 0:9b334a45a8ff 3203 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
bogdanm 0:9b334a45a8ff 3204
bogdanm 0:9b334a45a8ff 3205 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 3206 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3207 {
bogdanm 0:9b334a45a8ff 3208 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3209 {
bogdanm 0:9b334a45a8ff 3210 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3211 }
bogdanm 0:9b334a45a8ff 3212 else
bogdanm 0:9b334a45a8ff 3213 {
bogdanm 0:9b334a45a8ff 3214 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3215 }
bogdanm 0:9b334a45a8ff 3216 }
bogdanm 0:9b334a45a8ff 3217
bogdanm 0:9b334a45a8ff 3218 /* Clear ADDR flag */
bogdanm 0:9b334a45a8ff 3219 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
bogdanm 0:9b334a45a8ff 3220
bogdanm 0:9b334a45a8ff 3221 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 3222 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3223 {
bogdanm 0:9b334a45a8ff 3224 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3225 }
bogdanm 0:9b334a45a8ff 3226
bogdanm 0:9b334a45a8ff 3227 /* If Memory address size is 8Bit */
bogdanm 0:9b334a45a8ff 3228 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
bogdanm 0:9b334a45a8ff 3229 {
bogdanm 0:9b334a45a8ff 3230 /* Send Memory Address */
bogdanm 0:9b334a45a8ff 3231 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 3232 }
bogdanm 0:9b334a45a8ff 3233 /* If Memory address size is 16Bit */
bogdanm 0:9b334a45a8ff 3234 else
bogdanm 0:9b334a45a8ff 3235 {
bogdanm 0:9b334a45a8ff 3236 /* Send MSB of Memory Address */
bogdanm 0:9b334a45a8ff 3237 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
bogdanm 0:9b334a45a8ff 3238
bogdanm 0:9b334a45a8ff 3239 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 3240 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3241 {
bogdanm 0:9b334a45a8ff 3242 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3243 }
bogdanm 0:9b334a45a8ff 3244
bogdanm 0:9b334a45a8ff 3245 /* Send LSB of Memory Address */
bogdanm 0:9b334a45a8ff 3246 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
bogdanm 0:9b334a45a8ff 3247 }
bogdanm 0:9b334a45a8ff 3248
bogdanm 0:9b334a45a8ff 3249 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 3250 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3251 {
bogdanm 0:9b334a45a8ff 3252 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3253 }
bogdanm 0:9b334a45a8ff 3254
bogdanm 0:9b334a45a8ff 3255 /* Generate Restart */
bogdanm 0:9b334a45a8ff 3256 hi2c->Instance->CR1 |= I2C_CR1_START;
bogdanm 0:9b334a45a8ff 3257
bogdanm 0:9b334a45a8ff 3258 /* Wait until SB flag is set */
bogdanm 0:9b334a45a8ff 3259 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3260 {
bogdanm 0:9b334a45a8ff 3261 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3262 }
bogdanm 0:9b334a45a8ff 3263
bogdanm 0:9b334a45a8ff 3264 /* Send slave address */
bogdanm 0:9b334a45a8ff 3265 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
bogdanm 0:9b334a45a8ff 3266
bogdanm 0:9b334a45a8ff 3267 /* Wait until ADDR flag is set */
bogdanm 0:9b334a45a8ff 3268 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 3269 {
bogdanm 0:9b334a45a8ff 3270 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
bogdanm 0:9b334a45a8ff 3271 {
bogdanm 0:9b334a45a8ff 3272 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3273 }
bogdanm 0:9b334a45a8ff 3274 else
bogdanm 0:9b334a45a8ff 3275 {
bogdanm 0:9b334a45a8ff 3276 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3277 }
bogdanm 0:9b334a45a8ff 3278 }
bogdanm 0:9b334a45a8ff 3279
bogdanm 0:9b334a45a8ff 3280 return HAL_OK;
bogdanm 0:9b334a45a8ff 3281 }
bogdanm 0:9b334a45a8ff 3282
bogdanm 0:9b334a45a8ff 3283 /**
bogdanm 0:9b334a45a8ff 3284 * @brief DMA I2C master transmit process complete callback.
bogdanm 0:9b334a45a8ff 3285 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3286 * @retval None
bogdanm 0:9b334a45a8ff 3287 */
bogdanm 0:9b334a45a8ff 3288 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3289 {
bogdanm 0:9b334a45a8ff 3290 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3291
bogdanm 0:9b334a45a8ff 3292 /* Wait until BTF flag is reset */
bogdanm 0:9b334a45a8ff 3293 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 3294 {
bogdanm 0:9b334a45a8ff 3295 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3296 }
bogdanm 0:9b334a45a8ff 3297
bogdanm 0:9b334a45a8ff 3298 /* Generate Stop */
bogdanm 0:9b334a45a8ff 3299 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 3300
bogdanm 0:9b334a45a8ff 3301 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3302 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 3303
bogdanm 0:9b334a45a8ff 3304 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3305
bogdanm 0:9b334a45a8ff 3306 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3307
bogdanm 0:9b334a45a8ff 3308 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3309 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3310 {
bogdanm 0:9b334a45a8ff 3311 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3312 }
bogdanm 0:9b334a45a8ff 3313 else
bogdanm 0:9b334a45a8ff 3314 {
bogdanm 0:9b334a45a8ff 3315 HAL_I2C_MasterTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3316 }
bogdanm 0:9b334a45a8ff 3317 }
bogdanm 0:9b334a45a8ff 3318
bogdanm 0:9b334a45a8ff 3319 /**
bogdanm 0:9b334a45a8ff 3320 * @brief DMA I2C slave transmit process complete callback.
bogdanm 0:9b334a45a8ff 3321 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3322 * @retval None
bogdanm 0:9b334a45a8ff 3323 */
bogdanm 0:9b334a45a8ff 3324 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3325 {
bogdanm 0:9b334a45a8ff 3326 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3327
bogdanm 0:9b334a45a8ff 3328 /* Wait until AF flag is reset */
bogdanm 0:9b334a45a8ff 3329 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 3330 {
bogdanm 0:9b334a45a8ff 3331 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3332 }
bogdanm 0:9b334a45a8ff 3333
bogdanm 0:9b334a45a8ff 3334 /* Clear AF flag */
bogdanm 0:9b334a45a8ff 3335 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 3336
bogdanm 0:9b334a45a8ff 3337 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 3338 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 3339
bogdanm 0:9b334a45a8ff 3340 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3341 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 3342
bogdanm 0:9b334a45a8ff 3343 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3344
bogdanm 0:9b334a45a8ff 3345 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3346
bogdanm 0:9b334a45a8ff 3347 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3348 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3349 {
bogdanm 0:9b334a45a8ff 3350 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3351 }
bogdanm 0:9b334a45a8ff 3352 else
bogdanm 0:9b334a45a8ff 3353 {
bogdanm 0:9b334a45a8ff 3354 HAL_I2C_SlaveTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3355 }
bogdanm 0:9b334a45a8ff 3356 }
bogdanm 0:9b334a45a8ff 3357
bogdanm 0:9b334a45a8ff 3358 /**
bogdanm 0:9b334a45a8ff 3359 * @brief DMA I2C master receive process complete callback
bogdanm 0:9b334a45a8ff 3360 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3361 * @retval None
bogdanm 0:9b334a45a8ff 3362 */
bogdanm 0:9b334a45a8ff 3363 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3364 {
bogdanm 0:9b334a45a8ff 3365 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3366
bogdanm 0:9b334a45a8ff 3367 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 3368 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 3369
bogdanm 0:9b334a45a8ff 3370 /* Generate Stop */
bogdanm 0:9b334a45a8ff 3371 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 3372
bogdanm 0:9b334a45a8ff 3373 /* Disable Last DMA */
bogdanm 0:9b334a45a8ff 3374 hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
bogdanm 0:9b334a45a8ff 3375
bogdanm 0:9b334a45a8ff 3376 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3377 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 3378
bogdanm 0:9b334a45a8ff 3379 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3380
bogdanm 0:9b334a45a8ff 3381 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3382
bogdanm 0:9b334a45a8ff 3383 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3384 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3385 {
bogdanm 0:9b334a45a8ff 3386 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3387 }
bogdanm 0:9b334a45a8ff 3388 else
bogdanm 0:9b334a45a8ff 3389 {
bogdanm 0:9b334a45a8ff 3390 HAL_I2C_MasterRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3391 }
bogdanm 0:9b334a45a8ff 3392 }
bogdanm 0:9b334a45a8ff 3393
bogdanm 0:9b334a45a8ff 3394 /**
bogdanm 0:9b334a45a8ff 3395 * @brief DMA I2C slave receive process complete callback.
bogdanm 0:9b334a45a8ff 3396 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3397 * @retval None
bogdanm 0:9b334a45a8ff 3398 */
bogdanm 0:9b334a45a8ff 3399 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3400 {
bogdanm 0:9b334a45a8ff 3401 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3402
bogdanm 0:9b334a45a8ff 3403 /* Wait until STOPF flag is reset */
bogdanm 0:9b334a45a8ff 3404 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 3405 {
bogdanm 0:9b334a45a8ff 3406 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3407 }
bogdanm 0:9b334a45a8ff 3408
bogdanm 0:9b334a45a8ff 3409 /* Clear STOPF flag */
bogdanm 0:9b334a45a8ff 3410 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
bogdanm 0:9b334a45a8ff 3411
bogdanm 0:9b334a45a8ff 3412 /* Disable Address Acknowledge */
bogdanm 0:9b334a45a8ff 3413 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 3414
bogdanm 0:9b334a45a8ff 3415 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3416 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 3417
bogdanm 0:9b334a45a8ff 3418 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3419
bogdanm 0:9b334a45a8ff 3420 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3421
bogdanm 0:9b334a45a8ff 3422 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3423 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3424 {
bogdanm 0:9b334a45a8ff 3425 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3426 }
bogdanm 0:9b334a45a8ff 3427 else
bogdanm 0:9b334a45a8ff 3428 {
bogdanm 0:9b334a45a8ff 3429 HAL_I2C_SlaveRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3430 }
bogdanm 0:9b334a45a8ff 3431 }
bogdanm 0:9b334a45a8ff 3432
bogdanm 0:9b334a45a8ff 3433 /**
bogdanm 0:9b334a45a8ff 3434 * @brief DMA I2C Memory Write process complete callback
bogdanm 0:9b334a45a8ff 3435 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3436 * @retval None
bogdanm 0:9b334a45a8ff 3437 */
bogdanm 0:9b334a45a8ff 3438 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3439 {
bogdanm 0:9b334a45a8ff 3440 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3441
bogdanm 0:9b334a45a8ff 3442 /* Wait until BTF flag is reset */
bogdanm 0:9b334a45a8ff 3443 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
bogdanm 0:9b334a45a8ff 3444 {
bogdanm 0:9b334a45a8ff 3445 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 3446 }
bogdanm 0:9b334a45a8ff 3447
bogdanm 0:9b334a45a8ff 3448 /* Generate Stop */
bogdanm 0:9b334a45a8ff 3449 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 3450
bogdanm 0:9b334a45a8ff 3451 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3452 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 3453
bogdanm 0:9b334a45a8ff 3454 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3455
bogdanm 0:9b334a45a8ff 3456 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3457
bogdanm 0:9b334a45a8ff 3458 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3459 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3460 {
bogdanm 0:9b334a45a8ff 3461 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3462 }
bogdanm 0:9b334a45a8ff 3463 else
bogdanm 0:9b334a45a8ff 3464 {
bogdanm 0:9b334a45a8ff 3465 HAL_I2C_MemTxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3466 }
bogdanm 0:9b334a45a8ff 3467 }
bogdanm 0:9b334a45a8ff 3468
bogdanm 0:9b334a45a8ff 3469 /**
bogdanm 0:9b334a45a8ff 3470 * @brief DMA I2C Memory Read process complete callback
bogdanm 0:9b334a45a8ff 3471 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3472 * @retval None
bogdanm 0:9b334a45a8ff 3473 */
bogdanm 0:9b334a45a8ff 3474 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3475 {
bogdanm 0:9b334a45a8ff 3476 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3477
bogdanm 0:9b334a45a8ff 3478 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 3479 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 3480
bogdanm 0:9b334a45a8ff 3481 /* Generate Stop */
bogdanm 0:9b334a45a8ff 3482 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 3483
bogdanm 0:9b334a45a8ff 3484 /* Disable Last DMA */
bogdanm 0:9b334a45a8ff 3485 hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
bogdanm 0:9b334a45a8ff 3486
bogdanm 0:9b334a45a8ff 3487 /* Disable DMA Request */
bogdanm 0:9b334a45a8ff 3488 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
bogdanm 0:9b334a45a8ff 3489
bogdanm 0:9b334a45a8ff 3490 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3491
bogdanm 0:9b334a45a8ff 3492 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3493
bogdanm 0:9b334a45a8ff 3494 /* Check if Errors has been detected during transfer */
bogdanm 0:9b334a45a8ff 3495 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
bogdanm 0:9b334a45a8ff 3496 {
bogdanm 0:9b334a45a8ff 3497 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3498 }
bogdanm 0:9b334a45a8ff 3499 else
bogdanm 0:9b334a45a8ff 3500 {
bogdanm 0:9b334a45a8ff 3501 HAL_I2C_MemRxCpltCallback(hi2c);
bogdanm 0:9b334a45a8ff 3502 }
bogdanm 0:9b334a45a8ff 3503 }
bogdanm 0:9b334a45a8ff 3504
bogdanm 0:9b334a45a8ff 3505 /**
bogdanm 0:9b334a45a8ff 3506 * @brief DMA I2C communication error callback.
bogdanm 0:9b334a45a8ff 3507 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 3508 * @retval None
bogdanm 0:9b334a45a8ff 3509 */
bogdanm 0:9b334a45a8ff 3510 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 3511 {
bogdanm 0:9b334a45a8ff 3512 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 3513
bogdanm 0:9b334a45a8ff 3514 /* Disable Acknowledge */
bogdanm 0:9b334a45a8ff 3515 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
bogdanm 0:9b334a45a8ff 3516
bogdanm 0:9b334a45a8ff 3517 hi2c->XferCount = 0;
bogdanm 0:9b334a45a8ff 3518
bogdanm 0:9b334a45a8ff 3519 hi2c->State = HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3520
bogdanm 0:9b334a45a8ff 3521 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
bogdanm 0:9b334a45a8ff 3522
bogdanm 0:9b334a45a8ff 3523 HAL_I2C_ErrorCallback(hi2c);
bogdanm 0:9b334a45a8ff 3524 }
bogdanm 0:9b334a45a8ff 3525
bogdanm 0:9b334a45a8ff 3526 /**
bogdanm 0:9b334a45a8ff 3527 * @brief This function handles I2C Communication Timeout.
bogdanm 0:9b334a45a8ff 3528 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3529 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 3530 * @param Flag: specifies the I2C flag to check.
bogdanm 0:9b334a45a8ff 3531 * @param Status: The new Flag status (SET or RESET).
bogdanm 0:9b334a45a8ff 3532 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3533 * @retval HAL status
bogdanm 0:9b334a45a8ff 3534 */
bogdanm 0:9b334a45a8ff 3535 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3536 {
bogdanm 0:9b334a45a8ff 3537 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 3538
bogdanm 0:9b334a45a8ff 3539 /* Get tick */
bogdanm 0:9b334a45a8ff 3540 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 3541
bogdanm 0:9b334a45a8ff 3542 /* Wait until flag is set */
bogdanm 0:9b334a45a8ff 3543 if(Status == RESET)
bogdanm 0:9b334a45a8ff 3544 {
bogdanm 0:9b334a45a8ff 3545 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
bogdanm 0:9b334a45a8ff 3546 {
bogdanm 0:9b334a45a8ff 3547 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3548 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 3549 {
bogdanm 0:9b334a45a8ff 3550 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3551 {
bogdanm 0:9b334a45a8ff 3552 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3553
bogdanm 0:9b334a45a8ff 3554 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3555 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3556
bogdanm 0:9b334a45a8ff 3557 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3558 }
bogdanm 0:9b334a45a8ff 3559 }
bogdanm 0:9b334a45a8ff 3560 }
bogdanm 0:9b334a45a8ff 3561 }
bogdanm 0:9b334a45a8ff 3562 else
bogdanm 0:9b334a45a8ff 3563 {
bogdanm 0:9b334a45a8ff 3564 while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
bogdanm 0:9b334a45a8ff 3565 {
bogdanm 0:9b334a45a8ff 3566 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3567 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 3568 {
bogdanm 0:9b334a45a8ff 3569 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3570 {
bogdanm 0:9b334a45a8ff 3571 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3572
bogdanm 0:9b334a45a8ff 3573 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3574 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3575
bogdanm 0:9b334a45a8ff 3576 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3577 }
bogdanm 0:9b334a45a8ff 3578 }
bogdanm 0:9b334a45a8ff 3579 }
bogdanm 0:9b334a45a8ff 3580 }
bogdanm 0:9b334a45a8ff 3581 return HAL_OK;
bogdanm 0:9b334a45a8ff 3582 }
bogdanm 0:9b334a45a8ff 3583
bogdanm 0:9b334a45a8ff 3584 /**
bogdanm 0:9b334a45a8ff 3585 * @brief This function handles I2C Communication Timeout for Master addressing phase.
bogdanm 0:9b334a45a8ff 3586 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 3587 * the configuration information for I2C module
bogdanm 0:9b334a45a8ff 3588 * @param Flag: specifies the I2C flag to check.
bogdanm 0:9b334a45a8ff 3589 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 3590 * @retval HAL status
bogdanm 0:9b334a45a8ff 3591 */
bogdanm 0:9b334a45a8ff 3592 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 3593 {
bogdanm 0:9b334a45a8ff 3594 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 3595
bogdanm 0:9b334a45a8ff 3596 /* Get tick */
bogdanm 0:9b334a45a8ff 3597 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 3598
bogdanm 0:9b334a45a8ff 3599 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
bogdanm 0:9b334a45a8ff 3600 {
bogdanm 0:9b334a45a8ff 3601 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
bogdanm 0:9b334a45a8ff 3602 {
bogdanm 0:9b334a45a8ff 3603 /* Generate Stop */
bogdanm 0:9b334a45a8ff 3604 hi2c->Instance->CR1 |= I2C_CR1_STOP;
bogdanm 0:9b334a45a8ff 3605
bogdanm 0:9b334a45a8ff 3606 /* Clear AF Flag */
bogdanm 0:9b334a45a8ff 3607 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
bogdanm 0:9b334a45a8ff 3608
bogdanm 0:9b334a45a8ff 3609 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
bogdanm 0:9b334a45a8ff 3610 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3611
bogdanm 0:9b334a45a8ff 3612 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3613 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3614
bogdanm 0:9b334a45a8ff 3615 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 3616 }
bogdanm 0:9b334a45a8ff 3617
bogdanm 0:9b334a45a8ff 3618 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 3619 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 3620 {
bogdanm 0:9b334a45a8ff 3621 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 3622 {
bogdanm 0:9b334a45a8ff 3623 hi2c->State= HAL_I2C_STATE_READY;
bogdanm 0:9b334a45a8ff 3624
bogdanm 0:9b334a45a8ff 3625 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 3626 __HAL_UNLOCK(hi2c);
bogdanm 0:9b334a45a8ff 3627
bogdanm 0:9b334a45a8ff 3628 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 3629 }
bogdanm 0:9b334a45a8ff 3630 }
bogdanm 0:9b334a45a8ff 3631 }
bogdanm 0:9b334a45a8ff 3632 return HAL_OK;
bogdanm 0:9b334a45a8ff 3633 }
bogdanm 0:9b334a45a8ff 3634
bogdanm 0:9b334a45a8ff 3635 /**
bogdanm 0:9b334a45a8ff 3636 * @}
bogdanm 0:9b334a45a8ff 3637 */
bogdanm 0:9b334a45a8ff 3638
bogdanm 0:9b334a45a8ff 3639 #endif /* HAL_I2C_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 3640
bogdanm 0:9b334a45a8ff 3641 /**
bogdanm 0:9b334a45a8ff 3642 * @}
bogdanm 0:9b334a45a8ff 3643 */
bogdanm 0:9b334a45a8ff 3644
bogdanm 0:9b334a45a8ff 3645 /**
bogdanm 0:9b334a45a8ff 3646 * @}
bogdanm 0:9b334a45a8ff 3647 */
bogdanm 0:9b334a45a8ff 3648
bogdanm 0:9b334a45a8ff 3649 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/