fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
19:112740acecfa
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_cec.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 19:112740acecfa 5 * @version V1.4.1
mbed_official 19:112740acecfa 6 * @date 09-October-2015
bogdanm 0:9b334a45a8ff 7 * @brief CEC HAL module driver.
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 10 * functionalities of the High Definition Multimedia Interface
bogdanm 0:9b334a45a8ff 11 * Consumer Electronics Control Peripheral (CEC).
bogdanm 0:9b334a45a8ff 12 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 13 * + IO operation functions
bogdanm 0:9b334a45a8ff 14 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 *
bogdanm 0:9b334a45a8ff 17 @verbatim
bogdanm 0:9b334a45a8ff 18 ===============================================================================
bogdanm 0:9b334a45a8ff 19 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 20 ===============================================================================
bogdanm 0:9b334a45a8ff 21 [..]
bogdanm 0:9b334a45a8ff 22 The CEC HAL driver can be used as follow:
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 (#) Declare a CEC_HandleTypeDef handle structure.
bogdanm 0:9b334a45a8ff 25 (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
bogdanm 0:9b334a45a8ff 26 (##) Enable the CEC interface clock.
bogdanm 0:9b334a45a8ff 27 (##) CEC pins configuration:
bogdanm 0:9b334a45a8ff 28 (+) Enable the clock for the CEC GPIOs.
bogdanm 0:9b334a45a8ff 29 (+) Configure these CEC pins as alternate function pull-up.
bogdanm 0:9b334a45a8ff 30 (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
bogdanm 0:9b334a45a8ff 31 and HAL_CEC_Receive_IT() APIs):
bogdanm 0:9b334a45a8ff 32 (+) Configure the CEC interrupt priority.
bogdanm 0:9b334a45a8ff 33 (+) Enable the NVIC CEC IRQ handle.
bogdanm 0:9b334a45a8ff 34 (@) The specific CEC interrupts (Transmission complete interrupt,
bogdanm 0:9b334a45a8ff 35 RXNE interrupt and Error Interrupts) will be managed using the macros
bogdanm 0:9b334a45a8ff 36 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
bogdanm 0:9b334a45a8ff 37 and receive process.
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
bogdanm 0:9b334a45a8ff 40 in case of Bit Rising Error, Error-Bit generation conditions, device logical
bogdanm 0:9b334a45a8ff 41 address and Listen mode in the hcec Init structure.
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 (@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
bogdanm 0:9b334a45a8ff 46 by calling the customed HAL_CEC_MspInit() API.
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 @endverbatim
bogdanm 0:9b334a45a8ff 49 ******************************************************************************
bogdanm 0:9b334a45a8ff 50 * @attention
bogdanm 0:9b334a45a8ff 51 *
bogdanm 0:9b334a45a8ff 52 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 53 *
bogdanm 0:9b334a45a8ff 54 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 55 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 56 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 57 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 58 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 59 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 60 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 61 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 62 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 63 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 64 *
bogdanm 0:9b334a45a8ff 65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 68 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 71 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 72 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 73 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 74 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 75 *
bogdanm 0:9b334a45a8ff 76 ******************************************************************************
bogdanm 0:9b334a45a8ff 77 */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 80 #include "stm32f4xx_hal.h"
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 83 * @{
bogdanm 0:9b334a45a8ff 84 */
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 /** @defgroup CEC CEC
bogdanm 0:9b334a45a8ff 87 * @brief HAL CEC module driver
bogdanm 0:9b334a45a8ff 88 * @{
bogdanm 0:9b334a45a8ff 89 */
bogdanm 0:9b334a45a8ff 90 #ifdef HAL_CEC_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 #if defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 95 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 96 /** @defgroup CEC_Private_Constants CEC Private Constants
bogdanm 0:9b334a45a8ff 97 * @{
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99 #define CEC_CFGR_FIELDS (CEC_CFGR_SFT | CEC_CFGR_RXTOL | CEC_CFGR_BRESTP \
bogdanm 0:9b334a45a8ff 100 | CEC_CFGR_BREGEN | CEC_CFGR_LBPEGEN | CEC_CFGR_SFTOPT \
bogdanm 0:9b334a45a8ff 101 | CEC_CFGR_BRDNOGEN | CEC_CFGR_OAR | CEC_CFGR_LSTN)
bogdanm 0:9b334a45a8ff 102 /**
bogdanm 0:9b334a45a8ff 103 * @}
bogdanm 0:9b334a45a8ff 104 */
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 107 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 108 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 109 /** @defgroup CEC_Private_Functions CEC Private Functions
bogdanm 0:9b334a45a8ff 110 * @{
bogdanm 0:9b334a45a8ff 111 */
bogdanm 0:9b334a45a8ff 112 static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 113 static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 114 /**
bogdanm 0:9b334a45a8ff 115 * @}
bogdanm 0:9b334a45a8ff 116 */
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 /* Exported functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 119 /** @defgroup CEC_Exported_Functions CEC Exported Functions
bogdanm 0:9b334a45a8ff 120 * @{
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 124 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 125 *
bogdanm 0:9b334a45a8ff 126 @verbatim
bogdanm 0:9b334a45a8ff 127 ===============================================================================
bogdanm 0:9b334a45a8ff 128 ##### Initialization and Configuration functions #####
bogdanm 0:9b334a45a8ff 129 ===============================================================================
bogdanm 0:9b334a45a8ff 130 [..]
bogdanm 0:9b334a45a8ff 131 This subsection provides a set of functions allowing to initialize the CEC
bogdanm 0:9b334a45a8ff 132 (+) The following parameters need to be configured:
bogdanm 0:9b334a45a8ff 133 (++) SignalFreeTime
bogdanm 0:9b334a45a8ff 134 (++) Tolerance
bogdanm 0:9b334a45a8ff 135 (++) BRERxStop (RX stopped or not upon Bit Rising Error)
bogdanm 0:9b334a45a8ff 136 (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
bogdanm 0:9b334a45a8ff 137 (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
bogdanm 0:9b334a45a8ff 138 (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
bogdanm 0:9b334a45a8ff 139 (++) SignalFreeTimeOption (SFT Timer start definition)
bogdanm 0:9b334a45a8ff 140 (++) OwnAddress (CEC device address)
bogdanm 0:9b334a45a8ff 141 (++) ListenMode
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 @endverbatim
bogdanm 0:9b334a45a8ff 144 * @{
bogdanm 0:9b334a45a8ff 145 */
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 /**
bogdanm 0:9b334a45a8ff 148 * @brief Initializes the CEC mode according to the specified
bogdanm 0:9b334a45a8ff 149 * parameters in the CEC_InitTypeDef and creates the associated handle .
bogdanm 0:9b334a45a8ff 150 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 151 * @retval HAL status
bogdanm 0:9b334a45a8ff 152 */
bogdanm 0:9b334a45a8ff 153 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 154 {
bogdanm 0:9b334a45a8ff 155 uint32_t tmpreg = 0x0;
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 /* Check the CEC handle allocation */
bogdanm 0:9b334a45a8ff 158 if(hcec == NULL)
bogdanm 0:9b334a45a8ff 159 {
bogdanm 0:9b334a45a8ff 160 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 161 }
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 /* Check the parameters */
bogdanm 0:9b334a45a8ff 164 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
bogdanm 0:9b334a45a8ff 165 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
bogdanm 0:9b334a45a8ff 166 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
bogdanm 0:9b334a45a8ff 167 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
bogdanm 0:9b334a45a8ff 168 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
bogdanm 0:9b334a45a8ff 169 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
bogdanm 0:9b334a45a8ff 170 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
bogdanm 0:9b334a45a8ff 171 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
bogdanm 0:9b334a45a8ff 172 assert_param(IS_CEC_OAR_ADDRESS(hcec->Init.OwnAddress));
bogdanm 0:9b334a45a8ff 173 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
bogdanm 0:9b334a45a8ff 174 assert_param(IS_CEC_ADDRESS(hcec->Init.InitiatorAddress));
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 if(hcec->State == HAL_CEC_STATE_RESET)
bogdanm 0:9b334a45a8ff 178 {
bogdanm 0:9b334a45a8ff 179 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 180 hcec->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 181 /* Init the low level hardware : GPIO, CLOCK */
bogdanm 0:9b334a45a8ff 182 HAL_CEC_MspInit(hcec);
bogdanm 0:9b334a45a8ff 183 }
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 hcec->State = HAL_CEC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 188 __HAL_CEC_DISABLE(hcec);
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 tmpreg = hcec->Init.SignalFreeTime;
bogdanm 0:9b334a45a8ff 191 tmpreg |= hcec->Init.Tolerance;
bogdanm 0:9b334a45a8ff 192 tmpreg |= hcec->Init.BRERxStop;
bogdanm 0:9b334a45a8ff 193 tmpreg |= hcec->Init.BREErrorBitGen;
bogdanm 0:9b334a45a8ff 194 tmpreg |= hcec->Init.LBPEErrorBitGen;
bogdanm 0:9b334a45a8ff 195 tmpreg |= hcec->Init.BroadcastMsgNoErrorBitGen;
bogdanm 0:9b334a45a8ff 196 tmpreg |= hcec->Init.SignalFreeTimeOption;
bogdanm 0:9b334a45a8ff 197 tmpreg |= (hcec->Init.OwnAddress << CEC_CFGR_OAR_LSB_POS);
bogdanm 0:9b334a45a8ff 198 tmpreg |= hcec->Init.ListenMode;
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /* Write to CEC Control Register */
bogdanm 0:9b334a45a8ff 201 MODIFY_REG(hcec->Instance->CFGR, CEC_CFGR_FIELDS, tmpreg);
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 204 __HAL_CEC_ENABLE(hcec);
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 hcec->State = HAL_CEC_STATE_READY;
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 return HAL_OK;
bogdanm 0:9b334a45a8ff 209 }
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /**
bogdanm 0:9b334a45a8ff 212 * @brief DeInitializes the CEC peripheral
bogdanm 0:9b334a45a8ff 213 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 214 * @retval HAL status
bogdanm 0:9b334a45a8ff 215 */
bogdanm 0:9b334a45a8ff 216 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 217 {
bogdanm 0:9b334a45a8ff 218 /* Check the CEC handle allocation */
bogdanm 0:9b334a45a8ff 219 if(hcec == NULL)
bogdanm 0:9b334a45a8ff 220 {
bogdanm 0:9b334a45a8ff 221 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 /* Check the parameters */
bogdanm 0:9b334a45a8ff 225 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 hcec->State = HAL_CEC_STATE_BUSY;
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 /* DeInit the low level hardware */
bogdanm 0:9b334a45a8ff 230 HAL_CEC_MspDeInit(hcec);
bogdanm 0:9b334a45a8ff 231 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 232 __HAL_CEC_DISABLE(hcec);
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 235 hcec->State = HAL_CEC_STATE_RESET;
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 /* Process Unlock */
bogdanm 0:9b334a45a8ff 238 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 return HAL_OK;
bogdanm 0:9b334a45a8ff 241 }
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 /**
bogdanm 0:9b334a45a8ff 244 * @brief CEC MSP Init
bogdanm 0:9b334a45a8ff 245 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 246 * @retval None
bogdanm 0:9b334a45a8ff 247 */
bogdanm 0:9b334a45a8ff 248 __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 249 {
bogdanm 0:9b334a45a8ff 250 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 251 the HAL_CEC_MspInit can be implemented in the user file
bogdanm 0:9b334a45a8ff 252 */
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 /**
bogdanm 0:9b334a45a8ff 256 * @brief CEC MSP DeInit
bogdanm 0:9b334a45a8ff 257 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 258 * @retval None
bogdanm 0:9b334a45a8ff 259 */
bogdanm 0:9b334a45a8ff 260 __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 261 {
bogdanm 0:9b334a45a8ff 262 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 263 the HAL_CEC_MspDeInit can be implemented in the user file
bogdanm 0:9b334a45a8ff 264 */
bogdanm 0:9b334a45a8ff 265 }
bogdanm 0:9b334a45a8ff 266 /**
bogdanm 0:9b334a45a8ff 267 * @}
bogdanm 0:9b334a45a8ff 268 */
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
bogdanm 0:9b334a45a8ff 271 * @brief CEC Transmit/Receive functions
bogdanm 0:9b334a45a8ff 272 *
bogdanm 0:9b334a45a8ff 273 @verbatim
bogdanm 0:9b334a45a8ff 274 ===============================================================================
mbed_official 19:112740acecfa 275 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 276 ===============================================================================
bogdanm 0:9b334a45a8ff 277 This subsection provides a set of functions allowing to manage the CEC data transfers.
bogdanm 0:9b334a45a8ff 278
bogdanm 0:9b334a45a8ff 279 (#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
bogdanm 0:9b334a45a8ff 280 logical addresses (4-bit long addresses, 0xF for broadcast messages destination)
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 (#) There are two mode of transfer:
bogdanm 0:9b334a45a8ff 283 (+) Blocking mode: The communication is performed in polling mode.
bogdanm 0:9b334a45a8ff 284 The HAL status of all data processing is returned by the same function
bogdanm 0:9b334a45a8ff 285 after finishing transfer.
bogdanm 0:9b334a45a8ff 286 (+) No-Blocking mode: The communication is performed using Interrupts.
bogdanm 0:9b334a45a8ff 287 These API's return the HAL status.
bogdanm 0:9b334a45a8ff 288 The end of the data processing will be indicated through the
bogdanm 0:9b334a45a8ff 289 dedicated CEC IRQ when using Interrupt mode.
bogdanm 0:9b334a45a8ff 290 The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
bogdanm 0:9b334a45a8ff 291 will be executed respectivelly at the end of the transmit or Receive process
bogdanm 0:9b334a45a8ff 292 The HAL_CEC_ErrorCallback()user callback will be executed when a communication
bogdanm 0:9b334a45a8ff 293 error is detected
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 (#) Blocking mode API's are :
bogdanm 0:9b334a45a8ff 296 (+) HAL_CEC_Transmit()
bogdanm 0:9b334a45a8ff 297 (+) HAL_CEC_Receive()
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 (#) Non-Blocking mode API's with Interrupt are :
bogdanm 0:9b334a45a8ff 300 (+) HAL_CEC_Transmit_IT()
bogdanm 0:9b334a45a8ff 301 (+) HAL_CEC_Receive_IT()
bogdanm 0:9b334a45a8ff 302 (+) HAL_CEC_IRQHandler()
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
bogdanm 0:9b334a45a8ff 305 (+) HAL_CEC_TxCpltCallback()
bogdanm 0:9b334a45a8ff 306 (+) HAL_CEC_RxCpltCallback()
bogdanm 0:9b334a45a8ff 307 (+) HAL_CEC_ErrorCallback()
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 @endverbatim
bogdanm 0:9b334a45a8ff 310 * @{
bogdanm 0:9b334a45a8ff 311 */
bogdanm 0:9b334a45a8ff 312
bogdanm 0:9b334a45a8ff 313 /**
bogdanm 0:9b334a45a8ff 314 * @brief Send data in blocking mode
bogdanm 0:9b334a45a8ff 315 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 316 * @param DestinationAddress: destination logical address
bogdanm 0:9b334a45a8ff 317 * @param pData: pointer to input byte data buffer
bogdanm 0:9b334a45a8ff 318 * @param Size: amount of data to be sent in bytes (without counting the header).
bogdanm 0:9b334a45a8ff 319 * 0 means only the header is sent (ping operation).
mbed_official 19:112740acecfa 320 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
bogdanm 0:9b334a45a8ff 321 * @param Timeout: Timeout duration.
bogdanm 0:9b334a45a8ff 322 * @retval HAL status
bogdanm 0:9b334a45a8ff 323 */
bogdanm 0:9b334a45a8ff 324 HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 325 {
mbed_official 19:112740acecfa 326 uint8_t temp = 0;
mbed_official 19:112740acecfa 327 uint32_t tempisr = 0;
bogdanm 0:9b334a45a8ff 328 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 if((hcec->State == HAL_CEC_STATE_READY) && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
bogdanm 0:9b334a45a8ff 331 {
bogdanm 0:9b334a45a8ff 332 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 333 if((pData == NULL ) && (Size > 0))
bogdanm 0:9b334a45a8ff 334 {
bogdanm 0:9b334a45a8ff 335 hcec->State = HAL_CEC_STATE_ERROR;
mbed_official 19:112740acecfa 336 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 337 }
bogdanm 0:9b334a45a8ff 338
mbed_official 19:112740acecfa 339 assert_param(IS_CEC_ADDRESS(DestinationAddress));
bogdanm 0:9b334a45a8ff 340 assert_param(IS_CEC_MSGSIZE(Size));
mbed_official 19:112740acecfa 341
bogdanm 0:9b334a45a8ff 342 /* Process Locked */
bogdanm 0:9b334a45a8ff 343 __HAL_LOCK(hcec);
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 hcec->State = HAL_CEC_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 hcec->TxXferCount = Size;
mbed_official 19:112740acecfa 348
bogdanm 0:9b334a45a8ff 349 /* case no data to be sent, sender is only pinging the system */
bogdanm 0:9b334a45a8ff 350 if (Size == 0)
bogdanm 0:9b334a45a8ff 351 {
bogdanm 0:9b334a45a8ff 352 /* Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
bogdanm 0:9b334a45a8ff 353 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
bogdanm 0:9b334a45a8ff 354 }
mbed_official 19:112740acecfa 355
bogdanm 0:9b334a45a8ff 356 /* send header block */
bogdanm 0:9b334a45a8ff 357 temp = ((uint32_t)hcec->Init.InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress;
bogdanm 0:9b334a45a8ff 358 hcec->Instance->TXDR = temp;
bogdanm 0:9b334a45a8ff 359 /* Set TX Start of Message (TXSOM) bit */
bogdanm 0:9b334a45a8ff 360 __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
mbed_official 19:112740acecfa 361
bogdanm 0:9b334a45a8ff 362 while (hcec->TxXferCount > 0)
bogdanm 0:9b334a45a8ff 363 {
bogdanm 0:9b334a45a8ff 364 hcec->TxXferCount--;
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 367 while(HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_FLAG_TXBR))
bogdanm 0:9b334a45a8ff 368 {
mbed_official 19:112740acecfa 369 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 370 {
mbed_official 19:112740acecfa 371 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
bogdanm 0:9b334a45a8ff 372 {
mbed_official 19:112740acecfa 373 hcec->State = HAL_CEC_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 374 /* Process Unlocked */
mbed_official 19:112740acecfa 375 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 376 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 377 }
mbed_official 19:112740acecfa 378 }
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 /* check whether error occured while waiting for TXBR to be set:
bogdanm 0:9b334a45a8ff 381 * has Tx underrun occurred ?
bogdanm 0:9b334a45a8ff 382 * has Tx error occurred ?
bogdanm 0:9b334a45a8ff 383 * has Tx Missing Acknowledge error occurred ?
bogdanm 0:9b334a45a8ff 384 * has Arbitration Loss error occurred ? */
bogdanm 0:9b334a45a8ff 385 tempisr = hcec->Instance->ISR;
bogdanm 0:9b334a45a8ff 386 if ((tempisr & (CEC_FLAG_TXUDR|CEC_FLAG_TXERR|CEC_FLAG_TXACKE|CEC_FLAG_ARBLST)) != 0)
bogdanm 0:9b334a45a8ff 387 {
bogdanm 0:9b334a45a8ff 388 /* copy ISR for error handling purposes */
bogdanm 0:9b334a45a8ff 389 hcec->ErrorCode = tempisr;
bogdanm 0:9b334a45a8ff 390 /* clear all error flags by default */
bogdanm 0:9b334a45a8ff 391 __HAL_CEC_CLEAR_FLAG(hcec, (CEC_FLAG_TXUDR|CEC_FLAG_TXERR|CEC_FLAG_TXACKE|CEC_FLAG_ARBLST));
bogdanm 0:9b334a45a8ff 392 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 393 __HAL_UNLOCK(hcec);
mbed_official 19:112740acecfa 394 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 395 }
mbed_official 19:112740acecfa 396 }
bogdanm 0:9b334a45a8ff 397 /* TXBR to clear BEFORE writing TXDR register */
bogdanm 0:9b334a45a8ff 398 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXBR);
bogdanm 0:9b334a45a8ff 399 if (hcec->TxXferCount == 0)
bogdanm 0:9b334a45a8ff 400 {
bogdanm 0:9b334a45a8ff 401 /* if last byte transmission, set TX End of Message (TXEOM) bit */
bogdanm 0:9b334a45a8ff 402 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404 hcec->Instance->TXDR = *pData++;
mbed_official 19:112740acecfa 405
bogdanm 0:9b334a45a8ff 406 /* error check after TX byte write up */
bogdanm 0:9b334a45a8ff 407 tempisr = hcec->Instance->ISR;
bogdanm 0:9b334a45a8ff 408 if ((tempisr & (CEC_FLAG_TXUDR|CEC_FLAG_TXERR|CEC_FLAG_TXACKE|CEC_FLAG_ARBLST)) != 0)
bogdanm 0:9b334a45a8ff 409 {
bogdanm 0:9b334a45a8ff 410 /* copy ISR for error handling purposes */
bogdanm 0:9b334a45a8ff 411 hcec->ErrorCode = tempisr;
bogdanm 0:9b334a45a8ff 412 /* clear all error flags by default */
bogdanm 0:9b334a45a8ff 413 __HAL_CEC_CLEAR_FLAG(hcec, (CEC_FLAG_TXUDR|CEC_FLAG_TXERR|CEC_FLAG_TXACKE|CEC_FLAG_ARBLST));
bogdanm 0:9b334a45a8ff 414 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 415 __HAL_UNLOCK(hcec);
mbed_official 19:112740acecfa 416 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 417 }
bogdanm 0:9b334a45a8ff 418 } /* end while (while (hcec->TxXferCount > 0)) */
mbed_official 19:112740acecfa 419
bogdanm 0:9b334a45a8ff 420 /* if no error up to this point, check that transmission is
bogdanm 0:9b334a45a8ff 421 * complete, that is wait until TXEOM is reset */
bogdanm 0:9b334a45a8ff 422 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 while (HAL_IS_BIT_SET(hcec->Instance->CR, CEC_CR_TXEOM))
bogdanm 0:9b334a45a8ff 425 {
mbed_official 19:112740acecfa 426 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 427 {
bogdanm 0:9b334a45a8ff 428 if((HAL_GetTick() - tickstart) > Timeout)
bogdanm 0:9b334a45a8ff 429 {
bogdanm 0:9b334a45a8ff 430 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 431 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 432 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 433 }
bogdanm 0:9b334a45a8ff 434 }
bogdanm 0:9b334a45a8ff 435 }
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 /* Final error check once all bytes have been transmitted */
bogdanm 0:9b334a45a8ff 438 tempisr = hcec->Instance->ISR;
bogdanm 0:9b334a45a8ff 439 if ((tempisr & (CEC_FLAG_TXUDR|CEC_FLAG_TXERR|CEC_FLAG_TXACKE)) != 0)
bogdanm 0:9b334a45a8ff 440 {
bogdanm 0:9b334a45a8ff 441 /* copy ISR for error handling purposes */
bogdanm 0:9b334a45a8ff 442 hcec->ErrorCode = tempisr;
bogdanm 0:9b334a45a8ff 443 /* clear all error flags by default */
bogdanm 0:9b334a45a8ff 444 __HAL_CEC_CLEAR_FLAG(hcec, (CEC_FLAG_TXUDR|CEC_FLAG_TXERR|CEC_FLAG_TXACKE));
bogdanm 0:9b334a45a8ff 445 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 446 __HAL_UNLOCK(hcec);
mbed_official 19:112740acecfa 447 return HAL_ERROR;
mbed_official 19:112740acecfa 448 }
bogdanm 0:9b334a45a8ff 449
bogdanm 0:9b334a45a8ff 450 hcec->State = HAL_CEC_STATE_READY;
bogdanm 0:9b334a45a8ff 451 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 return HAL_OK;
bogdanm 0:9b334a45a8ff 454 }
bogdanm 0:9b334a45a8ff 455 else
bogdanm 0:9b334a45a8ff 456 {
mbed_official 19:112740acecfa 457 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 458 }
bogdanm 0:9b334a45a8ff 459 }
bogdanm 0:9b334a45a8ff 460
bogdanm 0:9b334a45a8ff 461 /**
bogdanm 0:9b334a45a8ff 462 * @brief Receive data in blocking mode. Must be invoked when RXBR has been set.
bogdanm 0:9b334a45a8ff 463 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 464 * @param pData: pointer to received data buffer.
bogdanm 0:9b334a45a8ff 465 * @param Timeout: Timeout duration.
bogdanm 0:9b334a45a8ff 466 * Note that the received data size is not known beforehand, the latter is known
bogdanm 0:9b334a45a8ff 467 * when the reception is complete and is stored in hcec->RxXferSize.
bogdanm 0:9b334a45a8ff 468 * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max).
bogdanm 0:9b334a45a8ff 469 * If only a header is received, hcec->RxXferSize = 0
bogdanm 0:9b334a45a8ff 470 * @retval HAL status
bogdanm 0:9b334a45a8ff 471 */
bogdanm 0:9b334a45a8ff 472 HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout)
mbed_official 19:112740acecfa 473 {
bogdanm 0:9b334a45a8ff 474 uint32_t temp;
mbed_official 19:112740acecfa 475 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 if (hcec->State == HAL_CEC_STATE_READY)
bogdanm 0:9b334a45a8ff 478 {
bogdanm 0:9b334a45a8ff 479 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 480 if (pData == NULL )
bogdanm 0:9b334a45a8ff 481 {
bogdanm 0:9b334a45a8ff 482 hcec->State = HAL_CEC_STATE_ERROR;
mbed_official 19:112740acecfa 483 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 484 }
mbed_official 19:112740acecfa 485
bogdanm 0:9b334a45a8ff 486 hcec->RxXferSize = 0;
bogdanm 0:9b334a45a8ff 487 /* Process Locked */
bogdanm 0:9b334a45a8ff 488 __HAL_LOCK(hcec);
mbed_official 19:112740acecfa 489
bogdanm 0:9b334a45a8ff 490 /* Rx loop until CEC_ISR_RXEND is set */
bogdanm 0:9b334a45a8ff 491 while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_FLAG_RXEND))
bogdanm 0:9b334a45a8ff 492 {
bogdanm 0:9b334a45a8ff 493 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 494 /* Wait for next byte to be received */
bogdanm 0:9b334a45a8ff 495 while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_FLAG_RXBR))
bogdanm 0:9b334a45a8ff 496 {
mbed_official 19:112740acecfa 497 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 498 {
mbed_official 19:112740acecfa 499 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
bogdanm 0:9b334a45a8ff 500 {
bogdanm 0:9b334a45a8ff 501 hcec->State = HAL_CEC_STATE_TIMEOUT;
mbed_official 19:112740acecfa 502 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 503 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 504 }
bogdanm 0:9b334a45a8ff 505 }
bogdanm 0:9b334a45a8ff 506 /* any error so far ?
bogdanm 0:9b334a45a8ff 507 * has Rx Missing Acknowledge occurred ?
bogdanm 0:9b334a45a8ff 508 * has Rx Long Bit Period error occurred ?
bogdanm 0:9b334a45a8ff 509 * has Rx Short Bit Period error occurred ?
mbed_official 19:112740acecfa 510 * has Rx Bit Rising error occurred ?
bogdanm 0:9b334a45a8ff 511 * has Rx Overrun error occurred ? */
bogdanm 0:9b334a45a8ff 512 temp = (uint32_t) (hcec->Instance->ISR);
bogdanm 0:9b334a45a8ff 513 if ((temp & (CEC_FLAG_RXACKE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|CEC_FLAG_BRE|CEC_FLAG_RXOVR)) != 0)
bogdanm 0:9b334a45a8ff 514 {
bogdanm 0:9b334a45a8ff 515 /* copy ISR for error handling purposes */
bogdanm 0:9b334a45a8ff 516 hcec->ErrorCode = temp;
bogdanm 0:9b334a45a8ff 517 /* clear all error flags by default */
bogdanm 0:9b334a45a8ff 518 __HAL_CEC_CLEAR_FLAG(hcec,(CEC_FLAG_RXACKE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|CEC_FLAG_BRE|CEC_FLAG_RXOVR));
bogdanm 0:9b334a45a8ff 519 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 520 __HAL_UNLOCK(hcec);
mbed_official 19:112740acecfa 521 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 522 }
bogdanm 0:9b334a45a8ff 523 } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXBR)) */
bogdanm 0:9b334a45a8ff 524
bogdanm 0:9b334a45a8ff 525 /* read received data */
bogdanm 0:9b334a45a8ff 526 *pData++ = hcec->Instance->RXDR;
bogdanm 0:9b334a45a8ff 527 temp = (uint32_t) (hcec->Instance->ISR);
bogdanm 0:9b334a45a8ff 528 /* end of message ? */
mbed_official 19:112740acecfa 529 if ((temp & CEC_ISR_RXEND) != 0)
bogdanm 0:9b334a45a8ff 530 {
bogdanm 0:9b334a45a8ff 531 assert_param(IS_CEC_MSGSIZE(hcec->RxXferSize));
bogdanm 0:9b334a45a8ff 532 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_RXEND);
mbed_official 19:112740acecfa 533 hcec->State = HAL_CEC_STATE_READY;
mbed_official 19:112740acecfa 534 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 535 return HAL_OK;
bogdanm 0:9b334a45a8ff 536 }
mbed_official 19:112740acecfa 537
bogdanm 0:9b334a45a8ff 538 /* clear Rx-Byte Received flag */
mbed_official 19:112740acecfa 539 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_RXBR);
bogdanm 0:9b334a45a8ff 540 /* increment payload byte counter */
bogdanm 0:9b334a45a8ff 541 hcec->RxXferSize++;
bogdanm 0:9b334a45a8ff 542 } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND)) */
mbed_official 19:112740acecfa 543
bogdanm 0:9b334a45a8ff 544 /* if the instructions below are executed, it means RXEND was set when RXBR was
bogdanm 0:9b334a45a8ff 545 * set for the first time:
bogdanm 0:9b334a45a8ff 546 * the code within the "while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND))"
bogdanm 0:9b334a45a8ff 547 * loop has not been executed and this means a single byte has been sent */
bogdanm 0:9b334a45a8ff 548 *pData++ = hcec->Instance->RXDR;
mbed_official 19:112740acecfa 549 /* only one header is received: RxXferSize is set to 0 (no operand, no opcode) */
bogdanm 0:9b334a45a8ff 550 hcec->RxXferSize = 0;
bogdanm 0:9b334a45a8ff 551 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
mbed_official 19:112740acecfa 552
mbed_official 19:112740acecfa 553 hcec->State = HAL_CEC_STATE_READY;
mbed_official 19:112740acecfa 554 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 555 return HAL_OK;
bogdanm 0:9b334a45a8ff 556 }
bogdanm 0:9b334a45a8ff 557 else
bogdanm 0:9b334a45a8ff 558 {
mbed_official 19:112740acecfa 559 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 560 }
bogdanm 0:9b334a45a8ff 561 }
bogdanm 0:9b334a45a8ff 562
bogdanm 0:9b334a45a8ff 563 /**
bogdanm 0:9b334a45a8ff 564 * @brief Send data in interrupt mode
bogdanm 0:9b334a45a8ff 565 * @param hcec: CEC handle
mbed_official 19:112740acecfa 566 * @param DestinationAddress: destination logical address
bogdanm 0:9b334a45a8ff 567 * @param pData: pointer to input byte data buffer
bogdanm 0:9b334a45a8ff 568 * @param Size: amount of data to be sent in bytes (without counting the header).
bogdanm 0:9b334a45a8ff 569 * 0 means only the header is sent (ping operation).
mbed_official 19:112740acecfa 570 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
bogdanm 0:9b334a45a8ff 571 * @retval HAL status
bogdanm 0:9b334a45a8ff 572 */
bogdanm 0:9b334a45a8ff 573 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
bogdanm 0:9b334a45a8ff 574 {
bogdanm 0:9b334a45a8ff 575 uint8_t temp = 0;
bogdanm 0:9b334a45a8ff 576 /* if the IP isn't already busy and if there is no previous transmission
bogdanm 0:9b334a45a8ff 577 already pending due to arbitration lost */
bogdanm 0:9b334a45a8ff 578 if (((hcec->State == HAL_CEC_STATE_READY) || (hcec->State == HAL_CEC_STATE_STANDBY_RX))
bogdanm 0:9b334a45a8ff 579 && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
mbed_official 19:112740acecfa 580 {
bogdanm 0:9b334a45a8ff 581 if((pData == NULL) && (Size > 0))
bogdanm 0:9b334a45a8ff 582 {
bogdanm 0:9b334a45a8ff 583 hcec->State = HAL_CEC_STATE_ERROR;
mbed_official 19:112740acecfa 584 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 585 }
bogdanm 0:9b334a45a8ff 586
bogdanm 0:9b334a45a8ff 587 assert_param(IS_CEC_ADDRESS(DestinationAddress));
bogdanm 0:9b334a45a8ff 588 assert_param(IS_CEC_MSGSIZE(Size));
mbed_official 19:112740acecfa 589
bogdanm 0:9b334a45a8ff 590 /* Process Locked */
bogdanm 0:9b334a45a8ff 591 __HAL_LOCK(hcec);
bogdanm 0:9b334a45a8ff 592 hcec->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 593 hcec->State = HAL_CEC_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 594 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
mbed_official 19:112740acecfa 595
bogdanm 0:9b334a45a8ff 596 /* Disable Peripheral to write CEC_IER register */
bogdanm 0:9b334a45a8ff 597 __HAL_CEC_DISABLE(hcec);
mbed_official 19:112740acecfa 598
bogdanm 0:9b334a45a8ff 599 /* Enable the following two CEC Transmission interrupts as
bogdanm 0:9b334a45a8ff 600 * well as the following CEC Transmission Errors interrupts:
bogdanm 0:9b334a45a8ff 601 * Tx Byte Request IT
bogdanm 0:9b334a45a8ff 602 * End of Transmission IT
bogdanm 0:9b334a45a8ff 603 * Tx Missing Acknowledge IT
bogdanm 0:9b334a45a8ff 604 * Tx-Error IT
bogdanm 0:9b334a45a8ff 605 * Tx-Buffer Underrun IT
bogdanm 0:9b334a45a8ff 606 * Tx arbitration lost */
bogdanm 0:9b334a45a8ff 607 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
mbed_official 19:112740acecfa 608
bogdanm 0:9b334a45a8ff 609 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 610 __HAL_CEC_ENABLE(hcec);
mbed_official 19:112740acecfa 611
bogdanm 0:9b334a45a8ff 612 /* initialize the number of bytes to send,
bogdanm 0:9b334a45a8ff 613 * 0 means only one header is sent (ping operation) */
bogdanm 0:9b334a45a8ff 614 hcec->TxXferCount = Size;
mbed_official 19:112740acecfa 615
bogdanm 0:9b334a45a8ff 616 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 617 __HAL_UNLOCK(hcec);
mbed_official 19:112740acecfa 618
bogdanm 0:9b334a45a8ff 619 /* in case of no payload (Size = 0), sender is only pinging the system;
bogdanm 0:9b334a45a8ff 620 * Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
bogdanm 0:9b334a45a8ff 621 if (Size == 0)
bogdanm 0:9b334a45a8ff 622 {
bogdanm 0:9b334a45a8ff 623 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
bogdanm 0:9b334a45a8ff 624 }
mbed_official 19:112740acecfa 625
bogdanm 0:9b334a45a8ff 626 /* send header block */
bogdanm 0:9b334a45a8ff 627 temp = (uint8_t)((uint32_t)(hcec->Init.InitiatorAddress) << CEC_INITIATOR_LSB_POS) | DestinationAddress;
bogdanm 0:9b334a45a8ff 628 hcec->Instance->TXDR = temp;
bogdanm 0:9b334a45a8ff 629 /* Set TX Start of Message (TXSOM) bit */
bogdanm 0:9b334a45a8ff 630 __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
mbed_official 19:112740acecfa 631
bogdanm 0:9b334a45a8ff 632 return HAL_OK;
bogdanm 0:9b334a45a8ff 633 }
bogdanm 0:9b334a45a8ff 634 /* if the IP is already busy or if there is a previous transmission
bogdanm 0:9b334a45a8ff 635 already pending due to arbitration loss */
mbed_official 19:112740acecfa 636 else if ((hcec->State == HAL_CEC_STATE_BUSY_TX) || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET))
bogdanm 0:9b334a45a8ff 637 {
bogdanm 0:9b334a45a8ff 638 __HAL_LOCK(hcec);
bogdanm 0:9b334a45a8ff 639 /* set state to BUSY TX, in case it wasn't set already (case
bogdanm 0:9b334a45a8ff 640 * of transmission new attempt after arbitration loss) */
bogdanm 0:9b334a45a8ff 641 if (hcec->State != HAL_CEC_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 642 {
bogdanm 0:9b334a45a8ff 643 hcec->State = HAL_CEC_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 644 }
bogdanm 0:9b334a45a8ff 645
bogdanm 0:9b334a45a8ff 646 /* if all data have been sent */
bogdanm 0:9b334a45a8ff 647 if(hcec->TxXferCount == 0)
bogdanm 0:9b334a45a8ff 648 {
bogdanm 0:9b334a45a8ff 649 /* Disable Peripheral to write CEC_IER register */
bogdanm 0:9b334a45a8ff 650 __HAL_CEC_DISABLE(hcec);
mbed_official 19:112740acecfa 651
bogdanm 0:9b334a45a8ff 652 /* Disable the CEC Transmission Interrupts */
bogdanm 0:9b334a45a8ff 653 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_TXBR|CEC_IT_TXEND);
bogdanm 0:9b334a45a8ff 654 /* Disable the CEC Transmission Error Interrupts */
bogdanm 0:9b334a45a8ff 655 __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR);
mbed_official 19:112740acecfa 656
bogdanm 0:9b334a45a8ff 657 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 658 __HAL_CEC_ENABLE(hcec);
mbed_official 19:112740acecfa 659
bogdanm 0:9b334a45a8ff 660 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXBR|CEC_FLAG_TXEND);
mbed_official 19:112740acecfa 661
bogdanm 0:9b334a45a8ff 662 hcec->State = HAL_CEC_STATE_READY;
bogdanm 0:9b334a45a8ff 663 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
bogdanm 0:9b334a45a8ff 664 start again the Transmission under the Tx call back API */
bogdanm 0:9b334a45a8ff 665 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 666
bogdanm 0:9b334a45a8ff 667 HAL_CEC_TxCpltCallback(hcec);
bogdanm 0:9b334a45a8ff 668
bogdanm 0:9b334a45a8ff 669 return HAL_OK;
bogdanm 0:9b334a45a8ff 670 }
bogdanm 0:9b334a45a8ff 671 else
bogdanm 0:9b334a45a8ff 672 {
bogdanm 0:9b334a45a8ff 673 if (hcec->TxXferCount == 1)
bogdanm 0:9b334a45a8ff 674 {
bogdanm 0:9b334a45a8ff 675 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
bogdanm 0:9b334a45a8ff 676 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
bogdanm 0:9b334a45a8ff 677 }
bogdanm 0:9b334a45a8ff 678 /* clear Tx-Byte request flag */
bogdanm 0:9b334a45a8ff 679 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXBR);
bogdanm 0:9b334a45a8ff 680 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
bogdanm 0:9b334a45a8ff 681 hcec->TxXferCount--;
mbed_official 19:112740acecfa 682
bogdanm 0:9b334a45a8ff 683 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 684 __HAL_UNLOCK(hcec);
mbed_official 19:112740acecfa 685
bogdanm 0:9b334a45a8ff 686 return HAL_OK;
bogdanm 0:9b334a45a8ff 687 }
bogdanm 0:9b334a45a8ff 688 }
bogdanm 0:9b334a45a8ff 689 else
bogdanm 0:9b334a45a8ff 690 {
mbed_official 19:112740acecfa 691 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 692 }
bogdanm 0:9b334a45a8ff 693 }
bogdanm 0:9b334a45a8ff 694
bogdanm 0:9b334a45a8ff 695 /**
bogdanm 0:9b334a45a8ff 696 * @brief Receive data in interrupt mode.
bogdanm 0:9b334a45a8ff 697 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 698 * @param pData: pointer to received data buffer.
bogdanm 0:9b334a45a8ff 699 * Note that the received data size is not known beforehand, the latter is known
bogdanm 0:9b334a45a8ff 700 * when the reception is complete and is stored in hcec->RxXferSize.
bogdanm 0:9b334a45a8ff 701 * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max).
bogdanm 0:9b334a45a8ff 702 * If only a header is received, hcec->RxXferSize = 0
bogdanm 0:9b334a45a8ff 703 * @retval HAL status
bogdanm 0:9b334a45a8ff 704 */
bogdanm 0:9b334a45a8ff 705 HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData)
bogdanm 0:9b334a45a8ff 706 {
bogdanm 0:9b334a45a8ff 707 if(hcec->State == HAL_CEC_STATE_READY)
bogdanm 0:9b334a45a8ff 708 {
bogdanm 0:9b334a45a8ff 709 if(pData == NULL)
bogdanm 0:9b334a45a8ff 710 {
bogdanm 0:9b334a45a8ff 711 hcec->State = HAL_CEC_STATE_ERROR;
mbed_official 19:112740acecfa 712 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 713 }
bogdanm 0:9b334a45a8ff 714
bogdanm 0:9b334a45a8ff 715 /* Process Locked */
bogdanm 0:9b334a45a8ff 716 __HAL_LOCK(hcec);
bogdanm 0:9b334a45a8ff 717 hcec->RxXferSize = 0;
bogdanm 0:9b334a45a8ff 718 hcec->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 719 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
bogdanm 0:9b334a45a8ff 720 /* the IP is moving to a ready to receive state */
bogdanm 0:9b334a45a8ff 721 hcec->State = HAL_CEC_STATE_STANDBY_RX;
bogdanm 0:9b334a45a8ff 722
bogdanm 0:9b334a45a8ff 723 /* Disable Peripheral to write CEC_IER register */
bogdanm 0:9b334a45a8ff 724 __HAL_CEC_DISABLE(hcec);
bogdanm 0:9b334a45a8ff 725
bogdanm 0:9b334a45a8ff 726 /* Enable the following CEC Reception Error Interrupts:
bogdanm 0:9b334a45a8ff 727 * Rx overrun
bogdanm 0:9b334a45a8ff 728 * Rx bit rising error
bogdanm 0:9b334a45a8ff 729 * Rx short bit period error
bogdanm 0:9b334a45a8ff 730 * Rx long bit period error
bogdanm 0:9b334a45a8ff 731 * Rx missing acknowledge */
bogdanm 0:9b334a45a8ff 732 __HAL_CEC_ENABLE_IT(hcec, CEC_IER_RX_ALL_ERR);
bogdanm 0:9b334a45a8ff 733
bogdanm 0:9b334a45a8ff 734 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 735 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 736
bogdanm 0:9b334a45a8ff 737 /* Enable the following two CEC Reception interrupts:
bogdanm 0:9b334a45a8ff 738 * Rx Byte Received IT
bogdanm 0:9b334a45a8ff 739 * End of Reception IT */
bogdanm 0:9b334a45a8ff 740 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND);
bogdanm 0:9b334a45a8ff 741
bogdanm 0:9b334a45a8ff 742 __HAL_CEC_ENABLE(hcec);
bogdanm 0:9b334a45a8ff 743
bogdanm 0:9b334a45a8ff 744 return HAL_OK;
bogdanm 0:9b334a45a8ff 745 }
bogdanm 0:9b334a45a8ff 746 else
bogdanm 0:9b334a45a8ff 747 {
bogdanm 0:9b334a45a8ff 748 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 749 }
bogdanm 0:9b334a45a8ff 750 }
bogdanm 0:9b334a45a8ff 751
bogdanm 0:9b334a45a8ff 752 /**
bogdanm 0:9b334a45a8ff 753 * @brief Get size of the received frame.
bogdanm 0:9b334a45a8ff 754 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 755 * @retval Frame size
bogdanm 0:9b334a45a8ff 756 */
bogdanm 0:9b334a45a8ff 757 uint32_t HAL_CEC_GetReceivedFrameSize(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 758 {
bogdanm 0:9b334a45a8ff 759 return hcec->RxXferSize;
bogdanm 0:9b334a45a8ff 760 }
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762 /**
bogdanm 0:9b334a45a8ff 763 * @brief This function handles CEC interrupt requests.
bogdanm 0:9b334a45a8ff 764 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 765 * @retval None
bogdanm 0:9b334a45a8ff 766 */
bogdanm 0:9b334a45a8ff 767 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 768 {
bogdanm 0:9b334a45a8ff 769 /* save interrupts register for further error or interrupts handling purposes */
bogdanm 0:9b334a45a8ff 770 hcec->ErrorCode = hcec->Instance->ISR;
bogdanm 0:9b334a45a8ff 771 /* CEC TX missing acknowledge error interrupt occurred -------------------------------------*/
bogdanm 0:9b334a45a8ff 772 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXACKE) != RESET))
bogdanm 0:9b334a45a8ff 773 {
bogdanm 0:9b334a45a8ff 774 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXACKE);
bogdanm 0:9b334a45a8ff 775 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 776 }
bogdanm 0:9b334a45a8ff 777
bogdanm 0:9b334a45a8ff 778 /* CEC transmit error interrupt occured --------------------------------------*/
bogdanm 0:9b334a45a8ff 779 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXERR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXERR) != RESET))
bogdanm 0:9b334a45a8ff 780 {
bogdanm 0:9b334a45a8ff 781 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXERR);
bogdanm 0:9b334a45a8ff 782 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 783 }
bogdanm 0:9b334a45a8ff 784
bogdanm 0:9b334a45a8ff 785 /* CEC TX underrun error interrupt occured --------------------------------------*/
bogdanm 0:9b334a45a8ff 786 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXUDR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXUDR) != RESET))
bogdanm 0:9b334a45a8ff 787 {
bogdanm 0:9b334a45a8ff 788 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXUDR);
bogdanm 0:9b334a45a8ff 789 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 790 }
bogdanm 0:9b334a45a8ff 791
bogdanm 0:9b334a45a8ff 792 /* CEC TX arbitration error interrupt occured --------------------------------------*/
bogdanm 0:9b334a45a8ff 793 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_ARBLST) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_ARBLST) != RESET))
bogdanm 0:9b334a45a8ff 794 {
bogdanm 0:9b334a45a8ff 795 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
bogdanm 0:9b334a45a8ff 796 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 797 }
bogdanm 0:9b334a45a8ff 798
bogdanm 0:9b334a45a8ff 799 /* CEC RX overrun error interrupt occured --------------------------------------*/
bogdanm 0:9b334a45a8ff 800 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXOVR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXOVR) != RESET))
bogdanm 0:9b334a45a8ff 801 {
bogdanm 0:9b334a45a8ff 802 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXOVR);
bogdanm 0:9b334a45a8ff 803 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 804 }
bogdanm 0:9b334a45a8ff 805
mbed_official 19:112740acecfa 806 /* CEC RX bit rising error interrupt occured -------------------------------*/
bogdanm 0:9b334a45a8ff 807 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_BRE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_BRE) != RESET))
bogdanm 0:9b334a45a8ff 808 {
bogdanm 0:9b334a45a8ff 809 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_BRE);
bogdanm 0:9b334a45a8ff 810 hcec->State = HAL_CEC_STATE_ERROR;
mbed_official 19:112740acecfa 811 }
bogdanm 0:9b334a45a8ff 812
mbed_official 19:112740acecfa 813 /* CEC RX short bit period error interrupt occured -------------------------*/
bogdanm 0:9b334a45a8ff 814 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_SBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_SBPE) != RESET))
bogdanm 0:9b334a45a8ff 815 {
bogdanm 0:9b334a45a8ff 816 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_SBPE);
bogdanm 0:9b334a45a8ff 817 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 818 }
bogdanm 0:9b334a45a8ff 819
mbed_official 19:112740acecfa 820 /* CEC RX long bit period error interrupt occured --------------------------*/
bogdanm 0:9b334a45a8ff 821 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_LBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_LBPE) != RESET))
bogdanm 0:9b334a45a8ff 822 {
bogdanm 0:9b334a45a8ff 823 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_LBPE);
bogdanm 0:9b334a45a8ff 824 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 825 }
bogdanm 0:9b334a45a8ff 826
mbed_official 19:112740acecfa 827 /* CEC RX missing acknowledge error interrupt occured ----------------------*/
bogdanm 0:9b334a45a8ff 828 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXACKE) != RESET))
bogdanm 0:9b334a45a8ff 829 {
bogdanm 0:9b334a45a8ff 830 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXACKE);
bogdanm 0:9b334a45a8ff 831 hcec->State = HAL_CEC_STATE_ERROR;
bogdanm 0:9b334a45a8ff 832 }
bogdanm 0:9b334a45a8ff 833
bogdanm 0:9b334a45a8ff 834 if ((hcec->ErrorCode & CEC_ISR_ALL_ERROR) != 0)
bogdanm 0:9b334a45a8ff 835 {
bogdanm 0:9b334a45a8ff 836 HAL_CEC_ErrorCallback(hcec);
bogdanm 0:9b334a45a8ff 837 }
bogdanm 0:9b334a45a8ff 838
mbed_official 19:112740acecfa 839 /* CEC RX byte received interrupt -----------------------------------------*/
bogdanm 0:9b334a45a8ff 840 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXBR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXBR) != RESET))
bogdanm 0:9b334a45a8ff 841 {
bogdanm 0:9b334a45a8ff 842 /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */
bogdanm 0:9b334a45a8ff 843 CEC_Receive_IT(hcec);
bogdanm 0:9b334a45a8ff 844 }
mbed_official 19:112740acecfa 845
mbed_official 19:112740acecfa 846 /* CEC RX end received interrupt ------------------------------------------*/
bogdanm 0:9b334a45a8ff 847 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXEND) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXEND) != RESET))
bogdanm 0:9b334a45a8ff 848 {
bogdanm 0:9b334a45a8ff 849 /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */
bogdanm 0:9b334a45a8ff 850 CEC_Receive_IT(hcec);
bogdanm 0:9b334a45a8ff 851 }
mbed_official 19:112740acecfa 852
mbed_official 19:112740acecfa 853 /* CEC TX byte request interrupt -------------------------------------------*/
bogdanm 0:9b334a45a8ff 854 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXBR) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXBR) != RESET))
bogdanm 0:9b334a45a8ff 855 {
bogdanm 0:9b334a45a8ff 856 /* TXBR IT is cleared during HAL_CEC_Transmit_IT processing */
bogdanm 0:9b334a45a8ff 857 CEC_Transmit_IT(hcec);
bogdanm 0:9b334a45a8ff 858 }
mbed_official 19:112740acecfa 859
mbed_official 19:112740acecfa 860 /* CEC TX end interrupt ----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 861 if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXEND) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXEND) != RESET))
bogdanm 0:9b334a45a8ff 862 {
bogdanm 0:9b334a45a8ff 863 /* TXEND IT is cleared during HAL_CEC_Transmit_IT processing */
bogdanm 0:9b334a45a8ff 864 CEC_Transmit_IT(hcec);
mbed_official 19:112740acecfa 865 }
bogdanm 0:9b334a45a8ff 866 }
bogdanm 0:9b334a45a8ff 867
bogdanm 0:9b334a45a8ff 868 /**
bogdanm 0:9b334a45a8ff 869 * @brief Tx Transfer completed callback
bogdanm 0:9b334a45a8ff 870 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 871 * @retval None
bogdanm 0:9b334a45a8ff 872 */
bogdanm 0:9b334a45a8ff 873 __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 874 {
bogdanm 0:9b334a45a8ff 875 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 876 the HAL_CEC_TxCpltCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 877 */
bogdanm 0:9b334a45a8ff 878 }
bogdanm 0:9b334a45a8ff 879
bogdanm 0:9b334a45a8ff 880 /**
bogdanm 0:9b334a45a8ff 881 * @brief Rx Transfer completed callback
bogdanm 0:9b334a45a8ff 882 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 883 * @retval None
bogdanm 0:9b334a45a8ff 884 */
bogdanm 0:9b334a45a8ff 885 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 886 {
bogdanm 0:9b334a45a8ff 887 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 888 the HAL_CEC_TxCpltCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 889 */
bogdanm 0:9b334a45a8ff 890 }
bogdanm 0:9b334a45a8ff 891
bogdanm 0:9b334a45a8ff 892 /**
bogdanm 0:9b334a45a8ff 893 * @brief CEC error callbacks
bogdanm 0:9b334a45a8ff 894 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 895 * @retval None
bogdanm 0:9b334a45a8ff 896 */
bogdanm 0:9b334a45a8ff 897 __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 898 {
bogdanm 0:9b334a45a8ff 899 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 900 the HAL_CEC_ErrorCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 901 */
bogdanm 0:9b334a45a8ff 902 }
bogdanm 0:9b334a45a8ff 903 /**
bogdanm 0:9b334a45a8ff 904 * @}
bogdanm 0:9b334a45a8ff 905 */
bogdanm 0:9b334a45a8ff 906
bogdanm 0:9b334a45a8ff 907 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
bogdanm 0:9b334a45a8ff 908 * @brief CEC control functions
bogdanm 0:9b334a45a8ff 909 *
bogdanm 0:9b334a45a8ff 910 @verbatim
bogdanm 0:9b334a45a8ff 911 ===============================================================================
bogdanm 0:9b334a45a8ff 912 ##### Peripheral Control function #####
mbed_official 19:112740acecfa 913 ===============================================================================
bogdanm 0:9b334a45a8ff 914 [..]
bogdanm 0:9b334a45a8ff 915 This subsection provides a set of functions allowing to control the CEC.
bogdanm 0:9b334a45a8ff 916 (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
bogdanm 0:9b334a45a8ff 917 @endverbatim
bogdanm 0:9b334a45a8ff 918 * @{
bogdanm 0:9b334a45a8ff 919 */
bogdanm 0:9b334a45a8ff 920 /**
bogdanm 0:9b334a45a8ff 921 * @brief return the CEC state
bogdanm 0:9b334a45a8ff 922 * @param hcec: CEC handle
bogdanm 0:9b334a45a8ff 923 * @retval HAL state
bogdanm 0:9b334a45a8ff 924 */
bogdanm 0:9b334a45a8ff 925 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 926 {
bogdanm 0:9b334a45a8ff 927 return hcec->State;
bogdanm 0:9b334a45a8ff 928 }
bogdanm 0:9b334a45a8ff 929
bogdanm 0:9b334a45a8ff 930 /**
bogdanm 0:9b334a45a8ff 931 * @brief Return the CEC error code
bogdanm 0:9b334a45a8ff 932 * @param hcec : pointer to a CEC_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 933 * the configuration information for the specified CEC.
bogdanm 0:9b334a45a8ff 934 * @retval CEC Error Code
bogdanm 0:9b334a45a8ff 935 */
bogdanm 0:9b334a45a8ff 936 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 937 {
bogdanm 0:9b334a45a8ff 938 return hcec->ErrorCode;
bogdanm 0:9b334a45a8ff 939 }
bogdanm 0:9b334a45a8ff 940
bogdanm 0:9b334a45a8ff 941 /**
bogdanm 0:9b334a45a8ff 942 * @}
bogdanm 0:9b334a45a8ff 943 */
bogdanm 0:9b334a45a8ff 944
bogdanm 0:9b334a45a8ff 945 /**
bogdanm 0:9b334a45a8ff 946 * @brief Send data in interrupt mode
bogdanm 0:9b334a45a8ff 947 * @param hcec: CEC handle.
bogdanm 0:9b334a45a8ff 948 * Function called under interruption only, once
bogdanm 0:9b334a45a8ff 949 * interruptions have been enabled by HAL_CEC_Transmit_IT()
bogdanm 0:9b334a45a8ff 950 * @retval HAL status
bogdanm 0:9b334a45a8ff 951 */
bogdanm 0:9b334a45a8ff 952 static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 953 {
bogdanm 0:9b334a45a8ff 954 /* if the IP is already busy or if there is a previous transmission
bogdanm 0:9b334a45a8ff 955 already pending due to arbitration loss */
bogdanm 0:9b334a45a8ff 956 if ((hcec->State == HAL_CEC_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 957 || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET))
bogdanm 0:9b334a45a8ff 958 {
bogdanm 0:9b334a45a8ff 959 __HAL_LOCK(hcec);
bogdanm 0:9b334a45a8ff 960 /* set state to BUSY TX, in case it wasn't set already (case
bogdanm 0:9b334a45a8ff 961 * of transmission new attempt after arbitration loss) */
bogdanm 0:9b334a45a8ff 962 if (hcec->State != HAL_CEC_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 963 {
bogdanm 0:9b334a45a8ff 964 hcec->State = HAL_CEC_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 965 }
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 /* if all data have been sent */
bogdanm 0:9b334a45a8ff 968 if(hcec->TxXferCount == 0)
bogdanm 0:9b334a45a8ff 969 {
bogdanm 0:9b334a45a8ff 970 /* Disable Peripheral to write CEC_IER register */
bogdanm 0:9b334a45a8ff 971 __HAL_CEC_DISABLE(hcec);
bogdanm 0:9b334a45a8ff 972
bogdanm 0:9b334a45a8ff 973 /* Disable the CEC Transmission Interrupts */
bogdanm 0:9b334a45a8ff 974 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_TXBR|CEC_IT_TXEND);
bogdanm 0:9b334a45a8ff 975 /* Disable the CEC Transmission Error Interrupts */
bogdanm 0:9b334a45a8ff 976 __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR);
mbed_official 19:112740acecfa 977
bogdanm 0:9b334a45a8ff 978 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 979 __HAL_CEC_ENABLE(hcec);
mbed_official 19:112740acecfa 980
bogdanm 0:9b334a45a8ff 981 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR|CEC_FLAG_TXEND);
mbed_official 19:112740acecfa 982
bogdanm 0:9b334a45a8ff 983 hcec->State = HAL_CEC_STATE_READY;
bogdanm 0:9b334a45a8ff 984 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
bogdanm 0:9b334a45a8ff 985 start again the Transmission under the Tx call back API */
bogdanm 0:9b334a45a8ff 986 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 987
bogdanm 0:9b334a45a8ff 988 HAL_CEC_TxCpltCallback(hcec);
bogdanm 0:9b334a45a8ff 989
bogdanm 0:9b334a45a8ff 990 return HAL_OK;
bogdanm 0:9b334a45a8ff 991 }
bogdanm 0:9b334a45a8ff 992 else
bogdanm 0:9b334a45a8ff 993 {
bogdanm 0:9b334a45a8ff 994 if (hcec->TxXferCount == 1)
bogdanm 0:9b334a45a8ff 995 {
bogdanm 0:9b334a45a8ff 996 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
bogdanm 0:9b334a45a8ff 997 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
bogdanm 0:9b334a45a8ff 998 }
bogdanm 0:9b334a45a8ff 999 /* clear Tx-Byte request flag */
bogdanm 0:9b334a45a8ff 1000 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
bogdanm 0:9b334a45a8ff 1001 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
bogdanm 0:9b334a45a8ff 1002 hcec->TxXferCount--;
bogdanm 0:9b334a45a8ff 1003
bogdanm 0:9b334a45a8ff 1004 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1005 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 1006
bogdanm 0:9b334a45a8ff 1007 return HAL_OK;
bogdanm 0:9b334a45a8ff 1008 }
bogdanm 0:9b334a45a8ff 1009 }
bogdanm 0:9b334a45a8ff 1010 else
bogdanm 0:9b334a45a8ff 1011 {
bogdanm 0:9b334a45a8ff 1012 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1013 }
bogdanm 0:9b334a45a8ff 1014 }
bogdanm 0:9b334a45a8ff 1015
bogdanm 0:9b334a45a8ff 1016
bogdanm 0:9b334a45a8ff 1017 /**
bogdanm 0:9b334a45a8ff 1018 * @brief Receive data in interrupt mode.
bogdanm 0:9b334a45a8ff 1019 * @param hcec: CEC handle.
bogdanm 0:9b334a45a8ff 1020 * Function called under interruption only, once
bogdanm 0:9b334a45a8ff 1021 * interruptions have been enabled by HAL_CEC_Receive_IT()
bogdanm 0:9b334a45a8ff 1022 * @retval HAL status
bogdanm 0:9b334a45a8ff 1023 */
bogdanm 0:9b334a45a8ff 1024 static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec)
bogdanm 0:9b334a45a8ff 1025 {
bogdanm 0:9b334a45a8ff 1026 uint32_t tempisr;
bogdanm 0:9b334a45a8ff 1027
bogdanm 0:9b334a45a8ff 1028 /* Three different conditions are tested to carry out the RX IT processing:
bogdanm 0:9b334a45a8ff 1029 * - the IP is in reception stand-by (the IP state is HAL_CEC_STATE_STANDBY_RX) and
bogdanm 0:9b334a45a8ff 1030 * the reception of the first byte is starting
bogdanm 0:9b334a45a8ff 1031 * - a message reception is already on-going (the IP state is HAL_CEC_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 1032 * and a new byte is being received
bogdanm 0:9b334a45a8ff 1033 * - a transmission has just been started (the IP state is HAL_CEC_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 1034 * but has been interrupted by a new message reception or discarded due to
bogdanm 0:9b334a45a8ff 1035 * arbitration loss: the reception of the first or higher priority message
bogdanm 0:9b334a45a8ff 1036 * (the arbitration winner) is starting */
bogdanm 0:9b334a45a8ff 1037 if ((hcec->State == HAL_CEC_STATE_STANDBY_RX)
bogdanm 0:9b334a45a8ff 1038 || (hcec->State == HAL_CEC_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 1039 || (hcec->State == HAL_CEC_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 1040 {
bogdanm 0:9b334a45a8ff 1041 /* reception is starting */
bogdanm 0:9b334a45a8ff 1042 hcec->State = HAL_CEC_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1043 tempisr = (uint32_t) (hcec->Instance->ISR);
bogdanm 0:9b334a45a8ff 1044 if ((tempisr & CEC_FLAG_RXBR) != 0)
bogdanm 0:9b334a45a8ff 1045 {
bogdanm 0:9b334a45a8ff 1046 /* Process Locked */
bogdanm 0:9b334a45a8ff 1047 __HAL_LOCK(hcec);
bogdanm 0:9b334a45a8ff 1048 /* read received byte */
bogdanm 0:9b334a45a8ff 1049 *hcec->pRxBuffPtr++ = hcec->Instance->RXDR;
bogdanm 0:9b334a45a8ff 1050 /* if last byte has been received */
bogdanm 0:9b334a45a8ff 1051 if ((tempisr & CEC_FLAG_RXEND) != 0)
bogdanm 0:9b334a45a8ff 1052 {
bogdanm 0:9b334a45a8ff 1053 /* clear IT */
bogdanm 0:9b334a45a8ff 1054 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_RXBR|CEC_FLAG_RXEND);
bogdanm 0:9b334a45a8ff 1055 /* RX interrupts are not disabled at this point.
bogdanm 0:9b334a45a8ff 1056 * Indeed, to disable the IT, the IP must be disabled first
bogdanm 0:9b334a45a8ff 1057 * which resets the TXSOM flag. In case of arbitration loss,
bogdanm 0:9b334a45a8ff 1058 * this leads to a transmission abort.
bogdanm 0:9b334a45a8ff 1059 * Therefore, RX interruptions disabling if so required,
bogdanm 0:9b334a45a8ff 1060 * is done in HAL_CEC_RxCpltCallback */
bogdanm 0:9b334a45a8ff 1061
bogdanm 0:9b334a45a8ff 1062 /* IP state is moved to READY.
bogdanm 0:9b334a45a8ff 1063 * If the IP must remain in standby mode to listen
bogdanm 0:9b334a45a8ff 1064 * any new message, it is up to HAL_CEC_RxCpltCallback
bogdanm 0:9b334a45a8ff 1065 * to move it again to HAL_CEC_STATE_STANDBY_RX */
bogdanm 0:9b334a45a8ff 1066 hcec->State = HAL_CEC_STATE_READY;
bogdanm 0:9b334a45a8ff 1067
bogdanm 0:9b334a45a8ff 1068 /* Call the Process Unlocked before calling the Rx call back API */
bogdanm 0:9b334a45a8ff 1069 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 1070 HAL_CEC_RxCpltCallback(hcec);
bogdanm 0:9b334a45a8ff 1071
bogdanm 0:9b334a45a8ff 1072 return HAL_OK;
bogdanm 0:9b334a45a8ff 1073 }
bogdanm 0:9b334a45a8ff 1074 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
bogdanm 0:9b334a45a8ff 1075
bogdanm 0:9b334a45a8ff 1076 hcec->RxXferSize++;
bogdanm 0:9b334a45a8ff 1077 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1078 __HAL_UNLOCK(hcec);
bogdanm 0:9b334a45a8ff 1079
bogdanm 0:9b334a45a8ff 1080 return HAL_OK;
bogdanm 0:9b334a45a8ff 1081 }
bogdanm 0:9b334a45a8ff 1082 else
bogdanm 0:9b334a45a8ff 1083 {
bogdanm 0:9b334a45a8ff 1084 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1085 }
bogdanm 0:9b334a45a8ff 1086 }
bogdanm 0:9b334a45a8ff 1087 else
bogdanm 0:9b334a45a8ff 1088 {
bogdanm 0:9b334a45a8ff 1089 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1090 }
bogdanm 0:9b334a45a8ff 1091 }
bogdanm 0:9b334a45a8ff 1092 /**
bogdanm 0:9b334a45a8ff 1093 * @}
bogdanm 0:9b334a45a8ff 1094 */
bogdanm 0:9b334a45a8ff 1095
bogdanm 0:9b334a45a8ff 1096 #endif /* STM32F446xx */
bogdanm 0:9b334a45a8ff 1097
bogdanm 0:9b334a45a8ff 1098 #endif /* HAL_CEC_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1099 /**
bogdanm 0:9b334a45a8ff 1100 * @}
bogdanm 0:9b334a45a8ff 1101 */
bogdanm 0:9b334a45a8ff 1102
bogdanm 0:9b334a45a8ff 1103 /**
bogdanm 0:9b334a45a8ff 1104 * @}
bogdanm 0:9b334a45a8ff 1105 */
bogdanm 0:9b334a45a8ff 1106
bogdanm 0:9b334a45a8ff 1107 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/