en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_adc_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
19:112740acecfa 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_adc_ex.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 19:112740acecfa 5 * @version V1.4.1
mbed_official 19:112740acecfa 6 * @date 09-October-2015
bogdanm 0:9b334a45a8ff 7 * @brief Header file of ADC HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F4xx_ADC_EX_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F4xx_ADC_EX_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 47 #include "stm32f4xx_hal_def.h"
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /** @addtogroup ADCEx
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 58 /** @defgroup ADCEx_Exported_Types ADC Exported Types
bogdanm 0:9b334a45a8ff 59 * @{
bogdanm 0:9b334a45a8ff 60 */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief ADC Configuration injected Channel structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65 typedef struct
bogdanm 0:9b334a45a8ff 66 {
bogdanm 0:9b334a45a8ff 67 uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
bogdanm 0:9b334a45a8ff 68 This parameter can be a value of @ref ADC_channels */
bogdanm 0:9b334a45a8ff 69 uint32_t InjectedRank; /*!< The rank in the injected group sequencer
bogdanm 0:9b334a45a8ff 70 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
bogdanm 0:9b334a45a8ff 71 uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
bogdanm 0:9b334a45a8ff 72 This parameter can be a value of @ref ADC_sampling_times */
bogdanm 0:9b334a45a8ff 73 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
bogdanm 0:9b334a45a8ff 74 This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
bogdanm 0:9b334a45a8ff 75 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
bogdanm 0:9b334a45a8ff 76 injected channel group.
bogdanm 0:9b334a45a8ff 77 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
bogdanm 0:9b334a45a8ff 78 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
bogdanm 0:9b334a45a8ff 79 conversion after regular one */
bogdanm 0:9b334a45a8ff 80 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
bogdanm 0:9b334a45a8ff 81 This parameter can be set to ENABLE or DISABLE. */
bogdanm 0:9b334a45a8ff 82 uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
bogdanm 0:9b334a45a8ff 83 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
bogdanm 0:9b334a45a8ff 84 uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
bogdanm 0:9b334a45a8ff 85 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
bogdanm 0:9b334a45a8ff 86 }ADC_InjectionConfTypeDef;
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /**
bogdanm 0:9b334a45a8ff 89 * @brief ADC Configuration multi-mode structure definition
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91 typedef struct
bogdanm 0:9b334a45a8ff 92 {
bogdanm 0:9b334a45a8ff 93 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
bogdanm 0:9b334a45a8ff 94 This parameter can be a value of @ref ADCEx_Common_mode */
bogdanm 0:9b334a45a8ff 95 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
bogdanm 0:9b334a45a8ff 96 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
bogdanm 0:9b334a45a8ff 97 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
bogdanm 0:9b334a45a8ff 98 This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
bogdanm 0:9b334a45a8ff 99 }ADC_MultiModeTypeDef;
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 /**
bogdanm 0:9b334a45a8ff 102 * @}
bogdanm 0:9b334a45a8ff 103 */
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 106 /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
bogdanm 0:9b334a45a8ff 107 * @{
bogdanm 0:9b334a45a8ff 108 */
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /** @defgroup ADCEx_Common_mode ADC Common Mode
bogdanm 0:9b334a45a8ff 111 * @{
bogdanm 0:9b334a45a8ff 112 */
bogdanm 0:9b334a45a8ff 113 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 114 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
bogdanm 0:9b334a45a8ff 115 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
bogdanm 0:9b334a45a8ff 116 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
bogdanm 0:9b334a45a8ff 117 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
bogdanm 0:9b334a45a8ff 118 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
bogdanm 0:9b334a45a8ff 119 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
bogdanm 0:9b334a45a8ff 120 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
bogdanm 0:9b334a45a8ff 121 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
bogdanm 0:9b334a45a8ff 122 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
bogdanm 0:9b334a45a8ff 123 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
bogdanm 0:9b334a45a8ff 124 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
bogdanm 0:9b334a45a8ff 125 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
bogdanm 0:9b334a45a8ff 126 /**
bogdanm 0:9b334a45a8ff 127 * @}
bogdanm 0:9b334a45a8ff 128 */
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
bogdanm 0:9b334a45a8ff 131 * @{
bogdanm 0:9b334a45a8ff 132 */
bogdanm 0:9b334a45a8ff 133 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
bogdanm 0:9b334a45a8ff 134 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
bogdanm 0:9b334a45a8ff 135 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
bogdanm 0:9b334a45a8ff 136 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
bogdanm 0:9b334a45a8ff 137 /**
bogdanm 0:9b334a45a8ff 138 * @}
bogdanm 0:9b334a45a8ff 139 */
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
bogdanm 0:9b334a45a8ff 142 * @{
bogdanm 0:9b334a45a8ff 143 */
bogdanm 0:9b334a45a8ff 144 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 145 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
bogdanm 0:9b334a45a8ff 146 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
bogdanm 0:9b334a45a8ff 147 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
bogdanm 0:9b334a45a8ff 148 /**
bogdanm 0:9b334a45a8ff 149 * @}
bogdanm 0:9b334a45a8ff 150 */
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
bogdanm 0:9b334a45a8ff 153 * @{
bogdanm 0:9b334a45a8ff 154 */
bogdanm 0:9b334a45a8ff 155 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 156 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
bogdanm 0:9b334a45a8ff 157 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
bogdanm 0:9b334a45a8ff 158 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
bogdanm 0:9b334a45a8ff 159 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
bogdanm 0:9b334a45a8ff 160 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
bogdanm 0:9b334a45a8ff 161 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
bogdanm 0:9b334a45a8ff 162 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
bogdanm 0:9b334a45a8ff 163 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
bogdanm 0:9b334a45a8ff 164 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
bogdanm 0:9b334a45a8ff 165 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
bogdanm 0:9b334a45a8ff 166 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
bogdanm 0:9b334a45a8ff 167 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
bogdanm 0:9b334a45a8ff 168 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
bogdanm 0:9b334a45a8ff 169 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
bogdanm 0:9b334a45a8ff 170 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
bogdanm 0:9b334a45a8ff 171 #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1)
bogdanm 0:9b334a45a8ff 172 /**
bogdanm 0:9b334a45a8ff 173 * @}
bogdanm 0:9b334a45a8ff 174 */
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /** @defgroup ADCEx_injected_channel_selection ADC Injected Channel Selection
bogdanm 0:9b334a45a8ff 177 * @{
bogdanm 0:9b334a45a8ff 178 */
bogdanm 0:9b334a45a8ff 179 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 180 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
bogdanm 0:9b334a45a8ff 181 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
bogdanm 0:9b334a45a8ff 182 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
bogdanm 0:9b334a45a8ff 183 /**
bogdanm 0:9b334a45a8ff 184 * @}
bogdanm 0:9b334a45a8ff 185 */
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 /** @defgroup ADCEx_channels ADC Specific Channels
bogdanm 0:9b334a45a8ff 188 * @{
bogdanm 0:9b334a45a8ff 189 */
bogdanm 0:9b334a45a8ff 190 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
mbed_official 19:112740acecfa 191 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
mbed_official 19:112740acecfa 192 defined(STM32F410Rx) || defined(STM32F412xG)
bogdanm 0:9b334a45a8ff 193 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
mbed_official 19:112740acecfa 194 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412xG */
bogdanm 0:9b334a45a8ff 195
mbed_official 19:112740acecfa 196 #if defined(STM32F411xE) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
mbed_official 19:112740acecfa 197 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 198 #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT ((uint32_t)0x10000000) /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
bogdanm 0:9b334a45a8ff 199 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
mbed_official 19:112740acecfa 200 #endif /* STM32F411xE || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 201 /**
bogdanm 0:9b334a45a8ff 202 * @}
bogdanm 0:9b334a45a8ff 203 */
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 /**
bogdanm 0:9b334a45a8ff 207 * @}
bogdanm 0:9b334a45a8ff 208 */
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 /* Exported macro ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 211 /** @defgroup ADC_Exported_Macros ADC Exported Macros
bogdanm 0:9b334a45a8ff 212 * @{
bogdanm 0:9b334a45a8ff 213 */
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 /**
bogdanm 0:9b334a45a8ff 216 * @}
bogdanm 0:9b334a45a8ff 217 */
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 220 /** @addtogroup ADCEx_Exported_Functions
bogdanm 0:9b334a45a8ff 221 * @{
bogdanm 0:9b334a45a8ff 222 */
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 /** @addtogroup ADCEx_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 225 * @{
bogdanm 0:9b334a45a8ff 226 */
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 /* I/O operation functions ******************************************************/
bogdanm 0:9b334a45a8ff 229 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 230 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 231 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 232 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 233 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 234 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
bogdanm 0:9b334a45a8ff 235 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
bogdanm 0:9b334a45a8ff 236 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 237 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 238 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 /* Peripheral Control functions *************************************************/
bogdanm 0:9b334a45a8ff 241 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
bogdanm 0:9b334a45a8ff 242 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /**
bogdanm 0:9b334a45a8ff 245 * @}
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /**
bogdanm 0:9b334a45a8ff 249 * @}
bogdanm 0:9b334a45a8ff 250 */
bogdanm 0:9b334a45a8ff 251 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 252 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 253 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 254 /** @defgroup ADCEx_Private_Constants ADC Private Constants
bogdanm 0:9b334a45a8ff 255 * @{
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 /**
bogdanm 0:9b334a45a8ff 259 * @}
bogdanm 0:9b334a45a8ff 260 */
bogdanm 0:9b334a45a8ff 261
bogdanm 0:9b334a45a8ff 262 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 263 /** @defgroup ADCEx_Private_Macros ADC Private Macros
bogdanm 0:9b334a45a8ff 264 * @{
bogdanm 0:9b334a45a8ff 265 */
bogdanm 0:9b334a45a8ff 266 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
mbed_official 19:112740acecfa 267 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
mbed_official 19:112740acecfa 268 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412xG)
bogdanm 0:9b334a45a8ff 269 #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
mbed_official 19:112740acecfa 270 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412xG */
bogdanm 0:9b334a45a8ff 271
mbed_official 19:112740acecfa 272 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
mbed_official 19:112740acecfa 273 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 0:9b334a45a8ff 274 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
bogdanm 0:9b334a45a8ff 275 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
mbed_official 19:112740acecfa 276 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
bogdanm 0:9b334a45a8ff 279 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
bogdanm 0:9b334a45a8ff 280 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
bogdanm 0:9b334a45a8ff 281 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
bogdanm 0:9b334a45a8ff 282 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
bogdanm 0:9b334a45a8ff 283 ((MODE) == ADC_DUALMODE_INTERL) || \
bogdanm 0:9b334a45a8ff 284 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
bogdanm 0:9b334a45a8ff 285 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
bogdanm 0:9b334a45a8ff 286 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
bogdanm 0:9b334a45a8ff 287 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
bogdanm 0:9b334a45a8ff 288 ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
bogdanm 0:9b334a45a8ff 289 ((MODE) == ADC_TRIPLEMODE_INTERL) || \
bogdanm 0:9b334a45a8ff 290 ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
bogdanm 0:9b334a45a8ff 291 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
bogdanm 0:9b334a45a8ff 292 ((MODE) == ADC_DMAACCESSMODE_1) || \
bogdanm 0:9b334a45a8ff 293 ((MODE) == ADC_DMAACCESSMODE_2) || \
bogdanm 0:9b334a45a8ff 294 ((MODE) == ADC_DMAACCESSMODE_3))
bogdanm 0:9b334a45a8ff 295 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
bogdanm 0:9b334a45a8ff 296 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
bogdanm 0:9b334a45a8ff 297 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
bogdanm 0:9b334a45a8ff 298 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
bogdanm 0:9b334a45a8ff 299 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
bogdanm 0:9b334a45a8ff 300 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
bogdanm 0:9b334a45a8ff 301 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
bogdanm 0:9b334a45a8ff 302 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
bogdanm 0:9b334a45a8ff 303 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
bogdanm 0:9b334a45a8ff 304 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
bogdanm 0:9b334a45a8ff 305 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
bogdanm 0:9b334a45a8ff 306 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
bogdanm 0:9b334a45a8ff 307 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
bogdanm 0:9b334a45a8ff 308 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
bogdanm 0:9b334a45a8ff 309 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
bogdanm 0:9b334a45a8ff 310 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
bogdanm 0:9b334a45a8ff 311 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
bogdanm 0:9b334a45a8ff 312 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
bogdanm 0:9b334a45a8ff 313 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
bogdanm 0:9b334a45a8ff 314 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
bogdanm 0:9b334a45a8ff 315 ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
bogdanm 0:9b334a45a8ff 316 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
bogdanm 0:9b334a45a8ff 317 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
bogdanm 0:9b334a45a8ff 318
bogdanm 0:9b334a45a8ff 319 /**
bogdanm 0:9b334a45a8ff 320 * @brief Set the selected injected Channel rank.
bogdanm 0:9b334a45a8ff 321 * @param _CHANNELNB_: Channel number.
bogdanm 0:9b334a45a8ff 322 * @param _RANKNB_: Rank number.
bogdanm 0:9b334a45a8ff 323 * @param _JSQR_JL_: Sequence length.
bogdanm 0:9b334a45a8ff 324 * @retval None
bogdanm 0:9b334a45a8ff 325 */
bogdanm 0:9b334a45a8ff 326 #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 /**
bogdanm 0:9b334a45a8ff 329 * @}
bogdanm 0:9b334a45a8ff 330 */
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 333 /** @defgroup ADCEx_Private_Functions ADC Private Functions
bogdanm 0:9b334a45a8ff 334 * @{
bogdanm 0:9b334a45a8ff 335 */
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 /**
bogdanm 0:9b334a45a8ff 338 * @}
bogdanm 0:9b334a45a8ff 339 */
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341 /**
bogdanm 0:9b334a45a8ff 342 * @}
bogdanm 0:9b334a45a8ff 343 */
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /**
bogdanm 0:9b334a45a8ff 346 * @}
bogdanm 0:9b334a45a8ff 347 */
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 350 }
bogdanm 0:9b334a45a8ff 351 #endif
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 #endif /*__STM32F4xx_ADC_EX_H */
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/