en 129
fix LPC812 PWM
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mbed-dev
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_spi.h@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f3xx_hal_spi.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.1.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 12-Sept-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of SPI HAL module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F3xx_HAL_SPI_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F3xx_HAL_SPI_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f3xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup SPI |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | /** @defgroup SPI_Exported_Types SPI Exported Types |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | /** |
| bogdanm | 0:9b334a45a8ff | 63 | * @brief SPI Configuration Structure definition |
| bogdanm | 0:9b334a45a8ff | 64 | */ |
| bogdanm | 0:9b334a45a8ff | 65 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 66 | { |
| bogdanm | 0:9b334a45a8ff | 67 | uint32_t Mode; /*!< Specifies the SPI operating mode. |
| bogdanm | 0:9b334a45a8ff | 68 | This parameter can be a value of @ref SPI_mode */ |
| bogdanm | 0:9b334a45a8ff | 69 | |
| bogdanm | 0:9b334a45a8ff | 70 | uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. |
| bogdanm | 0:9b334a45a8ff | 71 | This parameter can be a value of @ref SPI_Direction */ |
| bogdanm | 0:9b334a45a8ff | 72 | |
| bogdanm | 0:9b334a45a8ff | 73 | uint32_t DataSize; /*!< Specifies the SPI data size. |
| bogdanm | 0:9b334a45a8ff | 74 | This parameter can be a value of @ref SPI_data_size */ |
| bogdanm | 0:9b334a45a8ff | 75 | |
| bogdanm | 0:9b334a45a8ff | 76 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. |
| bogdanm | 0:9b334a45a8ff | 77 | This parameter can be a value of @ref SPI_Clock_Polarity */ |
| bogdanm | 0:9b334a45a8ff | 78 | |
| bogdanm | 0:9b334a45a8ff | 79 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. |
| bogdanm | 0:9b334a45a8ff | 80 | This parameter can be a value of @ref SPI_Clock_Phase */ |
| bogdanm | 0:9b334a45a8ff | 81 | |
| bogdanm | 0:9b334a45a8ff | 82 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by |
| bogdanm | 0:9b334a45a8ff | 83 | hardware (NSS pin) or by software using the SSI bit. |
| bogdanm | 0:9b334a45a8ff | 84 | This parameter can be a value of @ref SPI_Slave_Select_management */ |
| bogdanm | 0:9b334a45a8ff | 85 | |
| bogdanm | 0:9b334a45a8ff | 86 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be |
| bogdanm | 0:9b334a45a8ff | 87 | used to configure the transmit and receive SCK clock. |
| bogdanm | 0:9b334a45a8ff | 88 | This parameter can be a value of @ref SPI_BaudRate_Prescaler |
| bogdanm | 0:9b334a45a8ff | 89 | @note The communication clock is derived from the master |
| bogdanm | 0:9b334a45a8ff | 90 | clock. The slave clock does not need to be set. */ |
| bogdanm | 0:9b334a45a8ff | 91 | |
| bogdanm | 0:9b334a45a8ff | 92 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| bogdanm | 0:9b334a45a8ff | 93 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
| bogdanm | 0:9b334a45a8ff | 94 | |
| bogdanm | 0:9b334a45a8ff | 95 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not . |
| bogdanm | 0:9b334a45a8ff | 96 | This parameter can be a value of @ref SPI_TI_mode */ |
| bogdanm | 0:9b334a45a8ff | 97 | |
| bogdanm | 0:9b334a45a8ff | 98 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
| bogdanm | 0:9b334a45a8ff | 99 | This parameter can be a value of @ref SPI_CRC_Calculation */ |
| bogdanm | 0:9b334a45a8ff | 100 | |
| bogdanm | 0:9b334a45a8ff | 101 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. |
| bogdanm | 0:9b334a45a8ff | 102 | This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ |
| bogdanm | 0:9b334a45a8ff | 103 | |
| bogdanm | 0:9b334a45a8ff | 104 | uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation. |
| bogdanm | 0:9b334a45a8ff | 105 | CRC Length is only used with Data8 and Data16, not other data size |
| bogdanm | 0:9b334a45a8ff | 106 | This parameter must 0 or 1 or 2*/ |
| bogdanm | 0:9b334a45a8ff | 107 | |
| bogdanm | 0:9b334a45a8ff | 108 | uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not . |
| bogdanm | 0:9b334a45a8ff | 109 | This mode is activated by the NSSP bit in the SPIx_CR2 register and |
| bogdanm | 0:9b334a45a8ff | 110 | it takes effect only if the SPI interface is configured as Motorola SPI |
| bogdanm | 0:9b334a45a8ff | 111 | master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0, |
| bogdanm | 0:9b334a45a8ff | 112 | CPOL setting is ignored).. */ |
| bogdanm | 0:9b334a45a8ff | 113 | } SPI_InitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 114 | |
| bogdanm | 0:9b334a45a8ff | 115 | /** |
| bogdanm | 0:9b334a45a8ff | 116 | * @brief HAL State structures definition |
| bogdanm | 0:9b334a45a8ff | 117 | */ |
| bogdanm | 0:9b334a45a8ff | 118 | typedef enum |
| bogdanm | 0:9b334a45a8ff | 119 | { |
| bogdanm | 0:9b334a45a8ff | 120 | HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */ |
| bogdanm | 0:9b334a45a8ff | 121 | HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| bogdanm | 0:9b334a45a8ff | 122 | HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 123 | HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 124 | HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 125 | HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 126 | HAL_SPI_STATE_TIMEOUT = 0x06, /*!< Timeout state */ |
| bogdanm | 0:9b334a45a8ff | 127 | HAL_SPI_STATE_ERROR = 0x07 /*!< Data Transmission and Reception process is ongoing */ |
| bogdanm | 0:9b334a45a8ff | 128 | |
| bogdanm | 0:9b334a45a8ff | 129 | }HAL_SPI_StateTypeDef; |
| bogdanm | 0:9b334a45a8ff | 130 | |
| bogdanm | 0:9b334a45a8ff | 131 | /** |
| bogdanm | 0:9b334a45a8ff | 132 | * @brief HAL SPI Error Code structure definition |
| bogdanm | 0:9b334a45a8ff | 133 | */ |
| bogdanm | 0:9b334a45a8ff | 134 | typedef enum |
| bogdanm | 0:9b334a45a8ff | 135 | { |
| bogdanm | 0:9b334a45a8ff | 136 | HAL_SPI_ERROR_NONE = 0x00, /*!< No error */ |
| bogdanm | 0:9b334a45a8ff | 137 | HAL_SPI_ERROR_MODF = 0x01, /*!< MODF error */ |
| bogdanm | 0:9b334a45a8ff | 138 | HAL_SPI_ERROR_CRC = 0x02, /*!< CRC error */ |
| bogdanm | 0:9b334a45a8ff | 139 | HAL_SPI_ERROR_OVR = 0x04, /*!< OVR error */ |
| bogdanm | 0:9b334a45a8ff | 140 | HAL_SPI_ERROR_FRE = 0x08, /*!< FRE error */ |
| bogdanm | 0:9b334a45a8ff | 141 | HAL_SPI_ERROR_DMA = 0x10, /*!< DMA transfer error */ |
| bogdanm | 0:9b334a45a8ff | 142 | HAL_SPI_ERROR_FLAG = 0x20, /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */ |
| bogdanm | 0:9b334a45a8ff | 143 | HAL_SPI_ERROR_UNKNOW = 0x40, /*!< Unknow Error error */ |
| bogdanm | 0:9b334a45a8ff | 144 | }HAL_SPI_ErrorTypeDef; |
| bogdanm | 0:9b334a45a8ff | 145 | |
| bogdanm | 0:9b334a45a8ff | 146 | /** |
| bogdanm | 0:9b334a45a8ff | 147 | * @brief SPI handle Structure definition |
| bogdanm | 0:9b334a45a8ff | 148 | */ |
| bogdanm | 0:9b334a45a8ff | 149 | typedef struct __SPI_HandleTypeDef |
| bogdanm | 0:9b334a45a8ff | 150 | { |
| bogdanm | 0:9b334a45a8ff | 151 | SPI_TypeDef *Instance; /* SPI registers base address */ |
| bogdanm | 0:9b334a45a8ff | 152 | |
| bogdanm | 0:9b334a45a8ff | 153 | SPI_InitTypeDef Init; /* SPI communication parameters */ |
| bogdanm | 0:9b334a45a8ff | 154 | |
| bogdanm | 0:9b334a45a8ff | 155 | uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ |
| bogdanm | 0:9b334a45a8ff | 156 | |
| bogdanm | 0:9b334a45a8ff | 157 | uint16_t TxXferSize; /* SPI Tx Transfer size */ |
| bogdanm | 0:9b334a45a8ff | 158 | |
| bogdanm | 0:9b334a45a8ff | 159 | uint16_t TxXferCount; /* SPI Tx Transfer Counter */ |
| bogdanm | 0:9b334a45a8ff | 160 | |
| bogdanm | 0:9b334a45a8ff | 161 | uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ |
| bogdanm | 0:9b334a45a8ff | 162 | |
| bogdanm | 0:9b334a45a8ff | 163 | uint16_t RxXferSize; /* SPI Rx Transfer size */ |
| bogdanm | 0:9b334a45a8ff | 164 | |
| bogdanm | 0:9b334a45a8ff | 165 | uint16_t RxXferCount; /* SPI Rx Transfer Counter */ |
| bogdanm | 0:9b334a45a8ff | 166 | |
| bogdanm | 0:9b334a45a8ff | 167 | uint32_t CRCSize; /* SPI CRC size used for the transfer */ |
| bogdanm | 0:9b334a45a8ff | 168 | |
| bogdanm | 0:9b334a45a8ff | 169 | void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */ |
| bogdanm | 0:9b334a45a8ff | 170 | |
| bogdanm | 0:9b334a45a8ff | 171 | void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */ |
| bogdanm | 0:9b334a45a8ff | 172 | |
| bogdanm | 0:9b334a45a8ff | 173 | DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */ |
| bogdanm | 0:9b334a45a8ff | 174 | |
| bogdanm | 0:9b334a45a8ff | 175 | DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */ |
| bogdanm | 0:9b334a45a8ff | 176 | |
| bogdanm | 0:9b334a45a8ff | 177 | HAL_LockTypeDef Lock; /* Locking object */ |
| bogdanm | 0:9b334a45a8ff | 178 | |
| bogdanm | 0:9b334a45a8ff | 179 | HAL_SPI_StateTypeDef State; /* SPI communication state */ |
| bogdanm | 0:9b334a45a8ff | 180 | |
| bogdanm | 0:9b334a45a8ff | 181 | HAL_SPI_ErrorTypeDef ErrorCode; /* SPI Error code */ |
| bogdanm | 0:9b334a45a8ff | 182 | |
| bogdanm | 0:9b334a45a8ff | 183 | }SPI_HandleTypeDef; |
| bogdanm | 0:9b334a45a8ff | 184 | |
| bogdanm | 0:9b334a45a8ff | 185 | /** |
| bogdanm | 0:9b334a45a8ff | 186 | * @} |
| bogdanm | 0:9b334a45a8ff | 187 | */ |
| bogdanm | 0:9b334a45a8ff | 188 | |
| bogdanm | 0:9b334a45a8ff | 189 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 190 | |
| bogdanm | 0:9b334a45a8ff | 191 | /** @defgroup SPI_Exported_Constants SPI Exported Constants |
| bogdanm | 0:9b334a45a8ff | 192 | * @{ |
| bogdanm | 0:9b334a45a8ff | 193 | */ |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | /** @defgroup SPI_mode SPI mode |
| bogdanm | 0:9b334a45a8ff | 196 | * @{ |
| bogdanm | 0:9b334a45a8ff | 197 | */ |
| bogdanm | 0:9b334a45a8ff | 198 | |
| bogdanm | 0:9b334a45a8ff | 199 | #define SPI_MODE_SLAVE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 200 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
| bogdanm | 0:9b334a45a8ff | 201 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ |
| bogdanm | 0:9b334a45a8ff | 202 | ((MODE) == SPI_MODE_MASTER)) |
| bogdanm | 0:9b334a45a8ff | 203 | /** |
| bogdanm | 0:9b334a45a8ff | 204 | * @} |
| bogdanm | 0:9b334a45a8ff | 205 | */ |
| bogdanm | 0:9b334a45a8ff | 206 | |
| bogdanm | 0:9b334a45a8ff | 207 | /** @defgroup SPI_Direction SPI Direction |
| bogdanm | 0:9b334a45a8ff | 208 | * @{ |
| bogdanm | 0:9b334a45a8ff | 209 | */ |
| bogdanm | 0:9b334a45a8ff | 210 | #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 211 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY |
| bogdanm | 0:9b334a45a8ff | 212 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE |
| bogdanm | 0:9b334a45a8ff | 213 | |
| bogdanm | 0:9b334a45a8ff | 214 | #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ |
| bogdanm | 0:9b334a45a8ff | 215 | ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\ |
| bogdanm | 0:9b334a45a8ff | 216 | ((MODE) == SPI_DIRECTION_1LINE)) |
| bogdanm | 0:9b334a45a8ff | 217 | |
| bogdanm | 0:9b334a45a8ff | 218 | #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) |
| bogdanm | 0:9b334a45a8ff | 219 | |
| bogdanm | 0:9b334a45a8ff | 220 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ |
| bogdanm | 0:9b334a45a8ff | 221 | ((MODE) == SPI_DIRECTION_1LINE)) |
| bogdanm | 0:9b334a45a8ff | 222 | /** |
| bogdanm | 0:9b334a45a8ff | 223 | * @} |
| bogdanm | 0:9b334a45a8ff | 224 | */ |
| bogdanm | 0:9b334a45a8ff | 225 | |
| bogdanm | 0:9b334a45a8ff | 226 | /** @defgroup SPI_data_size SPI data size |
| bogdanm | 0:9b334a45a8ff | 227 | * @{ |
| bogdanm | 0:9b334a45a8ff | 228 | */ |
| bogdanm | 0:9b334a45a8ff | 229 | |
| bogdanm | 0:9b334a45a8ff | 230 | #define SPI_DATASIZE_4BIT ((uint16_t)0x0300) |
| bogdanm | 0:9b334a45a8ff | 231 | #define SPI_DATASIZE_5BIT ((uint16_t)0x0400) |
| bogdanm | 0:9b334a45a8ff | 232 | #define SPI_DATASIZE_6BIT ((uint16_t)0x0500) |
| bogdanm | 0:9b334a45a8ff | 233 | #define SPI_DATASIZE_7BIT ((uint16_t)0x0600) |
| bogdanm | 0:9b334a45a8ff | 234 | #define SPI_DATASIZE_8BIT ((uint16_t)0x0700) |
| bogdanm | 0:9b334a45a8ff | 235 | #define SPI_DATASIZE_9BIT ((uint16_t)0x0800) |
| bogdanm | 0:9b334a45a8ff | 236 | #define SPI_DATASIZE_10BIT ((uint16_t)0x0900) |
| bogdanm | 0:9b334a45a8ff | 237 | #define SPI_DATASIZE_11BIT ((uint16_t)0x0A00) |
| bogdanm | 0:9b334a45a8ff | 238 | #define SPI_DATASIZE_12BIT ((uint16_t)0x0B00) |
| bogdanm | 0:9b334a45a8ff | 239 | #define SPI_DATASIZE_13BIT ((uint16_t)0x0C00) |
| bogdanm | 0:9b334a45a8ff | 240 | #define SPI_DATASIZE_14BIT ((uint16_t)0x0D00) |
| bogdanm | 0:9b334a45a8ff | 241 | #define SPI_DATASIZE_15BIT ((uint16_t)0x0E00) |
| bogdanm | 0:9b334a45a8ff | 242 | #define SPI_DATASIZE_16BIT ((uint16_t)0x0F00) |
| bogdanm | 0:9b334a45a8ff | 243 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 244 | ((DATASIZE) == SPI_DATASIZE_15BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 245 | ((DATASIZE) == SPI_DATASIZE_14BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 246 | ((DATASIZE) == SPI_DATASIZE_13BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 247 | ((DATASIZE) == SPI_DATASIZE_12BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 248 | ((DATASIZE) == SPI_DATASIZE_11BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 249 | ((DATASIZE) == SPI_DATASIZE_10BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 250 | ((DATASIZE) == SPI_DATASIZE_9BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 251 | ((DATASIZE) == SPI_DATASIZE_8BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 252 | ((DATASIZE) == SPI_DATASIZE_7BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 253 | ((DATASIZE) == SPI_DATASIZE_6BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 254 | ((DATASIZE) == SPI_DATASIZE_5BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 255 | ((DATASIZE) == SPI_DATASIZE_4BIT)) |
| bogdanm | 0:9b334a45a8ff | 256 | |
| bogdanm | 0:9b334a45a8ff | 257 | /** |
| bogdanm | 0:9b334a45a8ff | 258 | * @} |
| bogdanm | 0:9b334a45a8ff | 259 | */ |
| bogdanm | 0:9b334a45a8ff | 260 | |
| bogdanm | 0:9b334a45a8ff | 261 | /** @defgroup SPI_Clock_Polarity SPI Clock Polarity |
| bogdanm | 0:9b334a45a8ff | 262 | * @{ |
| bogdanm | 0:9b334a45a8ff | 263 | */ |
| bogdanm | 0:9b334a45a8ff | 264 | |
| bogdanm | 0:9b334a45a8ff | 265 | #define SPI_POLARITY_LOW ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 266 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL |
| bogdanm | 0:9b334a45a8ff | 267 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \ |
| bogdanm | 0:9b334a45a8ff | 268 | ((CPOL) == SPI_POLARITY_HIGH)) |
| bogdanm | 0:9b334a45a8ff | 269 | /** |
| bogdanm | 0:9b334a45a8ff | 270 | * @} |
| bogdanm | 0:9b334a45a8ff | 271 | */ |
| bogdanm | 0:9b334a45a8ff | 272 | |
| bogdanm | 0:9b334a45a8ff | 273 | /** @defgroup SPI_Clock_Phase SPI Clock Phase |
| bogdanm | 0:9b334a45a8ff | 274 | * @{ |
| bogdanm | 0:9b334a45a8ff | 275 | */ |
| bogdanm | 0:9b334a45a8ff | 276 | |
| bogdanm | 0:9b334a45a8ff | 277 | #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 278 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA |
| bogdanm | 0:9b334a45a8ff | 279 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ |
| bogdanm | 0:9b334a45a8ff | 280 | ((CPHA) == SPI_PHASE_2EDGE)) |
| bogdanm | 0:9b334a45a8ff | 281 | /** |
| bogdanm | 0:9b334a45a8ff | 282 | * @} |
| bogdanm | 0:9b334a45a8ff | 283 | */ |
| bogdanm | 0:9b334a45a8ff | 284 | |
| bogdanm | 0:9b334a45a8ff | 285 | /** @defgroup SPI_Slave_Select_management SPI Slave Select management |
| bogdanm | 0:9b334a45a8ff | 286 | * @{ |
| bogdanm | 0:9b334a45a8ff | 287 | */ |
| bogdanm | 0:9b334a45a8ff | 288 | |
| bogdanm | 0:9b334a45a8ff | 289 | #define SPI_NSS_SOFT SPI_CR1_SSM |
| bogdanm | 0:9b334a45a8ff | 290 | #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 291 | #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000) |
| bogdanm | 0:9b334a45a8ff | 292 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ |
| bogdanm | 0:9b334a45a8ff | 293 | ((NSS) == SPI_NSS_HARD_INPUT) || \ |
| bogdanm | 0:9b334a45a8ff | 294 | ((NSS) == SPI_NSS_HARD_OUTPUT)) |
| bogdanm | 0:9b334a45a8ff | 295 | |
| bogdanm | 0:9b334a45a8ff | 296 | /** |
| bogdanm | 0:9b334a45a8ff | 297 | * @} |
| bogdanm | 0:9b334a45a8ff | 298 | */ |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | |
| bogdanm | 0:9b334a45a8ff | 301 | /** @defgroup SPI_NSS SPI NSS pulse management |
| bogdanm | 0:9b334a45a8ff | 302 | * @{ |
| bogdanm | 0:9b334a45a8ff | 303 | */ |
| bogdanm | 0:9b334a45a8ff | 304 | #define SPI_NSS_PULSE_ENABLED SPI_CR2_NSSP |
| bogdanm | 0:9b334a45a8ff | 305 | #define SPI_NSS_PULSE_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 306 | |
| bogdanm | 0:9b334a45a8ff | 307 | #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLED) || \ |
| bogdanm | 0:9b334a45a8ff | 308 | ((NSSP) == SPI_NSS_PULSE_DISABLED)) |
| bogdanm | 0:9b334a45a8ff | 309 | |
| bogdanm | 0:9b334a45a8ff | 310 | /** |
| bogdanm | 0:9b334a45a8ff | 311 | * @} |
| bogdanm | 0:9b334a45a8ff | 312 | */ |
| bogdanm | 0:9b334a45a8ff | 313 | |
| bogdanm | 0:9b334a45a8ff | 314 | |
| bogdanm | 0:9b334a45a8ff | 315 | /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler |
| bogdanm | 0:9b334a45a8ff | 316 | * @{ |
| bogdanm | 0:9b334a45a8ff | 317 | */ |
| bogdanm | 0:9b334a45a8ff | 318 | |
| bogdanm | 0:9b334a45a8ff | 319 | #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 320 | #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008) |
| bogdanm | 0:9b334a45a8ff | 321 | #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010) |
| bogdanm | 0:9b334a45a8ff | 322 | #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018) |
| bogdanm | 0:9b334a45a8ff | 323 | #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020) |
| bogdanm | 0:9b334a45a8ff | 324 | #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028) |
| bogdanm | 0:9b334a45a8ff | 325 | #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030) |
| bogdanm | 0:9b334a45a8ff | 326 | #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038) |
| bogdanm | 0:9b334a45a8ff | 327 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ |
| bogdanm | 0:9b334a45a8ff | 328 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ |
| bogdanm | 0:9b334a45a8ff | 329 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ |
| bogdanm | 0:9b334a45a8ff | 330 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ |
| bogdanm | 0:9b334a45a8ff | 331 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ |
| bogdanm | 0:9b334a45a8ff | 332 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ |
| bogdanm | 0:9b334a45a8ff | 333 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ |
| bogdanm | 0:9b334a45a8ff | 334 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) |
| bogdanm | 0:9b334a45a8ff | 335 | /** |
| bogdanm | 0:9b334a45a8ff | 336 | * @} |
| bogdanm | 0:9b334a45a8ff | 337 | */ |
| bogdanm | 0:9b334a45a8ff | 338 | |
| bogdanm | 0:9b334a45a8ff | 339 | /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission |
| bogdanm | 0:9b334a45a8ff | 340 | * @{ |
| bogdanm | 0:9b334a45a8ff | 341 | */ |
| bogdanm | 0:9b334a45a8ff | 342 | |
| bogdanm | 0:9b334a45a8ff | 343 | #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 344 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST |
| bogdanm | 0:9b334a45a8ff | 345 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ |
| bogdanm | 0:9b334a45a8ff | 346 | ((BIT) == SPI_FIRSTBIT_LSB)) |
| bogdanm | 0:9b334a45a8ff | 347 | /** |
| bogdanm | 0:9b334a45a8ff | 348 | * @} |
| bogdanm | 0:9b334a45a8ff | 349 | */ |
| bogdanm | 0:9b334a45a8ff | 350 | |
| bogdanm | 0:9b334a45a8ff | 351 | /** @defgroup SPI_TI_mode SPI TI mode |
| bogdanm | 0:9b334a45a8ff | 352 | * @{ |
| bogdanm | 0:9b334a45a8ff | 353 | */ |
| bogdanm | 0:9b334a45a8ff | 354 | |
| bogdanm | 0:9b334a45a8ff | 355 | #define SPI_TIMODE_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 356 | #define SPI_TIMODE_ENABLED SPI_CR2_FRF |
| bogdanm | 0:9b334a45a8ff | 357 | #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \ |
| bogdanm | 0:9b334a45a8ff | 358 | ((MODE) == SPI_TIMODE_ENABLED)) |
| bogdanm | 0:9b334a45a8ff | 359 | /** |
| bogdanm | 0:9b334a45a8ff | 360 | * @} |
| bogdanm | 0:9b334a45a8ff | 361 | */ |
| bogdanm | 0:9b334a45a8ff | 362 | |
| bogdanm | 0:9b334a45a8ff | 363 | /** @defgroup SPI_CRC_Calculation SPI CRC Calculation |
| bogdanm | 0:9b334a45a8ff | 364 | * @{ |
| bogdanm | 0:9b334a45a8ff | 365 | */ |
| bogdanm | 0:9b334a45a8ff | 366 | |
| bogdanm | 0:9b334a45a8ff | 367 | #define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 0:9b334a45a8ff | 368 | #define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN |
| bogdanm | 0:9b334a45a8ff | 369 | #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \ |
| bogdanm | 0:9b334a45a8ff | 370 | ((CALCULATION) == SPI_CRCCALCULATION_ENABLED)) |
| bogdanm | 0:9b334a45a8ff | 371 | /** |
| bogdanm | 0:9b334a45a8ff | 372 | * @} |
| bogdanm | 0:9b334a45a8ff | 373 | */ |
| bogdanm | 0:9b334a45a8ff | 374 | |
| bogdanm | 0:9b334a45a8ff | 375 | /** @defgroup SPI_CRC_length SPI CRC length |
| bogdanm | 0:9b334a45a8ff | 376 | * @{ |
| bogdanm | 0:9b334a45a8ff | 377 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 378 | * SPI_CRC_LENGTH_DATASIZE: aligned with the data size |
| bogdanm | 0:9b334a45a8ff | 379 | * SPI_CRC_LENGTH_8BIT : CRC 8bit |
| bogdanm | 0:9b334a45a8ff | 380 | * SPI_CRC_LENGTH_16BIT : CRC 16bit |
| bogdanm | 0:9b334a45a8ff | 381 | */ |
| bogdanm | 0:9b334a45a8ff | 382 | #define SPI_CRC_LENGTH_DATASIZE 0 |
| bogdanm | 0:9b334a45a8ff | 383 | #define SPI_CRC_LENGTH_8BIT 1 |
| bogdanm | 0:9b334a45a8ff | 384 | #define SPI_CRC_LENGTH_16BIT 2 |
| bogdanm | 0:9b334a45a8ff | 385 | #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\ |
| bogdanm | 0:9b334a45a8ff | 386 | ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \ |
| bogdanm | 0:9b334a45a8ff | 387 | ((LENGTH) == SPI_CRC_LENGTH_16BIT)) |
| bogdanm | 0:9b334a45a8ff | 388 | /** |
| bogdanm | 0:9b334a45a8ff | 389 | * @} |
| bogdanm | 0:9b334a45a8ff | 390 | */ |
| bogdanm | 0:9b334a45a8ff | 391 | |
| bogdanm | 0:9b334a45a8ff | 392 | /** @defgroup SPI_FIFO_reception_threshold SPI FIFO reception threshold |
| bogdanm | 0:9b334a45a8ff | 393 | * @{ |
| bogdanm | 0:9b334a45a8ff | 394 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 395 | * SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO |
| bogdanm | 0:9b334a45a8ff | 396 | * level is greater or equal to 1/2(16-bits). |
| bogdanm | 0:9b334a45a8ff | 397 | * SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO |
| bogdanm | 0:9b334a45a8ff | 398 | * level is greater or equal to 1/4(8 bits). |
| bogdanm | 0:9b334a45a8ff | 399 | */ |
| bogdanm | 0:9b334a45a8ff | 400 | #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH |
| bogdanm | 0:9b334a45a8ff | 401 | #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH |
| bogdanm | 0:9b334a45a8ff | 402 | #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x0) |
| bogdanm | 0:9b334a45a8ff | 403 | |
| bogdanm | 0:9b334a45a8ff | 404 | /** |
| bogdanm | 0:9b334a45a8ff | 405 | * @} |
| bogdanm | 0:9b334a45a8ff | 406 | */ |
| bogdanm | 0:9b334a45a8ff | 407 | |
| bogdanm | 0:9b334a45a8ff | 408 | /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition |
| bogdanm | 0:9b334a45a8ff | 409 | * @brief SPI Interrupt definition |
| bogdanm | 0:9b334a45a8ff | 410 | * Elements values convention: 0xXXXXXXXX |
| bogdanm | 0:9b334a45a8ff | 411 | * - XXXXXXXX : Interrupt control mask |
| bogdanm | 0:9b334a45a8ff | 412 | * @{ |
| bogdanm | 0:9b334a45a8ff | 413 | */ |
| bogdanm | 0:9b334a45a8ff | 414 | #define SPI_IT_TXE SPI_CR2_TXEIE |
| bogdanm | 0:9b334a45a8ff | 415 | #define SPI_IT_RXNE SPI_CR2_RXNEIE |
| bogdanm | 0:9b334a45a8ff | 416 | #define SPI_IT_ERR SPI_CR2_ERRIE |
| bogdanm | 0:9b334a45a8ff | 417 | #define IS_SPI_IT(IT) (((IT) == SPI_IT_TXE) || \ |
| bogdanm | 0:9b334a45a8ff | 418 | ((IT) == SPI_IT_RXNE) || \ |
| bogdanm | 0:9b334a45a8ff | 419 | ((IT) == SPI_IT_ERR)) |
| bogdanm | 0:9b334a45a8ff | 420 | /** |
| bogdanm | 0:9b334a45a8ff | 421 | * @} |
| bogdanm | 0:9b334a45a8ff | 422 | */ |
| bogdanm | 0:9b334a45a8ff | 423 | |
| bogdanm | 0:9b334a45a8ff | 424 | |
| bogdanm | 0:9b334a45a8ff | 425 | /** @defgroup SPI_Flag_definition SPI Flag definition |
| bogdanm | 0:9b334a45a8ff | 426 | * @brief Flag definition |
| bogdanm | 0:9b334a45a8ff | 427 | * Elements values convention: 0xXXXXYYYY |
| bogdanm | 0:9b334a45a8ff | 428 | * - XXXX : Flag register Index |
| bogdanm | 0:9b334a45a8ff | 429 | * - YYYY : Flag mask |
| bogdanm | 0:9b334a45a8ff | 430 | * @{ |
| bogdanm | 0:9b334a45a8ff | 431 | */ |
| bogdanm | 0:9b334a45a8ff | 432 | #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ |
| bogdanm | 0:9b334a45a8ff | 433 | #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ |
| bogdanm | 0:9b334a45a8ff | 434 | #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ |
| bogdanm | 0:9b334a45a8ff | 435 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ |
| bogdanm | 0:9b334a45a8ff | 436 | #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ |
| bogdanm | 0:9b334a45a8ff | 437 | #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ |
| bogdanm | 0:9b334a45a8ff | 438 | #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ |
| bogdanm | 0:9b334a45a8ff | 439 | #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */ |
| bogdanm | 0:9b334a45a8ff | 440 | #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */ |
| bogdanm | 0:9b334a45a8ff | 441 | #define IS_SPI_FLAG(FLAG) (((FLAG) == SPI_FLAG_RXNE) || \ |
| bogdanm | 0:9b334a45a8ff | 442 | ((FLAG) == SPI_FLAG_TXE) || \ |
| bogdanm | 0:9b334a45a8ff | 443 | ((FLAG) == SPI_FLAG_BSY) || \ |
| bogdanm | 0:9b334a45a8ff | 444 | ((FLAG) == SPI_FLAG_CRCERR)|| \ |
| bogdanm | 0:9b334a45a8ff | 445 | ((FLAG) == SPI_FLAG_MODF) || \ |
| bogdanm | 0:9b334a45a8ff | 446 | ((FLAG) == SPI_FLAG_OVR) || \ |
| bogdanm | 0:9b334a45a8ff | 447 | ((FLAG) == SPI_FLAG_FTLVL) || \ |
| bogdanm | 0:9b334a45a8ff | 448 | ((FLAG) == SPI_FLAG_FRLVL) || \ |
| bogdanm | 0:9b334a45a8ff | 449 | ((FLAG) == SPI_IT_FRE)) |
| bogdanm | 0:9b334a45a8ff | 450 | /** |
| bogdanm | 0:9b334a45a8ff | 451 | * @} |
| bogdanm | 0:9b334a45a8ff | 452 | */ |
| bogdanm | 0:9b334a45a8ff | 453 | |
| bogdanm | 0:9b334a45a8ff | 454 | |
| bogdanm | 0:9b334a45a8ff | 455 | /** @defgroup SPI_transmission_fifo_status_level SPI transmission fifo status level |
| bogdanm | 0:9b334a45a8ff | 456 | * @{ |
| bogdanm | 0:9b334a45a8ff | 457 | */ |
| bogdanm | 0:9b334a45a8ff | 458 | |
| bogdanm | 0:9b334a45a8ff | 459 | #define SPI_FTLVL_EMPTY ((uint16_t)0x0000) |
| bogdanm | 0:9b334a45a8ff | 460 | #define SPI_FTLVL_QUARTER_FULL ((uint16_t)0x0800) |
| bogdanm | 0:9b334a45a8ff | 461 | #define SPI_FTLVL_HALF_FULL ((uint16_t)0x1000) |
| bogdanm | 0:9b334a45a8ff | 462 | #define SPI_FTLVL_FULL ((uint16_t)0x1800) |
| bogdanm | 0:9b334a45a8ff | 463 | |
| bogdanm | 0:9b334a45a8ff | 464 | |
| bogdanm | 0:9b334a45a8ff | 465 | /** |
| bogdanm | 0:9b334a45a8ff | 466 | * @} |
| bogdanm | 0:9b334a45a8ff | 467 | */ |
| bogdanm | 0:9b334a45a8ff | 468 | |
| bogdanm | 0:9b334a45a8ff | 469 | /** @defgroup SPI_reception_fifo_status_level SPI reception fifo status level |
| bogdanm | 0:9b334a45a8ff | 470 | * @{ |
| bogdanm | 0:9b334a45a8ff | 471 | */ |
| bogdanm | 0:9b334a45a8ff | 472 | #define SPI_FRLVL_EMPTY ((uint16_t)0x0000) |
| bogdanm | 0:9b334a45a8ff | 473 | #define SPI_FRLVL_QUARTER_FULL ((uint16_t)0x0200) |
| bogdanm | 0:9b334a45a8ff | 474 | #define SPI_FRLVL_HALF_FULL ((uint16_t)0x0400) |
| bogdanm | 0:9b334a45a8ff | 475 | #define SPI_FRLVL_FULL ((uint16_t)0x0600) |
| bogdanm | 0:9b334a45a8ff | 476 | |
| bogdanm | 0:9b334a45a8ff | 477 | /** |
| bogdanm | 0:9b334a45a8ff | 478 | * @} |
| bogdanm | 0:9b334a45a8ff | 479 | */ |
| bogdanm | 0:9b334a45a8ff | 480 | |
| bogdanm | 0:9b334a45a8ff | 481 | /** |
| bogdanm | 0:9b334a45a8ff | 482 | * @} |
| bogdanm | 0:9b334a45a8ff | 483 | */ |
| bogdanm | 0:9b334a45a8ff | 484 | |
| bogdanm | 0:9b334a45a8ff | 485 | |
| bogdanm | 0:9b334a45a8ff | 486 | /* Exported macros ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 487 | /** @defgroup SPI_Exported_Macros SPI Exported Macros |
| bogdanm | 0:9b334a45a8ff | 488 | * @{ |
| bogdanm | 0:9b334a45a8ff | 489 | */ |
| bogdanm | 0:9b334a45a8ff | 490 | |
| bogdanm | 0:9b334a45a8ff | 491 | /** @brief Reset SPI handle state |
| bogdanm | 0:9b334a45a8ff | 492 | * @param __HANDLE__: SPI handle. |
| bogdanm | 0:9b334a45a8ff | 493 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 494 | */ |
| bogdanm | 0:9b334a45a8ff | 495 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) |
| bogdanm | 0:9b334a45a8ff | 496 | |
| bogdanm | 0:9b334a45a8ff | 497 | /** @brief Enables or disables the specified SPI interrupts. |
| bogdanm | 0:9b334a45a8ff | 498 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 499 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 500 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| bogdanm | 0:9b334a45a8ff | 501 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 502 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| bogdanm | 0:9b334a45a8ff | 503 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| bogdanm | 0:9b334a45a8ff | 504 | * @arg SPI_IT_ERR: Error interrupt enable |
| bogdanm | 0:9b334a45a8ff | 505 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 506 | */ |
| bogdanm | 0:9b334a45a8ff | 507 | |
| bogdanm | 0:9b334a45a8ff | 508 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
| bogdanm | 0:9b334a45a8ff | 509 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) |
| bogdanm | 0:9b334a45a8ff | 510 | |
| bogdanm | 0:9b334a45a8ff | 511 | /** @brief Checks if the specified SPI interrupt source is enabled or disabled. |
| bogdanm | 0:9b334a45a8ff | 512 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 513 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 514 | * @param __INTERRUPT__: specifies the SPI interrupt source to check. |
| bogdanm | 0:9b334a45a8ff | 515 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 516 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| bogdanm | 0:9b334a45a8ff | 517 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| bogdanm | 0:9b334a45a8ff | 518 | * @arg SPI_IT_ERR: Error interrupt enable |
| bogdanm | 0:9b334a45a8ff | 519 | * @retval The new state of __IT__ (TRUE or FALSE). |
| bogdanm | 0:9b334a45a8ff | 520 | */ |
| bogdanm | 0:9b334a45a8ff | 521 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| bogdanm | 0:9b334a45a8ff | 522 | |
| bogdanm | 0:9b334a45a8ff | 523 | /** @brief Checks whether the specified SPI flag is set or not. |
| bogdanm | 0:9b334a45a8ff | 524 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 525 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 526 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 0:9b334a45a8ff | 527 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 528 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
| bogdanm | 0:9b334a45a8ff | 529 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
| bogdanm | 0:9b334a45a8ff | 530 | * @arg SPI_FLAG_CRCERR: CRC error flag |
| bogdanm | 0:9b334a45a8ff | 531 | * @arg SPI_FLAG_MODF: Mode fault flag |
| bogdanm | 0:9b334a45a8ff | 532 | * @arg SPI_FLAG_OVR: Overrun flag |
| bogdanm | 0:9b334a45a8ff | 533 | * @arg SPI_FLAG_BSY: Busy flag |
| bogdanm | 0:9b334a45a8ff | 534 | * @arg SPI_FLAG_FRE: Frame format error flag |
| bogdanm | 0:9b334a45a8ff | 535 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 0:9b334a45a8ff | 536 | */ |
| bogdanm | 0:9b334a45a8ff | 537 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| bogdanm | 0:9b334a45a8ff | 538 | |
| bogdanm | 0:9b334a45a8ff | 539 | /** @brief Clears the SPI CRCERR pending flag. |
| bogdanm | 0:9b334a45a8ff | 540 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 541 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 542 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 543 | */ |
| bogdanm | 0:9b334a45a8ff | 544 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR)) |
| bogdanm | 0:9b334a45a8ff | 545 | |
| bogdanm | 0:9b334a45a8ff | 546 | /** @brief Clears the SPI MODF pending flag. |
| bogdanm | 0:9b334a45a8ff | 547 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 548 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 549 | * |
| bogdanm | 0:9b334a45a8ff | 550 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 551 | */ |
| bogdanm | 0:9b334a45a8ff | 552 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\ |
| bogdanm | 0:9b334a45a8ff | 553 | (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);}while(0) |
| bogdanm | 0:9b334a45a8ff | 554 | |
| bogdanm | 0:9b334a45a8ff | 555 | /** @brief Clears the SPI OVR pending flag. |
| bogdanm | 0:9b334a45a8ff | 556 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 557 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 558 | * |
| bogdanm | 0:9b334a45a8ff | 559 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 560 | */ |
| bogdanm | 0:9b334a45a8ff | 561 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\ |
| bogdanm | 0:9b334a45a8ff | 562 | (__HANDLE__)->Instance->SR;}while(0) |
| bogdanm | 0:9b334a45a8ff | 563 | |
| bogdanm | 0:9b334a45a8ff | 564 | /** @brief Clears the SPI FRE pending flag. |
| bogdanm | 0:9b334a45a8ff | 565 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 566 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 567 | * |
| bogdanm | 0:9b334a45a8ff | 568 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 569 | */ |
| bogdanm | 0:9b334a45a8ff | 570 | #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR) |
| bogdanm | 0:9b334a45a8ff | 571 | |
| bogdanm | 0:9b334a45a8ff | 572 | /** @brief Enables the SPI. |
| bogdanm | 0:9b334a45a8ff | 573 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 574 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 575 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 576 | */ |
| bogdanm | 0:9b334a45a8ff | 577 | #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE) |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | /** @brief Disables the SPI. |
| bogdanm | 0:9b334a45a8ff | 580 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 581 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 582 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 583 | */ |
| bogdanm | 0:9b334a45a8ff | 584 | #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE) |
| bogdanm | 0:9b334a45a8ff | 585 | |
| bogdanm | 0:9b334a45a8ff | 586 | /** @brief Sets the SPI transmit-only mode. |
| bogdanm | 0:9b334a45a8ff | 587 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 588 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 589 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 590 | */ |
| bogdanm | 0:9b334a45a8ff | 591 | #define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE) |
| bogdanm | 0:9b334a45a8ff | 592 | |
| bogdanm | 0:9b334a45a8ff | 593 | /** @brief Sets the SPI receive-only mode. |
| bogdanm | 0:9b334a45a8ff | 594 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 595 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 596 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 597 | */ |
| bogdanm | 0:9b334a45a8ff | 598 | #define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE) |
| bogdanm | 0:9b334a45a8ff | 599 | |
| bogdanm | 0:9b334a45a8ff | 600 | /** @brief Resets the CRC calculation of the SPI. |
| bogdanm | 0:9b334a45a8ff | 601 | * @param __HANDLE__: specifies the SPI Handle. |
| bogdanm | 0:9b334a45a8ff | 602 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| bogdanm | 0:9b334a45a8ff | 603 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 604 | */ |
| bogdanm | 0:9b334a45a8ff | 605 | #define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\ |
| bogdanm | 0:9b334a45a8ff | 606 | (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0) |
| bogdanm | 0:9b334a45a8ff | 607 | |
| bogdanm | 0:9b334a45a8ff | 608 | |
| bogdanm | 0:9b334a45a8ff | 609 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF)) |
| bogdanm | 0:9b334a45a8ff | 610 | /** |
| bogdanm | 0:9b334a45a8ff | 611 | * @} |
| bogdanm | 0:9b334a45a8ff | 612 | */ |
| bogdanm | 0:9b334a45a8ff | 613 | |
| bogdanm | 0:9b334a45a8ff | 614 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 615 | /** @addtogroup SPI_Exported_Functions SPI Exported Functions |
| bogdanm | 0:9b334a45a8ff | 616 | * @{ |
| bogdanm | 0:9b334a45a8ff | 617 | */ |
| bogdanm | 0:9b334a45a8ff | 618 | |
| bogdanm | 0:9b334a45a8ff | 619 | /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions |
| bogdanm | 0:9b334a45a8ff | 620 | * @{ |
| bogdanm | 0:9b334a45a8ff | 621 | */ |
| bogdanm | 0:9b334a45a8ff | 622 | |
| bogdanm | 0:9b334a45a8ff | 623 | /* Initialization and de-initialization functions ****************************/ |
| bogdanm | 0:9b334a45a8ff | 624 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 625 | HAL_StatusTypeDef HAL_SPI_InitExtended(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 626 | HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 627 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 628 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 629 | /** |
| bogdanm | 0:9b334a45a8ff | 630 | * @} |
| bogdanm | 0:9b334a45a8ff | 631 | */ |
| bogdanm | 0:9b334a45a8ff | 632 | |
| bogdanm | 0:9b334a45a8ff | 633 | /** @addtogroup SPI_Exported_Functions_Group2 Input and Output operation functions |
| bogdanm | 0:9b334a45a8ff | 634 | * @{ |
| bogdanm | 0:9b334a45a8ff | 635 | */ |
| bogdanm | 0:9b334a45a8ff | 636 | |
| bogdanm | 0:9b334a45a8ff | 637 | /* IO operation functions *****************************************************/ |
| bogdanm | 0:9b334a45a8ff | 638 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 639 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 640 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 0:9b334a45a8ff | 641 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 642 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 643 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 644 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 645 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 646 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| bogdanm | 0:9b334a45a8ff | 647 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 648 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 649 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 650 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 651 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 652 | /** |
| bogdanm | 0:9b334a45a8ff | 653 | * @} |
| bogdanm | 0:9b334a45a8ff | 654 | */ |
| bogdanm | 0:9b334a45a8ff | 655 | |
| bogdanm | 0:9b334a45a8ff | 656 | /** @addtogroup SPI_Exported_Functions_Group3 Peripheral Control functions |
| bogdanm | 0:9b334a45a8ff | 657 | * @{ |
| bogdanm | 0:9b334a45a8ff | 658 | */ |
| bogdanm | 0:9b334a45a8ff | 659 | |
| bogdanm | 0:9b334a45a8ff | 660 | /* Peripheral State and Error functions ***************************************/ |
| bogdanm | 0:9b334a45a8ff | 661 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); |
| bogdanm | 0:9b334a45a8ff | 662 | /** |
| bogdanm | 0:9b334a45a8ff | 663 | * @} |
| bogdanm | 0:9b334a45a8ff | 664 | */ |
| bogdanm | 0:9b334a45a8ff | 665 | |
| bogdanm | 0:9b334a45a8ff | 666 | /** |
| bogdanm | 0:9b334a45a8ff | 667 | * @} |
| bogdanm | 0:9b334a45a8ff | 668 | */ |
| bogdanm | 0:9b334a45a8ff | 669 | |
| bogdanm | 0:9b334a45a8ff | 670 | /** |
| bogdanm | 0:9b334a45a8ff | 671 | * @} |
| bogdanm | 0:9b334a45a8ff | 672 | */ |
| bogdanm | 0:9b334a45a8ff | 673 | |
| bogdanm | 0:9b334a45a8ff | 674 | /** |
| bogdanm | 0:9b334a45a8ff | 675 | * @} |
| bogdanm | 0:9b334a45a8ff | 676 | */ |
| bogdanm | 0:9b334a45a8ff | 677 | |
| bogdanm | 0:9b334a45a8ff | 678 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 679 | } |
| bogdanm | 0:9b334a45a8ff | 680 | #endif |
| bogdanm | 0:9b334a45a8ff | 681 | |
| bogdanm | 0:9b334a45a8ff | 682 | #endif /* __STM32F3xx_HAL_SPI_H */ |
| bogdanm | 0:9b334a45a8ff | 683 | |
| bogdanm | 0:9b334a45a8ff | 684 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |