en 129
fix LPC812 PWM
Fork of
mbed-dev
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_nor.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f3xx_hal_nor.c |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.1.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 12-Sept-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief NOR HAL module driver. |
| bogdanm | 0:9b334a45a8ff | 8 | * This file provides a generic firmware to drive NOR memories mounted |
| bogdanm | 0:9b334a45a8ff | 9 | * as external device. |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 12 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 13 | ##### How to use this driver ##### |
| bogdanm | 0:9b334a45a8ff | 14 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 15 | [..] |
| bogdanm | 0:9b334a45a8ff | 16 | This driver is a generic layered driver which contains a set of APIs used to |
| bogdanm | 0:9b334a45a8ff | 17 | control NOR flash memories. It uses the FMC layer functions to interface |
| bogdanm | 0:9b334a45a8ff | 18 | with NOR devices. This driver is used as follows: |
| bogdanm | 0:9b334a45a8ff | 19 | |
| bogdanm | 0:9b334a45a8ff | 20 | (+) NOR flash memory configuration sequence using the function HAL_NOR_Init() |
| bogdanm | 0:9b334a45a8ff | 21 | with control and timing parameters for both normal and extended mode. |
| bogdanm | 0:9b334a45a8ff | 22 | |
| bogdanm | 0:9b334a45a8ff | 23 | (+) Read NOR flash memory manufacturer code and device IDs using the function |
| bogdanm | 0:9b334a45a8ff | 24 | HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef |
| bogdanm | 0:9b334a45a8ff | 25 | structure declared by the function caller. |
| bogdanm | 0:9b334a45a8ff | 26 | |
| bogdanm | 0:9b334a45a8ff | 27 | (+) Access NOR flash memory by read/write data unit operations using the functions |
| bogdanm | 0:9b334a45a8ff | 28 | HAL_NOR_Read(), HAL_NOR_Program(). |
| bogdanm | 0:9b334a45a8ff | 29 | |
| bogdanm | 0:9b334a45a8ff | 30 | (+) Perform NOR flash erase block/chip operations using the functions |
| bogdanm | 0:9b334a45a8ff | 31 | HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip(). |
| bogdanm | 0:9b334a45a8ff | 32 | |
| bogdanm | 0:9b334a45a8ff | 33 | (+) Read the NOR flash CFI (common flash interface) IDs using the function |
| bogdanm | 0:9b334a45a8ff | 34 | HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef |
| bogdanm | 0:9b334a45a8ff | 35 | structure declared by the function caller. |
| bogdanm | 0:9b334a45a8ff | 36 | |
| bogdanm | 0:9b334a45a8ff | 37 | (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/ |
| bogdanm | 0:9b334a45a8ff | 38 | HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation |
| bogdanm | 0:9b334a45a8ff | 39 | |
| bogdanm | 0:9b334a45a8ff | 40 | (+) You can monitor the NOR device HAL state by calling the function |
| bogdanm | 0:9b334a45a8ff | 41 | HAL_NOR_GetState() |
| bogdanm | 0:9b334a45a8ff | 42 | [..] |
| bogdanm | 0:9b334a45a8ff | 43 | (@) This driver is a set of generic APIs which handle standard NOR flash operations. |
| bogdanm | 0:9b334a45a8ff | 44 | If a NOR flash device contains different operations and/or implementations, |
| bogdanm | 0:9b334a45a8ff | 45 | it should be implemented separately. |
| bogdanm | 0:9b334a45a8ff | 46 | |
| bogdanm | 0:9b334a45a8ff | 47 | *** NOR HAL driver macros list *** |
| bogdanm | 0:9b334a45a8ff | 48 | ============================================= |
| bogdanm | 0:9b334a45a8ff | 49 | [..] |
| bogdanm | 0:9b334a45a8ff | 50 | Below the list of most used macros in NOR HAL driver. |
| bogdanm | 0:9b334a45a8ff | 51 | |
| bogdanm | 0:9b334a45a8ff | 52 | (+) __NOR_WRITE : NOR memory write data to specified address |
| bogdanm | 0:9b334a45a8ff | 53 | |
| bogdanm | 0:9b334a45a8ff | 54 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 55 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 56 | * @attention |
| bogdanm | 0:9b334a45a8ff | 57 | * |
| bogdanm | 0:9b334a45a8ff | 58 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 59 | * |
| bogdanm | 0:9b334a45a8ff | 60 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 61 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 62 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 63 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 64 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 65 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 66 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 67 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 68 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 69 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 70 | * |
| bogdanm | 0:9b334a45a8ff | 71 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 72 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 73 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 74 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 75 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 76 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 77 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 78 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 79 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 80 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 81 | * |
| bogdanm | 0:9b334a45a8ff | 82 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 83 | */ |
| bogdanm | 0:9b334a45a8ff | 84 | |
| bogdanm | 0:9b334a45a8ff | 85 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 86 | #include "stm32f3xx_hal.h" |
| bogdanm | 0:9b334a45a8ff | 87 | |
| bogdanm | 0:9b334a45a8ff | 88 | /** @addtogroup STM32F3xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 89 | * @{ |
| bogdanm | 0:9b334a45a8ff | 90 | */ |
| bogdanm | 0:9b334a45a8ff | 91 | |
| bogdanm | 0:9b334a45a8ff | 92 | /** @defgroup NOR NOR HAL module driver |
| bogdanm | 0:9b334a45a8ff | 93 | * @brief NOR HAL module driver |
| bogdanm | 0:9b334a45a8ff | 94 | * @{ |
| bogdanm | 0:9b334a45a8ff | 95 | */ |
| bogdanm | 0:9b334a45a8ff | 96 | #ifdef HAL_NOR_MODULE_ENABLED |
| bogdanm | 0:9b334a45a8ff | 97 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) |
| bogdanm | 0:9b334a45a8ff | 98 | |
| bogdanm | 0:9b334a45a8ff | 99 | /* Private typedef -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 100 | /* Private define ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 101 | /* Private macro -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 102 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 103 | /** @defgroup NOR_Private_Variables NOR Private Variables |
| bogdanm | 0:9b334a45a8ff | 104 | * @{ |
| bogdanm | 0:9b334a45a8ff | 105 | */ |
| bogdanm | 0:9b334a45a8ff | 106 | static uint32_t uwNORAddress = NOR_MEMORY_ADRESS1; |
| bogdanm | 0:9b334a45a8ff | 107 | static uint32_t uwNORMememoryDataWidth = NOR_MEMORY_8B; |
| bogdanm | 0:9b334a45a8ff | 108 | /** |
| bogdanm | 0:9b334a45a8ff | 109 | * @} |
| bogdanm | 0:9b334a45a8ff | 110 | */ |
| bogdanm | 0:9b334a45a8ff | 111 | |
| bogdanm | 0:9b334a45a8ff | 112 | /* Exported functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 113 | |
| bogdanm | 0:9b334a45a8ff | 114 | /** @defgroup NOR_Exported_Functions NOR Exported Functions |
| bogdanm | 0:9b334a45a8ff | 115 | * @{ |
| bogdanm | 0:9b334a45a8ff | 116 | */ |
| bogdanm | 0:9b334a45a8ff | 117 | |
| bogdanm | 0:9b334a45a8ff | 118 | /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions |
| bogdanm | 0:9b334a45a8ff | 119 | * @brief Initialization and Configuration functions |
| bogdanm | 0:9b334a45a8ff | 120 | * |
| bogdanm | 0:9b334a45a8ff | 121 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 122 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 123 | ##### NOR Initialization and de_initialization functions ##### |
| bogdanm | 0:9b334a45a8ff | 124 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 125 | [..] |
| bogdanm | 0:9b334a45a8ff | 126 | This section provides functions allowing to initialize/de-initialize |
| bogdanm | 0:9b334a45a8ff | 127 | the NOR memory |
| bogdanm | 0:9b334a45a8ff | 128 | |
| bogdanm | 0:9b334a45a8ff | 129 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 130 | * @{ |
| bogdanm | 0:9b334a45a8ff | 131 | */ |
| bogdanm | 0:9b334a45a8ff | 132 | |
| bogdanm | 0:9b334a45a8ff | 133 | /** |
| bogdanm | 0:9b334a45a8ff | 134 | * @brief Perform the NOR memory Initialization sequence |
| bogdanm | 0:9b334a45a8ff | 135 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 136 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 137 | * @param Timing: pointer to NOR control timing structure |
| bogdanm | 0:9b334a45a8ff | 138 | * @param ExtTiming: pointer to NOR extended mode timing structure |
| bogdanm | 0:9b334a45a8ff | 139 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 140 | */ |
| bogdanm | 0:9b334a45a8ff | 141 | HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) |
| bogdanm | 0:9b334a45a8ff | 142 | { |
| bogdanm | 0:9b334a45a8ff | 143 | /* Check the NOR handle parameter */ |
| bogdanm | 0:9b334a45a8ff | 144 | if(hnor == HAL_NULL) |
| bogdanm | 0:9b334a45a8ff | 145 | { |
| bogdanm | 0:9b334a45a8ff | 146 | return HAL_ERROR; |
| bogdanm | 0:9b334a45a8ff | 147 | } |
| bogdanm | 0:9b334a45a8ff | 148 | |
| bogdanm | 0:9b334a45a8ff | 149 | if(hnor->State == HAL_NOR_STATE_RESET) |
| bogdanm | 0:9b334a45a8ff | 150 | { |
| bogdanm | 0:9b334a45a8ff | 151 | /* Initialize the low level hardware (MSP) */ |
| bogdanm | 0:9b334a45a8ff | 152 | HAL_NOR_MspInit(hnor); |
| bogdanm | 0:9b334a45a8ff | 153 | } |
| bogdanm | 0:9b334a45a8ff | 154 | |
| bogdanm | 0:9b334a45a8ff | 155 | /* Initialize NOR control Interface */ |
| bogdanm | 0:9b334a45a8ff | 156 | FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init)); |
| bogdanm | 0:9b334a45a8ff | 157 | |
| bogdanm | 0:9b334a45a8ff | 158 | /* Initialize NOR timing Interface */ |
| bogdanm | 0:9b334a45a8ff | 159 | FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank); |
| bogdanm | 0:9b334a45a8ff | 160 | |
| bogdanm | 0:9b334a45a8ff | 161 | /* Initialize NOR extended mode timing Interface */ |
| bogdanm | 0:9b334a45a8ff | 162 | FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode); |
| bogdanm | 0:9b334a45a8ff | 163 | |
| bogdanm | 0:9b334a45a8ff | 164 | /* Enable the NORSRAM device */ |
| bogdanm | 0:9b334a45a8ff | 165 | __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank); |
| bogdanm | 0:9b334a45a8ff | 166 | |
| bogdanm | 0:9b334a45a8ff | 167 | /* Initialize NOR address mapped by FMC */ |
| bogdanm | 0:9b334a45a8ff | 168 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
| bogdanm | 0:9b334a45a8ff | 169 | { |
| bogdanm | 0:9b334a45a8ff | 170 | uwNORAddress = NOR_MEMORY_ADRESS1; |
| bogdanm | 0:9b334a45a8ff | 171 | } |
| bogdanm | 0:9b334a45a8ff | 172 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
| bogdanm | 0:9b334a45a8ff | 173 | { |
| bogdanm | 0:9b334a45a8ff | 174 | uwNORAddress = NOR_MEMORY_ADRESS2; |
| bogdanm | 0:9b334a45a8ff | 175 | } |
| bogdanm | 0:9b334a45a8ff | 176 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
| bogdanm | 0:9b334a45a8ff | 177 | { |
| bogdanm | 0:9b334a45a8ff | 178 | uwNORAddress = NOR_MEMORY_ADRESS3; |
| bogdanm | 0:9b334a45a8ff | 179 | } |
| bogdanm | 0:9b334a45a8ff | 180 | else |
| bogdanm | 0:9b334a45a8ff | 181 | { |
| bogdanm | 0:9b334a45a8ff | 182 | uwNORAddress = NOR_MEMORY_ADRESS4; |
| bogdanm | 0:9b334a45a8ff | 183 | } |
| bogdanm | 0:9b334a45a8ff | 184 | |
| bogdanm | 0:9b334a45a8ff | 185 | /* Initialize NOR Memory Data Width*/ |
| bogdanm | 0:9b334a45a8ff | 186 | if (hnor->Init.MemoryDataWidth == FMC_NORSRAM_MEM_BUS_WIDTH_8) |
| bogdanm | 0:9b334a45a8ff | 187 | { |
| bogdanm | 0:9b334a45a8ff | 188 | uwNORMememoryDataWidth = NOR_MEMORY_8B; |
| bogdanm | 0:9b334a45a8ff | 189 | } |
| bogdanm | 0:9b334a45a8ff | 190 | else |
| bogdanm | 0:9b334a45a8ff | 191 | { |
| bogdanm | 0:9b334a45a8ff | 192 | uwNORMememoryDataWidth = NOR_MEMORY_16B; |
| bogdanm | 0:9b334a45a8ff | 193 | } |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 196 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 197 | |
| bogdanm | 0:9b334a45a8ff | 198 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 199 | } |
| bogdanm | 0:9b334a45a8ff | 200 | |
| bogdanm | 0:9b334a45a8ff | 201 | /** |
| bogdanm | 0:9b334a45a8ff | 202 | * @brief Perform NOR memory De-Initialization sequence |
| bogdanm | 0:9b334a45a8ff | 203 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 204 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 205 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 206 | */ |
| bogdanm | 0:9b334a45a8ff | 207 | HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor) |
| bogdanm | 0:9b334a45a8ff | 208 | { |
| bogdanm | 0:9b334a45a8ff | 209 | /* De-Initialize the low level hardware (MSP) */ |
| bogdanm | 0:9b334a45a8ff | 210 | HAL_NOR_MspDeInit(hnor); |
| bogdanm | 0:9b334a45a8ff | 211 | |
| bogdanm | 0:9b334a45a8ff | 212 | /* Configure the NOR registers with their reset values */ |
| bogdanm | 0:9b334a45a8ff | 213 | FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank); |
| bogdanm | 0:9b334a45a8ff | 214 | |
| bogdanm | 0:9b334a45a8ff | 215 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 216 | hnor->State = HAL_NOR_STATE_RESET; |
| bogdanm | 0:9b334a45a8ff | 217 | |
| bogdanm | 0:9b334a45a8ff | 218 | /* Release Lock */ |
| bogdanm | 0:9b334a45a8ff | 219 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 220 | |
| bogdanm | 0:9b334a45a8ff | 221 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 222 | } |
| bogdanm | 0:9b334a45a8ff | 223 | |
| bogdanm | 0:9b334a45a8ff | 224 | /** |
| bogdanm | 0:9b334a45a8ff | 225 | * @brief NOR MSP Init |
| bogdanm | 0:9b334a45a8ff | 226 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 227 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 228 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 229 | */ |
| bogdanm | 0:9b334a45a8ff | 230 | __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor) |
| bogdanm | 0:9b334a45a8ff | 231 | { |
| bogdanm | 0:9b334a45a8ff | 232 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 233 | the HAL_NOR_MspInit could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 234 | */ |
| bogdanm | 0:9b334a45a8ff | 235 | } |
| bogdanm | 0:9b334a45a8ff | 236 | |
| bogdanm | 0:9b334a45a8ff | 237 | /** |
| bogdanm | 0:9b334a45a8ff | 238 | * @brief NOR MSP DeInit |
| bogdanm | 0:9b334a45a8ff | 239 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 240 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 241 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 242 | */ |
| bogdanm | 0:9b334a45a8ff | 243 | __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor) |
| bogdanm | 0:9b334a45a8ff | 244 | { |
| bogdanm | 0:9b334a45a8ff | 245 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 246 | the HAL_NOR_MspDeInit could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 247 | */ |
| bogdanm | 0:9b334a45a8ff | 248 | } |
| bogdanm | 0:9b334a45a8ff | 249 | |
| bogdanm | 0:9b334a45a8ff | 250 | /** |
| bogdanm | 0:9b334a45a8ff | 251 | * @brief NOR BSP Wait fro Ready/Busy signal |
| bogdanm | 0:9b334a45a8ff | 252 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 253 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 254 | * @param Timeout: Maximum timeout value |
| bogdanm | 0:9b334a45a8ff | 255 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 256 | */ |
| bogdanm | 0:9b334a45a8ff | 257 | __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout) |
| bogdanm | 0:9b334a45a8ff | 258 | { |
| bogdanm | 0:9b334a45a8ff | 259 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 260 | the HAL_NOR_BspWait could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 261 | */ |
| bogdanm | 0:9b334a45a8ff | 262 | } |
| bogdanm | 0:9b334a45a8ff | 263 | |
| bogdanm | 0:9b334a45a8ff | 264 | /** |
| bogdanm | 0:9b334a45a8ff | 265 | * @} |
| bogdanm | 0:9b334a45a8ff | 266 | */ |
| bogdanm | 0:9b334a45a8ff | 267 | |
| bogdanm | 0:9b334a45a8ff | 268 | /** @defgroup NOR_Exported_Functions_Group2 Input and Output functions |
| bogdanm | 0:9b334a45a8ff | 269 | * @brief Input Output and memory control functions |
| bogdanm | 0:9b334a45a8ff | 270 | * |
| bogdanm | 0:9b334a45a8ff | 271 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 272 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 273 | ##### NOR Input and Output functions ##### |
| bogdanm | 0:9b334a45a8ff | 274 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 275 | [..] |
| bogdanm | 0:9b334a45a8ff | 276 | This section provides functions allowing to use and control the NOR memory |
| bogdanm | 0:9b334a45a8ff | 277 | |
| bogdanm | 0:9b334a45a8ff | 278 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 279 | * @{ |
| bogdanm | 0:9b334a45a8ff | 280 | */ |
| bogdanm | 0:9b334a45a8ff | 281 | |
| bogdanm | 0:9b334a45a8ff | 282 | /** |
| bogdanm | 0:9b334a45a8ff | 283 | * @brief Read NOR flash IDs |
| bogdanm | 0:9b334a45a8ff | 284 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 285 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 286 | * @param pNOR_ID : pointer to NOR ID structure |
| bogdanm | 0:9b334a45a8ff | 287 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 288 | */ |
| bogdanm | 0:9b334a45a8ff | 289 | HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID) |
| bogdanm | 0:9b334a45a8ff | 290 | { |
| bogdanm | 0:9b334a45a8ff | 291 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 292 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 293 | |
| bogdanm | 0:9b334a45a8ff | 294 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 295 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 296 | { |
| bogdanm | 0:9b334a45a8ff | 297 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 298 | } |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 301 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 302 | |
| bogdanm | 0:9b334a45a8ff | 303 | /* Send read ID command */ |
| bogdanm | 0:9b334a45a8ff | 304 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 305 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 306 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0090); |
| bogdanm | 0:9b334a45a8ff | 307 | |
| bogdanm | 0:9b334a45a8ff | 308 | /* Read the NOR IDs */ |
| bogdanm | 0:9b334a45a8ff | 309 | pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, MC_ADDRESS); |
| bogdanm | 0:9b334a45a8ff | 310 | pNOR_ID->Device_Code1 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, DEVICE_CODE1_ADDR); |
| bogdanm | 0:9b334a45a8ff | 311 | pNOR_ID->Device_Code2 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, DEVICE_CODE2_ADDR); |
| bogdanm | 0:9b334a45a8ff | 312 | pNOR_ID->Device_Code3 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, DEVICE_CODE3_ADDR); |
| bogdanm | 0:9b334a45a8ff | 313 | |
| bogdanm | 0:9b334a45a8ff | 314 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 315 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 316 | |
| bogdanm | 0:9b334a45a8ff | 317 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 318 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 319 | |
| bogdanm | 0:9b334a45a8ff | 320 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 321 | } |
| bogdanm | 0:9b334a45a8ff | 322 | |
| bogdanm | 0:9b334a45a8ff | 323 | /** |
| bogdanm | 0:9b334a45a8ff | 324 | * @brief Returns the NOR memory to Read mode. |
| bogdanm | 0:9b334a45a8ff | 325 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 326 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 327 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 328 | */ |
| bogdanm | 0:9b334a45a8ff | 329 | HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor) |
| bogdanm | 0:9b334a45a8ff | 330 | { |
| bogdanm | 0:9b334a45a8ff | 331 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 332 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 333 | |
| bogdanm | 0:9b334a45a8ff | 334 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 335 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 336 | { |
| bogdanm | 0:9b334a45a8ff | 337 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 338 | } |
| bogdanm | 0:9b334a45a8ff | 339 | |
| bogdanm | 0:9b334a45a8ff | 340 | __NOR_WRITE(uwNORAddress, 0x00F0); |
| bogdanm | 0:9b334a45a8ff | 341 | |
| bogdanm | 0:9b334a45a8ff | 342 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 343 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 344 | |
| bogdanm | 0:9b334a45a8ff | 345 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 346 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 347 | |
| bogdanm | 0:9b334a45a8ff | 348 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 349 | } |
| bogdanm | 0:9b334a45a8ff | 350 | |
| bogdanm | 0:9b334a45a8ff | 351 | /** |
| bogdanm | 0:9b334a45a8ff | 352 | * @brief Read data from NOR memory |
| bogdanm | 0:9b334a45a8ff | 353 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 354 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 355 | * @param pAddress: pointer to Device address |
| bogdanm | 0:9b334a45a8ff | 356 | * @param pData : pointer to read data |
| bogdanm | 0:9b334a45a8ff | 357 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 358 | */ |
| bogdanm | 0:9b334a45a8ff | 359 | HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData) |
| bogdanm | 0:9b334a45a8ff | 360 | { |
| bogdanm | 0:9b334a45a8ff | 361 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 362 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 363 | |
| bogdanm | 0:9b334a45a8ff | 364 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 365 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 366 | { |
| bogdanm | 0:9b334a45a8ff | 367 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 368 | } |
| bogdanm | 0:9b334a45a8ff | 369 | |
| bogdanm | 0:9b334a45a8ff | 370 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 371 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 372 | |
| bogdanm | 0:9b334a45a8ff | 373 | /* Send read data command */ |
| bogdanm | 0:9b334a45a8ff | 374 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x00555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 375 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x002AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 376 | __NOR_WRITE(pAddress, 0x00F0); |
| bogdanm | 0:9b334a45a8ff | 377 | |
| bogdanm | 0:9b334a45a8ff | 378 | /* Read the data */ |
| bogdanm | 0:9b334a45a8ff | 379 | *pData = *(__IO uint32_t *)pAddress; |
| bogdanm | 0:9b334a45a8ff | 380 | |
| bogdanm | 0:9b334a45a8ff | 381 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 382 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 383 | |
| bogdanm | 0:9b334a45a8ff | 384 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 385 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 386 | |
| bogdanm | 0:9b334a45a8ff | 387 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 388 | } |
| bogdanm | 0:9b334a45a8ff | 389 | |
| bogdanm | 0:9b334a45a8ff | 390 | /** |
| bogdanm | 0:9b334a45a8ff | 391 | * @brief Program data to NOR memory |
| bogdanm | 0:9b334a45a8ff | 392 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 393 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 394 | * @param pAddress: Device address |
| bogdanm | 0:9b334a45a8ff | 395 | * @param pData : pointer to the data to write |
| bogdanm | 0:9b334a45a8ff | 396 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 397 | */ |
| bogdanm | 0:9b334a45a8ff | 398 | HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData) |
| bogdanm | 0:9b334a45a8ff | 399 | { |
| bogdanm | 0:9b334a45a8ff | 400 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 401 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 402 | |
| bogdanm | 0:9b334a45a8ff | 403 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 404 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 405 | { |
| bogdanm | 0:9b334a45a8ff | 406 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 407 | } |
| bogdanm | 0:9b334a45a8ff | 408 | |
| bogdanm | 0:9b334a45a8ff | 409 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 410 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 411 | |
| bogdanm | 0:9b334a45a8ff | 412 | /* Send program data command */ |
| bogdanm | 0:9b334a45a8ff | 413 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 414 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 415 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00A0); |
| bogdanm | 0:9b334a45a8ff | 416 | |
| bogdanm | 0:9b334a45a8ff | 417 | /* Write the data */ |
| bogdanm | 0:9b334a45a8ff | 418 | __NOR_WRITE(pAddress, *pData); |
| bogdanm | 0:9b334a45a8ff | 419 | |
| bogdanm | 0:9b334a45a8ff | 420 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 421 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 422 | |
| bogdanm | 0:9b334a45a8ff | 423 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 424 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 425 | |
| bogdanm | 0:9b334a45a8ff | 426 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 427 | } |
| bogdanm | 0:9b334a45a8ff | 428 | |
| bogdanm | 0:9b334a45a8ff | 429 | /** |
| bogdanm | 0:9b334a45a8ff | 430 | * @brief Reads a block of data from the FMC NOR memory. |
| bogdanm | 0:9b334a45a8ff | 431 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 432 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 433 | * @param uwAddress: NOR memory internal address to read from. |
| bogdanm | 0:9b334a45a8ff | 434 | * @param pData: pointer to the buffer that receives the data read from the |
| bogdanm | 0:9b334a45a8ff | 435 | * NOR memory. |
| bogdanm | 0:9b334a45a8ff | 436 | * @param uwBufferSize : number of Half word to read. |
| bogdanm | 0:9b334a45a8ff | 437 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 438 | */ |
| bogdanm | 0:9b334a45a8ff | 439 | HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize) |
| bogdanm | 0:9b334a45a8ff | 440 | { |
| bogdanm | 0:9b334a45a8ff | 441 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 442 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 443 | |
| bogdanm | 0:9b334a45a8ff | 444 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 445 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 446 | { |
| bogdanm | 0:9b334a45a8ff | 447 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 448 | } |
| bogdanm | 0:9b334a45a8ff | 449 | |
| bogdanm | 0:9b334a45a8ff | 450 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 451 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 452 | |
| bogdanm | 0:9b334a45a8ff | 453 | /* Send read data command */ |
| bogdanm | 0:9b334a45a8ff | 454 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x00555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 455 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x002AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 456 | __NOR_WRITE(uwAddress, 0x00F0); |
| bogdanm | 0:9b334a45a8ff | 457 | |
| bogdanm | 0:9b334a45a8ff | 458 | /* Read buffer */ |
| bogdanm | 0:9b334a45a8ff | 459 | while( uwBufferSize > 0) |
| bogdanm | 0:9b334a45a8ff | 460 | { |
| bogdanm | 0:9b334a45a8ff | 461 | *pData++ = *(__IO uint16_t *)uwAddress; |
| bogdanm | 0:9b334a45a8ff | 462 | uwAddress += 2; |
| bogdanm | 0:9b334a45a8ff | 463 | uwBufferSize--; |
| bogdanm | 0:9b334a45a8ff | 464 | } |
| bogdanm | 0:9b334a45a8ff | 465 | |
| bogdanm | 0:9b334a45a8ff | 466 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 467 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 468 | |
| bogdanm | 0:9b334a45a8ff | 469 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 470 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 471 | |
| bogdanm | 0:9b334a45a8ff | 472 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 473 | } |
| bogdanm | 0:9b334a45a8ff | 474 | |
| bogdanm | 0:9b334a45a8ff | 475 | /** |
| bogdanm | 0:9b334a45a8ff | 476 | * @brief Writes a half-word buffer to the FMC NOR memory. This function |
| bogdanm | 0:9b334a45a8ff | 477 | * must be used only with S29GL128P NOR memory. |
| bogdanm | 0:9b334a45a8ff | 478 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 479 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 480 | * @param uwAddress: NOR memory internal address from which the data |
| bogdanm | 0:9b334a45a8ff | 481 | * @note Some NOR memory need Address aligned to xx bytes (can be aligned to |
| bogdanm | 0:9b334a45a8ff | 482 | * 64 bytes boundary for example). |
| bogdanm | 0:9b334a45a8ff | 483 | * @param pData: pointer to source data buffer. |
| bogdanm | 0:9b334a45a8ff | 484 | * @param uwBufferSize: number of Half words to write. |
| bogdanm | 0:9b334a45a8ff | 485 | * @note The maximum buffer size allowed is NOR memory dependent |
| bogdanm | 0:9b334a45a8ff | 486 | * (can be 64 Bytes max for example). |
| bogdanm | 0:9b334a45a8ff | 487 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 488 | */ |
| bogdanm | 0:9b334a45a8ff | 489 | HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize) |
| bogdanm | 0:9b334a45a8ff | 490 | { |
| bogdanm | 0:9b334a45a8ff | 491 | uint16_t * p_currentaddress; |
| bogdanm | 0:9b334a45a8ff | 492 | uint16_t * p_endaddress; |
| bogdanm | 0:9b334a45a8ff | 493 | uint32_t lastloadedaddress = 0; |
| bogdanm | 0:9b334a45a8ff | 494 | |
| bogdanm | 0:9b334a45a8ff | 495 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 496 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 497 | |
| bogdanm | 0:9b334a45a8ff | 498 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 499 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 500 | { |
| bogdanm | 0:9b334a45a8ff | 501 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 502 | } |
| bogdanm | 0:9b334a45a8ff | 503 | |
| bogdanm | 0:9b334a45a8ff | 504 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 505 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 506 | |
| bogdanm | 0:9b334a45a8ff | 507 | /* Initialize variables */ |
| bogdanm | 0:9b334a45a8ff | 508 | p_currentaddress = (uint16_t*)((uint32_t)(uwAddress)); |
| bogdanm | 0:9b334a45a8ff | 509 | p_endaddress = p_currentaddress + (uwBufferSize-1); |
| bogdanm | 0:9b334a45a8ff | 510 | lastloadedaddress = (uint32_t)(uwAddress); |
| bogdanm | 0:9b334a45a8ff | 511 | |
| bogdanm | 0:9b334a45a8ff | 512 | /* Issue unlock command sequence */ |
| bogdanm | 0:9b334a45a8ff | 513 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 514 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 515 | |
| bogdanm | 0:9b334a45a8ff | 516 | /* Write Buffer Load Command */ |
| bogdanm | 0:9b334a45a8ff | 517 | __NOR_WRITE((uint32_t)(p_currentaddress), 0x25); |
| bogdanm | 0:9b334a45a8ff | 518 | __NOR_WRITE((uint32_t)(p_currentaddress), (uwBufferSize-1)); |
| bogdanm | 0:9b334a45a8ff | 519 | |
| bogdanm | 0:9b334a45a8ff | 520 | /* Load Data into NOR Buffer */ |
| bogdanm | 0:9b334a45a8ff | 521 | while(p_currentaddress <= p_endaddress) |
| bogdanm | 0:9b334a45a8ff | 522 | { |
| bogdanm | 0:9b334a45a8ff | 523 | /* Store last loaded address & data value (for polling) */ |
| bogdanm | 0:9b334a45a8ff | 524 | lastloadedaddress = (uint32_t)p_currentaddress; |
| bogdanm | 0:9b334a45a8ff | 525 | |
| bogdanm | 0:9b334a45a8ff | 526 | __NOR_WRITE(p_currentaddress, *pData++); |
| bogdanm | 0:9b334a45a8ff | 527 | |
| bogdanm | 0:9b334a45a8ff | 528 | p_currentaddress++; |
| bogdanm | 0:9b334a45a8ff | 529 | } |
| bogdanm | 0:9b334a45a8ff | 530 | |
| bogdanm | 0:9b334a45a8ff | 531 | __NOR_WRITE((uint32_t)(lastloadedaddress), 0x29); |
| bogdanm | 0:9b334a45a8ff | 532 | |
| bogdanm | 0:9b334a45a8ff | 533 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 534 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 535 | |
| bogdanm | 0:9b334a45a8ff | 536 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 537 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 538 | |
| bogdanm | 0:9b334a45a8ff | 539 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 540 | |
| bogdanm | 0:9b334a45a8ff | 541 | } |
| bogdanm | 0:9b334a45a8ff | 542 | |
| bogdanm | 0:9b334a45a8ff | 543 | /** |
| bogdanm | 0:9b334a45a8ff | 544 | * @brief Erase the specified block of the NOR memory |
| bogdanm | 0:9b334a45a8ff | 545 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 546 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 547 | * @param BlockAddress : Block to erase address |
| bogdanm | 0:9b334a45a8ff | 548 | * @param Address: Device address |
| bogdanm | 0:9b334a45a8ff | 549 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 550 | */ |
| bogdanm | 0:9b334a45a8ff | 551 | HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address) |
| bogdanm | 0:9b334a45a8ff | 552 | { |
| bogdanm | 0:9b334a45a8ff | 553 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 554 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 555 | |
| bogdanm | 0:9b334a45a8ff | 556 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 557 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 558 | { |
| bogdanm | 0:9b334a45a8ff | 559 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 560 | } |
| bogdanm | 0:9b334a45a8ff | 561 | |
| bogdanm | 0:9b334a45a8ff | 562 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 563 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 564 | |
| bogdanm | 0:9b334a45a8ff | 565 | /* Send block erase command sequence */ |
| bogdanm | 0:9b334a45a8ff | 566 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 567 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 568 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0080); |
| bogdanm | 0:9b334a45a8ff | 569 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 570 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 571 | __NOR_WRITE((uint32_t)(BlockAddress + Address), 0x30); |
| bogdanm | 0:9b334a45a8ff | 572 | |
| bogdanm | 0:9b334a45a8ff | 573 | /* Check the NOR memory status and update the controller state */ |
| bogdanm | 0:9b334a45a8ff | 574 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 575 | |
| bogdanm | 0:9b334a45a8ff | 576 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 577 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 580 | |
| bogdanm | 0:9b334a45a8ff | 581 | } |
| bogdanm | 0:9b334a45a8ff | 582 | |
| bogdanm | 0:9b334a45a8ff | 583 | /** |
| bogdanm | 0:9b334a45a8ff | 584 | * @brief Erase the entire NOR chip. |
| bogdanm | 0:9b334a45a8ff | 585 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 586 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 587 | * @param Address : Device address |
| bogdanm | 0:9b334a45a8ff | 588 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 589 | */ |
| bogdanm | 0:9b334a45a8ff | 590 | HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address) |
| bogdanm | 0:9b334a45a8ff | 591 | { |
| bogdanm | 0:9b334a45a8ff | 592 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 593 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 594 | |
| bogdanm | 0:9b334a45a8ff | 595 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 596 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 597 | { |
| bogdanm | 0:9b334a45a8ff | 598 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 599 | } |
| bogdanm | 0:9b334a45a8ff | 600 | |
| bogdanm | 0:9b334a45a8ff | 601 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 602 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 603 | |
| bogdanm | 0:9b334a45a8ff | 604 | /* Send NOR chip erase command sequence */ |
| bogdanm | 0:9b334a45a8ff | 605 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 606 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 607 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0080); |
| bogdanm | 0:9b334a45a8ff | 608 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x00AA); |
| bogdanm | 0:9b334a45a8ff | 609 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x02AA), 0x0055); |
| bogdanm | 0:9b334a45a8ff | 610 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0555), 0x0010); |
| bogdanm | 0:9b334a45a8ff | 611 | |
| bogdanm | 0:9b334a45a8ff | 612 | /* Check the NOR memory status and update the controller state */ |
| bogdanm | 0:9b334a45a8ff | 613 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 614 | |
| bogdanm | 0:9b334a45a8ff | 615 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 616 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 617 | |
| bogdanm | 0:9b334a45a8ff | 618 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 619 | } |
| bogdanm | 0:9b334a45a8ff | 620 | |
| bogdanm | 0:9b334a45a8ff | 621 | /** |
| bogdanm | 0:9b334a45a8ff | 622 | * @brief Read NOR flash CFI IDs |
| bogdanm | 0:9b334a45a8ff | 623 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 624 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 625 | * @param pNOR_CFI : pointer to NOR CFI IDs structure |
| bogdanm | 0:9b334a45a8ff | 626 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 627 | */ |
| bogdanm | 0:9b334a45a8ff | 628 | HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI) |
| bogdanm | 0:9b334a45a8ff | 629 | { |
| bogdanm | 0:9b334a45a8ff | 630 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 631 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 632 | |
| bogdanm | 0:9b334a45a8ff | 633 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 634 | if(hnor->State == HAL_NOR_STATE_BUSY) |
| bogdanm | 0:9b334a45a8ff | 635 | { |
| bogdanm | 0:9b334a45a8ff | 636 | return HAL_BUSY; |
| bogdanm | 0:9b334a45a8ff | 637 | } |
| bogdanm | 0:9b334a45a8ff | 638 | |
| bogdanm | 0:9b334a45a8ff | 639 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 640 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 641 | |
| bogdanm | 0:9b334a45a8ff | 642 | /* Send read CFI query command */ |
| bogdanm | 0:9b334a45a8ff | 643 | __NOR_WRITE(__NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, 0x0055), 0x0098); |
| bogdanm | 0:9b334a45a8ff | 644 | |
| bogdanm | 0:9b334a45a8ff | 645 | /* read the NOR CFI information */ |
| bogdanm | 0:9b334a45a8ff | 646 | pNOR_CFI->CFI_1 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI1_ADDRESS); |
| bogdanm | 0:9b334a45a8ff | 647 | pNOR_CFI->CFI_2 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI2_ADDRESS); |
| bogdanm | 0:9b334a45a8ff | 648 | pNOR_CFI->CFI_3 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI3_ADDRESS); |
| bogdanm | 0:9b334a45a8ff | 649 | pNOR_CFI->CFI_4 = *(__IO uint16_t *) __NOR_ADDR_SHIFT(uwNORAddress, uwNORMememoryDataWidth, CFI4_ADDRESS); |
| bogdanm | 0:9b334a45a8ff | 650 | |
| bogdanm | 0:9b334a45a8ff | 651 | /* Check the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 652 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 653 | |
| bogdanm | 0:9b334a45a8ff | 654 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 655 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 656 | |
| bogdanm | 0:9b334a45a8ff | 657 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 658 | } |
| bogdanm | 0:9b334a45a8ff | 659 | |
| bogdanm | 0:9b334a45a8ff | 660 | /** |
| bogdanm | 0:9b334a45a8ff | 661 | * @} |
| bogdanm | 0:9b334a45a8ff | 662 | */ |
| bogdanm | 0:9b334a45a8ff | 663 | |
| bogdanm | 0:9b334a45a8ff | 664 | /** @defgroup NOR_Exported_Functions_Group3 Peripheral Control functions |
| bogdanm | 0:9b334a45a8ff | 665 | * @brief management functions |
| bogdanm | 0:9b334a45a8ff | 666 | * |
| bogdanm | 0:9b334a45a8ff | 667 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 668 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 669 | ##### NOR Control functions ##### |
| bogdanm | 0:9b334a45a8ff | 670 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 671 | [..] |
| bogdanm | 0:9b334a45a8ff | 672 | This subsection provides a set of functions allowing to control dynamically |
| bogdanm | 0:9b334a45a8ff | 673 | the NOR interface. |
| bogdanm | 0:9b334a45a8ff | 674 | |
| bogdanm | 0:9b334a45a8ff | 675 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 676 | * @{ |
| bogdanm | 0:9b334a45a8ff | 677 | */ |
| bogdanm | 0:9b334a45a8ff | 678 | |
| bogdanm | 0:9b334a45a8ff | 679 | /** |
| bogdanm | 0:9b334a45a8ff | 680 | * @brief Enables dynamically NOR write operation. |
| bogdanm | 0:9b334a45a8ff | 681 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 682 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 683 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 684 | */ |
| bogdanm | 0:9b334a45a8ff | 685 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor) |
| bogdanm | 0:9b334a45a8ff | 686 | { |
| bogdanm | 0:9b334a45a8ff | 687 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 688 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 689 | |
| bogdanm | 0:9b334a45a8ff | 690 | /* Enable write operation */ |
| bogdanm | 0:9b334a45a8ff | 691 | FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank); |
| bogdanm | 0:9b334a45a8ff | 692 | |
| bogdanm | 0:9b334a45a8ff | 693 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 694 | hnor->State = HAL_NOR_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 695 | |
| bogdanm | 0:9b334a45a8ff | 696 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 697 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 698 | |
| bogdanm | 0:9b334a45a8ff | 699 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 700 | } |
| bogdanm | 0:9b334a45a8ff | 701 | |
| bogdanm | 0:9b334a45a8ff | 702 | /** |
| bogdanm | 0:9b334a45a8ff | 703 | * @brief Disables dynamically NOR write operation. |
| bogdanm | 0:9b334a45a8ff | 704 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 705 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 706 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 707 | */ |
| bogdanm | 0:9b334a45a8ff | 708 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor) |
| bogdanm | 0:9b334a45a8ff | 709 | { |
| bogdanm | 0:9b334a45a8ff | 710 | /* Process Locked */ |
| bogdanm | 0:9b334a45a8ff | 711 | __HAL_LOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 712 | |
| bogdanm | 0:9b334a45a8ff | 713 | /* Update the SRAM controller state */ |
| bogdanm | 0:9b334a45a8ff | 714 | hnor->State = HAL_NOR_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 715 | |
| bogdanm | 0:9b334a45a8ff | 716 | /* Disable write operation */ |
| bogdanm | 0:9b334a45a8ff | 717 | FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank); |
| bogdanm | 0:9b334a45a8ff | 718 | |
| bogdanm | 0:9b334a45a8ff | 719 | /* Update the NOR controller state */ |
| bogdanm | 0:9b334a45a8ff | 720 | hnor->State = HAL_NOR_STATE_PROTECTED; |
| bogdanm | 0:9b334a45a8ff | 721 | |
| bogdanm | 0:9b334a45a8ff | 722 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 723 | __HAL_UNLOCK(hnor); |
| bogdanm | 0:9b334a45a8ff | 724 | |
| bogdanm | 0:9b334a45a8ff | 725 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 726 | } |
| bogdanm | 0:9b334a45a8ff | 727 | |
| bogdanm | 0:9b334a45a8ff | 728 | /** |
| bogdanm | 0:9b334a45a8ff | 729 | * @} |
| bogdanm | 0:9b334a45a8ff | 730 | */ |
| bogdanm | 0:9b334a45a8ff | 731 | |
| bogdanm | 0:9b334a45a8ff | 732 | /** @defgroup NOR_Exported_Functions_Group4 Peripheral State functions |
| bogdanm | 0:9b334a45a8ff | 733 | * @brief Peripheral State functions |
| bogdanm | 0:9b334a45a8ff | 734 | * |
| bogdanm | 0:9b334a45a8ff | 735 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 736 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 737 | ##### NOR State functions ##### |
| bogdanm | 0:9b334a45a8ff | 738 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 739 | [..] |
| bogdanm | 0:9b334a45a8ff | 740 | This subsection permits to get in run-time the status of the NOR controller |
| bogdanm | 0:9b334a45a8ff | 741 | and the data flow. |
| bogdanm | 0:9b334a45a8ff | 742 | |
| bogdanm | 0:9b334a45a8ff | 743 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 744 | * @{ |
| bogdanm | 0:9b334a45a8ff | 745 | */ |
| bogdanm | 0:9b334a45a8ff | 746 | |
| bogdanm | 0:9b334a45a8ff | 747 | /** |
| bogdanm | 0:9b334a45a8ff | 748 | * @brief return the NOR controller state |
| bogdanm | 0:9b334a45a8ff | 749 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 750 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 751 | * @retval NOR controller state |
| bogdanm | 0:9b334a45a8ff | 752 | */ |
| bogdanm | 0:9b334a45a8ff | 753 | HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor) |
| bogdanm | 0:9b334a45a8ff | 754 | { |
| bogdanm | 0:9b334a45a8ff | 755 | return hnor->State; |
| bogdanm | 0:9b334a45a8ff | 756 | } |
| bogdanm | 0:9b334a45a8ff | 757 | |
| bogdanm | 0:9b334a45a8ff | 758 | /** |
| bogdanm | 0:9b334a45a8ff | 759 | * @brief Returns the NOR operation status. |
| bogdanm | 0:9b334a45a8ff | 760 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 761 | * the configuration information for NOR module. |
| bogdanm | 0:9b334a45a8ff | 762 | * @param Address: Device address |
| bogdanm | 0:9b334a45a8ff | 763 | * @param Timeout: NOR progamming Timeout |
| bogdanm | 0:9b334a45a8ff | 764 | * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR |
| bogdanm | 0:9b334a45a8ff | 765 | * or NOR_TIMEOUT |
| bogdanm | 0:9b334a45a8ff | 766 | */ |
| bogdanm | 0:9b334a45a8ff | 767 | NOR_StatusTypedef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout) |
| bogdanm | 0:9b334a45a8ff | 768 | { |
| bogdanm | 0:9b334a45a8ff | 769 | NOR_StatusTypedef status = NOR_ONGOING; |
| bogdanm | 0:9b334a45a8ff | 770 | uint16_t tmpSR1 = 0, tmpSR2 = 0; |
| bogdanm | 0:9b334a45a8ff | 771 | uint32_t timeout = 0; |
| bogdanm | 0:9b334a45a8ff | 772 | |
| bogdanm | 0:9b334a45a8ff | 773 | /* Poll on NOR memory Ready/Busy signal ------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 774 | HAL_NOR_MspWait(hnor, timeout); |
| bogdanm | 0:9b334a45a8ff | 775 | |
| bogdanm | 0:9b334a45a8ff | 776 | /* Get the NOR memory operation status -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 777 | while(status != NOR_SUCCESS) |
| bogdanm | 0:9b334a45a8ff | 778 | { |
| bogdanm | 0:9b334a45a8ff | 779 | /* Check for timeout value */ |
| bogdanm | 0:9b334a45a8ff | 780 | timeout = HAL_GetTick() + Timeout; |
| bogdanm | 0:9b334a45a8ff | 781 | |
| bogdanm | 0:9b334a45a8ff | 782 | if(HAL_GetTick() >= timeout) |
| bogdanm | 0:9b334a45a8ff | 783 | { |
| bogdanm | 0:9b334a45a8ff | 784 | status = NOR_TIMEOUT; |
| bogdanm | 0:9b334a45a8ff | 785 | } |
| bogdanm | 0:9b334a45a8ff | 786 | |
| bogdanm | 0:9b334a45a8ff | 787 | /* Read NOR status register (DQ6 and DQ5) */ |
| bogdanm | 0:9b334a45a8ff | 788 | tmpSR1 = *(__IO uint16_t *)Address; |
| bogdanm | 0:9b334a45a8ff | 789 | tmpSR2 = *(__IO uint16_t *)Address; |
| bogdanm | 0:9b334a45a8ff | 790 | |
| bogdanm | 0:9b334a45a8ff | 791 | /* If DQ6 did not toggle between the two reads then return NOR_Success */ |
| bogdanm | 0:9b334a45a8ff | 792 | if((tmpSR1 & 0x0040) == (tmpSR2 & 0x0040)) |
| bogdanm | 0:9b334a45a8ff | 793 | { |
| bogdanm | 0:9b334a45a8ff | 794 | return NOR_SUCCESS; |
| bogdanm | 0:9b334a45a8ff | 795 | } |
| bogdanm | 0:9b334a45a8ff | 796 | |
| bogdanm | 0:9b334a45a8ff | 797 | if((tmpSR1 & 0x0020) == 0x0020) |
| bogdanm | 0:9b334a45a8ff | 798 | { |
| bogdanm | 0:9b334a45a8ff | 799 | return NOR_ONGOING; |
| bogdanm | 0:9b334a45a8ff | 800 | } |
| bogdanm | 0:9b334a45a8ff | 801 | |
| bogdanm | 0:9b334a45a8ff | 802 | tmpSR1 = *(__IO uint16_t *)Address; |
| bogdanm | 0:9b334a45a8ff | 803 | tmpSR2 = *(__IO uint16_t *)Address; |
| bogdanm | 0:9b334a45a8ff | 804 | |
| bogdanm | 0:9b334a45a8ff | 805 | /* If DQ6 did not toggle between the two reads then return NOR_Success */ |
| bogdanm | 0:9b334a45a8ff | 806 | if((tmpSR1 & 0x0040) == (tmpSR2 & 0x0040)) |
| bogdanm | 0:9b334a45a8ff | 807 | { |
| bogdanm | 0:9b334a45a8ff | 808 | return NOR_SUCCESS; |
| bogdanm | 0:9b334a45a8ff | 809 | } |
| bogdanm | 0:9b334a45a8ff | 810 | |
| bogdanm | 0:9b334a45a8ff | 811 | if((tmpSR1 & 0x0020) == 0x0020) |
| bogdanm | 0:9b334a45a8ff | 812 | { |
| bogdanm | 0:9b334a45a8ff | 813 | return NOR_ERROR; |
| bogdanm | 0:9b334a45a8ff | 814 | } |
| bogdanm | 0:9b334a45a8ff | 815 | } |
| bogdanm | 0:9b334a45a8ff | 816 | |
| bogdanm | 0:9b334a45a8ff | 817 | /* Return the operation status */ |
| bogdanm | 0:9b334a45a8ff | 818 | return status; |
| bogdanm | 0:9b334a45a8ff | 819 | } |
| bogdanm | 0:9b334a45a8ff | 820 | |
| bogdanm | 0:9b334a45a8ff | 821 | /** |
| bogdanm | 0:9b334a45a8ff | 822 | * @} |
| bogdanm | 0:9b334a45a8ff | 823 | */ |
| bogdanm | 0:9b334a45a8ff | 824 | |
| bogdanm | 0:9b334a45a8ff | 825 | /** |
| bogdanm | 0:9b334a45a8ff | 826 | * @} |
| bogdanm | 0:9b334a45a8ff | 827 | */ |
| bogdanm | 0:9b334a45a8ff | 828 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ |
| bogdanm | 0:9b334a45a8ff | 829 | #endif /* HAL_NOR_MODULE_ENABLED */ |
| bogdanm | 0:9b334a45a8ff | 830 | /** |
| bogdanm | 0:9b334a45a8ff | 831 | * @} |
| bogdanm | 0:9b334a45a8ff | 832 | */ |
| bogdanm | 0:9b334a45a8ff | 833 | |
| bogdanm | 0:9b334a45a8ff | 834 | /** |
| bogdanm | 0:9b334a45a8ff | 835 | * @} |
| bogdanm | 0:9b334a45a8ff | 836 | */ |
| bogdanm | 0:9b334a45a8ff | 837 | |
| bogdanm | 0:9b334a45a8ff | 838 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |