en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f3xx_hal_i2s.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.1.0
bogdanm 0:9b334a45a8ff 6 * @date 12-Sept-2014
bogdanm 0:9b334a45a8ff 7 * @brief I2S HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Integrated Interchip Sound (I2S) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + IO operation functions
bogdanm 0:9b334a45a8ff 12 * + Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ===============================================================================
bogdanm 0:9b334a45a8ff 15 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 16 ===============================================================================
bogdanm 0:9b334a45a8ff 17 [..]
bogdanm 0:9b334a45a8ff 18 The I2S HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20 (#) Declare a I2S_HandleTypeDef handle structure.
bogdanm 0:9b334a45a8ff 21 (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
bogdanm 0:9b334a45a8ff 22 (##) Enable the SPIx interface clock.
bogdanm 0:9b334a45a8ff 23 (##) I2S pins configuration:
bogdanm 0:9b334a45a8ff 24 (+++) Enable the clock for the I2S GPIOs.
bogdanm 0:9b334a45a8ff 25 (+++) Configure these I2S pins as alternate function pull-up.
bogdanm 0:9b334a45a8ff 26 (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
bogdanm 0:9b334a45a8ff 27 and HAL_I2S_Receive_IT() APIs).
bogdanm 0:9b334a45a8ff 28 (+++) Configure the I2Sx interrupt priority.
bogdanm 0:9b334a45a8ff 29 (+++) Enable the NVIC I2S IRQ handle.
bogdanm 0:9b334a45a8ff 30 (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
bogdanm 0:9b334a45a8ff 31 and HAL_I2S_Receive_DMA() APIs:
bogdanm 0:9b334a45a8ff 32 (+++) Declare a DMA handle structure for the Tx/Rx channel.
bogdanm 0:9b334a45a8ff 33 (+++) Enable the DMAx interface clock.
bogdanm 0:9b334a45a8ff 34 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
bogdanm 0:9b334a45a8ff 35 (+++) Configure the DMA Tx/Rx Channel.
bogdanm 0:9b334a45a8ff 36 (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
bogdanm 0:9b334a45a8ff 37 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
bogdanm 0:9b334a45a8ff 38 DMA Tx/Rx Channel.
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
bogdanm 0:9b334a45a8ff 41 using HAL_I2S_Init() function.
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 -@- The specific I2S interrupts (Transmission complete interrupt,
bogdanm 0:9b334a45a8ff 44 RXNE interrupt and Error Interrupts) will be managed using the macros
bogdanm 0:9b334a45a8ff 45 __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
bogdanm 0:9b334a45a8ff 46 -@- Make sure that either:
bogdanm 0:9b334a45a8ff 47 (+@) I2S clock is configured based on SYSCLK or
bogdanm 0:9b334a45a8ff 48 (+@) External clock source is configured after setting correctly
bogdanm 0:9b334a45a8ff 49 the define constant EXTERNAL_CLOCK_VALUE in the stm32f3xx_hal_conf.h file.
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 (#) Three mode of operations are available within this driver :
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 54 =================================
bogdanm 0:9b334a45a8ff 55 [..]
bogdanm 0:9b334a45a8ff 56 (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
bogdanm 0:9b334a45a8ff 57 (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 60 ===================================
bogdanm 0:9b334a45a8ff 61 [..]
bogdanm 0:9b334a45a8ff 62 (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
bogdanm 0:9b334a45a8ff 63 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 64 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
bogdanm 0:9b334a45a8ff 65 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 66 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
bogdanm 0:9b334a45a8ff 67 (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
bogdanm 0:9b334a45a8ff 68 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 69 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
bogdanm 0:9b334a45a8ff 70 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 71 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
bogdanm 0:9b334a45a8ff 72 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 73 add his own code by customization of function pointer HAL_I2S_ErrorCallback
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 76 ==============================
bogdanm 0:9b334a45a8ff 77 [..]
bogdanm 0:9b334a45a8ff 78 (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
bogdanm 0:9b334a45a8ff 79 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 80 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
bogdanm 0:9b334a45a8ff 81 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 82 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
bogdanm 0:9b334a45a8ff 83 (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
bogdanm 0:9b334a45a8ff 84 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 85 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
bogdanm 0:9b334a45a8ff 86 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 87 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
bogdanm 0:9b334a45a8ff 88 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 89 add his own code by customization of function pointer HAL_I2S_ErrorCallback
bogdanm 0:9b334a45a8ff 90 (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
bogdanm 0:9b334a45a8ff 91 (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
bogdanm 0:9b334a45a8ff 92 (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 *** I2S HAL driver macros list ***
bogdanm 0:9b334a45a8ff 95 =============================================
bogdanm 0:9b334a45a8ff 96 [..]
bogdanm 0:9b334a45a8ff 97 Below the list of most used macros in I2S HAL driver.
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
bogdanm 0:9b334a45a8ff 100 (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
bogdanm 0:9b334a45a8ff 101 (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
bogdanm 0:9b334a45a8ff 102 (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
bogdanm 0:9b334a45a8ff 103 (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 [..]
bogdanm 0:9b334a45a8ff 106 (@) You can refer to the I2S HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 @endverbatim
bogdanm 0:9b334a45a8ff 109 ******************************************************************************
bogdanm 0:9b334a45a8ff 110 * @attention
bogdanm 0:9b334a45a8ff 111 *
bogdanm 0:9b334a45a8ff 112 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 113 *
bogdanm 0:9b334a45a8ff 114 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 115 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 116 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 117 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 118 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 119 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 120 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 121 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 122 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 123 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 124 *
bogdanm 0:9b334a45a8ff 125 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 126 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 127 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 128 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 129 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 130 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 131 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 132 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 133 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 134 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 135 *
bogdanm 0:9b334a45a8ff 136 ******************************************************************************
bogdanm 0:9b334a45a8ff 137 */
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 140 #include "stm32f3xx_hal.h"
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /** @addtogroup STM32F3xx_HAL_Driver
bogdanm 0:9b334a45a8ff 143 * @{
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 /** @defgroup I2S I2S HAL module driver
bogdanm 0:9b334a45a8ff 147 * @brief I2S HAL module driver
bogdanm 0:9b334a45a8ff 148 * @{
bogdanm 0:9b334a45a8ff 149 */
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 #ifdef HAL_I2S_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
bogdanm 0:9b334a45a8ff 154 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
bogdanm 0:9b334a45a8ff 155 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
bogdanm 0:9b334a45a8ff 156 defined(STM32F373xC) || defined(STM32F378xx)
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 159 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 160 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 161 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 162 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 163 /** @defgroup I2S_Private_Functions I2S Private Functions
bogdanm 0:9b334a45a8ff 164 * @{
bogdanm 0:9b334a45a8ff 165 */
bogdanm 0:9b334a45a8ff 166 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 167 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 168 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 169 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 170 static void I2S_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 171 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 172 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
bogdanm 0:9b334a45a8ff 173 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 174 /**
bogdanm 0:9b334a45a8ff 175 * @}
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 /* Exported functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 /** @defgroup I2S_Exported_Functions I2S Exported Functions
bogdanm 0:9b334a45a8ff 181 * @{
bogdanm 0:9b334a45a8ff 182 */
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 185 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 186 *
bogdanm 0:9b334a45a8ff 187 @verbatim
bogdanm 0:9b334a45a8ff 188 ===============================================================================
bogdanm 0:9b334a45a8ff 189 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 190 ===============================================================================
bogdanm 0:9b334a45a8ff 191 [..] This subsection provides a set of functions allowing to initialize and
bogdanm 0:9b334a45a8ff 192 de-initialiaze the I2Sx peripheral in simplex mode:
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 (+) User must Implement HAL_I2S_MspInit() function in which he configures
bogdanm 0:9b334a45a8ff 195 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 (+) Call the function HAL_I2S_Init() to configure the selected device with
bogdanm 0:9b334a45a8ff 198 the selected configuration:
bogdanm 0:9b334a45a8ff 199 (++) Mode
bogdanm 0:9b334a45a8ff 200 (++) Standard
bogdanm 0:9b334a45a8ff 201 (++) Data Format
bogdanm 0:9b334a45a8ff 202 (++) MCLK Output
bogdanm 0:9b334a45a8ff 203 (++) Audio frequency
bogdanm 0:9b334a45a8ff 204 (++) Polarity
bogdanm 0:9b334a45a8ff 205 (++) Full duplex mode
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 (+) Call the function HAL_I2S_DeInit() to restore the default configuration
bogdanm 0:9b334a45a8ff 208 of the selected I2Sx periperal.
bogdanm 0:9b334a45a8ff 209 @endverbatim
bogdanm 0:9b334a45a8ff 210 * @{
bogdanm 0:9b334a45a8ff 211 */
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 /**
bogdanm 0:9b334a45a8ff 214 * @brief Initializes the I2S according to the specified parameters
bogdanm 0:9b334a45a8ff 215 * in the I2S_InitTypeDef and create the associated handle.
bogdanm 0:9b334a45a8ff 216 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 217 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 218 * @retval HAL status
bogdanm 0:9b334a45a8ff 219 */
bogdanm 0:9b334a45a8ff 220 __weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 221 {
bogdanm 0:9b334a45a8ff 222 /* Note : This function is defined into this file for library reference. */
bogdanm 0:9b334a45a8ff 223 /* Function content is located into file stm32f3xx_hal_i2s_ex.c to */
bogdanm 0:9b334a45a8ff 224 /* handle the possible I2S interfaces defined in STM32F3xx devices */
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 /* Return error status as not implemented here */
bogdanm 0:9b334a45a8ff 227 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 228 }
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 /**
bogdanm 0:9b334a45a8ff 231 * @brief DeInitializes the I2S peripheral
bogdanm 0:9b334a45a8ff 232 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 233 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 234 * @retval HAL status
bogdanm 0:9b334a45a8ff 235 */
bogdanm 0:9b334a45a8ff 236 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 237 {
bogdanm 0:9b334a45a8ff 238 /* Check the I2S handle allocation */
bogdanm 0:9b334a45a8ff 239 if(hi2s == HAL_NULL)
bogdanm 0:9b334a45a8ff 240 {
bogdanm 0:9b334a45a8ff 241 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 242 }
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /* Check the parameters */
bogdanm 0:9b334a45a8ff 245 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 hi2s->State = HAL_I2S_STATE_BUSY;
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
bogdanm 0:9b334a45a8ff 250 HAL_I2S_MspDeInit(hi2s);
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
bogdanm 0:9b334a45a8ff 253 hi2s->State = HAL_I2S_STATE_RESET;
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 /* Release Lock */
bogdanm 0:9b334a45a8ff 256 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 return HAL_OK;
bogdanm 0:9b334a45a8ff 259 }
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 /**
bogdanm 0:9b334a45a8ff 262 * @brief I2S MSP Init
bogdanm 0:9b334a45a8ff 263 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 264 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 265 * @retval None
bogdanm 0:9b334a45a8ff 266 */
bogdanm 0:9b334a45a8ff 267 __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 268 {
bogdanm 0:9b334a45a8ff 269 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 270 the HAL_I2S_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 271 */
bogdanm 0:9b334a45a8ff 272 }
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 /**
bogdanm 0:9b334a45a8ff 275 * @brief I2S MSP DeInit
bogdanm 0:9b334a45a8ff 276 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 277 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 278 * @retval None
bogdanm 0:9b334a45a8ff 279 */
bogdanm 0:9b334a45a8ff 280 __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 281 {
bogdanm 0:9b334a45a8ff 282 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 283 the HAL_I2S_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 284 */
bogdanm 0:9b334a45a8ff 285 }
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 /**
bogdanm 0:9b334a45a8ff 288 * @}
bogdanm 0:9b334a45a8ff 289 */
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 /** @defgroup I2S_Exported_Functions_Group2 Input and Output operation functions
bogdanm 0:9b334a45a8ff 292 * @brief Data transfers functions
bogdanm 0:9b334a45a8ff 293 *
bogdanm 0:9b334a45a8ff 294 @verbatim
bogdanm 0:9b334a45a8ff 295 ===============================================================================
bogdanm 0:9b334a45a8ff 296 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 297 ===============================================================================
bogdanm 0:9b334a45a8ff 298 [..]
bogdanm 0:9b334a45a8ff 299 This subsection provides a set of functions allowing to manage the I2S data
bogdanm 0:9b334a45a8ff 300 transfers.
bogdanm 0:9b334a45a8ff 301
bogdanm 0:9b334a45a8ff 302 (#) There are two modes of transfer:
bogdanm 0:9b334a45a8ff 303 (++) Blocking mode : The communication is performed in the polling mode.
bogdanm 0:9b334a45a8ff 304 The status of all data processing is returned by the same function
bogdanm 0:9b334a45a8ff 305 after finishing transfer.
bogdanm 0:9b334a45a8ff 306 (++) No-Blocking mode : The communication is performed using Interrupts
bogdanm 0:9b334a45a8ff 307 or DMA. These functions return the status of the transfer startup.
bogdanm 0:9b334a45a8ff 308 The end of the data processing will be indicated through the
bogdanm 0:9b334a45a8ff 309 dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
bogdanm 0:9b334a45a8ff 310 using DMA mode.
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 (#) Blocking mode functions are :
bogdanm 0:9b334a45a8ff 313 (++) HAL_I2S_Transmit()
bogdanm 0:9b334a45a8ff 314 (++) HAL_I2S_Receive()
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 (#) No-Blocking mode functions with Interrupt are :
bogdanm 0:9b334a45a8ff 317 (++) HAL_I2S_Transmit_IT()
bogdanm 0:9b334a45a8ff 318 (++) HAL_I2S_Receive_IT()
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 (#) No-Blocking mode functions with DMA are :
bogdanm 0:9b334a45a8ff 321 (++) HAL_I2S_Transmit_DMA()
bogdanm 0:9b334a45a8ff 322 (++) HAL_I2S_Receive_DMA()
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
bogdanm 0:9b334a45a8ff 325 (++) HAL_I2S_TxCpltCallback()
bogdanm 0:9b334a45a8ff 326 (++) HAL_I2S_RxCpltCallback()
bogdanm 0:9b334a45a8ff 327 (++) HAL_I2S_ErrorCallback()
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 @endverbatim
bogdanm 0:9b334a45a8ff 330 * @{
bogdanm 0:9b334a45a8ff 331 */
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 /**
bogdanm 0:9b334a45a8ff 334 * @brief Transmit an amount of data in blocking mode
bogdanm 0:9b334a45a8ff 335 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 336 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 337 * @param pData: a 16-bit pointer to data buffer.
bogdanm 0:9b334a45a8ff 338 * @param Size: number of data sample to be sent:
bogdanm 0:9b334a45a8ff 339 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
bogdanm 0:9b334a45a8ff 340 * configuration phase, the Size parameter means the number of 16-bit data length
bogdanm 0:9b334a45a8ff 341 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
bogdanm 0:9b334a45a8ff 342 * the Size parameter means the number of 16-bit data length.
bogdanm 0:9b334a45a8ff 343 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 344 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
bogdanm 0:9b334a45a8ff 345 * between Master and Slave(example: audio streaming).
bogdanm 0:9b334a45a8ff 346 * @retval HAL status
bogdanm 0:9b334a45a8ff 347 */
bogdanm 0:9b334a45a8ff 348 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 349 {
bogdanm 0:9b334a45a8ff 350 if((pData == HAL_NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 351 {
bogdanm 0:9b334a45a8ff 352 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 353 }
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355 if(hi2s->State == HAL_I2S_STATE_READY)
bogdanm 0:9b334a45a8ff 356 {
bogdanm 0:9b334a45a8ff 357 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
bogdanm 0:9b334a45a8ff 358 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 359 {
bogdanm 0:9b334a45a8ff 360 hi2s->TxXferSize = (Size << 1);
bogdanm 0:9b334a45a8ff 361 hi2s->TxXferCount = (Size << 1);
bogdanm 0:9b334a45a8ff 362 }
bogdanm 0:9b334a45a8ff 363 else
bogdanm 0:9b334a45a8ff 364 {
bogdanm 0:9b334a45a8ff 365 hi2s->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 366 hi2s->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 367 }
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 /* Process Locked */
bogdanm 0:9b334a45a8ff 370 __HAL_LOCK(hi2s);
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
bogdanm 0:9b334a45a8ff 373 hi2s->State = HAL_I2S_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /* Check if the I2S is already enabled */
bogdanm 0:9b334a45a8ff 376 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 377 {
bogdanm 0:9b334a45a8ff 378 /* Enable I2S peripheral */
bogdanm 0:9b334a45a8ff 379 __HAL_I2S_ENABLE(hi2s);
bogdanm 0:9b334a45a8ff 380 }
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 while(hi2s->TxXferCount > 0)
bogdanm 0:9b334a45a8ff 383 {
bogdanm 0:9b334a45a8ff 384 hi2s->Instance->DR = (*pData++);
bogdanm 0:9b334a45a8ff 385 hi2s->TxXferCount--;
bogdanm 0:9b334a45a8ff 386 /* Wait until TXE flag is set */
bogdanm 0:9b334a45a8ff 387 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 388 {
bogdanm 0:9b334a45a8ff 389 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 390 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 391 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 392 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 393 }
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /* Check if an underrun occurs */
bogdanm 0:9b334a45a8ff 396 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
bogdanm 0:9b334a45a8ff 397 {
bogdanm 0:9b334a45a8ff 398 /* Set the I2S State ready */
bogdanm 0:9b334a45a8ff 399 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 402 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 405 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
bogdanm 0:9b334a45a8ff 406 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 407
bogdanm 0:9b334a45a8ff 408 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 409 }
bogdanm 0:9b334a45a8ff 410 }
bogdanm 0:9b334a45a8ff 411
bogdanm 0:9b334a45a8ff 412 /* Wait until Busy flag is reset */
bogdanm 0:9b334a45a8ff 413 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 414 {
bogdanm 0:9b334a45a8ff 415 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 416 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 417 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 418 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 419 }
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 422
bogdanm 0:9b334a45a8ff 423 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 424 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 425
bogdanm 0:9b334a45a8ff 426 return HAL_OK;
bogdanm 0:9b334a45a8ff 427 }
bogdanm 0:9b334a45a8ff 428 else
bogdanm 0:9b334a45a8ff 429 {
bogdanm 0:9b334a45a8ff 430 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 431 }
bogdanm 0:9b334a45a8ff 432 }
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434 /**
bogdanm 0:9b334a45a8ff 435 * @brief Receive an amount of data in blocking mode
bogdanm 0:9b334a45a8ff 436 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 437 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 438 * @param pData: a 16-bit pointer to data buffer.
bogdanm 0:9b334a45a8ff 439 * @param Size: number of data sample to be sent:
bogdanm 0:9b334a45a8ff 440 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
bogdanm 0:9b334a45a8ff 441 * configuration phase, the Size parameter means the number of 16-bit data length
bogdanm 0:9b334a45a8ff 442 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
bogdanm 0:9b334a45a8ff 443 * the Size parameter means the number of 16-bit data length.
bogdanm 0:9b334a45a8ff 444 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 445 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
bogdanm 0:9b334a45a8ff 446 * between Master and Slave(example: audio streaming).
bogdanm 0:9b334a45a8ff 447 * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
bogdanm 0:9b334a45a8ff 448 * in continouse way and as the I2S is not disabled at the end of the I2S transaction.
bogdanm 0:9b334a45a8ff 449 * @retval HAL status
bogdanm 0:9b334a45a8ff 450 */
bogdanm 0:9b334a45a8ff 451 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 452 {
bogdanm 0:9b334a45a8ff 453 if((pData == HAL_NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 454 {
bogdanm 0:9b334a45a8ff 455 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 456 }
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 if(hi2s->State == HAL_I2S_STATE_READY)
bogdanm 0:9b334a45a8ff 459 {
bogdanm 0:9b334a45a8ff 460 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
bogdanm 0:9b334a45a8ff 461 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 462 {
bogdanm 0:9b334a45a8ff 463 hi2s->RxXferSize = (Size << 1);
bogdanm 0:9b334a45a8ff 464 hi2s->RxXferCount = (Size << 1);
bogdanm 0:9b334a45a8ff 465 }
bogdanm 0:9b334a45a8ff 466 else
bogdanm 0:9b334a45a8ff 467 {
bogdanm 0:9b334a45a8ff 468 hi2s->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 469 hi2s->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 470 }
bogdanm 0:9b334a45a8ff 471 /* Process Locked */
bogdanm 0:9b334a45a8ff 472 __HAL_LOCK(hi2s);
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
bogdanm 0:9b334a45a8ff 475 hi2s->State = HAL_I2S_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 /* Check if the I2S is already enabled */
bogdanm 0:9b334a45a8ff 478 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 479 {
bogdanm 0:9b334a45a8ff 480 /* Enable I2S peripheral */
bogdanm 0:9b334a45a8ff 481 __HAL_I2S_ENABLE(hi2s);
bogdanm 0:9b334a45a8ff 482 }
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 /* Check if Master Receiver mode is selected */
bogdanm 0:9b334a45a8ff 485 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
bogdanm 0:9b334a45a8ff 486 {
bogdanm 0:9b334a45a8ff 487 /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
bogdanm 0:9b334a45a8ff 488 access to the SPI_SR register. */
bogdanm 0:9b334a45a8ff 489 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
bogdanm 0:9b334a45a8ff 490 }
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492 /* Receive data */
bogdanm 0:9b334a45a8ff 493 while(hi2s->RxXferCount > 0)
bogdanm 0:9b334a45a8ff 494 {
bogdanm 0:9b334a45a8ff 495 /* Wait until RXNE flag is set */
bogdanm 0:9b334a45a8ff 496 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 497 {
bogdanm 0:9b334a45a8ff 498 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 499 hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
bogdanm 0:9b334a45a8ff 500 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 501 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 502 }
bogdanm 0:9b334a45a8ff 503
bogdanm 0:9b334a45a8ff 504 /* Check if an overrun occurs */
bogdanm 0:9b334a45a8ff 505 if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
bogdanm 0:9b334a45a8ff 506 {
bogdanm 0:9b334a45a8ff 507 /* Set the I2S State ready */
bogdanm 0:9b334a45a8ff 508 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 509
bogdanm 0:9b334a45a8ff 510 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 511 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 512
bogdanm 0:9b334a45a8ff 513 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 514 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
bogdanm 0:9b334a45a8ff 515 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 516
bogdanm 0:9b334a45a8ff 517 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 518 }
bogdanm 0:9b334a45a8ff 519
bogdanm 0:9b334a45a8ff 520 (*pData++) = hi2s->Instance->DR;
bogdanm 0:9b334a45a8ff 521 hi2s->RxXferCount--;
bogdanm 0:9b334a45a8ff 522 }
bogdanm 0:9b334a45a8ff 523
bogdanm 0:9b334a45a8ff 524 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 525
bogdanm 0:9b334a45a8ff 526 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 527 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 528
bogdanm 0:9b334a45a8ff 529 return HAL_OK;
bogdanm 0:9b334a45a8ff 530 }
bogdanm 0:9b334a45a8ff 531 else
bogdanm 0:9b334a45a8ff 532 {
bogdanm 0:9b334a45a8ff 533 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 534 }
bogdanm 0:9b334a45a8ff 535 }
bogdanm 0:9b334a45a8ff 536
bogdanm 0:9b334a45a8ff 537 /**
bogdanm 0:9b334a45a8ff 538 * @brief Transmit an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 539 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 540 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 541 * @param pData: a 16-bit pointer to data buffer.
bogdanm 0:9b334a45a8ff 542 * @param Size: number of data sample to be sent:
bogdanm 0:9b334a45a8ff 543 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
bogdanm 0:9b334a45a8ff 544 * configuration phase, the Size parameter means the number of 16-bit data length
bogdanm 0:9b334a45a8ff 545 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
bogdanm 0:9b334a45a8ff 546 * the Size parameter means the number of 16-bit data length.
bogdanm 0:9b334a45a8ff 547 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
bogdanm 0:9b334a45a8ff 548 * between Master and Slave(example: audio streaming).
bogdanm 0:9b334a45a8ff 549 * @retval HAL status
bogdanm 0:9b334a45a8ff 550 */
bogdanm 0:9b334a45a8ff 551 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 552 {
bogdanm 0:9b334a45a8ff 553 if(hi2s->State == HAL_I2S_STATE_READY)
bogdanm 0:9b334a45a8ff 554 {
bogdanm 0:9b334a45a8ff 555 if((pData == HAL_NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 556 {
bogdanm 0:9b334a45a8ff 557 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 558 }
bogdanm 0:9b334a45a8ff 559
bogdanm 0:9b334a45a8ff 560 hi2s->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 561 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
bogdanm 0:9b334a45a8ff 562 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 563 {
bogdanm 0:9b334a45a8ff 564 hi2s->TxXferSize = (Size << 1);
bogdanm 0:9b334a45a8ff 565 hi2s->TxXferCount = (Size << 1);
bogdanm 0:9b334a45a8ff 566 }
bogdanm 0:9b334a45a8ff 567 else
bogdanm 0:9b334a45a8ff 568 {
bogdanm 0:9b334a45a8ff 569 hi2s->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 570 hi2s->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 571 }
bogdanm 0:9b334a45a8ff 572
bogdanm 0:9b334a45a8ff 573 /* Process Locked */
bogdanm 0:9b334a45a8ff 574 __HAL_LOCK(hi2s);
bogdanm 0:9b334a45a8ff 575
bogdanm 0:9b334a45a8ff 576 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
bogdanm 0:9b334a45a8ff 577 hi2s->State = HAL_I2S_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 578
bogdanm 0:9b334a45a8ff 579 /* Enable TXE and ERR interrupt */
bogdanm 0:9b334a45a8ff 580 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
bogdanm 0:9b334a45a8ff 581
bogdanm 0:9b334a45a8ff 582 /* Check if the I2S is already enabled */
bogdanm 0:9b334a45a8ff 583 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 584 {
bogdanm 0:9b334a45a8ff 585 /* Enable I2S peripheral */
bogdanm 0:9b334a45a8ff 586 __HAL_I2S_ENABLE(hi2s);
bogdanm 0:9b334a45a8ff 587 }
bogdanm 0:9b334a45a8ff 588
bogdanm 0:9b334a45a8ff 589 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 590 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 591
bogdanm 0:9b334a45a8ff 592 return HAL_OK;
bogdanm 0:9b334a45a8ff 593 }
bogdanm 0:9b334a45a8ff 594 else
bogdanm 0:9b334a45a8ff 595 {
bogdanm 0:9b334a45a8ff 596 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 597 }
bogdanm 0:9b334a45a8ff 598 }
bogdanm 0:9b334a45a8ff 599
bogdanm 0:9b334a45a8ff 600 /**
bogdanm 0:9b334a45a8ff 601 * @brief Receive an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 602 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 603 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 604 * @param pData: a 16-bit pointer to the Receive data buffer.
bogdanm 0:9b334a45a8ff 605 * @param Size: number of data sample to be sent:
bogdanm 0:9b334a45a8ff 606 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
bogdanm 0:9b334a45a8ff 607 * configuration phase, the Size parameter means the number of 16-bit data length
bogdanm 0:9b334a45a8ff 608 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
bogdanm 0:9b334a45a8ff 609 * the Size parameter means the number of 16-bit data length.
bogdanm 0:9b334a45a8ff 610 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
bogdanm 0:9b334a45a8ff 611 * between Master and Slave(example: audio streaming).
bogdanm 0:9b334a45a8ff 612 * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
bogdanm 0:9b334a45a8ff 613 * between Master and Slave otherwise the I2S interrupt should be optimized.
bogdanm 0:9b334a45a8ff 614 * @retval HAL status
bogdanm 0:9b334a45a8ff 615 */
bogdanm 0:9b334a45a8ff 616 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 617 {
bogdanm 0:9b334a45a8ff 618 if(hi2s->State == HAL_I2S_STATE_READY)
bogdanm 0:9b334a45a8ff 619 {
bogdanm 0:9b334a45a8ff 620 if((pData == HAL_NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 621 {
bogdanm 0:9b334a45a8ff 622 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 623 }
bogdanm 0:9b334a45a8ff 624
bogdanm 0:9b334a45a8ff 625 hi2s->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 626 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
bogdanm 0:9b334a45a8ff 627 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 628 {
bogdanm 0:9b334a45a8ff 629 hi2s->RxXferSize = (Size << 1);
bogdanm 0:9b334a45a8ff 630 hi2s->RxXferCount = (Size << 1);
bogdanm 0:9b334a45a8ff 631 }
bogdanm 0:9b334a45a8ff 632 else
bogdanm 0:9b334a45a8ff 633 {
bogdanm 0:9b334a45a8ff 634 hi2s->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 635 hi2s->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 636 }
bogdanm 0:9b334a45a8ff 637 /* Process Locked */
bogdanm 0:9b334a45a8ff 638 __HAL_LOCK(hi2s);
bogdanm 0:9b334a45a8ff 639
bogdanm 0:9b334a45a8ff 640 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
bogdanm 0:9b334a45a8ff 641 hi2s->State = HAL_I2S_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 642
bogdanm 0:9b334a45a8ff 643 /* Enable TXE and ERR interrupt */
bogdanm 0:9b334a45a8ff 644 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
bogdanm 0:9b334a45a8ff 645
bogdanm 0:9b334a45a8ff 646 /* Check if the I2S is already enabled */
bogdanm 0:9b334a45a8ff 647 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 648 {
bogdanm 0:9b334a45a8ff 649 /* Enable I2S peripheral */
bogdanm 0:9b334a45a8ff 650 __HAL_I2S_ENABLE(hi2s);
bogdanm 0:9b334a45a8ff 651 }
bogdanm 0:9b334a45a8ff 652
bogdanm 0:9b334a45a8ff 653 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 654 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 655
bogdanm 0:9b334a45a8ff 656 return HAL_OK;
bogdanm 0:9b334a45a8ff 657 }
bogdanm 0:9b334a45a8ff 658 else
bogdanm 0:9b334a45a8ff 659 {
bogdanm 0:9b334a45a8ff 660 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 661 }
bogdanm 0:9b334a45a8ff 662 }
bogdanm 0:9b334a45a8ff 663
bogdanm 0:9b334a45a8ff 664 /**
bogdanm 0:9b334a45a8ff 665 * @brief Transmit an amount of data in non-blocking mode with DMA
bogdanm 0:9b334a45a8ff 666 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 667 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 668 * @param pData: a 16-bit pointer to the Transmit data buffer.
bogdanm 0:9b334a45a8ff 669 * @param Size: number of data sample to be sent:
bogdanm 0:9b334a45a8ff 670 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
bogdanm 0:9b334a45a8ff 671 * configuration phase, the Size parameter means the number of 16-bit data length
bogdanm 0:9b334a45a8ff 672 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
bogdanm 0:9b334a45a8ff 673 * the Size parameter means the number of 16-bit data length.
bogdanm 0:9b334a45a8ff 674 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
bogdanm 0:9b334a45a8ff 675 * between Master and Slave(example: audio streaming).
bogdanm 0:9b334a45a8ff 676 * @retval HAL status
bogdanm 0:9b334a45a8ff 677 */
bogdanm 0:9b334a45a8ff 678 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 679 {
bogdanm 0:9b334a45a8ff 680 uint32_t *tmp;
bogdanm 0:9b334a45a8ff 681
bogdanm 0:9b334a45a8ff 682 if((pData == HAL_NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 683 {
bogdanm 0:9b334a45a8ff 684 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 685 }
bogdanm 0:9b334a45a8ff 686
bogdanm 0:9b334a45a8ff 687 if(hi2s->State == HAL_I2S_STATE_READY)
bogdanm 0:9b334a45a8ff 688 {
bogdanm 0:9b334a45a8ff 689 hi2s->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 690 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
bogdanm 0:9b334a45a8ff 691 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 692 {
bogdanm 0:9b334a45a8ff 693 hi2s->TxXferSize = (Size << 1);
bogdanm 0:9b334a45a8ff 694 hi2s->TxXferCount = (Size << 1);
bogdanm 0:9b334a45a8ff 695 }
bogdanm 0:9b334a45a8ff 696 else
bogdanm 0:9b334a45a8ff 697 {
bogdanm 0:9b334a45a8ff 698 hi2s->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 699 hi2s->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 700 }
bogdanm 0:9b334a45a8ff 701
bogdanm 0:9b334a45a8ff 702 /* Process Locked */
bogdanm 0:9b334a45a8ff 703 __HAL_LOCK(hi2s);
bogdanm 0:9b334a45a8ff 704
bogdanm 0:9b334a45a8ff 705 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
bogdanm 0:9b334a45a8ff 706 hi2s->State = HAL_I2S_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 707
bogdanm 0:9b334a45a8ff 708 /* Set the I2S Tx DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 709 hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
bogdanm 0:9b334a45a8ff 710
bogdanm 0:9b334a45a8ff 711 /* Set the I2S TxDMA transfer complete callback */
bogdanm 0:9b334a45a8ff 712 hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
bogdanm 0:9b334a45a8ff 713
bogdanm 0:9b334a45a8ff 714 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 715 hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
bogdanm 0:9b334a45a8ff 716
bogdanm 0:9b334a45a8ff 717 /* Enable the Tx DMA Channel */
bogdanm 0:9b334a45a8ff 718 tmp = (uint32_t*)&pData;
bogdanm 0:9b334a45a8ff 719 HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721 /* Check if the I2S is already enabled */
bogdanm 0:9b334a45a8ff 722 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 723 {
bogdanm 0:9b334a45a8ff 724 /* Enable I2S peripheral */
bogdanm 0:9b334a45a8ff 725 __HAL_I2S_ENABLE(hi2s);
bogdanm 0:9b334a45a8ff 726 }
bogdanm 0:9b334a45a8ff 727
bogdanm 0:9b334a45a8ff 728 /* Enable Tx DMA Request */
bogdanm 0:9b334a45a8ff 729 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
bogdanm 0:9b334a45a8ff 730
bogdanm 0:9b334a45a8ff 731 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 732 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 733
bogdanm 0:9b334a45a8ff 734 return HAL_OK;
bogdanm 0:9b334a45a8ff 735 }
bogdanm 0:9b334a45a8ff 736 else
bogdanm 0:9b334a45a8ff 737 {
bogdanm 0:9b334a45a8ff 738 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 739 }
bogdanm 0:9b334a45a8ff 740 }
bogdanm 0:9b334a45a8ff 741
bogdanm 0:9b334a45a8ff 742 /**
bogdanm 0:9b334a45a8ff 743 * @brief Receive an amount of data in non-blocking mode with DMA
bogdanm 0:9b334a45a8ff 744 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 745 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 746 * @param pData: a 16-bit pointer to the Receive data buffer.
bogdanm 0:9b334a45a8ff 747 * @param Size: number of data sample to be sent:
bogdanm 0:9b334a45a8ff 748 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
bogdanm 0:9b334a45a8ff 749 * configuration phase, the Size parameter means the number of 16-bit data length
bogdanm 0:9b334a45a8ff 750 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
bogdanm 0:9b334a45a8ff 751 * the Size parameter means the number of 16-bit data length.
bogdanm 0:9b334a45a8ff 752 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
bogdanm 0:9b334a45a8ff 753 * between Master and Slave(example: audio streaming).
bogdanm 0:9b334a45a8ff 754 * @retval HAL status
bogdanm 0:9b334a45a8ff 755 */
bogdanm 0:9b334a45a8ff 756 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 757 {
bogdanm 0:9b334a45a8ff 758 uint32_t *tmp;
bogdanm 0:9b334a45a8ff 759
bogdanm 0:9b334a45a8ff 760 if((pData == HAL_NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 761 {
bogdanm 0:9b334a45a8ff 762 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 763 }
bogdanm 0:9b334a45a8ff 764
bogdanm 0:9b334a45a8ff 765 if(hi2s->State == HAL_I2S_STATE_READY)
bogdanm 0:9b334a45a8ff 766 {
bogdanm 0:9b334a45a8ff 767 hi2s->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 768 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
bogdanm 0:9b334a45a8ff 769 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
bogdanm 0:9b334a45a8ff 770 {
bogdanm 0:9b334a45a8ff 771 hi2s->RxXferSize = (Size << 1);
bogdanm 0:9b334a45a8ff 772 hi2s->RxXferCount = (Size << 1);
bogdanm 0:9b334a45a8ff 773 }
bogdanm 0:9b334a45a8ff 774 else
bogdanm 0:9b334a45a8ff 775 {
bogdanm 0:9b334a45a8ff 776 hi2s->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 777 hi2s->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 778 }
bogdanm 0:9b334a45a8ff 779 /* Process Locked */
bogdanm 0:9b334a45a8ff 780 __HAL_LOCK(hi2s);
bogdanm 0:9b334a45a8ff 781
bogdanm 0:9b334a45a8ff 782 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
bogdanm 0:9b334a45a8ff 783 hi2s->State = HAL_I2S_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 784
bogdanm 0:9b334a45a8ff 785 /* Set the I2S Rx DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 786 hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
bogdanm 0:9b334a45a8ff 787
bogdanm 0:9b334a45a8ff 788 /* Set the I2S Rx DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 789 hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
bogdanm 0:9b334a45a8ff 790
bogdanm 0:9b334a45a8ff 791 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 792 hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
bogdanm 0:9b334a45a8ff 793
bogdanm 0:9b334a45a8ff 794 /* Check if Master Receiver mode is selected */
bogdanm 0:9b334a45a8ff 795 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
bogdanm 0:9b334a45a8ff 796 {
bogdanm 0:9b334a45a8ff 797 /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
bogdanm 0:9b334a45a8ff 798 access to the SPI_SR register. */
bogdanm 0:9b334a45a8ff 799 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
bogdanm 0:9b334a45a8ff 800 }
bogdanm 0:9b334a45a8ff 801
bogdanm 0:9b334a45a8ff 802 /* Enable the Rx DMA Channel */
bogdanm 0:9b334a45a8ff 803 tmp = (uint32_t*)&pData;
bogdanm 0:9b334a45a8ff 804 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
bogdanm 0:9b334a45a8ff 805
bogdanm 0:9b334a45a8ff 806 /* Check if the I2S is already enabled */
bogdanm 0:9b334a45a8ff 807 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
bogdanm 0:9b334a45a8ff 808 {
bogdanm 0:9b334a45a8ff 809 /* Enable I2S peripheral */
bogdanm 0:9b334a45a8ff 810 __HAL_I2S_ENABLE(hi2s);
bogdanm 0:9b334a45a8ff 811 }
bogdanm 0:9b334a45a8ff 812
bogdanm 0:9b334a45a8ff 813 /* Enable Rx DMA Request */
bogdanm 0:9b334a45a8ff 814 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
bogdanm 0:9b334a45a8ff 815
bogdanm 0:9b334a45a8ff 816 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 817 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 818
bogdanm 0:9b334a45a8ff 819 return HAL_OK;
bogdanm 0:9b334a45a8ff 820 }
bogdanm 0:9b334a45a8ff 821 else
bogdanm 0:9b334a45a8ff 822 {
bogdanm 0:9b334a45a8ff 823 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 824 }
bogdanm 0:9b334a45a8ff 825 }
bogdanm 0:9b334a45a8ff 826
bogdanm 0:9b334a45a8ff 827 /**
bogdanm 0:9b334a45a8ff 828 * @brief This function handles I2S interrupt request.
bogdanm 0:9b334a45a8ff 829 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 830 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 831 * @retval HAL status
bogdanm 0:9b334a45a8ff 832 */
bogdanm 0:9b334a45a8ff 833 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 834 {
bogdanm 0:9b334a45a8ff 835 __IO uint32_t i2ssr = hi2s->Instance->SR;
bogdanm 0:9b334a45a8ff 836
bogdanm 0:9b334a45a8ff 837 if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 838 {
bogdanm 0:9b334a45a8ff 839 /* I2S in mode Receiver ----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 840 if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
bogdanm 0:9b334a45a8ff 841 {
bogdanm 0:9b334a45a8ff 842 I2S_Receive_IT(hi2s);
bogdanm 0:9b334a45a8ff 843 }
bogdanm 0:9b334a45a8ff 844
bogdanm 0:9b334a45a8ff 845 /* I2S Overrun error interrupt occured -------------------------------------*/
bogdanm 0:9b334a45a8ff 846 if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
bogdanm 0:9b334a45a8ff 847 {
bogdanm 0:9b334a45a8ff 848 /* Disable RXNE and ERR interrupt */
bogdanm 0:9b334a45a8ff 849 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
bogdanm 0:9b334a45a8ff 850
bogdanm 0:9b334a45a8ff 851 /* Set the I2S State ready */
bogdanm 0:9b334a45a8ff 852 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 853
bogdanm 0:9b334a45a8ff 854 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 855 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
bogdanm 0:9b334a45a8ff 856 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 857 }
bogdanm 0:9b334a45a8ff 858 }
bogdanm 0:9b334a45a8ff 859 else if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 860 {
bogdanm 0:9b334a45a8ff 861 /* I2S in mode Tramitter ---------------------------------------------------*/
bogdanm 0:9b334a45a8ff 862 if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
bogdanm 0:9b334a45a8ff 863 {
bogdanm 0:9b334a45a8ff 864 I2S_Transmit_IT(hi2s);
bogdanm 0:9b334a45a8ff 865 }
bogdanm 0:9b334a45a8ff 866
bogdanm 0:9b334a45a8ff 867 /* I2S Underrun error interrupt occured ------------------------------------*/
bogdanm 0:9b334a45a8ff 868 if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
bogdanm 0:9b334a45a8ff 869 {
bogdanm 0:9b334a45a8ff 870 /* Disable TXE and ERR interrupt */
bogdanm 0:9b334a45a8ff 871 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
bogdanm 0:9b334a45a8ff 872
bogdanm 0:9b334a45a8ff 873 /* Set the I2S State ready */
bogdanm 0:9b334a45a8ff 874 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 875
bogdanm 0:9b334a45a8ff 876 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 877 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
bogdanm 0:9b334a45a8ff 878 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 879 }
bogdanm 0:9b334a45a8ff 880 }
bogdanm 0:9b334a45a8ff 881 }
bogdanm 0:9b334a45a8ff 882
bogdanm 0:9b334a45a8ff 883 /**
bogdanm 0:9b334a45a8ff 884 * @}
bogdanm 0:9b334a45a8ff 885 */
bogdanm 0:9b334a45a8ff 886
bogdanm 0:9b334a45a8ff 887 /**
bogdanm 0:9b334a45a8ff 888 * @}
bogdanm 0:9b334a45a8ff 889 */
bogdanm 0:9b334a45a8ff 890
bogdanm 0:9b334a45a8ff 891 /** @addtogroup I2S_Private_Functions I2S Private Functions
bogdanm 0:9b334a45a8ff 892 * @{
bogdanm 0:9b334a45a8ff 893 */
bogdanm 0:9b334a45a8ff 894 /**
bogdanm 0:9b334a45a8ff 895 * @brief This function handles I2S Communication Timeout.
bogdanm 0:9b334a45a8ff 896 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 897 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 898 * @param Flag: Flag checked
bogdanm 0:9b334a45a8ff 899 * @param State: Value of the flag expected
bogdanm 0:9b334a45a8ff 900 * @param Timeout: Duration of the timeout
bogdanm 0:9b334a45a8ff 901 * @retval HAL status
bogdanm 0:9b334a45a8ff 902 */
bogdanm 0:9b334a45a8ff 903 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag,
bogdanm 0:9b334a45a8ff 904 uint32_t State, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 905 {
bogdanm 0:9b334a45a8ff 906 uint32_t tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 907
bogdanm 0:9b334a45a8ff 908 while((__HAL_I2S_GET_FLAG(hi2s, Flag)) != State)
bogdanm 0:9b334a45a8ff 909 {
bogdanm 0:9b334a45a8ff 910 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 911 {
bogdanm 0:9b334a45a8ff 912 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
bogdanm 0:9b334a45a8ff 913 {
bogdanm 0:9b334a45a8ff 914 /* Set the I2S State ready */
bogdanm 0:9b334a45a8ff 915 hi2s->State= HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 916
bogdanm 0:9b334a45a8ff 917 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 918 __HAL_UNLOCK(hi2s);
bogdanm 0:9b334a45a8ff 919
bogdanm 0:9b334a45a8ff 920 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 921 }
bogdanm 0:9b334a45a8ff 922 }
bogdanm 0:9b334a45a8ff 923 }
bogdanm 0:9b334a45a8ff 924
bogdanm 0:9b334a45a8ff 925 return HAL_OK;
bogdanm 0:9b334a45a8ff 926 }
bogdanm 0:9b334a45a8ff 927 /**
bogdanm 0:9b334a45a8ff 928 * @}
bogdanm 0:9b334a45a8ff 929 */
bogdanm 0:9b334a45a8ff 930
bogdanm 0:9b334a45a8ff 931 /** @addtogroup I2S_Exported_Functions I2S Exported Functions
bogdanm 0:9b334a45a8ff 932 * @{
bogdanm 0:9b334a45a8ff 933 */
bogdanm 0:9b334a45a8ff 934
bogdanm 0:9b334a45a8ff 935 /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions
bogdanm 0:9b334a45a8ff 936 * @{
bogdanm 0:9b334a45a8ff 937 */
bogdanm 0:9b334a45a8ff 938 /**
bogdanm 0:9b334a45a8ff 939 * @brief Tx Transfer Half completed callbacks
bogdanm 0:9b334a45a8ff 940 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 941 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 942 * @retval None
bogdanm 0:9b334a45a8ff 943 */
bogdanm 0:9b334a45a8ff 944 __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 945 {
bogdanm 0:9b334a45a8ff 946 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 947 the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 948 */
bogdanm 0:9b334a45a8ff 949 }
bogdanm 0:9b334a45a8ff 950
bogdanm 0:9b334a45a8ff 951 /**
bogdanm 0:9b334a45a8ff 952 * @brief Tx Transfer completed callbacks
bogdanm 0:9b334a45a8ff 953 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 954 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 955 * @retval None
bogdanm 0:9b334a45a8ff 956 */
bogdanm 0:9b334a45a8ff 957 __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 958 {
bogdanm 0:9b334a45a8ff 959 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 960 the HAL_I2S_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 961 */
bogdanm 0:9b334a45a8ff 962 }
bogdanm 0:9b334a45a8ff 963
bogdanm 0:9b334a45a8ff 964 /**
bogdanm 0:9b334a45a8ff 965 * @brief Rx Transfer half completed callbacks
bogdanm 0:9b334a45a8ff 966 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 967 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 968 * @retval None
bogdanm 0:9b334a45a8ff 969 */
bogdanm 0:9b334a45a8ff 970 __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 971 {
bogdanm 0:9b334a45a8ff 972 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 973 the HAL_I2S_RxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 974 */
bogdanm 0:9b334a45a8ff 975 }
bogdanm 0:9b334a45a8ff 976
bogdanm 0:9b334a45a8ff 977 /**
bogdanm 0:9b334a45a8ff 978 * @brief Rx Transfer completed callbacks
bogdanm 0:9b334a45a8ff 979 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 980 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 981 * @retval None
bogdanm 0:9b334a45a8ff 982 */
bogdanm 0:9b334a45a8ff 983 __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 984 {
bogdanm 0:9b334a45a8ff 985 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 986 the HAL_I2S_RxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 987 */
bogdanm 0:9b334a45a8ff 988 }
bogdanm 0:9b334a45a8ff 989
bogdanm 0:9b334a45a8ff 990 /**
bogdanm 0:9b334a45a8ff 991 * @brief I2S error callbacks
bogdanm 0:9b334a45a8ff 992 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 993 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 994 * @retval None
bogdanm 0:9b334a45a8ff 995 */
bogdanm 0:9b334a45a8ff 996 __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 997 {
bogdanm 0:9b334a45a8ff 998 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 999 the HAL_I2S_ErrorCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1000 */
bogdanm 0:9b334a45a8ff 1001 }
bogdanm 0:9b334a45a8ff 1002
bogdanm 0:9b334a45a8ff 1003 /**
bogdanm 0:9b334a45a8ff 1004 * @}
bogdanm 0:9b334a45a8ff 1005 */
bogdanm 0:9b334a45a8ff 1006
bogdanm 0:9b334a45a8ff 1007 /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 1008 * @brief Peripheral State functions
bogdanm 0:9b334a45a8ff 1009 *
bogdanm 0:9b334a45a8ff 1010 @verbatim
bogdanm 0:9b334a45a8ff 1011 ===============================================================================
bogdanm 0:9b334a45a8ff 1012 ##### Peripheral State and Errors functions #####
bogdanm 0:9b334a45a8ff 1013 ===============================================================================
bogdanm 0:9b334a45a8ff 1014 [..]
bogdanm 0:9b334a45a8ff 1015 This subsection permits to get in run-time the status of the peripheral
bogdanm 0:9b334a45a8ff 1016 and the data flow.
bogdanm 0:9b334a45a8ff 1017
bogdanm 0:9b334a45a8ff 1018 @endverbatim
bogdanm 0:9b334a45a8ff 1019 * @{
bogdanm 0:9b334a45a8ff 1020 */
bogdanm 0:9b334a45a8ff 1021
bogdanm 0:9b334a45a8ff 1022 /**
bogdanm 0:9b334a45a8ff 1023 * @brief Return the I2S state
bogdanm 0:9b334a45a8ff 1024 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1025 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 1026 * @retval HAL state
bogdanm 0:9b334a45a8ff 1027 */
bogdanm 0:9b334a45a8ff 1028 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 1029 {
bogdanm 0:9b334a45a8ff 1030 return hi2s->State;
bogdanm 0:9b334a45a8ff 1031 }
bogdanm 0:9b334a45a8ff 1032
bogdanm 0:9b334a45a8ff 1033 /**
bogdanm 0:9b334a45a8ff 1034 * @brief Return the I2S error code
bogdanm 0:9b334a45a8ff 1035 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1036 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 1037 * @retval I2S Error Code
bogdanm 0:9b334a45a8ff 1038 */
bogdanm 0:9b334a45a8ff 1039 HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 1040 {
bogdanm 0:9b334a45a8ff 1041 return hi2s->ErrorCode;
bogdanm 0:9b334a45a8ff 1042 }
bogdanm 0:9b334a45a8ff 1043 /**
bogdanm 0:9b334a45a8ff 1044 * @}
bogdanm 0:9b334a45a8ff 1045 */
bogdanm 0:9b334a45a8ff 1046
bogdanm 0:9b334a45a8ff 1047 /**
bogdanm 0:9b334a45a8ff 1048 * @}
bogdanm 0:9b334a45a8ff 1049 */
bogdanm 0:9b334a45a8ff 1050
bogdanm 0:9b334a45a8ff 1051 /** @addtogroup I2S_Private_Functions I2S Private Functions
bogdanm 0:9b334a45a8ff 1052 * @{
bogdanm 0:9b334a45a8ff 1053 */
bogdanm 0:9b334a45a8ff 1054 /**
bogdanm 0:9b334a45a8ff 1055 * @brief DMA I2S transmit process complete callback
bogdanm 0:9b334a45a8ff 1056 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1057 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1058 * @retval None
bogdanm 0:9b334a45a8ff 1059 */
bogdanm 0:9b334a45a8ff 1060 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1061 {
bogdanm 0:9b334a45a8ff 1062 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1063
bogdanm 0:9b334a45a8ff 1064 /* Disable Tx DMA Request */
bogdanm 0:9b334a45a8ff 1065 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
bogdanm 0:9b334a45a8ff 1066
bogdanm 0:9b334a45a8ff 1067 hi2s->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1068 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 1069
bogdanm 0:9b334a45a8ff 1070 HAL_I2S_TxCpltCallback(hi2s);
bogdanm 0:9b334a45a8ff 1071 }
bogdanm 0:9b334a45a8ff 1072
bogdanm 0:9b334a45a8ff 1073 /**
bogdanm 0:9b334a45a8ff 1074 * @brief DMA I2S transmit process half complete callback
bogdanm 0:9b334a45a8ff 1075 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1076 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1077 * @retval None
bogdanm 0:9b334a45a8ff 1078 */
bogdanm 0:9b334a45a8ff 1079 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1080 {
bogdanm 0:9b334a45a8ff 1081 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1082
bogdanm 0:9b334a45a8ff 1083 HAL_I2S_TxHalfCpltCallback(hi2s);
bogdanm 0:9b334a45a8ff 1084 }
bogdanm 0:9b334a45a8ff 1085
bogdanm 0:9b334a45a8ff 1086 /**
bogdanm 0:9b334a45a8ff 1087 * @brief DMA I2S receive process complete callback
bogdanm 0:9b334a45a8ff 1088 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1089 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1090 * @retval None
bogdanm 0:9b334a45a8ff 1091 */
bogdanm 0:9b334a45a8ff 1092 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1093 {
bogdanm 0:9b334a45a8ff 1094 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1095
bogdanm 0:9b334a45a8ff 1096 /* Disable Rx DMA Request */
bogdanm 0:9b334a45a8ff 1097 hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
bogdanm 0:9b334a45a8ff 1098 hi2s->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1099
bogdanm 0:9b334a45a8ff 1100 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 1101 HAL_I2S_RxCpltCallback(hi2s);
bogdanm 0:9b334a45a8ff 1102 }
bogdanm 0:9b334a45a8ff 1103
bogdanm 0:9b334a45a8ff 1104 /**
bogdanm 0:9b334a45a8ff 1105 * @brief DMA I2S receive process half complete callback
bogdanm 0:9b334a45a8ff 1106 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1107 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1108 * @retval None
bogdanm 0:9b334a45a8ff 1109 */
bogdanm 0:9b334a45a8ff 1110 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1111 {
bogdanm 0:9b334a45a8ff 1112 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1113
bogdanm 0:9b334a45a8ff 1114 HAL_I2S_RxHalfCpltCallback(hi2s);
bogdanm 0:9b334a45a8ff 1115 }
bogdanm 0:9b334a45a8ff 1116
bogdanm 0:9b334a45a8ff 1117 /**
bogdanm 0:9b334a45a8ff 1118 * @brief DMA I2S communication error callback
bogdanm 0:9b334a45a8ff 1119 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1120 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1121 * @retval None
bogdanm 0:9b334a45a8ff 1122 */
bogdanm 0:9b334a45a8ff 1123 static void I2S_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1124 {
bogdanm 0:9b334a45a8ff 1125 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1126
bogdanm 0:9b334a45a8ff 1127 /* Disable Rx and Tx DMA Request */
bogdanm 0:9b334a45a8ff 1128 hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
bogdanm 0:9b334a45a8ff 1129 hi2s->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1130 hi2s->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1131
bogdanm 0:9b334a45a8ff 1132 hi2s->State= HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 1133
bogdanm 0:9b334a45a8ff 1134 /* Set the error code and execute error callback*/
bogdanm 0:9b334a45a8ff 1135 hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1136 HAL_I2S_ErrorCallback(hi2s);
bogdanm 0:9b334a45a8ff 1137 }
bogdanm 0:9b334a45a8ff 1138
bogdanm 0:9b334a45a8ff 1139 /**
bogdanm 0:9b334a45a8ff 1140 * @brief Transmit an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1141 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1142 * the configuration information for I2S module
bogdanm 0:9b334a45a8ff 1143 * @retval None
bogdanm 0:9b334a45a8ff 1144 */
bogdanm 0:9b334a45a8ff 1145 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 1146 {
bogdanm 0:9b334a45a8ff 1147 /* Transmit data */
bogdanm 0:9b334a45a8ff 1148 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
bogdanm 0:9b334a45a8ff 1149 hi2s->TxXferCount--;
bogdanm 0:9b334a45a8ff 1150
bogdanm 0:9b334a45a8ff 1151 if(hi2s->TxXferCount == 0)
bogdanm 0:9b334a45a8ff 1152 {
bogdanm 0:9b334a45a8ff 1153 /* Disable TXE and ERR interrupt */
bogdanm 0:9b334a45a8ff 1154 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
bogdanm 0:9b334a45a8ff 1155
bogdanm 0:9b334a45a8ff 1156 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 1157 HAL_I2S_TxCpltCallback(hi2s);
bogdanm 0:9b334a45a8ff 1158 }
bogdanm 0:9b334a45a8ff 1159 }
bogdanm 0:9b334a45a8ff 1160
bogdanm 0:9b334a45a8ff 1161 /**
bogdanm 0:9b334a45a8ff 1162 * @brief Receive an amount of data in non-blocking mode with Interrupt
bogdanm 0:9b334a45a8ff 1163 * @param hi2s: I2S handle
bogdanm 0:9b334a45a8ff 1164 * @retval None
bogdanm 0:9b334a45a8ff 1165 */
bogdanm 0:9b334a45a8ff 1166 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
bogdanm 0:9b334a45a8ff 1167 {
bogdanm 0:9b334a45a8ff 1168 /* Receive data */
bogdanm 0:9b334a45a8ff 1169 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
bogdanm 0:9b334a45a8ff 1170 hi2s->RxXferCount--;
bogdanm 0:9b334a45a8ff 1171
bogdanm 0:9b334a45a8ff 1172 if(hi2s->RxXferCount == 0)
bogdanm 0:9b334a45a8ff 1173 {
bogdanm 0:9b334a45a8ff 1174 /* Disable RXNE and ERR interrupt */
bogdanm 0:9b334a45a8ff 1175 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
bogdanm 0:9b334a45a8ff 1176
bogdanm 0:9b334a45a8ff 1177 hi2s->State = HAL_I2S_STATE_READY;
bogdanm 0:9b334a45a8ff 1178 HAL_I2S_RxCpltCallback(hi2s);
bogdanm 0:9b334a45a8ff 1179 }
bogdanm 0:9b334a45a8ff 1180 }
bogdanm 0:9b334a45a8ff 1181 /**
bogdanm 0:9b334a45a8ff 1182 * @}
bogdanm 0:9b334a45a8ff 1183 */
bogdanm 0:9b334a45a8ff 1184
bogdanm 0:9b334a45a8ff 1185 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
bogdanm 0:9b334a45a8ff 1186 /* STM32F302xC || STM32F303xC || STM32F358xx || */
bogdanm 0:9b334a45a8ff 1187 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
bogdanm 0:9b334a45a8ff 1188 /* STM32F373xC || STM32F378xx */
bogdanm 0:9b334a45a8ff 1189
bogdanm 0:9b334a45a8ff 1190 #endif /* HAL_I2S_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1191 /**
bogdanm 0:9b334a45a8ff 1192 * @}
bogdanm 0:9b334a45a8ff 1193 */
bogdanm 0:9b334a45a8ff 1194
bogdanm 0:9b334a45a8ff 1195 /**
bogdanm 0:9b334a45a8ff 1196 * @}
bogdanm 0:9b334a45a8ff 1197 */
bogdanm 0:9b334a45a8ff 1198
bogdanm 0:9b334a45a8ff 1199 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/