fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2c.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f3xx_hal_i2c.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
bogdanm | 0:9b334a45a8ff | 5 | * @version V1.1.0 |
bogdanm | 0:9b334a45a8ff | 6 | * @date 12-Sept-2014 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief I2C HAL module driver. |
bogdanm | 0:9b334a45a8ff | 8 | * |
bogdanm | 0:9b334a45a8ff | 9 | * This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 10 | * functionalities of the Inter Integrated Circuit (I2C) peripheral: |
bogdanm | 0:9b334a45a8ff | 11 | * + Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 12 | * + IO operation functions |
bogdanm | 0:9b334a45a8ff | 13 | * + Peripheral State functions |
bogdanm | 0:9b334a45a8ff | 14 | * |
bogdanm | 0:9b334a45a8ff | 15 | @verbatim |
bogdanm | 0:9b334a45a8ff | 16 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 17 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 18 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 19 | [..] |
bogdanm | 0:9b334a45a8ff | 20 | The I2C HAL driver can be used as follows: |
bogdanm | 0:9b334a45a8ff | 21 | |
bogdanm | 0:9b334a45a8ff | 22 | (#) Declare a I2C_HandleTypeDef handle structure, for example: |
bogdanm | 0:9b334a45a8ff | 23 | I2C_HandleTypeDef hi2c; |
bogdanm | 0:9b334a45a8ff | 24 | |
bogdanm | 0:9b334a45a8ff | 25 | (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit ()API: |
bogdanm | 0:9b334a45a8ff | 26 | (##) Enable the I2Cx interface clock |
bogdanm | 0:9b334a45a8ff | 27 | (##) I2C pins configuration |
bogdanm | 0:9b334a45a8ff | 28 | (+++) Enable the clock for the I2C GPIOs |
bogdanm | 0:9b334a45a8ff | 29 | (+++) Configure I2C pins as alternate function open-drain |
bogdanm | 0:9b334a45a8ff | 30 | (##) NVIC configuration if you need to use interrupt process |
bogdanm | 0:9b334a45a8ff | 31 | (+++) Configure the I2Cx interrupt priority |
bogdanm | 0:9b334a45a8ff | 32 | (+++) Enable the NVIC I2C IRQ Channel |
bogdanm | 0:9b334a45a8ff | 33 | (##) DMA Configuration if you need to use DMA process |
bogdanm | 0:9b334a45a8ff | 34 | (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel |
bogdanm | 0:9b334a45a8ff | 35 | (+++) Enable the DMAx interface clock using |
bogdanm | 0:9b334a45a8ff | 36 | (+++) Configure the DMA handle parameters |
bogdanm | 0:9b334a45a8ff | 37 | (+++) Configure the DMA Tx or Rx channel |
bogdanm | 0:9b334a45a8ff | 38 | (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle |
bogdanm | 0:9b334a45a8ff | 39 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx channel |
bogdanm | 0:9b334a45a8ff | 40 | |
bogdanm | 0:9b334a45a8ff | 41 | (#) Configure the Communication Clock Timing, Own Address1, Master Adressing Mode, Dual Addressing mode, |
bogdanm | 0:9b334a45a8ff | 42 | Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure. |
bogdanm | 0:9b334a45a8ff | 43 | |
bogdanm | 0:9b334a45a8ff | 44 | (#) Initialize the I2C registers by calling the HAL_I2C_Init() API: |
bogdanm | 0:9b334a45a8ff | 45 | (+++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
bogdanm | 0:9b334a45a8ff | 46 | by calling the customed HAL_I2C_MspInit(&hi2c) API. |
bogdanm | 0:9b334a45a8ff | 47 | |
bogdanm | 0:9b334a45a8ff | 48 | (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() |
bogdanm | 0:9b334a45a8ff | 49 | |
bogdanm | 0:9b334a45a8ff | 50 | (#) For I2C IO and IO MEM operations, three mode of operations are available within this driver : |
bogdanm | 0:9b334a45a8ff | 51 | |
bogdanm | 0:9b334a45a8ff | 52 | *** Polling mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 53 | ================================= |
bogdanm | 0:9b334a45a8ff | 54 | [..] |
bogdanm | 0:9b334a45a8ff | 55 | (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() |
bogdanm | 0:9b334a45a8ff | 56 | (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() |
bogdanm | 0:9b334a45a8ff | 57 | (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() |
bogdanm | 0:9b334a45a8ff | 58 | (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() |
bogdanm | 0:9b334a45a8ff | 59 | |
bogdanm | 0:9b334a45a8ff | 60 | *** Polling mode IO MEM operation *** |
bogdanm | 0:9b334a45a8ff | 61 | ===================================== |
bogdanm | 0:9b334a45a8ff | 62 | [..] |
bogdanm | 0:9b334a45a8ff | 63 | (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() |
bogdanm | 0:9b334a45a8ff | 64 | (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() |
bogdanm | 0:9b334a45a8ff | 65 | |
bogdanm | 0:9b334a45a8ff | 66 | |
bogdanm | 0:9b334a45a8ff | 67 | *** Interrupt mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 68 | =================================== |
bogdanm | 0:9b334a45a8ff | 69 | [..] |
bogdanm | 0:9b334a45a8ff | 70 | (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 71 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 72 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
bogdanm | 0:9b334a45a8ff | 73 | (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 74 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 75 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
bogdanm | 0:9b334a45a8ff | 76 | (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 77 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 78 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
bogdanm | 0:9b334a45a8ff | 79 | (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 80 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 81 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
bogdanm | 0:9b334a45a8ff | 82 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 83 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
bogdanm | 0:9b334a45a8ff | 84 | |
bogdanm | 0:9b334a45a8ff | 85 | *** Interrupt mode IO MEM operation *** |
bogdanm | 0:9b334a45a8ff | 86 | ======================================= |
bogdanm | 0:9b334a45a8ff | 87 | [..] |
bogdanm | 0:9b334a45a8ff | 88 | (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using |
bogdanm | 0:9b334a45a8ff | 89 | HAL_I2C_Mem_Write_IT() |
bogdanm | 0:9b334a45a8ff | 90 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 91 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
bogdanm | 0:9b334a45a8ff | 92 | (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using |
bogdanm | 0:9b334a45a8ff | 93 | HAL_I2C_Mem_Read_IT() |
bogdanm | 0:9b334a45a8ff | 94 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 95 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
bogdanm | 0:9b334a45a8ff | 96 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 97 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
bogdanm | 0:9b334a45a8ff | 98 | |
bogdanm | 0:9b334a45a8ff | 99 | *** DMA mode IO operation *** |
bogdanm | 0:9b334a45a8ff | 100 | ============================== |
bogdanm | 0:9b334a45a8ff | 101 | [..] |
bogdanm | 0:9b334a45a8ff | 102 | (+) Transmit in master mode an amount of data in non blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 103 | HAL_I2C_Master_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 104 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 105 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
bogdanm | 0:9b334a45a8ff | 106 | (+) Receive in master mode an amount of data in non blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 107 | HAL_I2C_Master_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 108 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 109 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
bogdanm | 0:9b334a45a8ff | 110 | (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 111 | HAL_I2C_Slave_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 112 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 113 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
bogdanm | 0:9b334a45a8ff | 114 | (+) Receive in slave mode an amount of data in non blocking mode (DMA) using |
bogdanm | 0:9b334a45a8ff | 115 | HAL_I2C_Slave_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 116 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 117 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
bogdanm | 0:9b334a45a8ff | 118 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 119 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
bogdanm | 0:9b334a45a8ff | 120 | |
bogdanm | 0:9b334a45a8ff | 121 | *** DMA mode IO MEM operation *** |
bogdanm | 0:9b334a45a8ff | 122 | ================================= |
bogdanm | 0:9b334a45a8ff | 123 | [..] |
bogdanm | 0:9b334a45a8ff | 124 | (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using |
bogdanm | 0:9b334a45a8ff | 125 | HAL_I2C_Mem_Write_DMA() |
bogdanm | 0:9b334a45a8ff | 126 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 127 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
bogdanm | 0:9b334a45a8ff | 128 | (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using |
bogdanm | 0:9b334a45a8ff | 129 | HAL_I2C_Mem_Read_DMA() |
bogdanm | 0:9b334a45a8ff | 130 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
bogdanm | 0:9b334a45a8ff | 131 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
bogdanm | 0:9b334a45a8ff | 132 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
bogdanm | 0:9b334a45a8ff | 133 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
bogdanm | 0:9b334a45a8ff | 134 | |
bogdanm | 0:9b334a45a8ff | 135 | |
bogdanm | 0:9b334a45a8ff | 136 | *** I2C HAL driver macros list *** |
bogdanm | 0:9b334a45a8ff | 137 | ================================== |
bogdanm | 0:9b334a45a8ff | 138 | [..] |
bogdanm | 0:9b334a45a8ff | 139 | Below the list of most used macros in I2C HAL driver. |
bogdanm | 0:9b334a45a8ff | 140 | |
bogdanm | 0:9b334a45a8ff | 141 | (+) __HAL_I2C_ENABLE: Enable the I2C peripheral |
bogdanm | 0:9b334a45a8ff | 142 | (+) __HAL_I2C_DISABLE: Disable the I2C peripheral |
bogdanm | 0:9b334a45a8ff | 143 | (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not |
bogdanm | 0:9b334a45a8ff | 144 | (+) __HAL_I2C_CLEAR_FLAG : Clears the specified I2C pending flag |
bogdanm | 0:9b334a45a8ff | 145 | (+) __HAL_I2C_ENABLE_IT: Enables the specified I2C interrupt |
bogdanm | 0:9b334a45a8ff | 146 | (+) __HAL_I2C_DISABLE_IT: Disables the specified I2C interrupt |
bogdanm | 0:9b334a45a8ff | 147 | |
bogdanm | 0:9b334a45a8ff | 148 | [..] |
bogdanm | 0:9b334a45a8ff | 149 | (@) You can refer to the I2C HAL driver header file for more useful macros |
bogdanm | 0:9b334a45a8ff | 150 | |
bogdanm | 0:9b334a45a8ff | 151 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 152 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 153 | * @attention |
bogdanm | 0:9b334a45a8ff | 154 | * |
bogdanm | 0:9b334a45a8ff | 155 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 156 | * |
bogdanm | 0:9b334a45a8ff | 157 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 158 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 159 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 160 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 161 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 162 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 163 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 164 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 165 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 166 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 167 | * |
bogdanm | 0:9b334a45a8ff | 168 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 169 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 170 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 171 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 172 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 173 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 174 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 175 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 176 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 177 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 178 | * |
bogdanm | 0:9b334a45a8ff | 179 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 180 | */ |
bogdanm | 0:9b334a45a8ff | 181 | |
bogdanm | 0:9b334a45a8ff | 182 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 183 | #include "stm32f3xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 184 | |
bogdanm | 0:9b334a45a8ff | 185 | /** @addtogroup STM32F3xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 186 | * @{ |
bogdanm | 0:9b334a45a8ff | 187 | */ |
bogdanm | 0:9b334a45a8ff | 188 | |
bogdanm | 0:9b334a45a8ff | 189 | /** @defgroup I2C I2C HAL module driver |
bogdanm | 0:9b334a45a8ff | 190 | * @brief I2C HAL module driver |
bogdanm | 0:9b334a45a8ff | 191 | * @{ |
bogdanm | 0:9b334a45a8ff | 192 | */ |
bogdanm | 0:9b334a45a8ff | 193 | |
bogdanm | 0:9b334a45a8ff | 194 | #ifdef HAL_I2C_MODULE_ENABLED |
bogdanm | 0:9b334a45a8ff | 195 | |
bogdanm | 0:9b334a45a8ff | 196 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 197 | /* Private define ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 198 | |
bogdanm | 0:9b334a45a8ff | 199 | /** @defgroup I2C_Private_Define I2C Private Define |
bogdanm | 0:9b334a45a8ff | 200 | * @{ |
bogdanm | 0:9b334a45a8ff | 201 | */ |
bogdanm | 0:9b334a45a8ff | 202 | #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */ |
bogdanm | 0:9b334a45a8ff | 203 | #define I2C_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */ |
bogdanm | 0:9b334a45a8ff | 204 | #define I2C_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 205 | #define I2C_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 206 | #define I2C_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 207 | #define I2C_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 208 | #define I2C_TIMEOUT_TC ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 209 | #define I2C_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 210 | #define I2C_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 211 | #define I2C_TIMEOUT_FLAG ((uint32_t)25) /* 25 ms */ |
bogdanm | 0:9b334a45a8ff | 212 | /** |
bogdanm | 0:9b334a45a8ff | 213 | * @} |
bogdanm | 0:9b334a45a8ff | 214 | */ |
bogdanm | 0:9b334a45a8ff | 215 | |
bogdanm | 0:9b334a45a8ff | 216 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 217 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 218 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 219 | |
bogdanm | 0:9b334a45a8ff | 220 | /** @defgroup I2C_Private_Functions I2C Private Functions |
bogdanm | 0:9b334a45a8ff | 221 | * @{ |
bogdanm | 0:9b334a45a8ff | 222 | */ |
bogdanm | 0:9b334a45a8ff | 223 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 224 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 225 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 226 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 227 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 228 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 229 | static void I2C_DMAError(DMA_HandleTypeDef *hdma); |
bogdanm | 0:9b334a45a8ff | 230 | |
bogdanm | 0:9b334a45a8ff | 231 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 232 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 233 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 234 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 235 | static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 236 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 237 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 238 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
bogdanm | 0:9b334a45a8ff | 239 | |
bogdanm | 0:9b334a45a8ff | 240 | static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 241 | static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 242 | |
bogdanm | 0:9b334a45a8ff | 243 | static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 244 | static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c); |
bogdanm | 0:9b334a45a8ff | 245 | |
bogdanm | 0:9b334a45a8ff | 246 | static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request); |
bogdanm | 0:9b334a45a8ff | 247 | /** |
bogdanm | 0:9b334a45a8ff | 248 | * @} |
bogdanm | 0:9b334a45a8ff | 249 | */ |
bogdanm | 0:9b334a45a8ff | 250 | |
bogdanm | 0:9b334a45a8ff | 251 | /* Exported functions ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 252 | |
bogdanm | 0:9b334a45a8ff | 253 | /** @defgroup I2C_Exported_Functions I2C Exported Functions |
bogdanm | 0:9b334a45a8ff | 254 | * @{ |
bogdanm | 0:9b334a45a8ff | 255 | */ |
bogdanm | 0:9b334a45a8ff | 256 | |
bogdanm | 0:9b334a45a8ff | 257 | /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 258 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 259 | * |
bogdanm | 0:9b334a45a8ff | 260 | @verbatim |
bogdanm | 0:9b334a45a8ff | 261 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 262 | ##### Initialization/de-initialization functions ##### |
bogdanm | 0:9b334a45a8ff | 263 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 264 | [..] This subsection provides a set of functions allowing to initialize and |
bogdanm | 0:9b334a45a8ff | 265 | de-initialiaze the I2Cx peripheral: |
bogdanm | 0:9b334a45a8ff | 266 | |
bogdanm | 0:9b334a45a8ff | 267 | (+) User must Implement HAL_I2C_MspInit() function in which he configures |
bogdanm | 0:9b334a45a8ff | 268 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
bogdanm | 0:9b334a45a8ff | 269 | |
bogdanm | 0:9b334a45a8ff | 270 | (+) Call the function HAL_I2C_Init() to configure the selected device with |
bogdanm | 0:9b334a45a8ff | 271 | the selected configuration: |
bogdanm | 0:9b334a45a8ff | 272 | (++) Clock Timing |
bogdanm | 0:9b334a45a8ff | 273 | (++) Own Address 1 |
bogdanm | 0:9b334a45a8ff | 274 | (++) Addressing mode (Master, Slave) |
bogdanm | 0:9b334a45a8ff | 275 | (++) Dual Addressing mode |
bogdanm | 0:9b334a45a8ff | 276 | (++) Own Address 2 |
bogdanm | 0:9b334a45a8ff | 277 | (++) Own Address 2 Mask |
bogdanm | 0:9b334a45a8ff | 278 | (++) General call mode |
bogdanm | 0:9b334a45a8ff | 279 | (++) Nostretch mode |
bogdanm | 0:9b334a45a8ff | 280 | |
bogdanm | 0:9b334a45a8ff | 281 | (+) Call the function HAL_I2C_DeInit() to restore the default configuration |
bogdanm | 0:9b334a45a8ff | 282 | of the selected I2Cx periperal. |
bogdanm | 0:9b334a45a8ff | 283 | |
bogdanm | 0:9b334a45a8ff | 284 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 285 | * @{ |
bogdanm | 0:9b334a45a8ff | 286 | */ |
bogdanm | 0:9b334a45a8ff | 287 | |
bogdanm | 0:9b334a45a8ff | 288 | /** |
bogdanm | 0:9b334a45a8ff | 289 | * @brief Initializes the I2C according to the specified parameters |
bogdanm | 0:9b334a45a8ff | 290 | * in the I2C_InitTypeDef and create the associated handle. |
bogdanm | 0:9b334a45a8ff | 291 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 292 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 293 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 294 | */ |
bogdanm | 0:9b334a45a8ff | 295 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 296 | { |
bogdanm | 0:9b334a45a8ff | 297 | /* Check the I2C handle allocation */ |
bogdanm | 0:9b334a45a8ff | 298 | if(hi2c == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 299 | { |
bogdanm | 0:9b334a45a8ff | 300 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 301 | } |
bogdanm | 0:9b334a45a8ff | 302 | |
bogdanm | 0:9b334a45a8ff | 303 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 304 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
bogdanm | 0:9b334a45a8ff | 305 | assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); |
bogdanm | 0:9b334a45a8ff | 306 | assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); |
bogdanm | 0:9b334a45a8ff | 307 | assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); |
bogdanm | 0:9b334a45a8ff | 308 | assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); |
bogdanm | 0:9b334a45a8ff | 309 | assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); |
bogdanm | 0:9b334a45a8ff | 310 | assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); |
bogdanm | 0:9b334a45a8ff | 311 | assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); |
bogdanm | 0:9b334a45a8ff | 312 | |
bogdanm | 0:9b334a45a8ff | 313 | if(hi2c->State == HAL_I2C_STATE_RESET) |
bogdanm | 0:9b334a45a8ff | 314 | { |
bogdanm | 0:9b334a45a8ff | 315 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
bogdanm | 0:9b334a45a8ff | 316 | HAL_I2C_MspInit(hi2c); |
bogdanm | 0:9b334a45a8ff | 317 | } |
bogdanm | 0:9b334a45a8ff | 318 | |
bogdanm | 0:9b334a45a8ff | 319 | hi2c->State = HAL_I2C_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 320 | |
bogdanm | 0:9b334a45a8ff | 321 | /* Disable the selected I2C peripheral */ |
bogdanm | 0:9b334a45a8ff | 322 | __HAL_I2C_DISABLE(hi2c); |
bogdanm | 0:9b334a45a8ff | 323 | |
bogdanm | 0:9b334a45a8ff | 324 | /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ |
bogdanm | 0:9b334a45a8ff | 325 | /* Configure I2Cx: Frequency range */ |
bogdanm | 0:9b334a45a8ff | 326 | hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; |
bogdanm | 0:9b334a45a8ff | 327 | |
bogdanm | 0:9b334a45a8ff | 328 | /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ |
bogdanm | 0:9b334a45a8ff | 329 | /* Configure I2Cx: Own Address1 and ack own address1 mode */ |
bogdanm | 0:9b334a45a8ff | 330 | hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; |
bogdanm | 0:9b334a45a8ff | 331 | if(hi2c->Init.OwnAddress1 != 0) |
bogdanm | 0:9b334a45a8ff | 332 | { |
bogdanm | 0:9b334a45a8ff | 333 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) |
bogdanm | 0:9b334a45a8ff | 334 | { |
bogdanm | 0:9b334a45a8ff | 335 | hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); |
bogdanm | 0:9b334a45a8ff | 336 | } |
bogdanm | 0:9b334a45a8ff | 337 | else /* I2C_ADDRESSINGMODE_10BIT */ |
bogdanm | 0:9b334a45a8ff | 338 | { |
bogdanm | 0:9b334a45a8ff | 339 | hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); |
bogdanm | 0:9b334a45a8ff | 340 | } |
bogdanm | 0:9b334a45a8ff | 341 | } |
bogdanm | 0:9b334a45a8ff | 342 | |
bogdanm | 0:9b334a45a8ff | 343 | /*---------------------------- I2Cx CR2 Configuration ----------------------*/ |
bogdanm | 0:9b334a45a8ff | 344 | /* Configure I2Cx: Addressing Master mode */ |
bogdanm | 0:9b334a45a8ff | 345 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
bogdanm | 0:9b334a45a8ff | 346 | { |
bogdanm | 0:9b334a45a8ff | 347 | hi2c->Instance->CR2 = (I2C_CR2_ADD10); |
bogdanm | 0:9b334a45a8ff | 348 | } |
bogdanm | 0:9b334a45a8ff | 349 | /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ |
bogdanm | 0:9b334a45a8ff | 350 | hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); |
bogdanm | 0:9b334a45a8ff | 351 | |
bogdanm | 0:9b334a45a8ff | 352 | /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ |
bogdanm | 0:9b334a45a8ff | 353 | /* Configure I2Cx: Dual mode and Own Address2 */ |
bogdanm | 0:9b334a45a8ff | 354 | hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8)); |
bogdanm | 0:9b334a45a8ff | 355 | |
bogdanm | 0:9b334a45a8ff | 356 | /*---------------------------- I2Cx CR1 Configuration ----------------------*/ |
bogdanm | 0:9b334a45a8ff | 357 | /* Configure I2Cx: Generalcall and NoStretch mode */ |
bogdanm | 0:9b334a45a8ff | 358 | hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); |
bogdanm | 0:9b334a45a8ff | 359 | |
bogdanm | 0:9b334a45a8ff | 360 | /* Enable the selected I2C peripheral */ |
bogdanm | 0:9b334a45a8ff | 361 | __HAL_I2C_ENABLE(hi2c); |
bogdanm | 0:9b334a45a8ff | 362 | |
bogdanm | 0:9b334a45a8ff | 363 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 364 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 365 | |
bogdanm | 0:9b334a45a8ff | 366 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 367 | } |
bogdanm | 0:9b334a45a8ff | 368 | |
bogdanm | 0:9b334a45a8ff | 369 | /** |
bogdanm | 0:9b334a45a8ff | 370 | * @brief DeInitializes the I2C peripheral. |
bogdanm | 0:9b334a45a8ff | 371 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 372 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 373 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 374 | */ |
bogdanm | 0:9b334a45a8ff | 375 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 376 | { |
bogdanm | 0:9b334a45a8ff | 377 | /* Check the I2C handle allocation */ |
bogdanm | 0:9b334a45a8ff | 378 | if(hi2c == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 379 | { |
bogdanm | 0:9b334a45a8ff | 380 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 381 | } |
bogdanm | 0:9b334a45a8ff | 382 | |
bogdanm | 0:9b334a45a8ff | 383 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 384 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
bogdanm | 0:9b334a45a8ff | 385 | |
bogdanm | 0:9b334a45a8ff | 386 | hi2c->State = HAL_I2C_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 387 | |
bogdanm | 0:9b334a45a8ff | 388 | /* Disable the I2C Peripheral Clock */ |
bogdanm | 0:9b334a45a8ff | 389 | __HAL_I2C_DISABLE(hi2c); |
bogdanm | 0:9b334a45a8ff | 390 | |
bogdanm | 0:9b334a45a8ff | 391 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
bogdanm | 0:9b334a45a8ff | 392 | HAL_I2C_MspDeInit(hi2c); |
bogdanm | 0:9b334a45a8ff | 393 | |
bogdanm | 0:9b334a45a8ff | 394 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 395 | hi2c->State = HAL_I2C_STATE_RESET; |
bogdanm | 0:9b334a45a8ff | 396 | |
bogdanm | 0:9b334a45a8ff | 397 | /* Release Lock */ |
bogdanm | 0:9b334a45a8ff | 398 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 399 | |
bogdanm | 0:9b334a45a8ff | 400 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 401 | } |
bogdanm | 0:9b334a45a8ff | 402 | |
bogdanm | 0:9b334a45a8ff | 403 | /** |
bogdanm | 0:9b334a45a8ff | 404 | * @brief I2C MSP Init. |
bogdanm | 0:9b334a45a8ff | 405 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 406 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 407 | * @retval None |
bogdanm | 0:9b334a45a8ff | 408 | */ |
bogdanm | 0:9b334a45a8ff | 409 | __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 410 | { |
bogdanm | 0:9b334a45a8ff | 411 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 412 | the HAL_I2C_MspInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 413 | */ |
bogdanm | 0:9b334a45a8ff | 414 | } |
bogdanm | 0:9b334a45a8ff | 415 | |
bogdanm | 0:9b334a45a8ff | 416 | /** |
bogdanm | 0:9b334a45a8ff | 417 | * @brief I2C MSP DeInit |
bogdanm | 0:9b334a45a8ff | 418 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 419 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 420 | * @retval None |
bogdanm | 0:9b334a45a8ff | 421 | */ |
bogdanm | 0:9b334a45a8ff | 422 | __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 423 | { |
bogdanm | 0:9b334a45a8ff | 424 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 425 | the HAL_I2C_MspDeInit could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 426 | */ |
bogdanm | 0:9b334a45a8ff | 427 | } |
bogdanm | 0:9b334a45a8ff | 428 | |
bogdanm | 0:9b334a45a8ff | 429 | /** |
bogdanm | 0:9b334a45a8ff | 430 | * @} |
bogdanm | 0:9b334a45a8ff | 431 | */ |
bogdanm | 0:9b334a45a8ff | 432 | |
bogdanm | 0:9b334a45a8ff | 433 | /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions |
bogdanm | 0:9b334a45a8ff | 434 | * @brief Data transfers functions |
bogdanm | 0:9b334a45a8ff | 435 | * |
bogdanm | 0:9b334a45a8ff | 436 | @verbatim |
bogdanm | 0:9b334a45a8ff | 437 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 438 | ##### IO operation functions ##### |
bogdanm | 0:9b334a45a8ff | 439 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 440 | [..] |
bogdanm | 0:9b334a45a8ff | 441 | This subsection provides a set of functions allowing to manage the I2C data |
bogdanm | 0:9b334a45a8ff | 442 | transfers. |
bogdanm | 0:9b334a45a8ff | 443 | |
bogdanm | 0:9b334a45a8ff | 444 | (#) There is two mode of transfer: |
bogdanm | 0:9b334a45a8ff | 445 | (++) Blocking mode : The communication is performed in the polling mode. |
bogdanm | 0:9b334a45a8ff | 446 | The status of all data processing is returned by the same function |
bogdanm | 0:9b334a45a8ff | 447 | after finishing transfer. |
bogdanm | 0:9b334a45a8ff | 448 | (++) No-Blocking mode : The communication is performed using Interrupts |
bogdanm | 0:9b334a45a8ff | 449 | or DMA. These functions return the status of the transfer startup. |
bogdanm | 0:9b334a45a8ff | 450 | The end of the data processing will be indicated through the |
bogdanm | 0:9b334a45a8ff | 451 | dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when |
bogdanm | 0:9b334a45a8ff | 452 | using DMA mode. |
bogdanm | 0:9b334a45a8ff | 453 | |
bogdanm | 0:9b334a45a8ff | 454 | (#) Blocking mode functions are : |
bogdanm | 0:9b334a45a8ff | 455 | (++) HAL_I2C_Master_Transmit() |
bogdanm | 0:9b334a45a8ff | 456 | (++) HAL_I2C_Master_Receive() |
bogdanm | 0:9b334a45a8ff | 457 | (++) HAL_I2C_Slave_Transmit() |
bogdanm | 0:9b334a45a8ff | 458 | (++) HAL_I2C_Slave_Receive() |
bogdanm | 0:9b334a45a8ff | 459 | (++) HAL_I2C_Mem_Write() |
bogdanm | 0:9b334a45a8ff | 460 | (++) HAL_I2C_Mem_Read() |
bogdanm | 0:9b334a45a8ff | 461 | (++) HAL_I2C_IsDeviceReady() |
bogdanm | 0:9b334a45a8ff | 462 | |
bogdanm | 0:9b334a45a8ff | 463 | (#) No-Blocking mode functions with Interrupt are : |
bogdanm | 0:9b334a45a8ff | 464 | (++) HAL_I2C_Master_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 465 | (++) HAL_I2C_Master_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 466 | (++) HAL_I2C_Slave_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 467 | (++) HAL_I2C_Slave_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 468 | (++) HAL_I2C_Mem_Write_IT() |
bogdanm | 0:9b334a45a8ff | 469 | (++) HAL_I2C_Mem_Read_IT() |
bogdanm | 0:9b334a45a8ff | 470 | |
bogdanm | 0:9b334a45a8ff | 471 | (#) No-Blocking mode functions with DMA are : |
bogdanm | 0:9b334a45a8ff | 472 | (++) HAL_I2C_Master_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 473 | (++) HAL_I2C_Master_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 474 | (++) HAL_I2C_Slave_Transmit_DMA() |
bogdanm | 0:9b334a45a8ff | 475 | (++) HAL_I2C_Slave_Receive_DMA() |
bogdanm | 0:9b334a45a8ff | 476 | (++) HAL_I2C_Mem_Write_DMA() |
bogdanm | 0:9b334a45a8ff | 477 | (++) HAL_I2C_Mem_Read_DMA() |
bogdanm | 0:9b334a45a8ff | 478 | |
bogdanm | 0:9b334a45a8ff | 479 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
bogdanm | 0:9b334a45a8ff | 480 | (++) HAL_I2C_MemTxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 481 | (++) HAL_I2C_MemRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 482 | (++) HAL_I2C_MasterTxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 483 | (++) HAL_I2C_MasterRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 484 | (++) HAL_I2C_SlaveTxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 485 | (++) HAL_I2C_SlaveRxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 486 | (++) HAL_I2C_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 487 | |
bogdanm | 0:9b334a45a8ff | 488 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 489 | * @{ |
bogdanm | 0:9b334a45a8ff | 490 | */ |
bogdanm | 0:9b334a45a8ff | 491 | |
bogdanm | 0:9b334a45a8ff | 492 | /** @defgroup Blocking_mode_Polling Blocking mode Polling |
bogdanm | 0:9b334a45a8ff | 493 | * @{ |
bogdanm | 0:9b334a45a8ff | 494 | */ |
bogdanm | 0:9b334a45a8ff | 495 | |
bogdanm | 0:9b334a45a8ff | 496 | /** |
bogdanm | 0:9b334a45a8ff | 497 | * @brief Transmits in master mode an amount of data in blocking mode. |
bogdanm | 0:9b334a45a8ff | 498 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 499 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 500 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 501 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 502 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 503 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 504 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 505 | */ |
bogdanm | 0:9b334a45a8ff | 506 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 507 | { |
bogdanm | 0:9b334a45a8ff | 508 | uint32_t sizetmp = 0; |
bogdanm | 0:9b334a45a8ff | 509 | |
bogdanm | 0:9b334a45a8ff | 510 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 511 | { |
bogdanm | 0:9b334a45a8ff | 512 | if((pData == HAL_NULL ) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 513 | { |
bogdanm | 0:9b334a45a8ff | 514 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 515 | } |
bogdanm | 0:9b334a45a8ff | 516 | |
bogdanm | 0:9b334a45a8ff | 517 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 518 | { |
bogdanm | 0:9b334a45a8ff | 519 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 520 | } |
bogdanm | 0:9b334a45a8ff | 521 | |
bogdanm | 0:9b334a45a8ff | 522 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 523 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 524 | |
bogdanm | 0:9b334a45a8ff | 525 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 526 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 527 | |
bogdanm | 0:9b334a45a8ff | 528 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 529 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 530 | /* Size > 255, need to set RELOAD bit */ |
bogdanm | 0:9b334a45a8ff | 531 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 532 | { |
bogdanm | 0:9b334a45a8ff | 533 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 534 | sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 535 | } |
bogdanm | 0:9b334a45a8ff | 536 | else |
bogdanm | 0:9b334a45a8ff | 537 | { |
bogdanm | 0:9b334a45a8ff | 538 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 539 | sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 540 | } |
bogdanm | 0:9b334a45a8ff | 541 | |
bogdanm | 0:9b334a45a8ff | 542 | do |
bogdanm | 0:9b334a45a8ff | 543 | { |
bogdanm | 0:9b334a45a8ff | 544 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 545 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 546 | { |
bogdanm | 0:9b334a45a8ff | 547 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 548 | { |
bogdanm | 0:9b334a45a8ff | 549 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 550 | } |
bogdanm | 0:9b334a45a8ff | 551 | else |
bogdanm | 0:9b334a45a8ff | 552 | { |
bogdanm | 0:9b334a45a8ff | 553 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 554 | } |
bogdanm | 0:9b334a45a8ff | 555 | } |
bogdanm | 0:9b334a45a8ff | 556 | /* Write data to TXDR */ |
bogdanm | 0:9b334a45a8ff | 557 | hi2c->Instance->TXDR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 558 | sizetmp--; |
bogdanm | 0:9b334a45a8ff | 559 | Size--; |
bogdanm | 0:9b334a45a8ff | 560 | |
bogdanm | 0:9b334a45a8ff | 561 | if((sizetmp == 0)&&(Size!=0)) |
bogdanm | 0:9b334a45a8ff | 562 | { |
bogdanm | 0:9b334a45a8ff | 563 | /* Wait until TXE flag is set */ |
bogdanm | 0:9b334a45a8ff | 564 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 565 | { |
bogdanm | 0:9b334a45a8ff | 566 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 567 | } |
bogdanm | 0:9b334a45a8ff | 568 | |
bogdanm | 0:9b334a45a8ff | 569 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 570 | { |
bogdanm | 0:9b334a45a8ff | 571 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 572 | sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 573 | } |
bogdanm | 0:9b334a45a8ff | 574 | else |
bogdanm | 0:9b334a45a8ff | 575 | { |
bogdanm | 0:9b334a45a8ff | 576 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 577 | sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 578 | } |
bogdanm | 0:9b334a45a8ff | 579 | } |
bogdanm | 0:9b334a45a8ff | 580 | |
bogdanm | 0:9b334a45a8ff | 581 | }while(Size > 0); |
bogdanm | 0:9b334a45a8ff | 582 | |
bogdanm | 0:9b334a45a8ff | 583 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 584 | /* Wait until STOPF flag is set */ |
bogdanm | 0:9b334a45a8ff | 585 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 586 | { |
bogdanm | 0:9b334a45a8ff | 587 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 588 | { |
bogdanm | 0:9b334a45a8ff | 589 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 590 | } |
bogdanm | 0:9b334a45a8ff | 591 | else |
bogdanm | 0:9b334a45a8ff | 592 | { |
bogdanm | 0:9b334a45a8ff | 593 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 594 | } |
bogdanm | 0:9b334a45a8ff | 595 | } |
bogdanm | 0:9b334a45a8ff | 596 | |
bogdanm | 0:9b334a45a8ff | 597 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 598 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 599 | |
bogdanm | 0:9b334a45a8ff | 600 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 601 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 602 | |
bogdanm | 0:9b334a45a8ff | 603 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 604 | |
bogdanm | 0:9b334a45a8ff | 605 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 606 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 607 | |
bogdanm | 0:9b334a45a8ff | 608 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 609 | } |
bogdanm | 0:9b334a45a8ff | 610 | else |
bogdanm | 0:9b334a45a8ff | 611 | { |
bogdanm | 0:9b334a45a8ff | 612 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 613 | } |
bogdanm | 0:9b334a45a8ff | 614 | } |
bogdanm | 0:9b334a45a8ff | 615 | |
bogdanm | 0:9b334a45a8ff | 616 | /** |
bogdanm | 0:9b334a45a8ff | 617 | * @brief Receives in master mode an amount of data in blocking mode. |
bogdanm | 0:9b334a45a8ff | 618 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 619 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 620 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 621 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 622 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 623 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 624 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 625 | */ |
bogdanm | 0:9b334a45a8ff | 626 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 627 | { |
bogdanm | 0:9b334a45a8ff | 628 | uint32_t sizetmp = 0; |
bogdanm | 0:9b334a45a8ff | 629 | |
bogdanm | 0:9b334a45a8ff | 630 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 631 | { |
bogdanm | 0:9b334a45a8ff | 632 | if((pData == HAL_NULL ) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 633 | { |
bogdanm | 0:9b334a45a8ff | 634 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 635 | } |
bogdanm | 0:9b334a45a8ff | 636 | |
bogdanm | 0:9b334a45a8ff | 637 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 638 | { |
bogdanm | 0:9b334a45a8ff | 639 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 640 | } |
bogdanm | 0:9b334a45a8ff | 641 | |
bogdanm | 0:9b334a45a8ff | 642 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 643 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 644 | |
bogdanm | 0:9b334a45a8ff | 645 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 646 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 647 | |
bogdanm | 0:9b334a45a8ff | 648 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 649 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 650 | /* Size > 255, need to set RELOAD bit */ |
bogdanm | 0:9b334a45a8ff | 651 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 652 | { |
bogdanm | 0:9b334a45a8ff | 653 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 654 | sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 655 | } |
bogdanm | 0:9b334a45a8ff | 656 | else |
bogdanm | 0:9b334a45a8ff | 657 | { |
bogdanm | 0:9b334a45a8ff | 658 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 659 | sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 660 | } |
bogdanm | 0:9b334a45a8ff | 661 | |
bogdanm | 0:9b334a45a8ff | 662 | do |
bogdanm | 0:9b334a45a8ff | 663 | { |
bogdanm | 0:9b334a45a8ff | 664 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 665 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 666 | { |
bogdanm | 0:9b334a45a8ff | 667 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 668 | } |
bogdanm | 0:9b334a45a8ff | 669 | |
bogdanm | 0:9b334a45a8ff | 670 | /* Write data to RXDR */ |
bogdanm | 0:9b334a45a8ff | 671 | (*pData++) =hi2c->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 672 | sizetmp--; |
bogdanm | 0:9b334a45a8ff | 673 | Size--; |
bogdanm | 0:9b334a45a8ff | 674 | |
bogdanm | 0:9b334a45a8ff | 675 | if((sizetmp == 0)&&(Size!=0)) |
bogdanm | 0:9b334a45a8ff | 676 | { |
bogdanm | 0:9b334a45a8ff | 677 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 678 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 679 | { |
bogdanm | 0:9b334a45a8ff | 680 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 681 | } |
bogdanm | 0:9b334a45a8ff | 682 | |
bogdanm | 0:9b334a45a8ff | 683 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 684 | { |
bogdanm | 0:9b334a45a8ff | 685 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 686 | sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 687 | } |
bogdanm | 0:9b334a45a8ff | 688 | else |
bogdanm | 0:9b334a45a8ff | 689 | { |
bogdanm | 0:9b334a45a8ff | 690 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 691 | sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 692 | } |
bogdanm | 0:9b334a45a8ff | 693 | } |
bogdanm | 0:9b334a45a8ff | 694 | |
bogdanm | 0:9b334a45a8ff | 695 | }while(Size > 0); |
bogdanm | 0:9b334a45a8ff | 696 | |
bogdanm | 0:9b334a45a8ff | 697 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 698 | /* Wait until STOPF flag is set */ |
bogdanm | 0:9b334a45a8ff | 699 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 700 | { |
bogdanm | 0:9b334a45a8ff | 701 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 702 | { |
bogdanm | 0:9b334a45a8ff | 703 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 704 | } |
bogdanm | 0:9b334a45a8ff | 705 | else |
bogdanm | 0:9b334a45a8ff | 706 | { |
bogdanm | 0:9b334a45a8ff | 707 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 708 | } |
bogdanm | 0:9b334a45a8ff | 709 | } |
bogdanm | 0:9b334a45a8ff | 710 | |
bogdanm | 0:9b334a45a8ff | 711 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 712 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 713 | |
bogdanm | 0:9b334a45a8ff | 714 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 715 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 716 | |
bogdanm | 0:9b334a45a8ff | 717 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 718 | |
bogdanm | 0:9b334a45a8ff | 719 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 720 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 721 | |
bogdanm | 0:9b334a45a8ff | 722 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 723 | } |
bogdanm | 0:9b334a45a8ff | 724 | else |
bogdanm | 0:9b334a45a8ff | 725 | { |
bogdanm | 0:9b334a45a8ff | 726 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 727 | } |
bogdanm | 0:9b334a45a8ff | 728 | } |
bogdanm | 0:9b334a45a8ff | 729 | |
bogdanm | 0:9b334a45a8ff | 730 | /** |
bogdanm | 0:9b334a45a8ff | 731 | * @brief Transmits in slave mode an amount of data in blocking mode. |
bogdanm | 0:9b334a45a8ff | 732 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 733 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 734 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 735 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 736 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 737 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 738 | */ |
bogdanm | 0:9b334a45a8ff | 739 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 740 | { |
bogdanm | 0:9b334a45a8ff | 741 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 742 | { |
bogdanm | 0:9b334a45a8ff | 743 | if((pData == HAL_NULL ) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 744 | { |
bogdanm | 0:9b334a45a8ff | 745 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 746 | } |
bogdanm | 0:9b334a45a8ff | 747 | |
bogdanm | 0:9b334a45a8ff | 748 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 749 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 750 | |
bogdanm | 0:9b334a45a8ff | 751 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 752 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 753 | |
bogdanm | 0:9b334a45a8ff | 754 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 755 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 756 | |
bogdanm | 0:9b334a45a8ff | 757 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 758 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 759 | { |
bogdanm | 0:9b334a45a8ff | 760 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 761 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 762 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 763 | } |
bogdanm | 0:9b334a45a8ff | 764 | |
bogdanm | 0:9b334a45a8ff | 765 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 766 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 767 | |
bogdanm | 0:9b334a45a8ff | 768 | /* If 10bit addressing mode is selected */ |
bogdanm | 0:9b334a45a8ff | 769 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
bogdanm | 0:9b334a45a8ff | 770 | { |
bogdanm | 0:9b334a45a8ff | 771 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 772 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 773 | { |
bogdanm | 0:9b334a45a8ff | 774 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 775 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 776 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 777 | } |
bogdanm | 0:9b334a45a8ff | 778 | |
bogdanm | 0:9b334a45a8ff | 779 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 780 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 781 | } |
bogdanm | 0:9b334a45a8ff | 782 | |
bogdanm | 0:9b334a45a8ff | 783 | /* Wait until DIR flag is set Transmitter mode */ |
bogdanm | 0:9b334a45a8ff | 784 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 785 | { |
bogdanm | 0:9b334a45a8ff | 786 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 787 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 788 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 789 | } |
bogdanm | 0:9b334a45a8ff | 790 | |
bogdanm | 0:9b334a45a8ff | 791 | do |
bogdanm | 0:9b334a45a8ff | 792 | { |
bogdanm | 0:9b334a45a8ff | 793 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 794 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 795 | { |
bogdanm | 0:9b334a45a8ff | 796 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 797 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 798 | |
bogdanm | 0:9b334a45a8ff | 799 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 800 | { |
bogdanm | 0:9b334a45a8ff | 801 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 802 | } |
bogdanm | 0:9b334a45a8ff | 803 | else |
bogdanm | 0:9b334a45a8ff | 804 | { |
bogdanm | 0:9b334a45a8ff | 805 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 806 | } |
bogdanm | 0:9b334a45a8ff | 807 | } |
bogdanm | 0:9b334a45a8ff | 808 | |
bogdanm | 0:9b334a45a8ff | 809 | /* Read data from TXDR */ |
bogdanm | 0:9b334a45a8ff | 810 | hi2c->Instance->TXDR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 811 | Size--; |
bogdanm | 0:9b334a45a8ff | 812 | }while(Size > 0); |
bogdanm | 0:9b334a45a8ff | 813 | |
bogdanm | 0:9b334a45a8ff | 814 | /* Wait until STOP flag is set */ |
bogdanm | 0:9b334a45a8ff | 815 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 816 | { |
bogdanm | 0:9b334a45a8ff | 817 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 818 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 819 | |
bogdanm | 0:9b334a45a8ff | 820 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 821 | { |
bogdanm | 0:9b334a45a8ff | 822 | /* Normal use case for Transmitter mode */ |
bogdanm | 0:9b334a45a8ff | 823 | /* A NACK is generated to confirm the end of transfer */ |
bogdanm | 0:9b334a45a8ff | 824 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 825 | } |
bogdanm | 0:9b334a45a8ff | 826 | else |
bogdanm | 0:9b334a45a8ff | 827 | { |
bogdanm | 0:9b334a45a8ff | 828 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 829 | } |
bogdanm | 0:9b334a45a8ff | 830 | } |
bogdanm | 0:9b334a45a8ff | 831 | |
bogdanm | 0:9b334a45a8ff | 832 | /* Clear STOP flag */ |
bogdanm | 0:9b334a45a8ff | 833 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 834 | |
bogdanm | 0:9b334a45a8ff | 835 | /* Wait until BUSY flag is reset */ |
bogdanm | 0:9b334a45a8ff | 836 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 837 | { |
bogdanm | 0:9b334a45a8ff | 838 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 839 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 840 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 841 | } |
bogdanm | 0:9b334a45a8ff | 842 | |
bogdanm | 0:9b334a45a8ff | 843 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 844 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 845 | |
bogdanm | 0:9b334a45a8ff | 846 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 847 | |
bogdanm | 0:9b334a45a8ff | 848 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 849 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 850 | |
bogdanm | 0:9b334a45a8ff | 851 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 852 | } |
bogdanm | 0:9b334a45a8ff | 853 | else |
bogdanm | 0:9b334a45a8ff | 854 | { |
bogdanm | 0:9b334a45a8ff | 855 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 856 | } |
bogdanm | 0:9b334a45a8ff | 857 | } |
bogdanm | 0:9b334a45a8ff | 858 | |
bogdanm | 0:9b334a45a8ff | 859 | /** |
bogdanm | 0:9b334a45a8ff | 860 | * @brief Receive in slave mode an amount of data in blocking mode |
bogdanm | 0:9b334a45a8ff | 861 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 862 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 863 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 864 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 865 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 866 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 867 | */ |
bogdanm | 0:9b334a45a8ff | 868 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 869 | { |
bogdanm | 0:9b334a45a8ff | 870 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 871 | { |
bogdanm | 0:9b334a45a8ff | 872 | if((pData == HAL_NULL ) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 873 | { |
bogdanm | 0:9b334a45a8ff | 874 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 875 | } |
bogdanm | 0:9b334a45a8ff | 876 | |
bogdanm | 0:9b334a45a8ff | 877 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 878 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 879 | |
bogdanm | 0:9b334a45a8ff | 880 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 881 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 882 | |
bogdanm | 0:9b334a45a8ff | 883 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 884 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 885 | |
bogdanm | 0:9b334a45a8ff | 886 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 887 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 888 | { |
bogdanm | 0:9b334a45a8ff | 889 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 890 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 891 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 892 | } |
bogdanm | 0:9b334a45a8ff | 893 | |
bogdanm | 0:9b334a45a8ff | 894 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 895 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 896 | |
bogdanm | 0:9b334a45a8ff | 897 | /* Wait until DIR flag is reset Receiver mode */ |
bogdanm | 0:9b334a45a8ff | 898 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 899 | { |
bogdanm | 0:9b334a45a8ff | 900 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 901 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 902 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 903 | } |
bogdanm | 0:9b334a45a8ff | 904 | |
bogdanm | 0:9b334a45a8ff | 905 | while(Size > 0) |
bogdanm | 0:9b334a45a8ff | 906 | { |
bogdanm | 0:9b334a45a8ff | 907 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 908 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 909 | { |
bogdanm | 0:9b334a45a8ff | 910 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 911 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 912 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
bogdanm | 0:9b334a45a8ff | 913 | { |
bogdanm | 0:9b334a45a8ff | 914 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 915 | } |
bogdanm | 0:9b334a45a8ff | 916 | else |
bogdanm | 0:9b334a45a8ff | 917 | { |
bogdanm | 0:9b334a45a8ff | 918 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 919 | } |
bogdanm | 0:9b334a45a8ff | 920 | } |
bogdanm | 0:9b334a45a8ff | 921 | |
bogdanm | 0:9b334a45a8ff | 922 | /* Read data from RXDR */ |
bogdanm | 0:9b334a45a8ff | 923 | (*pData++) = hi2c->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 924 | Size--; |
bogdanm | 0:9b334a45a8ff | 925 | } |
bogdanm | 0:9b334a45a8ff | 926 | |
bogdanm | 0:9b334a45a8ff | 927 | /* Wait until STOP flag is set */ |
bogdanm | 0:9b334a45a8ff | 928 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 929 | { |
bogdanm | 0:9b334a45a8ff | 930 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 931 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 932 | |
bogdanm | 0:9b334a45a8ff | 933 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 934 | { |
bogdanm | 0:9b334a45a8ff | 935 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 936 | } |
bogdanm | 0:9b334a45a8ff | 937 | else |
bogdanm | 0:9b334a45a8ff | 938 | { |
bogdanm | 0:9b334a45a8ff | 939 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 940 | } |
bogdanm | 0:9b334a45a8ff | 941 | } |
bogdanm | 0:9b334a45a8ff | 942 | |
bogdanm | 0:9b334a45a8ff | 943 | /* Clear STOP flag */ |
bogdanm | 0:9b334a45a8ff | 944 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 945 | |
bogdanm | 0:9b334a45a8ff | 946 | /* Wait until BUSY flag is reset */ |
bogdanm | 0:9b334a45a8ff | 947 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 948 | { |
bogdanm | 0:9b334a45a8ff | 949 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 950 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 951 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 952 | } |
bogdanm | 0:9b334a45a8ff | 953 | |
bogdanm | 0:9b334a45a8ff | 954 | |
bogdanm | 0:9b334a45a8ff | 955 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 956 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 957 | |
bogdanm | 0:9b334a45a8ff | 958 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 959 | |
bogdanm | 0:9b334a45a8ff | 960 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 961 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 962 | |
bogdanm | 0:9b334a45a8ff | 963 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 964 | } |
bogdanm | 0:9b334a45a8ff | 965 | else |
bogdanm | 0:9b334a45a8ff | 966 | { |
bogdanm | 0:9b334a45a8ff | 967 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 968 | } |
bogdanm | 0:9b334a45a8ff | 969 | } |
bogdanm | 0:9b334a45a8ff | 970 | /** |
bogdanm | 0:9b334a45a8ff | 971 | * @} |
bogdanm | 0:9b334a45a8ff | 972 | */ |
bogdanm | 0:9b334a45a8ff | 973 | |
bogdanm | 0:9b334a45a8ff | 974 | /** @addtogroup Non_Blocking_mode_Interrupt Non Blocking mode Interrupt |
bogdanm | 0:9b334a45a8ff | 975 | * @{ |
bogdanm | 0:9b334a45a8ff | 976 | */ |
bogdanm | 0:9b334a45a8ff | 977 | |
bogdanm | 0:9b334a45a8ff | 978 | /** |
bogdanm | 0:9b334a45a8ff | 979 | * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 980 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 981 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 982 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 983 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 984 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 985 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 986 | */ |
bogdanm | 0:9b334a45a8ff | 987 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 988 | { |
bogdanm | 0:9b334a45a8ff | 989 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 990 | { |
bogdanm | 0:9b334a45a8ff | 991 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 992 | { |
bogdanm | 0:9b334a45a8ff | 993 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 994 | } |
bogdanm | 0:9b334a45a8ff | 995 | |
bogdanm | 0:9b334a45a8ff | 996 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 997 | { |
bogdanm | 0:9b334a45a8ff | 998 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 999 | } |
bogdanm | 0:9b334a45a8ff | 1000 | |
bogdanm | 0:9b334a45a8ff | 1001 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1002 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1003 | |
bogdanm | 0:9b334a45a8ff | 1004 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 1005 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1006 | |
bogdanm | 0:9b334a45a8ff | 1007 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1008 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1009 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1010 | { |
bogdanm | 0:9b334a45a8ff | 1011 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 1012 | } |
bogdanm | 0:9b334a45a8ff | 1013 | else |
bogdanm | 0:9b334a45a8ff | 1014 | { |
bogdanm | 0:9b334a45a8ff | 1015 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1016 | } |
bogdanm | 0:9b334a45a8ff | 1017 | |
bogdanm | 0:9b334a45a8ff | 1018 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1019 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 1020 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 1021 | { |
bogdanm | 0:9b334a45a8ff | 1022 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 1023 | } |
bogdanm | 0:9b334a45a8ff | 1024 | else |
bogdanm | 0:9b334a45a8ff | 1025 | { |
bogdanm | 0:9b334a45a8ff | 1026 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 1027 | } |
bogdanm | 0:9b334a45a8ff | 1028 | |
bogdanm | 0:9b334a45a8ff | 1029 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1030 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1031 | |
bogdanm | 0:9b334a45a8ff | 1032 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1033 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1034 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1035 | |
bogdanm | 0:9b334a45a8ff | 1036 | |
bogdanm | 0:9b334a45a8ff | 1037 | /* Enable ERR, TC, STOP, NACK, TXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 1038 | /* possible to enable all of these */ |
bogdanm | 0:9b334a45a8ff | 1039 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
bogdanm | 0:9b334a45a8ff | 1040 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI ); |
bogdanm | 0:9b334a45a8ff | 1041 | |
bogdanm | 0:9b334a45a8ff | 1042 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1043 | } |
bogdanm | 0:9b334a45a8ff | 1044 | else |
bogdanm | 0:9b334a45a8ff | 1045 | { |
bogdanm | 0:9b334a45a8ff | 1046 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1047 | } |
bogdanm | 0:9b334a45a8ff | 1048 | } |
bogdanm | 0:9b334a45a8ff | 1049 | |
bogdanm | 0:9b334a45a8ff | 1050 | /** |
bogdanm | 0:9b334a45a8ff | 1051 | * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 1052 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1053 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1054 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 1055 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1056 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1057 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1058 | */ |
bogdanm | 0:9b334a45a8ff | 1059 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1060 | { |
bogdanm | 0:9b334a45a8ff | 1061 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1062 | { |
bogdanm | 0:9b334a45a8ff | 1063 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1064 | { |
bogdanm | 0:9b334a45a8ff | 1065 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1066 | } |
bogdanm | 0:9b334a45a8ff | 1067 | |
bogdanm | 0:9b334a45a8ff | 1068 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 1069 | { |
bogdanm | 0:9b334a45a8ff | 1070 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1071 | } |
bogdanm | 0:9b334a45a8ff | 1072 | |
bogdanm | 0:9b334a45a8ff | 1073 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1074 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1075 | |
bogdanm | 0:9b334a45a8ff | 1076 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 1077 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1078 | |
bogdanm | 0:9b334a45a8ff | 1079 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1080 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1081 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1082 | { |
bogdanm | 0:9b334a45a8ff | 1083 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 1084 | } |
bogdanm | 0:9b334a45a8ff | 1085 | else |
bogdanm | 0:9b334a45a8ff | 1086 | { |
bogdanm | 0:9b334a45a8ff | 1087 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1088 | } |
bogdanm | 0:9b334a45a8ff | 1089 | |
bogdanm | 0:9b334a45a8ff | 1090 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1091 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 1092 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 1093 | { |
bogdanm | 0:9b334a45a8ff | 1094 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 1095 | } |
bogdanm | 0:9b334a45a8ff | 1096 | else |
bogdanm | 0:9b334a45a8ff | 1097 | { |
bogdanm | 0:9b334a45a8ff | 1098 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 1099 | } |
bogdanm | 0:9b334a45a8ff | 1100 | |
bogdanm | 0:9b334a45a8ff | 1101 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1102 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1103 | |
bogdanm | 0:9b334a45a8ff | 1104 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1105 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1106 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1107 | |
bogdanm | 0:9b334a45a8ff | 1108 | /* Enable ERR, TC, STOP, NACK, RXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 1109 | /* possible to enable all of these */ |
bogdanm | 0:9b334a45a8ff | 1110 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
bogdanm | 0:9b334a45a8ff | 1111 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI ); |
bogdanm | 0:9b334a45a8ff | 1112 | |
bogdanm | 0:9b334a45a8ff | 1113 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1114 | } |
bogdanm | 0:9b334a45a8ff | 1115 | else |
bogdanm | 0:9b334a45a8ff | 1116 | { |
bogdanm | 0:9b334a45a8ff | 1117 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1118 | } |
bogdanm | 0:9b334a45a8ff | 1119 | } |
bogdanm | 0:9b334a45a8ff | 1120 | |
bogdanm | 0:9b334a45a8ff | 1121 | /** |
bogdanm | 0:9b334a45a8ff | 1122 | * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 1123 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1124 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1125 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1126 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1127 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1128 | */ |
bogdanm | 0:9b334a45a8ff | 1129 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1130 | { |
bogdanm | 0:9b334a45a8ff | 1131 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1132 | { |
bogdanm | 0:9b334a45a8ff | 1133 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1134 | { |
bogdanm | 0:9b334a45a8ff | 1135 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1136 | } |
bogdanm | 0:9b334a45a8ff | 1137 | |
bogdanm | 0:9b334a45a8ff | 1138 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1139 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1140 | |
bogdanm | 0:9b334a45a8ff | 1141 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 1142 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1143 | |
bogdanm | 0:9b334a45a8ff | 1144 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1145 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1146 | |
bogdanm | 0:9b334a45a8ff | 1147 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1148 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1149 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1150 | |
bogdanm | 0:9b334a45a8ff | 1151 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1152 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1153 | |
bogdanm | 0:9b334a45a8ff | 1154 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1155 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1156 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1157 | |
bogdanm | 0:9b334a45a8ff | 1158 | /* Enable ERR, TC, STOP, NACK, TXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 1159 | /* possible to enable all of these */ |
bogdanm | 0:9b334a45a8ff | 1160 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
bogdanm | 0:9b334a45a8ff | 1161 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_TXI ); |
bogdanm | 0:9b334a45a8ff | 1162 | |
bogdanm | 0:9b334a45a8ff | 1163 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1164 | } |
bogdanm | 0:9b334a45a8ff | 1165 | else |
bogdanm | 0:9b334a45a8ff | 1166 | { |
bogdanm | 0:9b334a45a8ff | 1167 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1168 | } |
bogdanm | 0:9b334a45a8ff | 1169 | } |
bogdanm | 0:9b334a45a8ff | 1170 | |
bogdanm | 0:9b334a45a8ff | 1171 | /** |
bogdanm | 0:9b334a45a8ff | 1172 | * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt |
bogdanm | 0:9b334a45a8ff | 1173 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1174 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1175 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1176 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1177 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1178 | */ |
bogdanm | 0:9b334a45a8ff | 1179 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1180 | { |
bogdanm | 0:9b334a45a8ff | 1181 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1182 | { |
bogdanm | 0:9b334a45a8ff | 1183 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1184 | { |
bogdanm | 0:9b334a45a8ff | 1185 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1186 | } |
bogdanm | 0:9b334a45a8ff | 1187 | |
bogdanm | 0:9b334a45a8ff | 1188 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1189 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1190 | |
bogdanm | 0:9b334a45a8ff | 1191 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 1192 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1193 | |
bogdanm | 0:9b334a45a8ff | 1194 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1195 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1196 | |
bogdanm | 0:9b334a45a8ff | 1197 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1198 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1199 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1200 | |
bogdanm | 0:9b334a45a8ff | 1201 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1202 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1203 | |
bogdanm | 0:9b334a45a8ff | 1204 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1205 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1206 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1207 | |
bogdanm | 0:9b334a45a8ff | 1208 | /* Enable ERR, TC, STOP, NACK, RXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 1209 | /* possible to enable all of these */ |
bogdanm | 0:9b334a45a8ff | 1210 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
bogdanm | 0:9b334a45a8ff | 1211 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI); |
bogdanm | 0:9b334a45a8ff | 1212 | |
bogdanm | 0:9b334a45a8ff | 1213 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1214 | } |
bogdanm | 0:9b334a45a8ff | 1215 | else |
bogdanm | 0:9b334a45a8ff | 1216 | { |
bogdanm | 0:9b334a45a8ff | 1217 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1218 | } |
bogdanm | 0:9b334a45a8ff | 1219 | } |
bogdanm | 0:9b334a45a8ff | 1220 | |
bogdanm | 0:9b334a45a8ff | 1221 | /** |
bogdanm | 0:9b334a45a8ff | 1222 | * @} |
bogdanm | 0:9b334a45a8ff | 1223 | */ |
bogdanm | 0:9b334a45a8ff | 1224 | |
bogdanm | 0:9b334a45a8ff | 1225 | /** @addtogroup Non_Blocking_mode_DMA Non Blocking mode DMA |
bogdanm | 0:9b334a45a8ff | 1226 | * @{ |
bogdanm | 0:9b334a45a8ff | 1227 | */ |
bogdanm | 0:9b334a45a8ff | 1228 | |
bogdanm | 0:9b334a45a8ff | 1229 | /** |
bogdanm | 0:9b334a45a8ff | 1230 | * @brief Transmit in master mode an amount of data in no-blocking mode with DMA |
bogdanm | 0:9b334a45a8ff | 1231 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1232 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1233 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 1234 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1235 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1236 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1237 | */ |
bogdanm | 0:9b334a45a8ff | 1238 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1239 | { |
bogdanm | 0:9b334a45a8ff | 1240 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1241 | { |
bogdanm | 0:9b334a45a8ff | 1242 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1243 | { |
bogdanm | 0:9b334a45a8ff | 1244 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1245 | } |
bogdanm | 0:9b334a45a8ff | 1246 | |
bogdanm | 0:9b334a45a8ff | 1247 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 1248 | { |
bogdanm | 0:9b334a45a8ff | 1249 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1250 | } |
bogdanm | 0:9b334a45a8ff | 1251 | |
bogdanm | 0:9b334a45a8ff | 1252 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1253 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1254 | |
bogdanm | 0:9b334a45a8ff | 1255 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 1256 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1257 | |
bogdanm | 0:9b334a45a8ff | 1258 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1259 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1260 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1261 | { |
bogdanm | 0:9b334a45a8ff | 1262 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 1263 | } |
bogdanm | 0:9b334a45a8ff | 1264 | else |
bogdanm | 0:9b334a45a8ff | 1265 | { |
bogdanm | 0:9b334a45a8ff | 1266 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1267 | } |
bogdanm | 0:9b334a45a8ff | 1268 | |
bogdanm | 0:9b334a45a8ff | 1269 | /* Set the I2C DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 1270 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; |
bogdanm | 0:9b334a45a8ff | 1271 | |
bogdanm | 0:9b334a45a8ff | 1272 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1273 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1274 | |
bogdanm | 0:9b334a45a8ff | 1275 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1276 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 1277 | |
bogdanm | 0:9b334a45a8ff | 1278 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1279 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 1280 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 1281 | { |
bogdanm | 0:9b334a45a8ff | 1282 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 1283 | } |
bogdanm | 0:9b334a45a8ff | 1284 | else |
bogdanm | 0:9b334a45a8ff | 1285 | { |
bogdanm | 0:9b334a45a8ff | 1286 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 1287 | } |
bogdanm | 0:9b334a45a8ff | 1288 | |
bogdanm | 0:9b334a45a8ff | 1289 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 1290 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1291 | { |
bogdanm | 0:9b334a45a8ff | 1292 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1293 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1294 | |
bogdanm | 0:9b334a45a8ff | 1295 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1296 | { |
bogdanm | 0:9b334a45a8ff | 1297 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1298 | } |
bogdanm | 0:9b334a45a8ff | 1299 | else |
bogdanm | 0:9b334a45a8ff | 1300 | { |
bogdanm | 0:9b334a45a8ff | 1301 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1302 | } |
bogdanm | 0:9b334a45a8ff | 1303 | } |
bogdanm | 0:9b334a45a8ff | 1304 | |
bogdanm | 0:9b334a45a8ff | 1305 | |
bogdanm | 0:9b334a45a8ff | 1306 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1307 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 1308 | |
bogdanm | 0:9b334a45a8ff | 1309 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1310 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1311 | |
bogdanm | 0:9b334a45a8ff | 1312 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1313 | } |
bogdanm | 0:9b334a45a8ff | 1314 | else |
bogdanm | 0:9b334a45a8ff | 1315 | { |
bogdanm | 0:9b334a45a8ff | 1316 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1317 | } |
bogdanm | 0:9b334a45a8ff | 1318 | } |
bogdanm | 0:9b334a45a8ff | 1319 | |
bogdanm | 0:9b334a45a8ff | 1320 | /** |
bogdanm | 0:9b334a45a8ff | 1321 | * @brief Receive in master mode an amount of data in no-blocking mode with DMA |
bogdanm | 0:9b334a45a8ff | 1322 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1323 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1324 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 1325 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1326 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1327 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1328 | */ |
bogdanm | 0:9b334a45a8ff | 1329 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1330 | { |
bogdanm | 0:9b334a45a8ff | 1331 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1332 | { |
bogdanm | 0:9b334a45a8ff | 1333 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1334 | { |
bogdanm | 0:9b334a45a8ff | 1335 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1336 | } |
bogdanm | 0:9b334a45a8ff | 1337 | |
bogdanm | 0:9b334a45a8ff | 1338 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 1339 | { |
bogdanm | 0:9b334a45a8ff | 1340 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1341 | } |
bogdanm | 0:9b334a45a8ff | 1342 | |
bogdanm | 0:9b334a45a8ff | 1343 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1344 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1345 | |
bogdanm | 0:9b334a45a8ff | 1346 | hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 1347 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1348 | |
bogdanm | 0:9b334a45a8ff | 1349 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1350 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1351 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1352 | { |
bogdanm | 0:9b334a45a8ff | 1353 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 1354 | } |
bogdanm | 0:9b334a45a8ff | 1355 | else |
bogdanm | 0:9b334a45a8ff | 1356 | { |
bogdanm | 0:9b334a45a8ff | 1357 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1358 | } |
bogdanm | 0:9b334a45a8ff | 1359 | |
bogdanm | 0:9b334a45a8ff | 1360 | /* Set the I2C DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 1361 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; |
bogdanm | 0:9b334a45a8ff | 1362 | |
bogdanm | 0:9b334a45a8ff | 1363 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1364 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1365 | |
bogdanm | 0:9b334a45a8ff | 1366 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1367 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 1368 | |
bogdanm | 0:9b334a45a8ff | 1369 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1370 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 1371 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 1372 | { |
bogdanm | 0:9b334a45a8ff | 1373 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 1374 | } |
bogdanm | 0:9b334a45a8ff | 1375 | else |
bogdanm | 0:9b334a45a8ff | 1376 | { |
bogdanm | 0:9b334a45a8ff | 1377 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 1378 | } |
bogdanm | 0:9b334a45a8ff | 1379 | |
bogdanm | 0:9b334a45a8ff | 1380 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 1381 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1382 | { |
bogdanm | 0:9b334a45a8ff | 1383 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1384 | } |
bogdanm | 0:9b334a45a8ff | 1385 | |
bogdanm | 0:9b334a45a8ff | 1386 | |
bogdanm | 0:9b334a45a8ff | 1387 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1388 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 1389 | |
bogdanm | 0:9b334a45a8ff | 1390 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1391 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1392 | |
bogdanm | 0:9b334a45a8ff | 1393 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1394 | } |
bogdanm | 0:9b334a45a8ff | 1395 | else |
bogdanm | 0:9b334a45a8ff | 1396 | { |
bogdanm | 0:9b334a45a8ff | 1397 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1398 | } |
bogdanm | 0:9b334a45a8ff | 1399 | } |
bogdanm | 0:9b334a45a8ff | 1400 | |
bogdanm | 0:9b334a45a8ff | 1401 | /** |
bogdanm | 0:9b334a45a8ff | 1402 | * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA |
bogdanm | 0:9b334a45a8ff | 1403 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1404 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1405 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1406 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1407 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1408 | */ |
bogdanm | 0:9b334a45a8ff | 1409 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1410 | { |
bogdanm | 0:9b334a45a8ff | 1411 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1412 | { |
bogdanm | 0:9b334a45a8ff | 1413 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1414 | { |
bogdanm | 0:9b334a45a8ff | 1415 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1416 | } |
bogdanm | 0:9b334a45a8ff | 1417 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1418 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1419 | |
bogdanm | 0:9b334a45a8ff | 1420 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 1421 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1422 | |
bogdanm | 0:9b334a45a8ff | 1423 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1424 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1425 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1426 | |
bogdanm | 0:9b334a45a8ff | 1427 | /* Set the I2C DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 1428 | hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; |
bogdanm | 0:9b334a45a8ff | 1429 | |
bogdanm | 0:9b334a45a8ff | 1430 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1431 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1432 | |
bogdanm | 0:9b334a45a8ff | 1433 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1434 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 1435 | |
bogdanm | 0:9b334a45a8ff | 1436 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1437 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1438 | |
bogdanm | 0:9b334a45a8ff | 1439 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1440 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1441 | { |
bogdanm | 0:9b334a45a8ff | 1442 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1443 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1444 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1445 | } |
bogdanm | 0:9b334a45a8ff | 1446 | |
bogdanm | 0:9b334a45a8ff | 1447 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1448 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 1449 | |
bogdanm | 0:9b334a45a8ff | 1450 | /* If 10bits addressing mode is selected */ |
bogdanm | 0:9b334a45a8ff | 1451 | if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) |
bogdanm | 0:9b334a45a8ff | 1452 | { |
bogdanm | 0:9b334a45a8ff | 1453 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1454 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1455 | { |
bogdanm | 0:9b334a45a8ff | 1456 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1457 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1458 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1459 | } |
bogdanm | 0:9b334a45a8ff | 1460 | |
bogdanm | 0:9b334a45a8ff | 1461 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1462 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 1463 | } |
bogdanm | 0:9b334a45a8ff | 1464 | |
bogdanm | 0:9b334a45a8ff | 1465 | /* Wait until DIR flag is set Transmitter mode */ |
bogdanm | 0:9b334a45a8ff | 1466 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, I2C_TIMEOUT_BUSY) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1467 | { |
bogdanm | 0:9b334a45a8ff | 1468 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1469 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1470 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1471 | } |
bogdanm | 0:9b334a45a8ff | 1472 | |
bogdanm | 0:9b334a45a8ff | 1473 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1474 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 1475 | |
bogdanm | 0:9b334a45a8ff | 1476 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1477 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1478 | |
bogdanm | 0:9b334a45a8ff | 1479 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1480 | } |
bogdanm | 0:9b334a45a8ff | 1481 | else |
bogdanm | 0:9b334a45a8ff | 1482 | { |
bogdanm | 0:9b334a45a8ff | 1483 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1484 | } |
bogdanm | 0:9b334a45a8ff | 1485 | } |
bogdanm | 0:9b334a45a8ff | 1486 | |
bogdanm | 0:9b334a45a8ff | 1487 | /** |
bogdanm | 0:9b334a45a8ff | 1488 | * @brief Receive in slave mode an amount of data in no-blocking mode with DMA |
bogdanm | 0:9b334a45a8ff | 1489 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1490 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1491 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1492 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1493 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1494 | */ |
bogdanm | 0:9b334a45a8ff | 1495 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1496 | { |
bogdanm | 0:9b334a45a8ff | 1497 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1498 | { |
bogdanm | 0:9b334a45a8ff | 1499 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1500 | { |
bogdanm | 0:9b334a45a8ff | 1501 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1502 | } |
bogdanm | 0:9b334a45a8ff | 1503 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1504 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1505 | |
bogdanm | 0:9b334a45a8ff | 1506 | hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 1507 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1508 | |
bogdanm | 0:9b334a45a8ff | 1509 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1510 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1511 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1512 | |
bogdanm | 0:9b334a45a8ff | 1513 | /* Set the I2C DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 1514 | hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; |
bogdanm | 0:9b334a45a8ff | 1515 | |
bogdanm | 0:9b334a45a8ff | 1516 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 1517 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 1518 | |
bogdanm | 0:9b334a45a8ff | 1519 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 1520 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, Size); |
bogdanm | 0:9b334a45a8ff | 1521 | |
bogdanm | 0:9b334a45a8ff | 1522 | /* Enable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1523 | hi2c->Instance->CR2 &= ~I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1524 | |
bogdanm | 0:9b334a45a8ff | 1525 | /* Wait until ADDR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1526 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1527 | { |
bogdanm | 0:9b334a45a8ff | 1528 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1529 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1530 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1531 | } |
bogdanm | 0:9b334a45a8ff | 1532 | |
bogdanm | 0:9b334a45a8ff | 1533 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 1534 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 1535 | |
bogdanm | 0:9b334a45a8ff | 1536 | /* Wait until DIR flag is set Receiver mode */ |
bogdanm | 0:9b334a45a8ff | 1537 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, I2C_TIMEOUT_DIR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1538 | { |
bogdanm | 0:9b334a45a8ff | 1539 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 1540 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 1541 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1542 | } |
bogdanm | 0:9b334a45a8ff | 1543 | |
bogdanm | 0:9b334a45a8ff | 1544 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 1545 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 1546 | |
bogdanm | 0:9b334a45a8ff | 1547 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1548 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1549 | |
bogdanm | 0:9b334a45a8ff | 1550 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1551 | } |
bogdanm | 0:9b334a45a8ff | 1552 | else |
bogdanm | 0:9b334a45a8ff | 1553 | { |
bogdanm | 0:9b334a45a8ff | 1554 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1555 | } |
bogdanm | 0:9b334a45a8ff | 1556 | } |
bogdanm | 0:9b334a45a8ff | 1557 | |
bogdanm | 0:9b334a45a8ff | 1558 | /** |
bogdanm | 0:9b334a45a8ff | 1559 | * @} |
bogdanm | 0:9b334a45a8ff | 1560 | */ |
bogdanm | 0:9b334a45a8ff | 1561 | |
bogdanm | 0:9b334a45a8ff | 1562 | /** @addtogroup Blocking_mode_Polling Blocking mode Polling |
bogdanm | 0:9b334a45a8ff | 1563 | * @{ |
bogdanm | 0:9b334a45a8ff | 1564 | */ |
bogdanm | 0:9b334a45a8ff | 1565 | |
bogdanm | 0:9b334a45a8ff | 1566 | /** |
bogdanm | 0:9b334a45a8ff | 1567 | * @brief Write an amount of data in blocking mode to a specific memory address |
bogdanm | 0:9b334a45a8ff | 1568 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1569 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1570 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 1571 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 1572 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 1573 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1574 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1575 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 1576 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1577 | */ |
bogdanm | 0:9b334a45a8ff | 1578 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 1579 | { |
bogdanm | 0:9b334a45a8ff | 1580 | uint32_t Sizetmp = 0; |
bogdanm | 0:9b334a45a8ff | 1581 | |
bogdanm | 0:9b334a45a8ff | 1582 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1583 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 1584 | |
bogdanm | 0:9b334a45a8ff | 1585 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1586 | { |
bogdanm | 0:9b334a45a8ff | 1587 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1588 | { |
bogdanm | 0:9b334a45a8ff | 1589 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1590 | } |
bogdanm | 0:9b334a45a8ff | 1591 | |
bogdanm | 0:9b334a45a8ff | 1592 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 1593 | { |
bogdanm | 0:9b334a45a8ff | 1594 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1595 | } |
bogdanm | 0:9b334a45a8ff | 1596 | |
bogdanm | 0:9b334a45a8ff | 1597 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1598 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1599 | |
bogdanm | 0:9b334a45a8ff | 1600 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 1601 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1602 | |
bogdanm | 0:9b334a45a8ff | 1603 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 1604 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1605 | { |
bogdanm | 0:9b334a45a8ff | 1606 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1607 | { |
bogdanm | 0:9b334a45a8ff | 1608 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1609 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1610 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1611 | } |
bogdanm | 0:9b334a45a8ff | 1612 | else |
bogdanm | 0:9b334a45a8ff | 1613 | { |
bogdanm | 0:9b334a45a8ff | 1614 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1615 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1616 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1617 | } |
bogdanm | 0:9b334a45a8ff | 1618 | } |
bogdanm | 0:9b334a45a8ff | 1619 | |
bogdanm | 0:9b334a45a8ff | 1620 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 1621 | /* Size > 255, need to set RELOAD bit */ |
bogdanm | 0:9b334a45a8ff | 1622 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1623 | { |
bogdanm | 0:9b334a45a8ff | 1624 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1625 | Sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 1626 | } |
bogdanm | 0:9b334a45a8ff | 1627 | else |
bogdanm | 0:9b334a45a8ff | 1628 | { |
bogdanm | 0:9b334a45a8ff | 1629 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1630 | Sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 1631 | } |
bogdanm | 0:9b334a45a8ff | 1632 | |
bogdanm | 0:9b334a45a8ff | 1633 | do |
bogdanm | 0:9b334a45a8ff | 1634 | { |
bogdanm | 0:9b334a45a8ff | 1635 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 1636 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1637 | { |
bogdanm | 0:9b334a45a8ff | 1638 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1639 | { |
bogdanm | 0:9b334a45a8ff | 1640 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1641 | } |
bogdanm | 0:9b334a45a8ff | 1642 | else |
bogdanm | 0:9b334a45a8ff | 1643 | { |
bogdanm | 0:9b334a45a8ff | 1644 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1645 | } |
bogdanm | 0:9b334a45a8ff | 1646 | } |
bogdanm | 0:9b334a45a8ff | 1647 | |
bogdanm | 0:9b334a45a8ff | 1648 | /* Write data to DR */ |
bogdanm | 0:9b334a45a8ff | 1649 | hi2c->Instance->TXDR = (*pData++); |
bogdanm | 0:9b334a45a8ff | 1650 | Sizetmp--; |
bogdanm | 0:9b334a45a8ff | 1651 | Size--; |
bogdanm | 0:9b334a45a8ff | 1652 | |
bogdanm | 0:9b334a45a8ff | 1653 | if((Sizetmp == 0)&&(Size!=0)) |
bogdanm | 0:9b334a45a8ff | 1654 | { |
bogdanm | 0:9b334a45a8ff | 1655 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1656 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1657 | { |
bogdanm | 0:9b334a45a8ff | 1658 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1659 | } |
bogdanm | 0:9b334a45a8ff | 1660 | |
bogdanm | 0:9b334a45a8ff | 1661 | |
bogdanm | 0:9b334a45a8ff | 1662 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1663 | { |
bogdanm | 0:9b334a45a8ff | 1664 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1665 | Sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 1666 | } |
bogdanm | 0:9b334a45a8ff | 1667 | else |
bogdanm | 0:9b334a45a8ff | 1668 | { |
bogdanm | 0:9b334a45a8ff | 1669 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1670 | Sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 1671 | } |
bogdanm | 0:9b334a45a8ff | 1672 | } |
bogdanm | 0:9b334a45a8ff | 1673 | |
bogdanm | 0:9b334a45a8ff | 1674 | }while(Size > 0); |
bogdanm | 0:9b334a45a8ff | 1675 | |
bogdanm | 0:9b334a45a8ff | 1676 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 1677 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 1678 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1679 | { |
bogdanm | 0:9b334a45a8ff | 1680 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1681 | { |
bogdanm | 0:9b334a45a8ff | 1682 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1683 | } |
bogdanm | 0:9b334a45a8ff | 1684 | else |
bogdanm | 0:9b334a45a8ff | 1685 | { |
bogdanm | 0:9b334a45a8ff | 1686 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1687 | } |
bogdanm | 0:9b334a45a8ff | 1688 | } |
bogdanm | 0:9b334a45a8ff | 1689 | |
bogdanm | 0:9b334a45a8ff | 1690 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 1691 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 1692 | |
bogdanm | 0:9b334a45a8ff | 1693 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 1694 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 1695 | |
bogdanm | 0:9b334a45a8ff | 1696 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1697 | |
bogdanm | 0:9b334a45a8ff | 1698 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1699 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1700 | |
bogdanm | 0:9b334a45a8ff | 1701 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1702 | } |
bogdanm | 0:9b334a45a8ff | 1703 | else |
bogdanm | 0:9b334a45a8ff | 1704 | { |
bogdanm | 0:9b334a45a8ff | 1705 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1706 | } |
bogdanm | 0:9b334a45a8ff | 1707 | } |
bogdanm | 0:9b334a45a8ff | 1708 | |
bogdanm | 0:9b334a45a8ff | 1709 | /** |
bogdanm | 0:9b334a45a8ff | 1710 | * @brief Read an amount of data in blocking mode from a specific memory address |
bogdanm | 0:9b334a45a8ff | 1711 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1712 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1713 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 1714 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 1715 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 1716 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1717 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1718 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 1719 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1720 | */ |
bogdanm | 0:9b334a45a8ff | 1721 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 1722 | { |
bogdanm | 0:9b334a45a8ff | 1723 | uint32_t Sizetmp = 0; |
bogdanm | 0:9b334a45a8ff | 1724 | |
bogdanm | 0:9b334a45a8ff | 1725 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1726 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 1727 | |
bogdanm | 0:9b334a45a8ff | 1728 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1729 | { |
bogdanm | 0:9b334a45a8ff | 1730 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1731 | { |
bogdanm | 0:9b334a45a8ff | 1732 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1733 | } |
bogdanm | 0:9b334a45a8ff | 1734 | |
bogdanm | 0:9b334a45a8ff | 1735 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 1736 | { |
bogdanm | 0:9b334a45a8ff | 1737 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1738 | } |
bogdanm | 0:9b334a45a8ff | 1739 | |
bogdanm | 0:9b334a45a8ff | 1740 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1741 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1742 | |
bogdanm | 0:9b334a45a8ff | 1743 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 1744 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1745 | |
bogdanm | 0:9b334a45a8ff | 1746 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 1747 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1748 | { |
bogdanm | 0:9b334a45a8ff | 1749 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1750 | { |
bogdanm | 0:9b334a45a8ff | 1751 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1752 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1753 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1754 | } |
bogdanm | 0:9b334a45a8ff | 1755 | else |
bogdanm | 0:9b334a45a8ff | 1756 | { |
bogdanm | 0:9b334a45a8ff | 1757 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1758 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1759 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1760 | } |
bogdanm | 0:9b334a45a8ff | 1761 | } |
bogdanm | 0:9b334a45a8ff | 1762 | |
bogdanm | 0:9b334a45a8ff | 1763 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 1764 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 1765 | /* Size > 255, need to set RELOAD bit */ |
bogdanm | 0:9b334a45a8ff | 1766 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1767 | { |
bogdanm | 0:9b334a45a8ff | 1768 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 1769 | Sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 1770 | } |
bogdanm | 0:9b334a45a8ff | 1771 | else |
bogdanm | 0:9b334a45a8ff | 1772 | { |
bogdanm | 0:9b334a45a8ff | 1773 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 1774 | Sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 1775 | } |
bogdanm | 0:9b334a45a8ff | 1776 | |
bogdanm | 0:9b334a45a8ff | 1777 | do |
bogdanm | 0:9b334a45a8ff | 1778 | { |
bogdanm | 0:9b334a45a8ff | 1779 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 1780 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1781 | { |
bogdanm | 0:9b334a45a8ff | 1782 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1783 | } |
bogdanm | 0:9b334a45a8ff | 1784 | |
bogdanm | 0:9b334a45a8ff | 1785 | /* Read data from RXDR */ |
bogdanm | 0:9b334a45a8ff | 1786 | (*pData++) = hi2c->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 1787 | |
bogdanm | 0:9b334a45a8ff | 1788 | /* Decrement the Size counter */ |
bogdanm | 0:9b334a45a8ff | 1789 | Sizetmp--; |
bogdanm | 0:9b334a45a8ff | 1790 | Size--; |
bogdanm | 0:9b334a45a8ff | 1791 | |
bogdanm | 0:9b334a45a8ff | 1792 | if((Sizetmp == 0)&&(Size!=0)) |
bogdanm | 0:9b334a45a8ff | 1793 | { |
bogdanm | 0:9b334a45a8ff | 1794 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 1795 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1796 | { |
bogdanm | 0:9b334a45a8ff | 1797 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1798 | } |
bogdanm | 0:9b334a45a8ff | 1799 | |
bogdanm | 0:9b334a45a8ff | 1800 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1801 | { |
bogdanm | 0:9b334a45a8ff | 1802 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1803 | Sizetmp = 255; |
bogdanm | 0:9b334a45a8ff | 1804 | } |
bogdanm | 0:9b334a45a8ff | 1805 | else |
bogdanm | 0:9b334a45a8ff | 1806 | { |
bogdanm | 0:9b334a45a8ff | 1807 | I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1808 | Sizetmp = Size; |
bogdanm | 0:9b334a45a8ff | 1809 | } |
bogdanm | 0:9b334a45a8ff | 1810 | } |
bogdanm | 0:9b334a45a8ff | 1811 | |
bogdanm | 0:9b334a45a8ff | 1812 | }while(Size > 0); |
bogdanm | 0:9b334a45a8ff | 1813 | |
bogdanm | 0:9b334a45a8ff | 1814 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 1815 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 1816 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1817 | { |
bogdanm | 0:9b334a45a8ff | 1818 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1819 | { |
bogdanm | 0:9b334a45a8ff | 1820 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1821 | } |
bogdanm | 0:9b334a45a8ff | 1822 | else |
bogdanm | 0:9b334a45a8ff | 1823 | { |
bogdanm | 0:9b334a45a8ff | 1824 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1825 | } |
bogdanm | 0:9b334a45a8ff | 1826 | } |
bogdanm | 0:9b334a45a8ff | 1827 | |
bogdanm | 0:9b334a45a8ff | 1828 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 1829 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 1830 | |
bogdanm | 0:9b334a45a8ff | 1831 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 1832 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 1833 | |
bogdanm | 0:9b334a45a8ff | 1834 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1835 | |
bogdanm | 0:9b334a45a8ff | 1836 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1837 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1838 | |
bogdanm | 0:9b334a45a8ff | 1839 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1840 | } |
bogdanm | 0:9b334a45a8ff | 1841 | else |
bogdanm | 0:9b334a45a8ff | 1842 | { |
bogdanm | 0:9b334a45a8ff | 1843 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1844 | } |
bogdanm | 0:9b334a45a8ff | 1845 | } |
bogdanm | 0:9b334a45a8ff | 1846 | /** |
bogdanm | 0:9b334a45a8ff | 1847 | * @} |
bogdanm | 0:9b334a45a8ff | 1848 | */ |
bogdanm | 0:9b334a45a8ff | 1849 | |
bogdanm | 0:9b334a45a8ff | 1850 | /** @addtogroup Non_Blocking_mode_Interrupt Non Blocking mode Interrupt |
bogdanm | 0:9b334a45a8ff | 1851 | * @{ |
bogdanm | 0:9b334a45a8ff | 1852 | */ |
bogdanm | 0:9b334a45a8ff | 1853 | |
bogdanm | 0:9b334a45a8ff | 1854 | /** |
bogdanm | 0:9b334a45a8ff | 1855 | * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address |
bogdanm | 0:9b334a45a8ff | 1856 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1857 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1858 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 1859 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 1860 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 1861 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1862 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1863 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1864 | */ |
bogdanm | 0:9b334a45a8ff | 1865 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1866 | { |
bogdanm | 0:9b334a45a8ff | 1867 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1868 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 1869 | |
bogdanm | 0:9b334a45a8ff | 1870 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1871 | { |
bogdanm | 0:9b334a45a8ff | 1872 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1873 | { |
bogdanm | 0:9b334a45a8ff | 1874 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1875 | } |
bogdanm | 0:9b334a45a8ff | 1876 | |
bogdanm | 0:9b334a45a8ff | 1877 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 1878 | { |
bogdanm | 0:9b334a45a8ff | 1879 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1880 | } |
bogdanm | 0:9b334a45a8ff | 1881 | |
bogdanm | 0:9b334a45a8ff | 1882 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1883 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1884 | |
bogdanm | 0:9b334a45a8ff | 1885 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 1886 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 1887 | |
bogdanm | 0:9b334a45a8ff | 1888 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1889 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1890 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1891 | { |
bogdanm | 0:9b334a45a8ff | 1892 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 1893 | } |
bogdanm | 0:9b334a45a8ff | 1894 | else |
bogdanm | 0:9b334a45a8ff | 1895 | { |
bogdanm | 0:9b334a45a8ff | 1896 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1897 | } |
bogdanm | 0:9b334a45a8ff | 1898 | |
bogdanm | 0:9b334a45a8ff | 1899 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 1900 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1901 | { |
bogdanm | 0:9b334a45a8ff | 1902 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1903 | { |
bogdanm | 0:9b334a45a8ff | 1904 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1905 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1906 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1907 | } |
bogdanm | 0:9b334a45a8ff | 1908 | else |
bogdanm | 0:9b334a45a8ff | 1909 | { |
bogdanm | 0:9b334a45a8ff | 1910 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1911 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1912 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 1913 | } |
bogdanm | 0:9b334a45a8ff | 1914 | } |
bogdanm | 0:9b334a45a8ff | 1915 | |
bogdanm | 0:9b334a45a8ff | 1916 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 1917 | /* Size > 255, need to set RELOAD bit */ |
bogdanm | 0:9b334a45a8ff | 1918 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 1919 | { |
bogdanm | 0:9b334a45a8ff | 1920 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1921 | } |
bogdanm | 0:9b334a45a8ff | 1922 | else |
bogdanm | 0:9b334a45a8ff | 1923 | { |
bogdanm | 0:9b334a45a8ff | 1924 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 1925 | } |
bogdanm | 0:9b334a45a8ff | 1926 | |
bogdanm | 0:9b334a45a8ff | 1927 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1928 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1929 | |
bogdanm | 0:9b334a45a8ff | 1930 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 1931 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 1932 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 1933 | |
bogdanm | 0:9b334a45a8ff | 1934 | /* Enable ERR, TC, STOP, NACK, TXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 1935 | /* possible to enable all of these */ |
bogdanm | 0:9b334a45a8ff | 1936 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
bogdanm | 0:9b334a45a8ff | 1937 | __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI ); |
bogdanm | 0:9b334a45a8ff | 1938 | |
bogdanm | 0:9b334a45a8ff | 1939 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1940 | } |
bogdanm | 0:9b334a45a8ff | 1941 | else |
bogdanm | 0:9b334a45a8ff | 1942 | { |
bogdanm | 0:9b334a45a8ff | 1943 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1944 | } |
bogdanm | 0:9b334a45a8ff | 1945 | } |
bogdanm | 0:9b334a45a8ff | 1946 | |
bogdanm | 0:9b334a45a8ff | 1947 | /** |
bogdanm | 0:9b334a45a8ff | 1948 | * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address |
bogdanm | 0:9b334a45a8ff | 1949 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 1950 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 1951 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 1952 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 1953 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 1954 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 1955 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 1956 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1957 | */ |
bogdanm | 0:9b334a45a8ff | 1958 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 1959 | { |
bogdanm | 0:9b334a45a8ff | 1960 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 1961 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 1962 | |
bogdanm | 0:9b334a45a8ff | 1963 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 1964 | { |
bogdanm | 0:9b334a45a8ff | 1965 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 1966 | { |
bogdanm | 0:9b334a45a8ff | 1967 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1968 | } |
bogdanm | 0:9b334a45a8ff | 1969 | |
bogdanm | 0:9b334a45a8ff | 1970 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 1971 | { |
bogdanm | 0:9b334a45a8ff | 1972 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1973 | } |
bogdanm | 0:9b334a45a8ff | 1974 | |
bogdanm | 0:9b334a45a8ff | 1975 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 1976 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1977 | |
bogdanm | 0:9b334a45a8ff | 1978 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 1979 | |
bogdanm | 0:9b334a45a8ff | 1980 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 1981 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 1982 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 1983 | { |
bogdanm | 0:9b334a45a8ff | 1984 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 1985 | } |
bogdanm | 0:9b334a45a8ff | 1986 | else |
bogdanm | 0:9b334a45a8ff | 1987 | { |
bogdanm | 0:9b334a45a8ff | 1988 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 1989 | } |
bogdanm | 0:9b334a45a8ff | 1990 | |
bogdanm | 0:9b334a45a8ff | 1991 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 1992 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 1993 | { |
bogdanm | 0:9b334a45a8ff | 1994 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 1995 | { |
bogdanm | 0:9b334a45a8ff | 1996 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 1997 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 1998 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 1999 | } |
bogdanm | 0:9b334a45a8ff | 2000 | else |
bogdanm | 0:9b334a45a8ff | 2001 | { |
bogdanm | 0:9b334a45a8ff | 2002 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2003 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2004 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2005 | } |
bogdanm | 0:9b334a45a8ff | 2006 | } |
bogdanm | 0:9b334a45a8ff | 2007 | |
bogdanm | 0:9b334a45a8ff | 2008 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 2009 | /* Size > 255, need to set RELOAD bit */ |
bogdanm | 0:9b334a45a8ff | 2010 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 2011 | { |
bogdanm | 0:9b334a45a8ff | 2012 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 2013 | } |
bogdanm | 0:9b334a45a8ff | 2014 | else |
bogdanm | 0:9b334a45a8ff | 2015 | { |
bogdanm | 0:9b334a45a8ff | 2016 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 2017 | } |
bogdanm | 0:9b334a45a8ff | 2018 | |
bogdanm | 0:9b334a45a8ff | 2019 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2020 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2021 | |
bogdanm | 0:9b334a45a8ff | 2022 | /* Note : The I2C interrupts must be enabled after unlocking current process |
bogdanm | 0:9b334a45a8ff | 2023 | to avoid the risk of I2C interrupt handle execution before current |
bogdanm | 0:9b334a45a8ff | 2024 | process unlock */ |
bogdanm | 0:9b334a45a8ff | 2025 | |
bogdanm | 0:9b334a45a8ff | 2026 | /* Enable ERR, TC, STOP, NACK, RXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 2027 | /* possible to enable all of these */ |
bogdanm | 0:9b334a45a8ff | 2028 | /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ |
bogdanm | 0:9b334a45a8ff | 2029 | __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI ); |
bogdanm | 0:9b334a45a8ff | 2030 | |
bogdanm | 0:9b334a45a8ff | 2031 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2032 | } |
bogdanm | 0:9b334a45a8ff | 2033 | else |
bogdanm | 0:9b334a45a8ff | 2034 | { |
bogdanm | 0:9b334a45a8ff | 2035 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2036 | } |
bogdanm | 0:9b334a45a8ff | 2037 | } |
bogdanm | 0:9b334a45a8ff | 2038 | |
bogdanm | 0:9b334a45a8ff | 2039 | /** |
bogdanm | 0:9b334a45a8ff | 2040 | * @} |
bogdanm | 0:9b334a45a8ff | 2041 | */ |
bogdanm | 0:9b334a45a8ff | 2042 | |
bogdanm | 0:9b334a45a8ff | 2043 | /** @addtogroup Non_Blocking_mode_DMA Non Blocking mode DMA |
bogdanm | 0:9b334a45a8ff | 2044 | * @{ |
bogdanm | 0:9b334a45a8ff | 2045 | */ |
bogdanm | 0:9b334a45a8ff | 2046 | |
bogdanm | 0:9b334a45a8ff | 2047 | /** |
bogdanm | 0:9b334a45a8ff | 2048 | * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address |
bogdanm | 0:9b334a45a8ff | 2049 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2050 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2051 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 2052 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 2053 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 2054 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 2055 | * @param Size: Amount of data to be sent |
bogdanm | 0:9b334a45a8ff | 2056 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2057 | */ |
bogdanm | 0:9b334a45a8ff | 2058 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 2059 | { |
bogdanm | 0:9b334a45a8ff | 2060 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2061 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 2062 | |
bogdanm | 0:9b334a45a8ff | 2063 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2064 | { |
bogdanm | 0:9b334a45a8ff | 2065 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 2066 | { |
bogdanm | 0:9b334a45a8ff | 2067 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2068 | } |
bogdanm | 0:9b334a45a8ff | 2069 | |
bogdanm | 0:9b334a45a8ff | 2070 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 2071 | { |
bogdanm | 0:9b334a45a8ff | 2072 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2073 | } |
bogdanm | 0:9b334a45a8ff | 2074 | |
bogdanm | 0:9b334a45a8ff | 2075 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2076 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2077 | |
bogdanm | 0:9b334a45a8ff | 2078 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 2079 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 2080 | |
bogdanm | 0:9b334a45a8ff | 2081 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 2082 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 2083 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 2084 | { |
bogdanm | 0:9b334a45a8ff | 2085 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 2086 | } |
bogdanm | 0:9b334a45a8ff | 2087 | else |
bogdanm | 0:9b334a45a8ff | 2088 | { |
bogdanm | 0:9b334a45a8ff | 2089 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 2090 | } |
bogdanm | 0:9b334a45a8ff | 2091 | |
bogdanm | 0:9b334a45a8ff | 2092 | /* Set the I2C DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 2093 | hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt; |
bogdanm | 0:9b334a45a8ff | 2094 | |
bogdanm | 0:9b334a45a8ff | 2095 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 2096 | hi2c->hdmatx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 2097 | |
bogdanm | 0:9b334a45a8ff | 2098 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 2099 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 2100 | |
bogdanm | 0:9b334a45a8ff | 2101 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 2102 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2103 | { |
bogdanm | 0:9b334a45a8ff | 2104 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 2105 | { |
bogdanm | 0:9b334a45a8ff | 2106 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2107 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2108 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2109 | } |
bogdanm | 0:9b334a45a8ff | 2110 | else |
bogdanm | 0:9b334a45a8ff | 2111 | { |
bogdanm | 0:9b334a45a8ff | 2112 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2113 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2114 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2115 | } |
bogdanm | 0:9b334a45a8ff | 2116 | } |
bogdanm | 0:9b334a45a8ff | 2117 | |
bogdanm | 0:9b334a45a8ff | 2118 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 2119 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 2120 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 2121 | { |
bogdanm | 0:9b334a45a8ff | 2122 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 2123 | } |
bogdanm | 0:9b334a45a8ff | 2124 | else |
bogdanm | 0:9b334a45a8ff | 2125 | { |
bogdanm | 0:9b334a45a8ff | 2126 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 2127 | } |
bogdanm | 0:9b334a45a8ff | 2128 | |
bogdanm | 0:9b334a45a8ff | 2129 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 2130 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2131 | { |
bogdanm | 0:9b334a45a8ff | 2132 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 2133 | { |
bogdanm | 0:9b334a45a8ff | 2134 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2135 | } |
bogdanm | 0:9b334a45a8ff | 2136 | else |
bogdanm | 0:9b334a45a8ff | 2137 | { |
bogdanm | 0:9b334a45a8ff | 2138 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2139 | } |
bogdanm | 0:9b334a45a8ff | 2140 | } |
bogdanm | 0:9b334a45a8ff | 2141 | |
bogdanm | 0:9b334a45a8ff | 2142 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 2143 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 2144 | |
bogdanm | 0:9b334a45a8ff | 2145 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2146 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2147 | |
bogdanm | 0:9b334a45a8ff | 2148 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2149 | } |
bogdanm | 0:9b334a45a8ff | 2150 | else |
bogdanm | 0:9b334a45a8ff | 2151 | { |
bogdanm | 0:9b334a45a8ff | 2152 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2153 | } |
bogdanm | 0:9b334a45a8ff | 2154 | } |
bogdanm | 0:9b334a45a8ff | 2155 | |
bogdanm | 0:9b334a45a8ff | 2156 | /** |
bogdanm | 0:9b334a45a8ff | 2157 | * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address. |
bogdanm | 0:9b334a45a8ff | 2158 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2159 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2160 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 2161 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 2162 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 2163 | * @param pData: Pointer to data buffer |
bogdanm | 0:9b334a45a8ff | 2164 | * @param Size: Amount of data to be read |
bogdanm | 0:9b334a45a8ff | 2165 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2166 | */ |
bogdanm | 0:9b334a45a8ff | 2167 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
bogdanm | 0:9b334a45a8ff | 2168 | { |
bogdanm | 0:9b334a45a8ff | 2169 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 2170 | assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); |
bogdanm | 0:9b334a45a8ff | 2171 | |
bogdanm | 0:9b334a45a8ff | 2172 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2173 | { |
bogdanm | 0:9b334a45a8ff | 2174 | if((pData == HAL_NULL) || (Size == 0)) |
bogdanm | 0:9b334a45a8ff | 2175 | { |
bogdanm | 0:9b334a45a8ff | 2176 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2177 | } |
bogdanm | 0:9b334a45a8ff | 2178 | |
bogdanm | 0:9b334a45a8ff | 2179 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 2180 | { |
bogdanm | 0:9b334a45a8ff | 2181 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2182 | } |
bogdanm | 0:9b334a45a8ff | 2183 | |
bogdanm | 0:9b334a45a8ff | 2184 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2185 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2186 | |
bogdanm | 0:9b334a45a8ff | 2187 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 2188 | |
bogdanm | 0:9b334a45a8ff | 2189 | hi2c->pBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 2190 | hi2c->XferCount = Size; |
bogdanm | 0:9b334a45a8ff | 2191 | if(Size > 255) |
bogdanm | 0:9b334a45a8ff | 2192 | { |
bogdanm | 0:9b334a45a8ff | 2193 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 2194 | } |
bogdanm | 0:9b334a45a8ff | 2195 | else |
bogdanm | 0:9b334a45a8ff | 2196 | { |
bogdanm | 0:9b334a45a8ff | 2197 | hi2c->XferSize = Size; |
bogdanm | 0:9b334a45a8ff | 2198 | } |
bogdanm | 0:9b334a45a8ff | 2199 | |
bogdanm | 0:9b334a45a8ff | 2200 | /* Set the I2C DMA transfer complete callback */ |
bogdanm | 0:9b334a45a8ff | 2201 | hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt; |
bogdanm | 0:9b334a45a8ff | 2202 | |
bogdanm | 0:9b334a45a8ff | 2203 | /* Set the DMA error callback */ |
bogdanm | 0:9b334a45a8ff | 2204 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
bogdanm | 0:9b334a45a8ff | 2205 | |
bogdanm | 0:9b334a45a8ff | 2206 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 2207 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 2208 | |
bogdanm | 0:9b334a45a8ff | 2209 | /* Send Slave Address and Memory Address */ |
bogdanm | 0:9b334a45a8ff | 2210 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2211 | { |
bogdanm | 0:9b334a45a8ff | 2212 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 2213 | { |
bogdanm | 0:9b334a45a8ff | 2214 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2215 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2216 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 2217 | } |
bogdanm | 0:9b334a45a8ff | 2218 | else |
bogdanm | 0:9b334a45a8ff | 2219 | { |
bogdanm | 0:9b334a45a8ff | 2220 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2221 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2222 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2223 | } |
bogdanm | 0:9b334a45a8ff | 2224 | } |
bogdanm | 0:9b334a45a8ff | 2225 | |
bogdanm | 0:9b334a45a8ff | 2226 | /* Set NBYTES to write and reload if size > 255 and generate RESTART */ |
bogdanm | 0:9b334a45a8ff | 2227 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 2228 | { |
bogdanm | 0:9b334a45a8ff | 2229 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 2230 | } |
bogdanm | 0:9b334a45a8ff | 2231 | else |
bogdanm | 0:9b334a45a8ff | 2232 | { |
bogdanm | 0:9b334a45a8ff | 2233 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); |
bogdanm | 0:9b334a45a8ff | 2234 | } |
bogdanm | 0:9b334a45a8ff | 2235 | |
bogdanm | 0:9b334a45a8ff | 2236 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 2237 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2238 | { |
bogdanm | 0:9b334a45a8ff | 2239 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2240 | } |
bogdanm | 0:9b334a45a8ff | 2241 | |
bogdanm | 0:9b334a45a8ff | 2242 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 2243 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 2244 | |
bogdanm | 0:9b334a45a8ff | 2245 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2246 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2247 | |
bogdanm | 0:9b334a45a8ff | 2248 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2249 | } |
bogdanm | 0:9b334a45a8ff | 2250 | else |
bogdanm | 0:9b334a45a8ff | 2251 | { |
bogdanm | 0:9b334a45a8ff | 2252 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2253 | } |
bogdanm | 0:9b334a45a8ff | 2254 | } |
bogdanm | 0:9b334a45a8ff | 2255 | /** |
bogdanm | 0:9b334a45a8ff | 2256 | * @} |
bogdanm | 0:9b334a45a8ff | 2257 | */ |
bogdanm | 0:9b334a45a8ff | 2258 | |
bogdanm | 0:9b334a45a8ff | 2259 | /** @addtogroup Blocking_mode_Polling Blocking mode Polling |
bogdanm | 0:9b334a45a8ff | 2260 | * @{ |
bogdanm | 0:9b334a45a8ff | 2261 | */ |
bogdanm | 0:9b334a45a8ff | 2262 | |
bogdanm | 0:9b334a45a8ff | 2263 | /** |
bogdanm | 0:9b334a45a8ff | 2264 | * @brief Checks if target device is ready for communication. |
bogdanm | 0:9b334a45a8ff | 2265 | * @note This function is used with Memory devices |
bogdanm | 0:9b334a45a8ff | 2266 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2267 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2268 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 2269 | * @param Trials: Number of trials |
bogdanm | 0:9b334a45a8ff | 2270 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 2271 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2272 | */ |
bogdanm | 0:9b334a45a8ff | 2273 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 2274 | { |
bogdanm | 0:9b334a45a8ff | 2275 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 2276 | |
bogdanm | 0:9b334a45a8ff | 2277 | __IO uint32_t I2C_Trials = 0; |
bogdanm | 0:9b334a45a8ff | 2278 | |
bogdanm | 0:9b334a45a8ff | 2279 | if(hi2c->State == HAL_I2C_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 2280 | { |
bogdanm | 0:9b334a45a8ff | 2281 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) |
bogdanm | 0:9b334a45a8ff | 2282 | { |
bogdanm | 0:9b334a45a8ff | 2283 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2284 | } |
bogdanm | 0:9b334a45a8ff | 2285 | |
bogdanm | 0:9b334a45a8ff | 2286 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2287 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2288 | |
bogdanm | 0:9b334a45a8ff | 2289 | hi2c->State = HAL_I2C_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 2290 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 2291 | |
bogdanm | 0:9b334a45a8ff | 2292 | do |
bogdanm | 0:9b334a45a8ff | 2293 | { |
bogdanm | 0:9b334a45a8ff | 2294 | /* Generate Start */ |
bogdanm | 0:9b334a45a8ff | 2295 | hi2c->Instance->CR2 = __HAL_I2C_GENERATE_START(hi2c->Init.AddressingMode,DevAddress); |
bogdanm | 0:9b334a45a8ff | 2296 | |
bogdanm | 0:9b334a45a8ff | 2297 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 2298 | /* Wait until STOPF flag is set or a NACK flag is set*/ |
bogdanm | 0:9b334a45a8ff | 2299 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 2300 | while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT)) |
bogdanm | 0:9b334a45a8ff | 2301 | { |
bogdanm | 0:9b334a45a8ff | 2302 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 2303 | { |
bogdanm | 0:9b334a45a8ff | 2304 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 2305 | { |
bogdanm | 0:9b334a45a8ff | 2306 | /* Device is ready */ |
bogdanm | 0:9b334a45a8ff | 2307 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2308 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2309 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2310 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2311 | } |
bogdanm | 0:9b334a45a8ff | 2312 | } |
bogdanm | 0:9b334a45a8ff | 2313 | } |
bogdanm | 0:9b334a45a8ff | 2314 | |
bogdanm | 0:9b334a45a8ff | 2315 | /* Check if the NACKF flag has not been set */ |
bogdanm | 0:9b334a45a8ff | 2316 | if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) |
bogdanm | 0:9b334a45a8ff | 2317 | { |
bogdanm | 0:9b334a45a8ff | 2318 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 2319 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2320 | { |
bogdanm | 0:9b334a45a8ff | 2321 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2322 | } |
bogdanm | 0:9b334a45a8ff | 2323 | |
bogdanm | 0:9b334a45a8ff | 2324 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 2325 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2326 | |
bogdanm | 0:9b334a45a8ff | 2327 | /* Device is ready */ |
bogdanm | 0:9b334a45a8ff | 2328 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2329 | |
bogdanm | 0:9b334a45a8ff | 2330 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2331 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2332 | |
bogdanm | 0:9b334a45a8ff | 2333 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2334 | } |
bogdanm | 0:9b334a45a8ff | 2335 | else |
bogdanm | 0:9b334a45a8ff | 2336 | { |
bogdanm | 0:9b334a45a8ff | 2337 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 2338 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2339 | { |
bogdanm | 0:9b334a45a8ff | 2340 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2341 | } |
bogdanm | 0:9b334a45a8ff | 2342 | |
bogdanm | 0:9b334a45a8ff | 2343 | /* Clear NACK Flag */ |
bogdanm | 0:9b334a45a8ff | 2344 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2345 | |
bogdanm | 0:9b334a45a8ff | 2346 | /* Clear STOP Flag, auto generated with autoend*/ |
bogdanm | 0:9b334a45a8ff | 2347 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2348 | } |
bogdanm | 0:9b334a45a8ff | 2349 | |
bogdanm | 0:9b334a45a8ff | 2350 | /* Check if the maximum allowed number of trials has been reached */ |
bogdanm | 0:9b334a45a8ff | 2351 | if (I2C_Trials++ == Trials) |
bogdanm | 0:9b334a45a8ff | 2352 | { |
bogdanm | 0:9b334a45a8ff | 2353 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2354 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
bogdanm | 0:9b334a45a8ff | 2355 | |
bogdanm | 0:9b334a45a8ff | 2356 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 2357 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2358 | { |
bogdanm | 0:9b334a45a8ff | 2359 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2360 | } |
bogdanm | 0:9b334a45a8ff | 2361 | |
bogdanm | 0:9b334a45a8ff | 2362 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 2363 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2364 | } |
bogdanm | 0:9b334a45a8ff | 2365 | }while(I2C_Trials < Trials); |
bogdanm | 0:9b334a45a8ff | 2366 | |
bogdanm | 0:9b334a45a8ff | 2367 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2368 | |
bogdanm | 0:9b334a45a8ff | 2369 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2370 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2371 | |
bogdanm | 0:9b334a45a8ff | 2372 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 2373 | } |
bogdanm | 0:9b334a45a8ff | 2374 | else |
bogdanm | 0:9b334a45a8ff | 2375 | { |
bogdanm | 0:9b334a45a8ff | 2376 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 2377 | } |
bogdanm | 0:9b334a45a8ff | 2378 | } |
bogdanm | 0:9b334a45a8ff | 2379 | /** |
bogdanm | 0:9b334a45a8ff | 2380 | * @} |
bogdanm | 0:9b334a45a8ff | 2381 | */ |
bogdanm | 0:9b334a45a8ff | 2382 | |
bogdanm | 0:9b334a45a8ff | 2383 | /** @defgroup IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
bogdanm | 0:9b334a45a8ff | 2384 | * @{ |
bogdanm | 0:9b334a45a8ff | 2385 | */ |
bogdanm | 0:9b334a45a8ff | 2386 | |
bogdanm | 0:9b334a45a8ff | 2387 | /** |
bogdanm | 0:9b334a45a8ff | 2388 | * @brief This function handles I2C event interrupt request. |
bogdanm | 0:9b334a45a8ff | 2389 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2390 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2391 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2392 | */ |
bogdanm | 0:9b334a45a8ff | 2393 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2394 | { |
bogdanm | 0:9b334a45a8ff | 2395 | /* I2C in mode Transmitter ---------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2396 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI | I2C_IT_ADDRI)) == SET)) |
bogdanm | 0:9b334a45a8ff | 2397 | { |
bogdanm | 0:9b334a45a8ff | 2398 | /* Slave mode selected */ |
bogdanm | 0:9b334a45a8ff | 2399 | if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 2400 | { |
bogdanm | 0:9b334a45a8ff | 2401 | I2C_SlaveTransmit_ISR(hi2c); |
bogdanm | 0:9b334a45a8ff | 2402 | } |
bogdanm | 0:9b334a45a8ff | 2403 | } |
bogdanm | 0:9b334a45a8ff | 2404 | |
bogdanm | 0:9b334a45a8ff | 2405 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI)) == SET)) |
bogdanm | 0:9b334a45a8ff | 2406 | { |
bogdanm | 0:9b334a45a8ff | 2407 | /* Master mode selected */ |
bogdanm | 0:9b334a45a8ff | 2408 | if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)) |
bogdanm | 0:9b334a45a8ff | 2409 | { |
bogdanm | 0:9b334a45a8ff | 2410 | I2C_MasterTransmit_ISR(hi2c); |
bogdanm | 0:9b334a45a8ff | 2411 | } |
bogdanm | 0:9b334a45a8ff | 2412 | } |
bogdanm | 0:9b334a45a8ff | 2413 | |
bogdanm | 0:9b334a45a8ff | 2414 | /* I2C in mode Receiver ----------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2415 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI | I2C_IT_ADDRI)) == SET)) |
bogdanm | 0:9b334a45a8ff | 2416 | { |
bogdanm | 0:9b334a45a8ff | 2417 | /* Slave mode selected */ |
bogdanm | 0:9b334a45a8ff | 2418 | if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX) |
bogdanm | 0:9b334a45a8ff | 2419 | { |
bogdanm | 0:9b334a45a8ff | 2420 | I2C_SlaveReceive_ISR(hi2c); |
bogdanm | 0:9b334a45a8ff | 2421 | } |
bogdanm | 0:9b334a45a8ff | 2422 | } |
bogdanm | 0:9b334a45a8ff | 2423 | if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI)) == SET)) |
bogdanm | 0:9b334a45a8ff | 2424 | { |
bogdanm | 0:9b334a45a8ff | 2425 | /* Master mode selected */ |
bogdanm | 0:9b334a45a8ff | 2426 | if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)) |
bogdanm | 0:9b334a45a8ff | 2427 | { |
bogdanm | 0:9b334a45a8ff | 2428 | I2C_MasterReceive_ISR(hi2c); |
bogdanm | 0:9b334a45a8ff | 2429 | } |
bogdanm | 0:9b334a45a8ff | 2430 | } |
bogdanm | 0:9b334a45a8ff | 2431 | } |
bogdanm | 0:9b334a45a8ff | 2432 | |
bogdanm | 0:9b334a45a8ff | 2433 | /** |
bogdanm | 0:9b334a45a8ff | 2434 | * @brief This function handles I2C error interrupt request. |
bogdanm | 0:9b334a45a8ff | 2435 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2436 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2437 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2438 | */ |
bogdanm | 0:9b334a45a8ff | 2439 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2440 | { |
bogdanm | 0:9b334a45a8ff | 2441 | /* I2C Bus error interrupt occurred ------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2442 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET)) |
bogdanm | 0:9b334a45a8ff | 2443 | { |
bogdanm | 0:9b334a45a8ff | 2444 | hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; |
bogdanm | 0:9b334a45a8ff | 2445 | |
bogdanm | 0:9b334a45a8ff | 2446 | /* Clear BERR flag */ |
bogdanm | 0:9b334a45a8ff | 2447 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); |
bogdanm | 0:9b334a45a8ff | 2448 | } |
bogdanm | 0:9b334a45a8ff | 2449 | |
bogdanm | 0:9b334a45a8ff | 2450 | /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2451 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET)) |
bogdanm | 0:9b334a45a8ff | 2452 | { |
bogdanm | 0:9b334a45a8ff | 2453 | hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; |
bogdanm | 0:9b334a45a8ff | 2454 | |
bogdanm | 0:9b334a45a8ff | 2455 | /* Clear OVR flag */ |
bogdanm | 0:9b334a45a8ff | 2456 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); |
bogdanm | 0:9b334a45a8ff | 2457 | } |
bogdanm | 0:9b334a45a8ff | 2458 | |
bogdanm | 0:9b334a45a8ff | 2459 | /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 2460 | if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET)) |
bogdanm | 0:9b334a45a8ff | 2461 | { |
bogdanm | 0:9b334a45a8ff | 2462 | hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; |
bogdanm | 0:9b334a45a8ff | 2463 | |
bogdanm | 0:9b334a45a8ff | 2464 | /* Clear ARLO flag */ |
bogdanm | 0:9b334a45a8ff | 2465 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); |
bogdanm | 0:9b334a45a8ff | 2466 | } |
bogdanm | 0:9b334a45a8ff | 2467 | |
bogdanm | 0:9b334a45a8ff | 2468 | /* Call the Error Callback in case of Error detected */ |
bogdanm | 0:9b334a45a8ff | 2469 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 2470 | { |
bogdanm | 0:9b334a45a8ff | 2471 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2472 | |
bogdanm | 0:9b334a45a8ff | 2473 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2474 | } |
bogdanm | 0:9b334a45a8ff | 2475 | } |
bogdanm | 0:9b334a45a8ff | 2476 | |
bogdanm | 0:9b334a45a8ff | 2477 | /** |
bogdanm | 0:9b334a45a8ff | 2478 | * @brief Master Tx Transfer completed callbacks. |
bogdanm | 0:9b334a45a8ff | 2479 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2480 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2481 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2482 | */ |
bogdanm | 0:9b334a45a8ff | 2483 | __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2484 | { |
bogdanm | 0:9b334a45a8ff | 2485 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2486 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2487 | */ |
bogdanm | 0:9b334a45a8ff | 2488 | } |
bogdanm | 0:9b334a45a8ff | 2489 | |
bogdanm | 0:9b334a45a8ff | 2490 | /** |
bogdanm | 0:9b334a45a8ff | 2491 | * @brief Master Rx Transfer completed callbacks. |
bogdanm | 0:9b334a45a8ff | 2492 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2493 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2494 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2495 | */ |
bogdanm | 0:9b334a45a8ff | 2496 | __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2497 | { |
bogdanm | 0:9b334a45a8ff | 2498 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2499 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2500 | */ |
bogdanm | 0:9b334a45a8ff | 2501 | } |
bogdanm | 0:9b334a45a8ff | 2502 | |
bogdanm | 0:9b334a45a8ff | 2503 | /** @brief Slave Tx Transfer completed callbacks. |
bogdanm | 0:9b334a45a8ff | 2504 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2505 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2506 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2507 | */ |
bogdanm | 0:9b334a45a8ff | 2508 | __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2509 | { |
bogdanm | 0:9b334a45a8ff | 2510 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2511 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2512 | */ |
bogdanm | 0:9b334a45a8ff | 2513 | } |
bogdanm | 0:9b334a45a8ff | 2514 | |
bogdanm | 0:9b334a45a8ff | 2515 | /** |
bogdanm | 0:9b334a45a8ff | 2516 | * @brief Slave Rx Transfer completed callbacks. |
bogdanm | 0:9b334a45a8ff | 2517 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2518 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2519 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2520 | */ |
bogdanm | 0:9b334a45a8ff | 2521 | __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2522 | { |
bogdanm | 0:9b334a45a8ff | 2523 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2524 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2525 | */ |
bogdanm | 0:9b334a45a8ff | 2526 | } |
bogdanm | 0:9b334a45a8ff | 2527 | |
bogdanm | 0:9b334a45a8ff | 2528 | /** |
bogdanm | 0:9b334a45a8ff | 2529 | * @brief Memory Tx Transfer completed callbacks. |
bogdanm | 0:9b334a45a8ff | 2530 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2531 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2532 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2533 | */ |
bogdanm | 0:9b334a45a8ff | 2534 | __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2535 | { |
bogdanm | 0:9b334a45a8ff | 2536 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2537 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2538 | */ |
bogdanm | 0:9b334a45a8ff | 2539 | } |
bogdanm | 0:9b334a45a8ff | 2540 | |
bogdanm | 0:9b334a45a8ff | 2541 | /** |
bogdanm | 0:9b334a45a8ff | 2542 | * @brief Memory Rx Transfer completed callbacks. |
bogdanm | 0:9b334a45a8ff | 2543 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2544 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2545 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2546 | */ |
bogdanm | 0:9b334a45a8ff | 2547 | __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2548 | { |
bogdanm | 0:9b334a45a8ff | 2549 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2550 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2551 | */ |
bogdanm | 0:9b334a45a8ff | 2552 | } |
bogdanm | 0:9b334a45a8ff | 2553 | |
bogdanm | 0:9b334a45a8ff | 2554 | /** |
bogdanm | 0:9b334a45a8ff | 2555 | * @brief I2C error callbacks. |
bogdanm | 0:9b334a45a8ff | 2556 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2557 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2558 | * @retval None |
bogdanm | 0:9b334a45a8ff | 2559 | */ |
bogdanm | 0:9b334a45a8ff | 2560 | __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2561 | { |
bogdanm | 0:9b334a45a8ff | 2562 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 2563 | the HAL_I2C_ErrorCallback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 2564 | */ |
bogdanm | 0:9b334a45a8ff | 2565 | } |
bogdanm | 0:9b334a45a8ff | 2566 | |
bogdanm | 0:9b334a45a8ff | 2567 | /** |
bogdanm | 0:9b334a45a8ff | 2568 | * @} |
bogdanm | 0:9b334a45a8ff | 2569 | */ |
bogdanm | 0:9b334a45a8ff | 2570 | |
bogdanm | 0:9b334a45a8ff | 2571 | /** |
bogdanm | 0:9b334a45a8ff | 2572 | * @} |
bogdanm | 0:9b334a45a8ff | 2573 | */ |
bogdanm | 0:9b334a45a8ff | 2574 | |
bogdanm | 0:9b334a45a8ff | 2575 | /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions |
bogdanm | 0:9b334a45a8ff | 2576 | * @brief Peripheral State and Errors functions |
bogdanm | 0:9b334a45a8ff | 2577 | * |
bogdanm | 0:9b334a45a8ff | 2578 | @verbatim |
bogdanm | 0:9b334a45a8ff | 2579 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2580 | ##### Peripheral State and Errors functions ##### |
bogdanm | 0:9b334a45a8ff | 2581 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 2582 | [..] |
bogdanm | 0:9b334a45a8ff | 2583 | This subsection permit to get in run-time the status of the peripheral |
bogdanm | 0:9b334a45a8ff | 2584 | and the data flow. |
bogdanm | 0:9b334a45a8ff | 2585 | |
bogdanm | 0:9b334a45a8ff | 2586 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 2587 | * @{ |
bogdanm | 0:9b334a45a8ff | 2588 | */ |
bogdanm | 0:9b334a45a8ff | 2589 | |
bogdanm | 0:9b334a45a8ff | 2590 | /** |
bogdanm | 0:9b334a45a8ff | 2591 | * @brief Returns the I2C state. |
bogdanm | 0:9b334a45a8ff | 2592 | * @param hi2c : I2C handle |
bogdanm | 0:9b334a45a8ff | 2593 | * @retval HAL state |
bogdanm | 0:9b334a45a8ff | 2594 | */ |
bogdanm | 0:9b334a45a8ff | 2595 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2596 | { |
bogdanm | 0:9b334a45a8ff | 2597 | return hi2c->State; |
bogdanm | 0:9b334a45a8ff | 2598 | } |
bogdanm | 0:9b334a45a8ff | 2599 | |
bogdanm | 0:9b334a45a8ff | 2600 | /** |
bogdanm | 0:9b334a45a8ff | 2601 | * @brief Return the I2C error code |
bogdanm | 0:9b334a45a8ff | 2602 | * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2603 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2604 | * @retval I2C Error Code |
bogdanm | 0:9b334a45a8ff | 2605 | */ |
bogdanm | 0:9b334a45a8ff | 2606 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2607 | { |
bogdanm | 0:9b334a45a8ff | 2608 | return hi2c->ErrorCode; |
bogdanm | 0:9b334a45a8ff | 2609 | } |
bogdanm | 0:9b334a45a8ff | 2610 | |
bogdanm | 0:9b334a45a8ff | 2611 | /** |
bogdanm | 0:9b334a45a8ff | 2612 | * @} |
bogdanm | 0:9b334a45a8ff | 2613 | */ |
bogdanm | 0:9b334a45a8ff | 2614 | |
bogdanm | 0:9b334a45a8ff | 2615 | /** |
bogdanm | 0:9b334a45a8ff | 2616 | * @} |
bogdanm | 0:9b334a45a8ff | 2617 | */ |
bogdanm | 0:9b334a45a8ff | 2618 | |
bogdanm | 0:9b334a45a8ff | 2619 | /** @addtogroup I2C_Private_Functions |
bogdanm | 0:9b334a45a8ff | 2620 | * @{ |
bogdanm | 0:9b334a45a8ff | 2621 | */ |
bogdanm | 0:9b334a45a8ff | 2622 | |
bogdanm | 0:9b334a45a8ff | 2623 | /** |
bogdanm | 0:9b334a45a8ff | 2624 | * @brief Handle Interrupt Flags Master Transmit Mode |
bogdanm | 0:9b334a45a8ff | 2625 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2626 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2627 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2628 | */ |
bogdanm | 0:9b334a45a8ff | 2629 | static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2630 | { |
bogdanm | 0:9b334a45a8ff | 2631 | uint16_t DevAddress; |
bogdanm | 0:9b334a45a8ff | 2632 | |
bogdanm | 0:9b334a45a8ff | 2633 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2634 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2635 | |
bogdanm | 0:9b334a45a8ff | 2636 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) |
bogdanm | 0:9b334a45a8ff | 2637 | { |
bogdanm | 0:9b334a45a8ff | 2638 | /* Write data to TXDR */ |
bogdanm | 0:9b334a45a8ff | 2639 | hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); |
bogdanm | 0:9b334a45a8ff | 2640 | hi2c->XferSize--; |
bogdanm | 0:9b334a45a8ff | 2641 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 2642 | } |
bogdanm | 0:9b334a45a8ff | 2643 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) |
bogdanm | 0:9b334a45a8ff | 2644 | { |
bogdanm | 0:9b334a45a8ff | 2645 | if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0)) |
bogdanm | 0:9b334a45a8ff | 2646 | { |
bogdanm | 0:9b334a45a8ff | 2647 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
bogdanm | 0:9b334a45a8ff | 2648 | |
bogdanm | 0:9b334a45a8ff | 2649 | if(hi2c->XferCount > 255) |
bogdanm | 0:9b334a45a8ff | 2650 | { |
bogdanm | 0:9b334a45a8ff | 2651 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 2652 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 2653 | } |
bogdanm | 0:9b334a45a8ff | 2654 | else |
bogdanm | 0:9b334a45a8ff | 2655 | { |
bogdanm | 0:9b334a45a8ff | 2656 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 2657 | hi2c->XferSize = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 2658 | } |
bogdanm | 0:9b334a45a8ff | 2659 | } |
bogdanm | 0:9b334a45a8ff | 2660 | else |
bogdanm | 0:9b334a45a8ff | 2661 | { |
bogdanm | 0:9b334a45a8ff | 2662 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2663 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2664 | |
bogdanm | 0:9b334a45a8ff | 2665 | /* Wrong size Status regarding TCR flag event */ |
bogdanm | 0:9b334a45a8ff | 2666 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
bogdanm | 0:9b334a45a8ff | 2667 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2668 | } |
bogdanm | 0:9b334a45a8ff | 2669 | } |
bogdanm | 0:9b334a45a8ff | 2670 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) |
bogdanm | 0:9b334a45a8ff | 2671 | { |
bogdanm | 0:9b334a45a8ff | 2672 | if(hi2c->XferCount == 0) |
bogdanm | 0:9b334a45a8ff | 2673 | { |
bogdanm | 0:9b334a45a8ff | 2674 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2675 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
bogdanm | 0:9b334a45a8ff | 2676 | } |
bogdanm | 0:9b334a45a8ff | 2677 | else |
bogdanm | 0:9b334a45a8ff | 2678 | { |
bogdanm | 0:9b334a45a8ff | 2679 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2680 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2681 | |
bogdanm | 0:9b334a45a8ff | 2682 | /* Wrong size Status regarding TCR flag event */ |
bogdanm | 0:9b334a45a8ff | 2683 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
bogdanm | 0:9b334a45a8ff | 2684 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2685 | } |
bogdanm | 0:9b334a45a8ff | 2686 | } |
bogdanm | 0:9b334a45a8ff | 2687 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
bogdanm | 0:9b334a45a8ff | 2688 | { |
bogdanm | 0:9b334a45a8ff | 2689 | /* Disable ERR, TC, STOP, NACK, TXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 2690 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI ); |
bogdanm | 0:9b334a45a8ff | 2691 | |
bogdanm | 0:9b334a45a8ff | 2692 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 2693 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2694 | |
bogdanm | 0:9b334a45a8ff | 2695 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 2696 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 2697 | |
bogdanm | 0:9b334a45a8ff | 2698 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2699 | |
bogdanm | 0:9b334a45a8ff | 2700 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2701 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2702 | |
bogdanm | 0:9b334a45a8ff | 2703 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 2704 | { |
bogdanm | 0:9b334a45a8ff | 2705 | HAL_I2C_MemTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2706 | } |
bogdanm | 0:9b334a45a8ff | 2707 | else |
bogdanm | 0:9b334a45a8ff | 2708 | { |
bogdanm | 0:9b334a45a8ff | 2709 | HAL_I2C_MasterTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2710 | } |
bogdanm | 0:9b334a45a8ff | 2711 | } |
bogdanm | 0:9b334a45a8ff | 2712 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
bogdanm | 0:9b334a45a8ff | 2713 | { |
bogdanm | 0:9b334a45a8ff | 2714 | /* Clear NACK Flag */ |
bogdanm | 0:9b334a45a8ff | 2715 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2716 | |
bogdanm | 0:9b334a45a8ff | 2717 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2718 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2719 | |
bogdanm | 0:9b334a45a8ff | 2720 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 2721 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2722 | } |
bogdanm | 0:9b334a45a8ff | 2723 | |
bogdanm | 0:9b334a45a8ff | 2724 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2725 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2726 | |
bogdanm | 0:9b334a45a8ff | 2727 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2728 | } |
bogdanm | 0:9b334a45a8ff | 2729 | |
bogdanm | 0:9b334a45a8ff | 2730 | /** |
bogdanm | 0:9b334a45a8ff | 2731 | * @brief Handle Interrupt Flags Master Receive Mode |
bogdanm | 0:9b334a45a8ff | 2732 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2733 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2734 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2735 | */ |
bogdanm | 0:9b334a45a8ff | 2736 | static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2737 | { |
bogdanm | 0:9b334a45a8ff | 2738 | uint16_t DevAddress; |
bogdanm | 0:9b334a45a8ff | 2739 | |
bogdanm | 0:9b334a45a8ff | 2740 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2741 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2742 | |
bogdanm | 0:9b334a45a8ff | 2743 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) |
bogdanm | 0:9b334a45a8ff | 2744 | { |
bogdanm | 0:9b334a45a8ff | 2745 | /* Read data from RXDR */ |
bogdanm | 0:9b334a45a8ff | 2746 | (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 2747 | hi2c->XferSize--; |
bogdanm | 0:9b334a45a8ff | 2748 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 2749 | } |
bogdanm | 0:9b334a45a8ff | 2750 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) |
bogdanm | 0:9b334a45a8ff | 2751 | { |
bogdanm | 0:9b334a45a8ff | 2752 | if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0)) |
bogdanm | 0:9b334a45a8ff | 2753 | { |
bogdanm | 0:9b334a45a8ff | 2754 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
bogdanm | 0:9b334a45a8ff | 2755 | |
bogdanm | 0:9b334a45a8ff | 2756 | if(hi2c->XferCount > 255) |
bogdanm | 0:9b334a45a8ff | 2757 | { |
bogdanm | 0:9b334a45a8ff | 2758 | I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 2759 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 2760 | } |
bogdanm | 0:9b334a45a8ff | 2761 | else |
bogdanm | 0:9b334a45a8ff | 2762 | { |
bogdanm | 0:9b334a45a8ff | 2763 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 2764 | hi2c->XferSize = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 2765 | } |
bogdanm | 0:9b334a45a8ff | 2766 | } |
bogdanm | 0:9b334a45a8ff | 2767 | else |
bogdanm | 0:9b334a45a8ff | 2768 | { |
bogdanm | 0:9b334a45a8ff | 2769 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2770 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2771 | |
bogdanm | 0:9b334a45a8ff | 2772 | /* Wrong size Status regarding TCR flag event */ |
bogdanm | 0:9b334a45a8ff | 2773 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
bogdanm | 0:9b334a45a8ff | 2774 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2775 | } |
bogdanm | 0:9b334a45a8ff | 2776 | } |
bogdanm | 0:9b334a45a8ff | 2777 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) |
bogdanm | 0:9b334a45a8ff | 2778 | { |
bogdanm | 0:9b334a45a8ff | 2779 | if(hi2c->XferCount == 0) |
bogdanm | 0:9b334a45a8ff | 2780 | { |
bogdanm | 0:9b334a45a8ff | 2781 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 2782 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
bogdanm | 0:9b334a45a8ff | 2783 | } |
bogdanm | 0:9b334a45a8ff | 2784 | else |
bogdanm | 0:9b334a45a8ff | 2785 | { |
bogdanm | 0:9b334a45a8ff | 2786 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2787 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2788 | |
bogdanm | 0:9b334a45a8ff | 2789 | /* Wrong size Status regarding TCR flag event */ |
bogdanm | 0:9b334a45a8ff | 2790 | hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE; |
bogdanm | 0:9b334a45a8ff | 2791 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2792 | } |
bogdanm | 0:9b334a45a8ff | 2793 | } |
bogdanm | 0:9b334a45a8ff | 2794 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
bogdanm | 0:9b334a45a8ff | 2795 | { |
bogdanm | 0:9b334a45a8ff | 2796 | /* Disable ERR, TC, STOP, NACK, TXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 2797 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI ); |
bogdanm | 0:9b334a45a8ff | 2798 | |
bogdanm | 0:9b334a45a8ff | 2799 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 2800 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2801 | |
bogdanm | 0:9b334a45a8ff | 2802 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 2803 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 2804 | |
bogdanm | 0:9b334a45a8ff | 2805 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2806 | |
bogdanm | 0:9b334a45a8ff | 2807 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2808 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2809 | |
bogdanm | 0:9b334a45a8ff | 2810 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) |
bogdanm | 0:9b334a45a8ff | 2811 | { |
bogdanm | 0:9b334a45a8ff | 2812 | HAL_I2C_MemRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2813 | } |
bogdanm | 0:9b334a45a8ff | 2814 | else |
bogdanm | 0:9b334a45a8ff | 2815 | { |
bogdanm | 0:9b334a45a8ff | 2816 | HAL_I2C_MasterRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2817 | } |
bogdanm | 0:9b334a45a8ff | 2818 | } |
bogdanm | 0:9b334a45a8ff | 2819 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
bogdanm | 0:9b334a45a8ff | 2820 | { |
bogdanm | 0:9b334a45a8ff | 2821 | /* Clear NACK Flag */ |
bogdanm | 0:9b334a45a8ff | 2822 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2823 | |
bogdanm | 0:9b334a45a8ff | 2824 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2825 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2826 | |
bogdanm | 0:9b334a45a8ff | 2827 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 2828 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2829 | } |
bogdanm | 0:9b334a45a8ff | 2830 | |
bogdanm | 0:9b334a45a8ff | 2831 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2832 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2833 | |
bogdanm | 0:9b334a45a8ff | 2834 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2835 | |
bogdanm | 0:9b334a45a8ff | 2836 | } |
bogdanm | 0:9b334a45a8ff | 2837 | |
bogdanm | 0:9b334a45a8ff | 2838 | /** |
bogdanm | 0:9b334a45a8ff | 2839 | * @brief Handle Interrupt Flags Slave Transmit Mode |
bogdanm | 0:9b334a45a8ff | 2840 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2841 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2842 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2843 | */ |
bogdanm | 0:9b334a45a8ff | 2844 | static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2845 | { |
bogdanm | 0:9b334a45a8ff | 2846 | /* Process locked */ |
bogdanm | 0:9b334a45a8ff | 2847 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2848 | |
bogdanm | 0:9b334a45a8ff | 2849 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET) |
bogdanm | 0:9b334a45a8ff | 2850 | { |
bogdanm | 0:9b334a45a8ff | 2851 | /* Check that I2C transfer finished */ |
bogdanm | 0:9b334a45a8ff | 2852 | /* if yes, normal usecase, a NACK is sent by the MASTER when Transfer is finished */ |
bogdanm | 0:9b334a45a8ff | 2853 | /* Mean XferCount == 0*/ |
bogdanm | 0:9b334a45a8ff | 2854 | /* So clear Flag NACKF only */ |
bogdanm | 0:9b334a45a8ff | 2855 | if(hi2c->XferCount == 0) |
bogdanm | 0:9b334a45a8ff | 2856 | { |
bogdanm | 0:9b334a45a8ff | 2857 | /* Clear NACK Flag */ |
bogdanm | 0:9b334a45a8ff | 2858 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2859 | |
bogdanm | 0:9b334a45a8ff | 2860 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2861 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2862 | } |
bogdanm | 0:9b334a45a8ff | 2863 | else |
bogdanm | 0:9b334a45a8ff | 2864 | { |
bogdanm | 0:9b334a45a8ff | 2865 | /* if no, error usecase, a Non-Acknowledge of last Data is generated by the MASTER*/ |
bogdanm | 0:9b334a45a8ff | 2866 | /* Clear NACK Flag */ |
bogdanm | 0:9b334a45a8ff | 2867 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2868 | |
bogdanm | 0:9b334a45a8ff | 2869 | /* Set ErrorCode corresponding to a Non-Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 2870 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 2871 | |
bogdanm | 0:9b334a45a8ff | 2872 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2873 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2874 | |
bogdanm | 0:9b334a45a8ff | 2875 | /* Call the Error callback to prevent upper layer */ |
bogdanm | 0:9b334a45a8ff | 2876 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2877 | } |
bogdanm | 0:9b334a45a8ff | 2878 | } |
bogdanm | 0:9b334a45a8ff | 2879 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) |
bogdanm | 0:9b334a45a8ff | 2880 | { |
bogdanm | 0:9b334a45a8ff | 2881 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 2882 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 2883 | } |
bogdanm | 0:9b334a45a8ff | 2884 | /* Check first if STOPF is set */ |
bogdanm | 0:9b334a45a8ff | 2885 | /* to prevent a Write Data in TX buffer */ |
bogdanm | 0:9b334a45a8ff | 2886 | /* which is stuck in TXDR until next */ |
bogdanm | 0:9b334a45a8ff | 2887 | /* communication with Master */ |
bogdanm | 0:9b334a45a8ff | 2888 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
bogdanm | 0:9b334a45a8ff | 2889 | { |
bogdanm | 0:9b334a45a8ff | 2890 | /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 2891 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI ); |
bogdanm | 0:9b334a45a8ff | 2892 | |
bogdanm | 0:9b334a45a8ff | 2893 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 2894 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 2895 | |
bogdanm | 0:9b334a45a8ff | 2896 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 2897 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2898 | |
bogdanm | 0:9b334a45a8ff | 2899 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2900 | |
bogdanm | 0:9b334a45a8ff | 2901 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2902 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2903 | |
bogdanm | 0:9b334a45a8ff | 2904 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2905 | } |
bogdanm | 0:9b334a45a8ff | 2906 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) |
bogdanm | 0:9b334a45a8ff | 2907 | { |
bogdanm | 0:9b334a45a8ff | 2908 | /* Write data to TXDR only if XferCount not reach "0" */ |
bogdanm | 0:9b334a45a8ff | 2909 | /* A TXIS flag can be set, during STOP treatment */ |
bogdanm | 0:9b334a45a8ff | 2910 | if(hi2c->XferCount > 0) |
bogdanm | 0:9b334a45a8ff | 2911 | { |
bogdanm | 0:9b334a45a8ff | 2912 | /* Write data to TXDR */ |
bogdanm | 0:9b334a45a8ff | 2913 | hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); |
bogdanm | 0:9b334a45a8ff | 2914 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 2915 | } |
bogdanm | 0:9b334a45a8ff | 2916 | } |
bogdanm | 0:9b334a45a8ff | 2917 | |
bogdanm | 0:9b334a45a8ff | 2918 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2919 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2920 | |
bogdanm | 0:9b334a45a8ff | 2921 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2922 | } |
bogdanm | 0:9b334a45a8ff | 2923 | |
bogdanm | 0:9b334a45a8ff | 2924 | /** |
bogdanm | 0:9b334a45a8ff | 2925 | * @brief Handle Interrupt Flags Slave Receive Mode |
bogdanm | 0:9b334a45a8ff | 2926 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2927 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2928 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2929 | */ |
bogdanm | 0:9b334a45a8ff | 2930 | static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c) |
bogdanm | 0:9b334a45a8ff | 2931 | { |
bogdanm | 0:9b334a45a8ff | 2932 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 2933 | __HAL_LOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2934 | |
bogdanm | 0:9b334a45a8ff | 2935 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET) |
bogdanm | 0:9b334a45a8ff | 2936 | { |
bogdanm | 0:9b334a45a8ff | 2937 | /* Clear NACK Flag */ |
bogdanm | 0:9b334a45a8ff | 2938 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 2939 | |
bogdanm | 0:9b334a45a8ff | 2940 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2941 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2942 | |
bogdanm | 0:9b334a45a8ff | 2943 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 2944 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2945 | } |
bogdanm | 0:9b334a45a8ff | 2946 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET) |
bogdanm | 0:9b334a45a8ff | 2947 | { |
bogdanm | 0:9b334a45a8ff | 2948 | /* Clear ADDR flag */ |
bogdanm | 0:9b334a45a8ff | 2949 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); |
bogdanm | 0:9b334a45a8ff | 2950 | } |
bogdanm | 0:9b334a45a8ff | 2951 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) |
bogdanm | 0:9b334a45a8ff | 2952 | { |
bogdanm | 0:9b334a45a8ff | 2953 | /* Read data from RXDR */ |
bogdanm | 0:9b334a45a8ff | 2954 | (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 2955 | hi2c->XferSize--; |
bogdanm | 0:9b334a45a8ff | 2956 | hi2c->XferCount--; |
bogdanm | 0:9b334a45a8ff | 2957 | } |
bogdanm | 0:9b334a45a8ff | 2958 | else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
bogdanm | 0:9b334a45a8ff | 2959 | { |
bogdanm | 0:9b334a45a8ff | 2960 | /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */ |
bogdanm | 0:9b334a45a8ff | 2961 | __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_RXI ); |
bogdanm | 0:9b334a45a8ff | 2962 | |
bogdanm | 0:9b334a45a8ff | 2963 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 2964 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 2965 | |
bogdanm | 0:9b334a45a8ff | 2966 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 2967 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 2968 | |
bogdanm | 0:9b334a45a8ff | 2969 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 2970 | |
bogdanm | 0:9b334a45a8ff | 2971 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2972 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2973 | |
bogdanm | 0:9b334a45a8ff | 2974 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 2975 | } |
bogdanm | 0:9b334a45a8ff | 2976 | |
bogdanm | 0:9b334a45a8ff | 2977 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 2978 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 2979 | |
bogdanm | 0:9b334a45a8ff | 2980 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 2981 | } |
bogdanm | 0:9b334a45a8ff | 2982 | |
bogdanm | 0:9b334a45a8ff | 2983 | /** |
bogdanm | 0:9b334a45a8ff | 2984 | * @brief Master sends target device address followed by internal memory address for write request. |
bogdanm | 0:9b334a45a8ff | 2985 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 2986 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 2987 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 2988 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 2989 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 2990 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 2991 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 2992 | */ |
bogdanm | 0:9b334a45a8ff | 2993 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 2994 | { |
bogdanm | 0:9b334a45a8ff | 2995 | I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 2996 | |
bogdanm | 0:9b334a45a8ff | 2997 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 2998 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 2999 | { |
bogdanm | 0:9b334a45a8ff | 3000 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3001 | { |
bogdanm | 0:9b334a45a8ff | 3002 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3003 | } |
bogdanm | 0:9b334a45a8ff | 3004 | else |
bogdanm | 0:9b334a45a8ff | 3005 | { |
bogdanm | 0:9b334a45a8ff | 3006 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3007 | } |
bogdanm | 0:9b334a45a8ff | 3008 | } |
bogdanm | 0:9b334a45a8ff | 3009 | |
bogdanm | 0:9b334a45a8ff | 3010 | /* If Memory address size is 8Bit */ |
bogdanm | 0:9b334a45a8ff | 3011 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
bogdanm | 0:9b334a45a8ff | 3012 | { |
bogdanm | 0:9b334a45a8ff | 3013 | /* Send Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3014 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3015 | } |
bogdanm | 0:9b334a45a8ff | 3016 | /* If Memory address size is 16Bit */ |
bogdanm | 0:9b334a45a8ff | 3017 | else |
bogdanm | 0:9b334a45a8ff | 3018 | { |
bogdanm | 0:9b334a45a8ff | 3019 | /* Send MSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3020 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_MSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3021 | |
bogdanm | 0:9b334a45a8ff | 3022 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 3023 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3024 | { |
bogdanm | 0:9b334a45a8ff | 3025 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3026 | { |
bogdanm | 0:9b334a45a8ff | 3027 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3028 | } |
bogdanm | 0:9b334a45a8ff | 3029 | else |
bogdanm | 0:9b334a45a8ff | 3030 | { |
bogdanm | 0:9b334a45a8ff | 3031 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3032 | } |
bogdanm | 0:9b334a45a8ff | 3033 | } |
bogdanm | 0:9b334a45a8ff | 3034 | |
bogdanm | 0:9b334a45a8ff | 3035 | /* Send LSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3036 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3037 | } |
bogdanm | 0:9b334a45a8ff | 3038 | |
bogdanm | 0:9b334a45a8ff | 3039 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3040 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3041 | { |
bogdanm | 0:9b334a45a8ff | 3042 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3043 | } |
bogdanm | 0:9b334a45a8ff | 3044 | |
bogdanm | 0:9b334a45a8ff | 3045 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3046 | } |
bogdanm | 0:9b334a45a8ff | 3047 | |
bogdanm | 0:9b334a45a8ff | 3048 | /** |
bogdanm | 0:9b334a45a8ff | 3049 | * @brief Master sends target device address followed by internal memory address for read request. |
bogdanm | 0:9b334a45a8ff | 3050 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3051 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3052 | * @param DevAddress: Target device address |
bogdanm | 0:9b334a45a8ff | 3053 | * @param MemAddress: Internal memory address |
bogdanm | 0:9b334a45a8ff | 3054 | * @param MemAddSize: Size of internal memory address |
bogdanm | 0:9b334a45a8ff | 3055 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 3056 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3057 | */ |
bogdanm | 0:9b334a45a8ff | 3058 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3059 | { |
bogdanm | 0:9b334a45a8ff | 3060 | I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); |
bogdanm | 0:9b334a45a8ff | 3061 | |
bogdanm | 0:9b334a45a8ff | 3062 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 3063 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3064 | { |
bogdanm | 0:9b334a45a8ff | 3065 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3066 | { |
bogdanm | 0:9b334a45a8ff | 3067 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3068 | } |
bogdanm | 0:9b334a45a8ff | 3069 | else |
bogdanm | 0:9b334a45a8ff | 3070 | { |
bogdanm | 0:9b334a45a8ff | 3071 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3072 | } |
bogdanm | 0:9b334a45a8ff | 3073 | } |
bogdanm | 0:9b334a45a8ff | 3074 | |
bogdanm | 0:9b334a45a8ff | 3075 | /* If Memory address size is 8Bit */ |
bogdanm | 0:9b334a45a8ff | 3076 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
bogdanm | 0:9b334a45a8ff | 3077 | { |
bogdanm | 0:9b334a45a8ff | 3078 | /* Send Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3079 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3080 | } |
bogdanm | 0:9b334a45a8ff | 3081 | /* If Mememory address size is 16Bit */ |
bogdanm | 0:9b334a45a8ff | 3082 | else |
bogdanm | 0:9b334a45a8ff | 3083 | { |
bogdanm | 0:9b334a45a8ff | 3084 | /* Send MSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3085 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_MSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3086 | |
bogdanm | 0:9b334a45a8ff | 3087 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 3088 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3089 | { |
bogdanm | 0:9b334a45a8ff | 3090 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3091 | { |
bogdanm | 0:9b334a45a8ff | 3092 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3093 | } |
bogdanm | 0:9b334a45a8ff | 3094 | else |
bogdanm | 0:9b334a45a8ff | 3095 | { |
bogdanm | 0:9b334a45a8ff | 3096 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3097 | } |
bogdanm | 0:9b334a45a8ff | 3098 | } |
bogdanm | 0:9b334a45a8ff | 3099 | |
bogdanm | 0:9b334a45a8ff | 3100 | /* Send LSB of Memory Address */ |
bogdanm | 0:9b334a45a8ff | 3101 | hi2c->Instance->TXDR = __HAL_I2C_MEM_ADD_LSB(MemAddress); |
bogdanm | 0:9b334a45a8ff | 3102 | } |
bogdanm | 0:9b334a45a8ff | 3103 | |
bogdanm | 0:9b334a45a8ff | 3104 | /* Wait until TC flag is set */ |
bogdanm | 0:9b334a45a8ff | 3105 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3106 | { |
bogdanm | 0:9b334a45a8ff | 3107 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3108 | } |
bogdanm | 0:9b334a45a8ff | 3109 | |
bogdanm | 0:9b334a45a8ff | 3110 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3111 | } |
bogdanm | 0:9b334a45a8ff | 3112 | |
bogdanm | 0:9b334a45a8ff | 3113 | /** |
bogdanm | 0:9b334a45a8ff | 3114 | * @brief DMA I2C master transmit process complete callback. |
bogdanm | 0:9b334a45a8ff | 3115 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3116 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3117 | */ |
bogdanm | 0:9b334a45a8ff | 3118 | static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3119 | { |
bogdanm | 0:9b334a45a8ff | 3120 | uint16_t DevAddress; |
bogdanm | 0:9b334a45a8ff | 3121 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3122 | |
bogdanm | 0:9b334a45a8ff | 3123 | /* Check if last DMA request was done with RELOAD */ |
bogdanm | 0:9b334a45a8ff | 3124 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3125 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3126 | { |
bogdanm | 0:9b334a45a8ff | 3127 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3128 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3129 | { |
bogdanm | 0:9b334a45a8ff | 3130 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3131 | } |
bogdanm | 0:9b334a45a8ff | 3132 | |
bogdanm | 0:9b334a45a8ff | 3133 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3134 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3135 | |
bogdanm | 0:9b334a45a8ff | 3136 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3137 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3138 | { |
bogdanm | 0:9b334a45a8ff | 3139 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3140 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3141 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3142 | { |
bogdanm | 0:9b334a45a8ff | 3143 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3144 | { |
bogdanm | 0:9b334a45a8ff | 3145 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3146 | } |
bogdanm | 0:9b334a45a8ff | 3147 | else |
bogdanm | 0:9b334a45a8ff | 3148 | { |
bogdanm | 0:9b334a45a8ff | 3149 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3150 | } |
bogdanm | 0:9b334a45a8ff | 3151 | } |
bogdanm | 0:9b334a45a8ff | 3152 | |
bogdanm | 0:9b334a45a8ff | 3153 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3154 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3155 | |
bogdanm | 0:9b334a45a8ff | 3156 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3157 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3158 | |
bogdanm | 0:9b334a45a8ff | 3159 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3160 | |
bogdanm | 0:9b334a45a8ff | 3161 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3162 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3163 | } |
bogdanm | 0:9b334a45a8ff | 3164 | else |
bogdanm | 0:9b334a45a8ff | 3165 | { |
bogdanm | 0:9b334a45a8ff | 3166 | hi2c->pBuffPtr += hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3167 | hi2c->XferCount -= hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3168 | if(hi2c->XferCount > 255) |
bogdanm | 0:9b334a45a8ff | 3169 | { |
bogdanm | 0:9b334a45a8ff | 3170 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 3171 | } |
bogdanm | 0:9b334a45a8ff | 3172 | else |
bogdanm | 0:9b334a45a8ff | 3173 | { |
bogdanm | 0:9b334a45a8ff | 3174 | hi2c->XferSize = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 3175 | } |
bogdanm | 0:9b334a45a8ff | 3176 | |
bogdanm | 0:9b334a45a8ff | 3177 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
bogdanm | 0:9b334a45a8ff | 3178 | |
bogdanm | 0:9b334a45a8ff | 3179 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 3180 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 3181 | |
bogdanm | 0:9b334a45a8ff | 3182 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 3183 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3184 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3185 | { |
bogdanm | 0:9b334a45a8ff | 3186 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3187 | } |
bogdanm | 0:9b334a45a8ff | 3188 | else |
bogdanm | 0:9b334a45a8ff | 3189 | { |
bogdanm | 0:9b334a45a8ff | 3190 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3191 | } |
bogdanm | 0:9b334a45a8ff | 3192 | |
bogdanm | 0:9b334a45a8ff | 3193 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 3194 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3195 | { |
bogdanm | 0:9b334a45a8ff | 3196 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3197 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3198 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3199 | { |
bogdanm | 0:9b334a45a8ff | 3200 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3201 | { |
bogdanm | 0:9b334a45a8ff | 3202 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3203 | } |
bogdanm | 0:9b334a45a8ff | 3204 | else |
bogdanm | 0:9b334a45a8ff | 3205 | { |
bogdanm | 0:9b334a45a8ff | 3206 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3207 | } |
bogdanm | 0:9b334a45a8ff | 3208 | } |
bogdanm | 0:9b334a45a8ff | 3209 | |
bogdanm | 0:9b334a45a8ff | 3210 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3211 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3212 | |
bogdanm | 0:9b334a45a8ff | 3213 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3214 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3215 | |
bogdanm | 0:9b334a45a8ff | 3216 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3217 | |
bogdanm | 0:9b334a45a8ff | 3218 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3219 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3220 | } |
bogdanm | 0:9b334a45a8ff | 3221 | else |
bogdanm | 0:9b334a45a8ff | 3222 | { |
bogdanm | 0:9b334a45a8ff | 3223 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3224 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3225 | } |
bogdanm | 0:9b334a45a8ff | 3226 | } |
bogdanm | 0:9b334a45a8ff | 3227 | } |
bogdanm | 0:9b334a45a8ff | 3228 | else |
bogdanm | 0:9b334a45a8ff | 3229 | { |
bogdanm | 0:9b334a45a8ff | 3230 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3231 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3232 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3233 | { |
bogdanm | 0:9b334a45a8ff | 3234 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3235 | { |
bogdanm | 0:9b334a45a8ff | 3236 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3237 | } |
bogdanm | 0:9b334a45a8ff | 3238 | else |
bogdanm | 0:9b334a45a8ff | 3239 | { |
bogdanm | 0:9b334a45a8ff | 3240 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3241 | } |
bogdanm | 0:9b334a45a8ff | 3242 | } |
bogdanm | 0:9b334a45a8ff | 3243 | |
bogdanm | 0:9b334a45a8ff | 3244 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3245 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3246 | |
bogdanm | 0:9b334a45a8ff | 3247 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3248 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3249 | |
bogdanm | 0:9b334a45a8ff | 3250 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3251 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3252 | |
bogdanm | 0:9b334a45a8ff | 3253 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3254 | |
bogdanm | 0:9b334a45a8ff | 3255 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3256 | |
bogdanm | 0:9b334a45a8ff | 3257 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3258 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3259 | { |
bogdanm | 0:9b334a45a8ff | 3260 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3261 | } |
bogdanm | 0:9b334a45a8ff | 3262 | else |
bogdanm | 0:9b334a45a8ff | 3263 | { |
bogdanm | 0:9b334a45a8ff | 3264 | HAL_I2C_MasterTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3265 | } |
bogdanm | 0:9b334a45a8ff | 3266 | } |
bogdanm | 0:9b334a45a8ff | 3267 | } |
bogdanm | 0:9b334a45a8ff | 3268 | |
bogdanm | 0:9b334a45a8ff | 3269 | /** |
bogdanm | 0:9b334a45a8ff | 3270 | * @brief DMA I2C slave transmit process complete callback. |
bogdanm | 0:9b334a45a8ff | 3271 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3272 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3273 | */ |
bogdanm | 0:9b334a45a8ff | 3274 | static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3275 | { |
bogdanm | 0:9b334a45a8ff | 3276 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3277 | |
bogdanm | 0:9b334a45a8ff | 3278 | /* Wait until STOP flag is set */ |
bogdanm | 0:9b334a45a8ff | 3279 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3280 | { |
bogdanm | 0:9b334a45a8ff | 3281 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3282 | { |
bogdanm | 0:9b334a45a8ff | 3283 | /* Normal Use case, a AF is generated by master */ |
bogdanm | 0:9b334a45a8ff | 3284 | /* to inform slave the end of transfer */ |
bogdanm | 0:9b334a45a8ff | 3285 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 3286 | } |
bogdanm | 0:9b334a45a8ff | 3287 | else |
bogdanm | 0:9b334a45a8ff | 3288 | { |
bogdanm | 0:9b334a45a8ff | 3289 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3290 | } |
bogdanm | 0:9b334a45a8ff | 3291 | } |
bogdanm | 0:9b334a45a8ff | 3292 | |
bogdanm | 0:9b334a45a8ff | 3293 | /* Clear STOP flag */ |
bogdanm | 0:9b334a45a8ff | 3294 | __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3295 | |
bogdanm | 0:9b334a45a8ff | 3296 | /* Wait until BUSY flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3297 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3298 | { |
bogdanm | 0:9b334a45a8ff | 3299 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3300 | } |
bogdanm | 0:9b334a45a8ff | 3301 | |
bogdanm | 0:9b334a45a8ff | 3302 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3303 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3304 | |
bogdanm | 0:9b334a45a8ff | 3305 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3306 | |
bogdanm | 0:9b334a45a8ff | 3307 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3308 | |
bogdanm | 0:9b334a45a8ff | 3309 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3310 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3311 | { |
bogdanm | 0:9b334a45a8ff | 3312 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3313 | } |
bogdanm | 0:9b334a45a8ff | 3314 | else |
bogdanm | 0:9b334a45a8ff | 3315 | { |
bogdanm | 0:9b334a45a8ff | 3316 | HAL_I2C_SlaveTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3317 | } |
bogdanm | 0:9b334a45a8ff | 3318 | } |
bogdanm | 0:9b334a45a8ff | 3319 | |
bogdanm | 0:9b334a45a8ff | 3320 | /** |
bogdanm | 0:9b334a45a8ff | 3321 | * @brief DMA I2C master receive process complete callback |
bogdanm | 0:9b334a45a8ff | 3322 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3323 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3324 | */ |
bogdanm | 0:9b334a45a8ff | 3325 | static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3326 | { |
bogdanm | 0:9b334a45a8ff | 3327 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3328 | uint16_t DevAddress; |
bogdanm | 0:9b334a45a8ff | 3329 | |
bogdanm | 0:9b334a45a8ff | 3330 | /* Check if last DMA request was done with RELOAD */ |
bogdanm | 0:9b334a45a8ff | 3331 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3332 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3333 | { |
bogdanm | 0:9b334a45a8ff | 3334 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3335 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3336 | { |
bogdanm | 0:9b334a45a8ff | 3337 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3338 | } |
bogdanm | 0:9b334a45a8ff | 3339 | |
bogdanm | 0:9b334a45a8ff | 3340 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3341 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3342 | |
bogdanm | 0:9b334a45a8ff | 3343 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3344 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3345 | { |
bogdanm | 0:9b334a45a8ff | 3346 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3347 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3348 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3349 | { |
bogdanm | 0:9b334a45a8ff | 3350 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3351 | { |
bogdanm | 0:9b334a45a8ff | 3352 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3353 | } |
bogdanm | 0:9b334a45a8ff | 3354 | else |
bogdanm | 0:9b334a45a8ff | 3355 | { |
bogdanm | 0:9b334a45a8ff | 3356 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3357 | } |
bogdanm | 0:9b334a45a8ff | 3358 | } |
bogdanm | 0:9b334a45a8ff | 3359 | |
bogdanm | 0:9b334a45a8ff | 3360 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3361 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3362 | |
bogdanm | 0:9b334a45a8ff | 3363 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3364 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3365 | |
bogdanm | 0:9b334a45a8ff | 3366 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3367 | |
bogdanm | 0:9b334a45a8ff | 3368 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3369 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3370 | } |
bogdanm | 0:9b334a45a8ff | 3371 | else |
bogdanm | 0:9b334a45a8ff | 3372 | { |
bogdanm | 0:9b334a45a8ff | 3373 | hi2c->pBuffPtr += hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3374 | hi2c->XferCount -= hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3375 | if(hi2c->XferCount > 255) |
bogdanm | 0:9b334a45a8ff | 3376 | { |
bogdanm | 0:9b334a45a8ff | 3377 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 3378 | } |
bogdanm | 0:9b334a45a8ff | 3379 | else |
bogdanm | 0:9b334a45a8ff | 3380 | { |
bogdanm | 0:9b334a45a8ff | 3381 | hi2c->XferSize = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 3382 | } |
bogdanm | 0:9b334a45a8ff | 3383 | |
bogdanm | 0:9b334a45a8ff | 3384 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
bogdanm | 0:9b334a45a8ff | 3385 | |
bogdanm | 0:9b334a45a8ff | 3386 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 3387 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 3388 | |
bogdanm | 0:9b334a45a8ff | 3389 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 3390 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3391 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3392 | { |
bogdanm | 0:9b334a45a8ff | 3393 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3394 | } |
bogdanm | 0:9b334a45a8ff | 3395 | else |
bogdanm | 0:9b334a45a8ff | 3396 | { |
bogdanm | 0:9b334a45a8ff | 3397 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3398 | } |
bogdanm | 0:9b334a45a8ff | 3399 | |
bogdanm | 0:9b334a45a8ff | 3400 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 3401 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3402 | { |
bogdanm | 0:9b334a45a8ff | 3403 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3404 | } |
bogdanm | 0:9b334a45a8ff | 3405 | |
bogdanm | 0:9b334a45a8ff | 3406 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3407 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3408 | { |
bogdanm | 0:9b334a45a8ff | 3409 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3410 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3411 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3412 | { |
bogdanm | 0:9b334a45a8ff | 3413 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3414 | { |
bogdanm | 0:9b334a45a8ff | 3415 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3416 | } |
bogdanm | 0:9b334a45a8ff | 3417 | else |
bogdanm | 0:9b334a45a8ff | 3418 | { |
bogdanm | 0:9b334a45a8ff | 3419 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3420 | } |
bogdanm | 0:9b334a45a8ff | 3421 | } |
bogdanm | 0:9b334a45a8ff | 3422 | |
bogdanm | 0:9b334a45a8ff | 3423 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3424 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3425 | |
bogdanm | 0:9b334a45a8ff | 3426 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3427 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3428 | |
bogdanm | 0:9b334a45a8ff | 3429 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3430 | |
bogdanm | 0:9b334a45a8ff | 3431 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3432 | |
bogdanm | 0:9b334a45a8ff | 3433 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3434 | } |
bogdanm | 0:9b334a45a8ff | 3435 | else |
bogdanm | 0:9b334a45a8ff | 3436 | { |
bogdanm | 0:9b334a45a8ff | 3437 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3438 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3439 | } |
bogdanm | 0:9b334a45a8ff | 3440 | } |
bogdanm | 0:9b334a45a8ff | 3441 | } |
bogdanm | 0:9b334a45a8ff | 3442 | else |
bogdanm | 0:9b334a45a8ff | 3443 | { |
bogdanm | 0:9b334a45a8ff | 3444 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3445 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3446 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3447 | { |
bogdanm | 0:9b334a45a8ff | 3448 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3449 | { |
bogdanm | 0:9b334a45a8ff | 3450 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3451 | } |
bogdanm | 0:9b334a45a8ff | 3452 | else |
bogdanm | 0:9b334a45a8ff | 3453 | { |
bogdanm | 0:9b334a45a8ff | 3454 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3455 | } |
bogdanm | 0:9b334a45a8ff | 3456 | } |
bogdanm | 0:9b334a45a8ff | 3457 | |
bogdanm | 0:9b334a45a8ff | 3458 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3459 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3460 | |
bogdanm | 0:9b334a45a8ff | 3461 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3462 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3463 | |
bogdanm | 0:9b334a45a8ff | 3464 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3465 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3466 | |
bogdanm | 0:9b334a45a8ff | 3467 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3468 | |
bogdanm | 0:9b334a45a8ff | 3469 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3470 | |
bogdanm | 0:9b334a45a8ff | 3471 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3472 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3473 | { |
bogdanm | 0:9b334a45a8ff | 3474 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3475 | } |
bogdanm | 0:9b334a45a8ff | 3476 | else |
bogdanm | 0:9b334a45a8ff | 3477 | { |
bogdanm | 0:9b334a45a8ff | 3478 | HAL_I2C_MasterRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3479 | } |
bogdanm | 0:9b334a45a8ff | 3480 | } |
bogdanm | 0:9b334a45a8ff | 3481 | } |
bogdanm | 0:9b334a45a8ff | 3482 | |
bogdanm | 0:9b334a45a8ff | 3483 | /** |
bogdanm | 0:9b334a45a8ff | 3484 | * @brief DMA I2C slave receive process complete callback. |
bogdanm | 0:9b334a45a8ff | 3485 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3486 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3487 | */ |
bogdanm | 0:9b334a45a8ff | 3488 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3489 | { |
bogdanm | 0:9b334a45a8ff | 3490 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3491 | |
bogdanm | 0:9b334a45a8ff | 3492 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3493 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3494 | { |
bogdanm | 0:9b334a45a8ff | 3495 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3496 | { |
bogdanm | 0:9b334a45a8ff | 3497 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3498 | } |
bogdanm | 0:9b334a45a8ff | 3499 | else |
bogdanm | 0:9b334a45a8ff | 3500 | { |
bogdanm | 0:9b334a45a8ff | 3501 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3502 | } |
bogdanm | 0:9b334a45a8ff | 3503 | } |
bogdanm | 0:9b334a45a8ff | 3504 | |
bogdanm | 0:9b334a45a8ff | 3505 | /* Clear STOPF flag */ |
bogdanm | 0:9b334a45a8ff | 3506 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3507 | |
bogdanm | 0:9b334a45a8ff | 3508 | /* Wait until BUSY flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3509 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3510 | { |
bogdanm | 0:9b334a45a8ff | 3511 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3512 | } |
bogdanm | 0:9b334a45a8ff | 3513 | |
bogdanm | 0:9b334a45a8ff | 3514 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3515 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3516 | |
bogdanm | 0:9b334a45a8ff | 3517 | /* Disable Address Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3518 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 3519 | |
bogdanm | 0:9b334a45a8ff | 3520 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3521 | |
bogdanm | 0:9b334a45a8ff | 3522 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3523 | |
bogdanm | 0:9b334a45a8ff | 3524 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3525 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3526 | { |
bogdanm | 0:9b334a45a8ff | 3527 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3528 | } |
bogdanm | 0:9b334a45a8ff | 3529 | else |
bogdanm | 0:9b334a45a8ff | 3530 | { |
bogdanm | 0:9b334a45a8ff | 3531 | HAL_I2C_SlaveRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3532 | } |
bogdanm | 0:9b334a45a8ff | 3533 | } |
bogdanm | 0:9b334a45a8ff | 3534 | |
bogdanm | 0:9b334a45a8ff | 3535 | /** |
bogdanm | 0:9b334a45a8ff | 3536 | * @brief DMA I2C Memory Write process complete callback |
bogdanm | 0:9b334a45a8ff | 3537 | * @param hdma : DMA handle |
bogdanm | 0:9b334a45a8ff | 3538 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3539 | */ |
bogdanm | 0:9b334a45a8ff | 3540 | static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3541 | { |
bogdanm | 0:9b334a45a8ff | 3542 | uint16_t DevAddress; |
bogdanm | 0:9b334a45a8ff | 3543 | I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3544 | |
bogdanm | 0:9b334a45a8ff | 3545 | /* Check if last DMA request was done with RELOAD */ |
bogdanm | 0:9b334a45a8ff | 3546 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3547 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3548 | { |
bogdanm | 0:9b334a45a8ff | 3549 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3550 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3551 | { |
bogdanm | 0:9b334a45a8ff | 3552 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3553 | } |
bogdanm | 0:9b334a45a8ff | 3554 | |
bogdanm | 0:9b334a45a8ff | 3555 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3556 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3557 | |
bogdanm | 0:9b334a45a8ff | 3558 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3559 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3560 | { |
bogdanm | 0:9b334a45a8ff | 3561 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3562 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3563 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3564 | { |
bogdanm | 0:9b334a45a8ff | 3565 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3566 | { |
bogdanm | 0:9b334a45a8ff | 3567 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3568 | } |
bogdanm | 0:9b334a45a8ff | 3569 | else |
bogdanm | 0:9b334a45a8ff | 3570 | { |
bogdanm | 0:9b334a45a8ff | 3571 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3572 | } |
bogdanm | 0:9b334a45a8ff | 3573 | } |
bogdanm | 0:9b334a45a8ff | 3574 | |
bogdanm | 0:9b334a45a8ff | 3575 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3576 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3577 | |
bogdanm | 0:9b334a45a8ff | 3578 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3579 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3580 | |
bogdanm | 0:9b334a45a8ff | 3581 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3582 | |
bogdanm | 0:9b334a45a8ff | 3583 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3584 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3585 | } |
bogdanm | 0:9b334a45a8ff | 3586 | else |
bogdanm | 0:9b334a45a8ff | 3587 | { |
bogdanm | 0:9b334a45a8ff | 3588 | hi2c->pBuffPtr += hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3589 | hi2c->XferCount -= hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3590 | if(hi2c->XferCount > 255) |
bogdanm | 0:9b334a45a8ff | 3591 | { |
bogdanm | 0:9b334a45a8ff | 3592 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 3593 | } |
bogdanm | 0:9b334a45a8ff | 3594 | else |
bogdanm | 0:9b334a45a8ff | 3595 | { |
bogdanm | 0:9b334a45a8ff | 3596 | hi2c->XferSize = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 3597 | } |
bogdanm | 0:9b334a45a8ff | 3598 | |
bogdanm | 0:9b334a45a8ff | 3599 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
bogdanm | 0:9b334a45a8ff | 3600 | |
bogdanm | 0:9b334a45a8ff | 3601 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 3602 | HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 3603 | |
bogdanm | 0:9b334a45a8ff | 3604 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 3605 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3606 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3607 | { |
bogdanm | 0:9b334a45a8ff | 3608 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3609 | } |
bogdanm | 0:9b334a45a8ff | 3610 | else |
bogdanm | 0:9b334a45a8ff | 3611 | { |
bogdanm | 0:9b334a45a8ff | 3612 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3613 | } |
bogdanm | 0:9b334a45a8ff | 3614 | |
bogdanm | 0:9b334a45a8ff | 3615 | /* Wait until TXIS flag is set */ |
bogdanm | 0:9b334a45a8ff | 3616 | if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3617 | { |
bogdanm | 0:9b334a45a8ff | 3618 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3619 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3620 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3621 | { |
bogdanm | 0:9b334a45a8ff | 3622 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3623 | { |
bogdanm | 0:9b334a45a8ff | 3624 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3625 | } |
bogdanm | 0:9b334a45a8ff | 3626 | else |
bogdanm | 0:9b334a45a8ff | 3627 | { |
bogdanm | 0:9b334a45a8ff | 3628 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3629 | } |
bogdanm | 0:9b334a45a8ff | 3630 | } |
bogdanm | 0:9b334a45a8ff | 3631 | |
bogdanm | 0:9b334a45a8ff | 3632 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3633 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3634 | |
bogdanm | 0:9b334a45a8ff | 3635 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3636 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3637 | |
bogdanm | 0:9b334a45a8ff | 3638 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3639 | |
bogdanm | 0:9b334a45a8ff | 3640 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3641 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3642 | } |
bogdanm | 0:9b334a45a8ff | 3643 | else |
bogdanm | 0:9b334a45a8ff | 3644 | { |
bogdanm | 0:9b334a45a8ff | 3645 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3646 | hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3647 | } |
bogdanm | 0:9b334a45a8ff | 3648 | } |
bogdanm | 0:9b334a45a8ff | 3649 | } |
bogdanm | 0:9b334a45a8ff | 3650 | else |
bogdanm | 0:9b334a45a8ff | 3651 | { |
bogdanm | 0:9b334a45a8ff | 3652 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3653 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3654 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3655 | { |
bogdanm | 0:9b334a45a8ff | 3656 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3657 | { |
bogdanm | 0:9b334a45a8ff | 3658 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3659 | } |
bogdanm | 0:9b334a45a8ff | 3660 | else |
bogdanm | 0:9b334a45a8ff | 3661 | { |
bogdanm | 0:9b334a45a8ff | 3662 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3663 | } |
bogdanm | 0:9b334a45a8ff | 3664 | } |
bogdanm | 0:9b334a45a8ff | 3665 | |
bogdanm | 0:9b334a45a8ff | 3666 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3667 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3668 | |
bogdanm | 0:9b334a45a8ff | 3669 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3670 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3671 | |
bogdanm | 0:9b334a45a8ff | 3672 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3673 | hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3674 | |
bogdanm | 0:9b334a45a8ff | 3675 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3676 | |
bogdanm | 0:9b334a45a8ff | 3677 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3678 | |
bogdanm | 0:9b334a45a8ff | 3679 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3680 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3681 | { |
bogdanm | 0:9b334a45a8ff | 3682 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3683 | } |
bogdanm | 0:9b334a45a8ff | 3684 | else |
bogdanm | 0:9b334a45a8ff | 3685 | { |
bogdanm | 0:9b334a45a8ff | 3686 | HAL_I2C_MemTxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3687 | } |
bogdanm | 0:9b334a45a8ff | 3688 | } |
bogdanm | 0:9b334a45a8ff | 3689 | } |
bogdanm | 0:9b334a45a8ff | 3690 | |
bogdanm | 0:9b334a45a8ff | 3691 | /** |
bogdanm | 0:9b334a45a8ff | 3692 | * @brief DMA I2C Memory Read process complete callback |
bogdanm | 0:9b334a45a8ff | 3693 | * @param hdma: DMA handle |
bogdanm | 0:9b334a45a8ff | 3694 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3695 | */ |
bogdanm | 0:9b334a45a8ff | 3696 | static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3697 | { |
bogdanm | 0:9b334a45a8ff | 3698 | I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3699 | uint16_t DevAddress; |
bogdanm | 0:9b334a45a8ff | 3700 | |
bogdanm | 0:9b334a45a8ff | 3701 | /* Check if last DMA request was done with RELOAD */ |
bogdanm | 0:9b334a45a8ff | 3702 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3703 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3704 | { |
bogdanm | 0:9b334a45a8ff | 3705 | /* Wait until TCR flag is set */ |
bogdanm | 0:9b334a45a8ff | 3706 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3707 | { |
bogdanm | 0:9b334a45a8ff | 3708 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3709 | } |
bogdanm | 0:9b334a45a8ff | 3710 | |
bogdanm | 0:9b334a45a8ff | 3711 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3712 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3713 | |
bogdanm | 0:9b334a45a8ff | 3714 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3715 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3716 | { |
bogdanm | 0:9b334a45a8ff | 3717 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3718 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3719 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3720 | { |
bogdanm | 0:9b334a45a8ff | 3721 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3722 | { |
bogdanm | 0:9b334a45a8ff | 3723 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3724 | } |
bogdanm | 0:9b334a45a8ff | 3725 | else |
bogdanm | 0:9b334a45a8ff | 3726 | { |
bogdanm | 0:9b334a45a8ff | 3727 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3728 | } |
bogdanm | 0:9b334a45a8ff | 3729 | } |
bogdanm | 0:9b334a45a8ff | 3730 | |
bogdanm | 0:9b334a45a8ff | 3731 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3732 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3733 | |
bogdanm | 0:9b334a45a8ff | 3734 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3735 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3736 | |
bogdanm | 0:9b334a45a8ff | 3737 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3738 | |
bogdanm | 0:9b334a45a8ff | 3739 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3740 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3741 | } |
bogdanm | 0:9b334a45a8ff | 3742 | else |
bogdanm | 0:9b334a45a8ff | 3743 | { |
bogdanm | 0:9b334a45a8ff | 3744 | hi2c->pBuffPtr += hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3745 | hi2c->XferCount -= hi2c->XferSize; |
bogdanm | 0:9b334a45a8ff | 3746 | if(hi2c->XferCount > 255) |
bogdanm | 0:9b334a45a8ff | 3747 | { |
bogdanm | 0:9b334a45a8ff | 3748 | hi2c->XferSize = 255; |
bogdanm | 0:9b334a45a8ff | 3749 | } |
bogdanm | 0:9b334a45a8ff | 3750 | else |
bogdanm | 0:9b334a45a8ff | 3751 | { |
bogdanm | 0:9b334a45a8ff | 3752 | hi2c->XferSize = hi2c->XferCount; |
bogdanm | 0:9b334a45a8ff | 3753 | } |
bogdanm | 0:9b334a45a8ff | 3754 | |
bogdanm | 0:9b334a45a8ff | 3755 | DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); |
bogdanm | 0:9b334a45a8ff | 3756 | |
bogdanm | 0:9b334a45a8ff | 3757 | /* Enable the DMA channel */ |
bogdanm | 0:9b334a45a8ff | 3758 | HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); |
bogdanm | 0:9b334a45a8ff | 3759 | |
bogdanm | 0:9b334a45a8ff | 3760 | /* Send Slave Address */ |
bogdanm | 0:9b334a45a8ff | 3761 | /* Set NBYTES to write and reload if size > 255 */ |
bogdanm | 0:9b334a45a8ff | 3762 | if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) ) |
bogdanm | 0:9b334a45a8ff | 3763 | { |
bogdanm | 0:9b334a45a8ff | 3764 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3765 | } |
bogdanm | 0:9b334a45a8ff | 3766 | else |
bogdanm | 0:9b334a45a8ff | 3767 | { |
bogdanm | 0:9b334a45a8ff | 3768 | I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); |
bogdanm | 0:9b334a45a8ff | 3769 | } |
bogdanm | 0:9b334a45a8ff | 3770 | |
bogdanm | 0:9b334a45a8ff | 3771 | /* Wait until RXNE flag is set */ |
bogdanm | 0:9b334a45a8ff | 3772 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3773 | { |
bogdanm | 0:9b334a45a8ff | 3774 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3775 | } |
bogdanm | 0:9b334a45a8ff | 3776 | |
bogdanm | 0:9b334a45a8ff | 3777 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3778 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3779 | { |
bogdanm | 0:9b334a45a8ff | 3780 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3781 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3782 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3783 | { |
bogdanm | 0:9b334a45a8ff | 3784 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3785 | { |
bogdanm | 0:9b334a45a8ff | 3786 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3787 | } |
bogdanm | 0:9b334a45a8ff | 3788 | else |
bogdanm | 0:9b334a45a8ff | 3789 | { |
bogdanm | 0:9b334a45a8ff | 3790 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3791 | } |
bogdanm | 0:9b334a45a8ff | 3792 | } |
bogdanm | 0:9b334a45a8ff | 3793 | |
bogdanm | 0:9b334a45a8ff | 3794 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3795 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3796 | |
bogdanm | 0:9b334a45a8ff | 3797 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3798 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3799 | |
bogdanm | 0:9b334a45a8ff | 3800 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3801 | |
bogdanm | 0:9b334a45a8ff | 3802 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3803 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3804 | } |
bogdanm | 0:9b334a45a8ff | 3805 | else |
bogdanm | 0:9b334a45a8ff | 3806 | { |
bogdanm | 0:9b334a45a8ff | 3807 | /* Enable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3808 | hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3809 | } |
bogdanm | 0:9b334a45a8ff | 3810 | } |
bogdanm | 0:9b334a45a8ff | 3811 | } |
bogdanm | 0:9b334a45a8ff | 3812 | else |
bogdanm | 0:9b334a45a8ff | 3813 | { |
bogdanm | 0:9b334a45a8ff | 3814 | /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ |
bogdanm | 0:9b334a45a8ff | 3815 | /* Wait until STOPF flag is reset */ |
bogdanm | 0:9b334a45a8ff | 3816 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3817 | { |
bogdanm | 0:9b334a45a8ff | 3818 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
bogdanm | 0:9b334a45a8ff | 3819 | { |
bogdanm | 0:9b334a45a8ff | 3820 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 3821 | } |
bogdanm | 0:9b334a45a8ff | 3822 | else |
bogdanm | 0:9b334a45a8ff | 3823 | { |
bogdanm | 0:9b334a45a8ff | 3824 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3825 | } |
bogdanm | 0:9b334a45a8ff | 3826 | } |
bogdanm | 0:9b334a45a8ff | 3827 | |
bogdanm | 0:9b334a45a8ff | 3828 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 3829 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 3830 | |
bogdanm | 0:9b334a45a8ff | 3831 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 3832 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 3833 | |
bogdanm | 0:9b334a45a8ff | 3834 | /* Disable DMA Request */ |
bogdanm | 0:9b334a45a8ff | 3835 | hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; |
bogdanm | 0:9b334a45a8ff | 3836 | |
bogdanm | 0:9b334a45a8ff | 3837 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3838 | |
bogdanm | 0:9b334a45a8ff | 3839 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3840 | |
bogdanm | 0:9b334a45a8ff | 3841 | /* Check if Errors has been detected during transfer */ |
bogdanm | 0:9b334a45a8ff | 3842 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
bogdanm | 0:9b334a45a8ff | 3843 | { |
bogdanm | 0:9b334a45a8ff | 3844 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3845 | } |
bogdanm | 0:9b334a45a8ff | 3846 | else |
bogdanm | 0:9b334a45a8ff | 3847 | { |
bogdanm | 0:9b334a45a8ff | 3848 | HAL_I2C_MemRxCpltCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3849 | } |
bogdanm | 0:9b334a45a8ff | 3850 | } |
bogdanm | 0:9b334a45a8ff | 3851 | } |
bogdanm | 0:9b334a45a8ff | 3852 | |
bogdanm | 0:9b334a45a8ff | 3853 | /** |
bogdanm | 0:9b334a45a8ff | 3854 | * @brief DMA I2C communication error callback. |
bogdanm | 0:9b334a45a8ff | 3855 | * @param hdma : DMA handle |
bogdanm | 0:9b334a45a8ff | 3856 | * @retval None |
bogdanm | 0:9b334a45a8ff | 3857 | */ |
bogdanm | 0:9b334a45a8ff | 3858 | static void I2C_DMAError(DMA_HandleTypeDef *hdma) |
bogdanm | 0:9b334a45a8ff | 3859 | { |
bogdanm | 0:9b334a45a8ff | 3860 | I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
bogdanm | 0:9b334a45a8ff | 3861 | |
bogdanm | 0:9b334a45a8ff | 3862 | /* Disable Acknowledge */ |
bogdanm | 0:9b334a45a8ff | 3863 | hi2c->Instance->CR2 |= I2C_CR2_NACK; |
bogdanm | 0:9b334a45a8ff | 3864 | |
bogdanm | 0:9b334a45a8ff | 3865 | hi2c->XferCount = 0; |
bogdanm | 0:9b334a45a8ff | 3866 | |
bogdanm | 0:9b334a45a8ff | 3867 | hi2c->State = HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3868 | |
bogdanm | 0:9b334a45a8ff | 3869 | hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; |
bogdanm | 0:9b334a45a8ff | 3870 | |
bogdanm | 0:9b334a45a8ff | 3871 | HAL_I2C_ErrorCallback(hi2c); |
bogdanm | 0:9b334a45a8ff | 3872 | } |
bogdanm | 0:9b334a45a8ff | 3873 | |
bogdanm | 0:9b334a45a8ff | 3874 | /** |
bogdanm | 0:9b334a45a8ff | 3875 | * @brief This function handles I2C Communication Timeout. |
bogdanm | 0:9b334a45a8ff | 3876 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3877 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3878 | * @param Flag: specifies the I2C flag to check. |
bogdanm | 0:9b334a45a8ff | 3879 | * @param Status: The new Flag status (SET or RESET). |
bogdanm | 0:9b334a45a8ff | 3880 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 3881 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3882 | */ |
bogdanm | 0:9b334a45a8ff | 3883 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3884 | { |
bogdanm | 0:9b334a45a8ff | 3885 | uint32_t tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 3886 | |
bogdanm | 0:9b334a45a8ff | 3887 | /* Wait until flag is set */ |
bogdanm | 0:9b334a45a8ff | 3888 | if(Status == RESET) |
bogdanm | 0:9b334a45a8ff | 3889 | { |
bogdanm | 0:9b334a45a8ff | 3890 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) |
bogdanm | 0:9b334a45a8ff | 3891 | { |
bogdanm | 0:9b334a45a8ff | 3892 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 3893 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 3894 | { |
bogdanm | 0:9b334a45a8ff | 3895 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 3896 | { |
bogdanm | 0:9b334a45a8ff | 3897 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3898 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3899 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3900 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3901 | } |
bogdanm | 0:9b334a45a8ff | 3902 | } |
bogdanm | 0:9b334a45a8ff | 3903 | } |
bogdanm | 0:9b334a45a8ff | 3904 | } |
bogdanm | 0:9b334a45a8ff | 3905 | else |
bogdanm | 0:9b334a45a8ff | 3906 | { |
bogdanm | 0:9b334a45a8ff | 3907 | while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET) |
bogdanm | 0:9b334a45a8ff | 3908 | { |
bogdanm | 0:9b334a45a8ff | 3909 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 3910 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 3911 | { |
bogdanm | 0:9b334a45a8ff | 3912 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 3913 | { |
bogdanm | 0:9b334a45a8ff | 3914 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3915 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3916 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3917 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3918 | } |
bogdanm | 0:9b334a45a8ff | 3919 | } |
bogdanm | 0:9b334a45a8ff | 3920 | } |
bogdanm | 0:9b334a45a8ff | 3921 | } |
bogdanm | 0:9b334a45a8ff | 3922 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3923 | } |
bogdanm | 0:9b334a45a8ff | 3924 | |
bogdanm | 0:9b334a45a8ff | 3925 | /** |
bogdanm | 0:9b334a45a8ff | 3926 | * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. |
bogdanm | 0:9b334a45a8ff | 3927 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3928 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3929 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 3930 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3931 | */ |
bogdanm | 0:9b334a45a8ff | 3932 | static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3933 | { |
bogdanm | 0:9b334a45a8ff | 3934 | uint32_t tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 3935 | |
bogdanm | 0:9b334a45a8ff | 3936 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) |
bogdanm | 0:9b334a45a8ff | 3937 | { |
bogdanm | 0:9b334a45a8ff | 3938 | /* Check if a NACK is detected */ |
bogdanm | 0:9b334a45a8ff | 3939 | if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3940 | { |
bogdanm | 0:9b334a45a8ff | 3941 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3942 | } |
bogdanm | 0:9b334a45a8ff | 3943 | |
bogdanm | 0:9b334a45a8ff | 3944 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 3945 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 3946 | { |
bogdanm | 0:9b334a45a8ff | 3947 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 3948 | { |
bogdanm | 0:9b334a45a8ff | 3949 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3950 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3951 | |
bogdanm | 0:9b334a45a8ff | 3952 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3953 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3954 | |
bogdanm | 0:9b334a45a8ff | 3955 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3956 | } |
bogdanm | 0:9b334a45a8ff | 3957 | } |
bogdanm | 0:9b334a45a8ff | 3958 | } |
bogdanm | 0:9b334a45a8ff | 3959 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3960 | } |
bogdanm | 0:9b334a45a8ff | 3961 | |
bogdanm | 0:9b334a45a8ff | 3962 | /** |
bogdanm | 0:9b334a45a8ff | 3963 | * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. |
bogdanm | 0:9b334a45a8ff | 3964 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 3965 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 3966 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 3967 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 3968 | */ |
bogdanm | 0:9b334a45a8ff | 3969 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 3970 | { |
bogdanm | 0:9b334a45a8ff | 3971 | uint32_t tickstart = 0x00; |
bogdanm | 0:9b334a45a8ff | 3972 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 3973 | |
bogdanm | 0:9b334a45a8ff | 3974 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) |
bogdanm | 0:9b334a45a8ff | 3975 | { |
bogdanm | 0:9b334a45a8ff | 3976 | /* Check if a NACK is detected */ |
bogdanm | 0:9b334a45a8ff | 3977 | if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK) |
bogdanm | 0:9b334a45a8ff | 3978 | { |
bogdanm | 0:9b334a45a8ff | 3979 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 3980 | } |
bogdanm | 0:9b334a45a8ff | 3981 | |
bogdanm | 0:9b334a45a8ff | 3982 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 3983 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 3984 | { |
bogdanm | 0:9b334a45a8ff | 3985 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3986 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 3987 | |
bogdanm | 0:9b334a45a8ff | 3988 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 3989 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 3990 | |
bogdanm | 0:9b334a45a8ff | 3991 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 3992 | } |
bogdanm | 0:9b334a45a8ff | 3993 | } |
bogdanm | 0:9b334a45a8ff | 3994 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 3995 | } |
bogdanm | 0:9b334a45a8ff | 3996 | |
bogdanm | 0:9b334a45a8ff | 3997 | /** |
bogdanm | 0:9b334a45a8ff | 3998 | * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. |
bogdanm | 0:9b334a45a8ff | 3999 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 4000 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 4001 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 4002 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4003 | */ |
bogdanm | 0:9b334a45a8ff | 4004 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 4005 | { |
bogdanm | 0:9b334a45a8ff | 4006 | uint32_t tickstart = 0x00; |
bogdanm | 0:9b334a45a8ff | 4007 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 4008 | |
bogdanm | 0:9b334a45a8ff | 4009 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) |
bogdanm | 0:9b334a45a8ff | 4010 | { |
bogdanm | 0:9b334a45a8ff | 4011 | /* Check if a STOPF is detected */ |
bogdanm | 0:9b334a45a8ff | 4012 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
bogdanm | 0:9b334a45a8ff | 4013 | { |
bogdanm | 0:9b334a45a8ff | 4014 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 4015 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 4016 | |
bogdanm | 0:9b334a45a8ff | 4017 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 4018 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 4019 | |
bogdanm | 0:9b334a45a8ff | 4020 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 4021 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4022 | |
bogdanm | 0:9b334a45a8ff | 4023 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4024 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 4025 | |
bogdanm | 0:9b334a45a8ff | 4026 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 4027 | } |
bogdanm | 0:9b334a45a8ff | 4028 | |
bogdanm | 0:9b334a45a8ff | 4029 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 4030 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 4031 | { |
bogdanm | 0:9b334a45a8ff | 4032 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 4033 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4034 | |
bogdanm | 0:9b334a45a8ff | 4035 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4036 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 4037 | |
bogdanm | 0:9b334a45a8ff | 4038 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 4039 | } |
bogdanm | 0:9b334a45a8ff | 4040 | } |
bogdanm | 0:9b334a45a8ff | 4041 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4042 | } |
bogdanm | 0:9b334a45a8ff | 4043 | |
bogdanm | 0:9b334a45a8ff | 4044 | /** |
bogdanm | 0:9b334a45a8ff | 4045 | * @brief This function handles Acknowledge failed detection during an I2C Communication. |
bogdanm | 0:9b334a45a8ff | 4046 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 4047 | * the configuration information for the specified I2C. |
bogdanm | 0:9b334a45a8ff | 4048 | * @param Timeout: Timeout duration |
bogdanm | 0:9b334a45a8ff | 4049 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 4050 | */ |
bogdanm | 0:9b334a45a8ff | 4051 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 4052 | { |
bogdanm | 0:9b334a45a8ff | 4053 | uint32_t tickstart = 0x00; |
bogdanm | 0:9b334a45a8ff | 4054 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 4055 | |
bogdanm | 0:9b334a45a8ff | 4056 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
bogdanm | 0:9b334a45a8ff | 4057 | { |
bogdanm | 0:9b334a45a8ff | 4058 | /* Generate stop if necessary only in case of I2C peripheral in MASTER mode */ |
bogdanm | 0:9b334a45a8ff | 4059 | if((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 4060 | || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)) |
bogdanm | 0:9b334a45a8ff | 4061 | { |
bogdanm | 0:9b334a45a8ff | 4062 | /* No need to generate the STOP condition if AUTOEND mode is enabled */ |
bogdanm | 0:9b334a45a8ff | 4063 | /* Generate the STOP condition only in case of SOFTEND mode is enabled */ |
bogdanm | 0:9b334a45a8ff | 4064 | if((hi2c->Instance->CR2 & I2C_AUTOEND_MODE) != I2C_AUTOEND_MODE) |
bogdanm | 0:9b334a45a8ff | 4065 | { |
bogdanm | 0:9b334a45a8ff | 4066 | /* Generate Stop */ |
bogdanm | 0:9b334a45a8ff | 4067 | hi2c->Instance->CR2 |= I2C_CR2_STOP; |
bogdanm | 0:9b334a45a8ff | 4068 | } |
bogdanm | 0:9b334a45a8ff | 4069 | } |
bogdanm | 0:9b334a45a8ff | 4070 | |
bogdanm | 0:9b334a45a8ff | 4071 | /* Wait until STOP Flag is reset */ |
bogdanm | 0:9b334a45a8ff | 4072 | /* AutoEnd should be initiate after AF */ |
bogdanm | 0:9b334a45a8ff | 4073 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) |
bogdanm | 0:9b334a45a8ff | 4074 | { |
bogdanm | 0:9b334a45a8ff | 4075 | /* Check for the Timeout */ |
bogdanm | 0:9b334a45a8ff | 4076 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 4077 | { |
bogdanm | 0:9b334a45a8ff | 4078 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 4079 | { |
bogdanm | 0:9b334a45a8ff | 4080 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4081 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4082 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 4083 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 4084 | } |
bogdanm | 0:9b334a45a8ff | 4085 | } |
bogdanm | 0:9b334a45a8ff | 4086 | } |
bogdanm | 0:9b334a45a8ff | 4087 | |
bogdanm | 0:9b334a45a8ff | 4088 | /* Clear NACKF Flag */ |
bogdanm | 0:9b334a45a8ff | 4089 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
bogdanm | 0:9b334a45a8ff | 4090 | |
bogdanm | 0:9b334a45a8ff | 4091 | /* Clear STOP Flag */ |
bogdanm | 0:9b334a45a8ff | 4092 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
bogdanm | 0:9b334a45a8ff | 4093 | |
bogdanm | 0:9b334a45a8ff | 4094 | /* Clear Configuration Register 2 */ |
bogdanm | 0:9b334a45a8ff | 4095 | __HAL_I2C_RESET_CR2(hi2c); |
bogdanm | 0:9b334a45a8ff | 4096 | |
bogdanm | 0:9b334a45a8ff | 4097 | hi2c->ErrorCode = HAL_I2C_ERROR_AF; |
bogdanm | 0:9b334a45a8ff | 4098 | hi2c->State= HAL_I2C_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 4099 | |
bogdanm | 0:9b334a45a8ff | 4100 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 4101 | __HAL_UNLOCK(hi2c); |
bogdanm | 0:9b334a45a8ff | 4102 | |
bogdanm | 0:9b334a45a8ff | 4103 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 4104 | } |
bogdanm | 0:9b334a45a8ff | 4105 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 4106 | } |
bogdanm | 0:9b334a45a8ff | 4107 | |
bogdanm | 0:9b334a45a8ff | 4108 | /** |
bogdanm | 0:9b334a45a8ff | 4109 | * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). |
bogdanm | 0:9b334a45a8ff | 4110 | * @param hi2c: I2C handle. |
bogdanm | 0:9b334a45a8ff | 4111 | * @param DevAddress: specifies the slave address to be programmed. |
bogdanm | 0:9b334a45a8ff | 4112 | * @param Size: specifies the number of bytes to be programmed. |
bogdanm | 0:9b334a45a8ff | 4113 | * This parameter must be a value between 0 and 255. |
bogdanm | 0:9b334a45a8ff | 4114 | * @param Mode: new state of the I2C START condition generation. |
bogdanm | 0:9b334a45a8ff | 4115 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4116 | * @arg I2C_RELOAD_MODE: Enable Reload mode . |
bogdanm | 0:9b334a45a8ff | 4117 | * @arg I2C_AUTOEND_MODE: Enable Automatic end mode. |
bogdanm | 0:9b334a45a8ff | 4118 | * @arg I2C_SOFTEND_MODE: Enable Software end mode. |
bogdanm | 0:9b334a45a8ff | 4119 | * @param Request: new state of the I2C START condition generation. |
bogdanm | 0:9b334a45a8ff | 4120 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 4121 | * @arg I2C_NO_STARTSTOP: Don't Generate stop and start condition. |
bogdanm | 0:9b334a45a8ff | 4122 | * @arg I2C_GENERATE_STOP: Generate stop condition (Size should be set to 0). |
bogdanm | 0:9b334a45a8ff | 4123 | * @arg I2C_GENERATE_START_READ: Generate Restart for read request. |
bogdanm | 0:9b334a45a8ff | 4124 | * @arg I2C_GENERATE_START_WRITE: Generate Restart for write request. |
bogdanm | 0:9b334a45a8ff | 4125 | * @retval None |
bogdanm | 0:9b334a45a8ff | 4126 | */ |
bogdanm | 0:9b334a45a8ff | 4127 | static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) |
bogdanm | 0:9b334a45a8ff | 4128 | { |
bogdanm | 0:9b334a45a8ff | 4129 | uint32_t tmpreg = 0; |
bogdanm | 0:9b334a45a8ff | 4130 | |
bogdanm | 0:9b334a45a8ff | 4131 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 4132 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
bogdanm | 0:9b334a45a8ff | 4133 | assert_param(IS_TRANSFER_MODE(Mode)); |
bogdanm | 0:9b334a45a8ff | 4134 | assert_param(IS_TRANSFER_REQUEST(Request)); |
bogdanm | 0:9b334a45a8ff | 4135 | |
bogdanm | 0:9b334a45a8ff | 4136 | /* Get the CR2 register value */ |
bogdanm | 0:9b334a45a8ff | 4137 | tmpreg = hi2c->Instance->CR2; |
bogdanm | 0:9b334a45a8ff | 4138 | |
bogdanm | 0:9b334a45a8ff | 4139 | /* clear tmpreg specific bits */ |
bogdanm | 0:9b334a45a8ff | 4140 | tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP)); |
bogdanm | 0:9b334a45a8ff | 4141 | |
bogdanm | 0:9b334a45a8ff | 4142 | /* update tmpreg */ |
bogdanm | 0:9b334a45a8ff | 4143 | tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \ |
bogdanm | 0:9b334a45a8ff | 4144 | (uint32_t)Mode | (uint32_t)Request); |
bogdanm | 0:9b334a45a8ff | 4145 | |
bogdanm | 0:9b334a45a8ff | 4146 | /* update CR2 register */ |
bogdanm | 0:9b334a45a8ff | 4147 | hi2c->Instance->CR2 = tmpreg; |
bogdanm | 0:9b334a45a8ff | 4148 | } |
bogdanm | 0:9b334a45a8ff | 4149 | |
bogdanm | 0:9b334a45a8ff | 4150 | /** |
bogdanm | 0:9b334a45a8ff | 4151 | * @} |
bogdanm | 0:9b334a45a8ff | 4152 | */ |
bogdanm | 0:9b334a45a8ff | 4153 | |
bogdanm | 0:9b334a45a8ff | 4154 | #endif /* HAL_I2C_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 4155 | /** |
bogdanm | 0:9b334a45a8ff | 4156 | * @} |
bogdanm | 0:9b334a45a8ff | 4157 | */ |
bogdanm | 0:9b334a45a8ff | 4158 | |
bogdanm | 0:9b334a45a8ff | 4159 | /** |
bogdanm | 0:9b334a45a8ff | 4160 | * @} |
bogdanm | 0:9b334a45a8ff | 4161 | */ |
bogdanm | 0:9b334a45a8ff | 4162 | |
bogdanm | 0:9b334a45a8ff | 4163 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |