en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff 
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f3xx_hal_cec.h
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.1.0
bogdanm 0:9b334a45a8ff 6 * @date 12-Sept-2014
bogdanm 0:9b334a45a8ff 7 * @brief Header file of CEC HAL module.
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 * @attention
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 14 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 16 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 19 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 21 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 22 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 34 *
bogdanm 0:9b334a45a8ff 35 ******************************************************************************
bogdanm 0:9b334a45a8ff 36 */
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 0:9b334a45a8ff 39 #ifndef __STM32F3xx_HAL_CEC_H
bogdanm 0:9b334a45a8ff 40 #define __STM32F3xx_HAL_CEC_H
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 #if defined(STM32F373xC) || defined(STM32F378xx)
bogdanm 0:9b334a45a8ff 47 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 48 #include "stm32f3xx_hal_def.h"
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /** @addtogroup STM32F3xx_HAL_Driver
bogdanm 0:9b334a45a8ff 51 * @{
bogdanm 0:9b334a45a8ff 52 */
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /** @addtogroup CEC
bogdanm 0:9b334a45a8ff 55 * @{
bogdanm 0:9b334a45a8ff 56 */
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /* Exported types ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 /** @defgroup CEC_Exported_Types CEC Exported Types
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
bogdanm 0:9b334a45a8ff 62 /**
bogdanm 0:9b334a45a8ff 63 * @brief CEC Init Structure definition
bogdanm 0:9b334a45a8ff 64 */
bogdanm 0:9b334a45a8ff 65 typedef struct
bogdanm 0:9b334a45a8ff 66 {
bogdanm 0:9b334a45a8ff 67 uint32_t SignalFreeTime; /*!< Set SFT field, specifies the Signal Free Time.
bogdanm 0:9b334a45a8ff 68 It can be one of @ref CEC_Signal_Free_Time
bogdanm 0:9b334a45a8ff 69 and belongs to the set {0,...,7} where
bogdanm 0:9b334a45a8ff 70 0x0 is the default configuration
bogdanm 0:9b334a45a8ff 71 else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 uint32_t Tolerance; /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms,
bogdanm 0:9b334a45a8ff 74 it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE
bogdanm 0:9b334a45a8ff 75 or CEC_EXTENDED_TOLERANCE */
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 uint32_t BRERxStop; /*!< Set BRESTP bit @ref CEC_BRERxStop : specifies whether or not a Bit Rising Error stops the reception.
bogdanm 0:9b334a45a8ff 78 CEC_NO_RX_STOP_ON_BRE: reception is not stopped.
bogdanm 0:9b334a45a8ff 79 CEC_RX_STOP_ON_BRE: reception is stopped. */
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 uint32_t BREErrorBitGen; /*!< Set BREGEN bit @ref CEC_BREErrorBitGen : specifies whether or not an Error-Bit is generated on the
bogdanm 0:9b334a45a8ff 82 CEC line upon Bit Rising Error detection.
bogdanm 0:9b334a45a8ff 83 CEC_BRE_ERRORBIT_NO_GENERATION: no error-bit generation.
bogdanm 0:9b334a45a8ff 84 CEC_BRE_ERRORBIT_GENERATION: error-bit generation if BRESTP is set. */
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 uint32_t LBPEErrorBitGen; /*!< Set LBPEGEN bit @ref CEC_LBPEErrorBitGen : specifies whether or not an Error-Bit is generated on the
bogdanm 0:9b334a45a8ff 87 CEC line upon Long Bit Period Error detection.
bogdanm 0:9b334a45a8ff 88 CEC_LBPE_ERRORBIT_NO_GENERATION: no error-bit generation.
bogdanm 0:9b334a45a8ff 89 CEC_LBPE_ERRORBIT_GENERATION: error-bit generation. */
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 uint32_t BroadcastMsgNoErrorBitGen; /*!< Set BRDNOGEN bit @ref CEC_BroadCastMsgErrorBitGen : allows to avoid an Error-Bit generation on the CEC line
bogdanm 0:9b334a45a8ff 92 upon an error detected on a broadcast message.
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values:
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 1) CEC_BROADCASTERROR_ERRORBIT_GENERATION.
bogdanm 0:9b334a45a8ff 97 a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE
bogdanm 0:9b334a45a8ff 98 and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION.
bogdanm 0:9b334a45a8ff 99 b) LBPE detection: error-bit generation on the CEC line
bogdanm 0:9b334a45a8ff 100 if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION.
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION.
bogdanm 0:9b334a45a8ff 103 no error-bit generation in case neither a) nor b) are satisfied. Additionally,
bogdanm 0:9b334a45a8ff 104 there is no error-bit generation in case of Short Bit Period Error detection in
bogdanm 0:9b334a45a8ff 105 a broadcast message while LSTN bit is set. */
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 uint32_t SignalFreeTimeOption; /*!< Set SFTOP bit @ref CEC_SFT_Option : specifies when SFT timer starts.
bogdanm 0:9b334a45a8ff 108 CEC_SFT_START_ON_TXSOM SFT: timer starts when TXSOM is set by software.
bogdanm 0:9b334a45a8ff 109 CEC_SFT_START_ON_TX_RX_END: SFT timer starts automatically at the end of message transmission/reception. */
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 uint32_t OwnAddress; /*!< Set OAR field, specifies CEC device address within a 15-bit long field */
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 uint32_t ListenMode; /*!< Set LSTN bit @ref CEC_Listening_Mode : specifies device listening mode. It can take two values:
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 CEC_REDUCED_LISTENING_MODE: CEC peripheral receives only message addressed to its
bogdanm 0:9b334a45a8ff 116 own address (OAR). Messages addressed to different destination are ignored.
bogdanm 0:9b334a45a8ff 117 Broadcast messages are always received.
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 CEC_FULL_LISTENING_MODE: CEC peripheral receives messages addressed to its own
bogdanm 0:9b334a45a8ff 120 address (OAR) with positive acknowledge. Messages addressed to different destination
bogdanm 0:9b334a45a8ff 121 are received, but without interfering with the CEC bus: no acknowledge sent. */
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 uint8_t InitiatorAddress; /* Initiator address (source logical address, sent in each header) */
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 }CEC_InitTypeDef;
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /**
bogdanm 0:9b334a45a8ff 128 * @brief HAL CEC State structures definition
bogdanm 0:9b334a45a8ff 129 */
bogdanm 0:9b334a45a8ff 130 typedef enum
bogdanm 0:9b334a45a8ff 131 {
bogdanm 0:9b334a45a8ff 132 HAL_CEC_STATE_RESET = 0x00, /*!< Peripheral Reset state */
bogdanm 0:9b334a45a8ff 133 HAL_CEC_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 0:9b334a45a8ff 134 HAL_CEC_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 0:9b334a45a8ff 135 HAL_CEC_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
bogdanm 0:9b334a45a8ff 136 HAL_CEC_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
bogdanm 0:9b334a45a8ff 137 HAL_CEC_STATE_STANDBY_RX = 0x05, /*!< IP ready to receive, doesn't prevent IP to transmit */
bogdanm 0:9b334a45a8ff 138 HAL_CEC_STATE_TIMEOUT = 0x06, /*!< Timeout state */
bogdanm 0:9b334a45a8ff 139 HAL_CEC_STATE_ERROR = 0x07 /*!< State Error */
bogdanm 0:9b334a45a8ff 140 }HAL_CEC_StateTypeDef;
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /**
bogdanm 0:9b334a45a8ff 143 * @brief HAL Error structures definition
bogdanm 0:9b334a45a8ff 144 */
bogdanm 0:9b334a45a8ff 145 typedef enum
bogdanm 0:9b334a45a8ff 146 {
bogdanm 0:9b334a45a8ff 147 HAL_CEC_ERROR_NONE = (uint32_t) 0x0, /*!< no error */
bogdanm 0:9b334a45a8ff 148 HAL_CEC_ERROR_RXOVR = CEC_ISR_RXOVR, /*!< CEC Rx-Overrun */
bogdanm 0:9b334a45a8ff 149 HAL_CEC_ERROR_BRE = CEC_ISR_BRE, /*!< CEC Rx Bit Rising Error */
bogdanm 0:9b334a45a8ff 150 HAL_CEC_ERROR_SBPE = CEC_ISR_SBPE, /*!< CEC Rx Short Bit period Error */
bogdanm 0:9b334a45a8ff 151 HAL_CEC_ERROR_LBPE = CEC_ISR_LBPE, /*!< CEC Rx Long Bit period Error */
bogdanm 0:9b334a45a8ff 152 HAL_CEC_ERROR_RXACKE = CEC_ISR_RXACKE, /*!< CEC Rx Missing Acknowledge */
bogdanm 0:9b334a45a8ff 153 HAL_CEC_ERROR_ARBLST = CEC_ISR_ARBLST, /*!< CEC Arbitration Lost */
bogdanm 0:9b334a45a8ff 154 HAL_CEC_ERROR_TXUDR = CEC_ISR_TXUDR, /*!< CEC Tx-Buffer Underrun */
bogdanm 0:9b334a45a8ff 155 HAL_CEC_ERROR_TXERR = CEC_ISR_TXERR, /*!< CEC Tx-Error */
bogdanm 0:9b334a45a8ff 156 HAL_CEC_ERROR_TXACKE = CEC_ISR_TXACKE /*!< CEC Tx Missing Acknowledge */
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158 HAL_CEC_ErrorTypeDef;
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /**
bogdanm 0:9b334a45a8ff 161 * @brief CEC handle Structure definition
bogdanm 0:9b334a45a8ff 162 */
bogdanm 0:9b334a45a8ff 163 typedef struct
bogdanm 0:9b334a45a8ff 164 {
bogdanm 0:9b334a45a8ff 165 CEC_TypeDef *Instance; /* CEC registers base address */
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 CEC_InitTypeDef Init; /* CEC communication parameters */
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 uint8_t *pTxBuffPtr; /* Pointer to CEC Tx transfer Buffer */
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 uint16_t TxXferCount; /* CEC Tx Transfer Counter */
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 uint8_t *pRxBuffPtr; /* Pointer to CEC Rx transfer Buffer */
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 uint16_t RxXferSize; /* CEC Rx Transfer size, 0: header received only */
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 uint32_t ErrorCode; /* For errors handling purposes, copy of ISR register
bogdanm 0:9b334a45a8ff 178 in case error is reported */
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 HAL_CEC_StateTypeDef State; /* CEC communication state */
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 }CEC_HandleTypeDef;
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /**
bogdanm 0:9b334a45a8ff 187 * @}
bogdanm 0:9b334a45a8ff 188 */
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 /* Exported constants --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 191 /** @defgroup CEC_Exported_Constants CEC Exported Constants
bogdanm 0:9b334a45a8ff 192 * @{
bogdanm 0:9b334a45a8ff 193 */
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /** @defgroup CEC_Signal_Free_Time Signal Free Time setting parameter
bogdanm 0:9b334a45a8ff 196 * @{
bogdanm 0:9b334a45a8ff 197 */
bogdanm 0:9b334a45a8ff 198 #define CEC_DEFAULT_SFT ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 199 #define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001)
bogdanm 0:9b334a45a8ff 200 #define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002)
bogdanm 0:9b334a45a8ff 201 #define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003)
bogdanm 0:9b334a45a8ff 202 #define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004)
bogdanm 0:9b334a45a8ff 203 #define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005)
bogdanm 0:9b334a45a8ff 204 #define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006)
bogdanm 0:9b334a45a8ff 205 #define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007)
bogdanm 0:9b334a45a8ff 206 #define IS_CEC_SIGNALFREETIME(SFT) ((SFT) <= CEC_CFGR_SFT)
bogdanm 0:9b334a45a8ff 207 /**
bogdanm 0:9b334a45a8ff 208 * @}
bogdanm 0:9b334a45a8ff 209 */
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /** @defgroup CEC_Tolerance Receiver Tolerance
bogdanm 0:9b334a45a8ff 212 * @{
bogdanm 0:9b334a45a8ff 213 */
bogdanm 0:9b334a45a8ff 214 #define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 215 #define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL)
bogdanm 0:9b334a45a8ff 216 #define IS_CEC_TOLERANCE(RXTOL) (((RXTOL) == CEC_STANDARD_TOLERANCE) || \
bogdanm 0:9b334a45a8ff 217 ((RXTOL) == CEC_EXTENDED_TOLERANCE))
bogdanm 0:9b334a45a8ff 218 /**
bogdanm 0:9b334a45a8ff 219 * @}
bogdanm 0:9b334a45a8ff 220 */
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 /** @defgroup CEC_BRERxStop Reception Stop on Error
bogdanm 0:9b334a45a8ff 223 * @{
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225 #define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 226 #define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP)
bogdanm 0:9b334a45a8ff 227 #define IS_CEC_BRERXSTOP(BRERXSTOP) (((BRERXSTOP) == CEC_NO_RX_STOP_ON_BRE) || \
bogdanm 0:9b334a45a8ff 228 ((BRERXSTOP) == CEC_RX_STOP_ON_BRE))
bogdanm 0:9b334a45a8ff 229 /**
bogdanm 0:9b334a45a8ff 230 * @}
bogdanm 0:9b334a45a8ff 231 */
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 /** @defgroup CEC_BREErrorBitGen Error Bit Generation if Bit Rise Error reported
bogdanm 0:9b334a45a8ff 234 * @{
bogdanm 0:9b334a45a8ff 235 */
bogdanm 0:9b334a45a8ff 236 #define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 237 #define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN)
bogdanm 0:9b334a45a8ff 238 #define IS_CEC_BREERRORBITGEN(ERRORBITGEN) (((ERRORBITGEN) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
bogdanm 0:9b334a45a8ff 239 ((ERRORBITGEN) == CEC_BRE_ERRORBIT_GENERATION))
bogdanm 0:9b334a45a8ff 240 /**
bogdanm 0:9b334a45a8ff 241 * @}
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /** @defgroup CEC_LBPEErrorBitGen Error Bit Generation if Long Bit Period Error reported
bogdanm 0:9b334a45a8ff 245 * @{
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247 #define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 248 #define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN)
bogdanm 0:9b334a45a8ff 249 #define IS_CEC_LBPEERRORBITGEN(ERRORBITGEN) (((ERRORBITGEN) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
bogdanm 0:9b334a45a8ff 250 ((ERRORBITGEN) == CEC_LBPE_ERRORBIT_GENERATION))
bogdanm 0:9b334a45a8ff 251 /**
bogdanm 0:9b334a45a8ff 252 * @}
bogdanm 0:9b334a45a8ff 253 */
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 /** @defgroup CEC_BroadCastMsgErrorBitGen Error Bit Generation on Broadcast message
bogdanm 0:9b334a45a8ff 256 * @{
bogdanm 0:9b334a45a8ff 257 */
bogdanm 0:9b334a45a8ff 258 #define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 259 #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN)
bogdanm 0:9b334a45a8ff 260 #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(ERRORBITGEN) (((ERRORBITGEN) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
bogdanm 0:9b334a45a8ff 261 ((ERRORBITGEN) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))
bogdanm 0:9b334a45a8ff 262 /**
bogdanm 0:9b334a45a8ff 263 * @}
bogdanm 0:9b334a45a8ff 264 */
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 /** @defgroup CEC_SFT_Option Signal Free Time start option
bogdanm 0:9b334a45a8ff 267 * @{
bogdanm 0:9b334a45a8ff 268 */
bogdanm 0:9b334a45a8ff 269 #define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 270 #define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT)
bogdanm 0:9b334a45a8ff 271 #define IS_CEC_SFTOP(SFTOP) (((SFTOP) == CEC_SFT_START_ON_TXSOM) || \
bogdanm 0:9b334a45a8ff 272 ((SFTOP) == CEC_SFT_START_ON_TX_RX_END))
bogdanm 0:9b334a45a8ff 273 /**
bogdanm 0:9b334a45a8ff 274 * @}
bogdanm 0:9b334a45a8ff 275 */
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /** @defgroup CEC_Listening_Mode Listening mode option
bogdanm 0:9b334a45a8ff 278 * @{
bogdanm 0:9b334a45a8ff 279 */
bogdanm 0:9b334a45a8ff 280 #define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000)
bogdanm 0:9b334a45a8ff 281 #define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN)
bogdanm 0:9b334a45a8ff 282 #define IS_CEC_LISTENING_MODE(MODE) (((MODE) == CEC_REDUCED_LISTENING_MODE) || \
bogdanm 0:9b334a45a8ff 283 ((MODE) == CEC_FULL_LISTENING_MODE))
bogdanm 0:9b334a45a8ff 284 /**
bogdanm 0:9b334a45a8ff 285 * @}
bogdanm 0:9b334a45a8ff 286 */
bogdanm 0:9b334a45a8ff 287
bogdanm 0:9b334a45a8ff 288 /** @defgroup CEC_ALL_ERROR all RX or TX errors flags in CEC ISR register
bogdanm 0:9b334a45a8ff 289 * @{
bogdanm 0:9b334a45a8ff 290 */
bogdanm 0:9b334a45a8ff 291 #define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
bogdanm 0:9b334a45a8ff 292 CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
bogdanm 0:9b334a45a8ff 293 /**
bogdanm 0:9b334a45a8ff 294 * @}
bogdanm 0:9b334a45a8ff 295 */
bogdanm 0:9b334a45a8ff 296
bogdanm 0:9b334a45a8ff 297 /** @defgroup CEC_IER_ALL_RX all RX errors interrupts enabling flag
bogdanm 0:9b334a45a8ff 298 * @{
bogdanm 0:9b334a45a8ff 299 */
bogdanm 0:9b334a45a8ff 300 #define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE)
bogdanm 0:9b334a45a8ff 301 /**
bogdanm 0:9b334a45a8ff 302 * @}
bogdanm 0:9b334a45a8ff 303 */
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 /** @defgroup CEC_IER_ALL_TX all TX errors interrupts enabling flag
bogdanm 0:9b334a45a8ff 306 * @{
bogdanm 0:9b334a45a8ff 307 */
bogdanm 0:9b334a45a8ff 308 #define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE)
bogdanm 0:9b334a45a8ff 309 /**
bogdanm 0:9b334a45a8ff 310 * @}
bogdanm 0:9b334a45a8ff 311 */
bogdanm 0:9b334a45a8ff 312
bogdanm 0:9b334a45a8ff 313 /** @defgroup CEC_OAR_Position Device Own Address position in CEC CFGR register
bogdanm 0:9b334a45a8ff 314 * @{
bogdanm 0:9b334a45a8ff 315 */
bogdanm 0:9b334a45a8ff 316 #define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16)
bogdanm 0:9b334a45a8ff 317 /**
bogdanm 0:9b334a45a8ff 318 * @}
bogdanm 0:9b334a45a8ff 319 */
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /** @defgroup CEC_Initiator_Position Initiator logical address position in message header
bogdanm 0:9b334a45a8ff 322 * @{
bogdanm 0:9b334a45a8ff 323 */
bogdanm 0:9b334a45a8ff 324 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4)
bogdanm 0:9b334a45a8ff 325 /**
bogdanm 0:9b334a45a8ff 326 * @}
bogdanm 0:9b334a45a8ff 327 */
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 /**
bogdanm 0:9b334a45a8ff 330 * @}
bogdanm 0:9b334a45a8ff 331 */
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 /* Exported macros -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 334 /** @defgroup CEC_Exported_Macros CEC Exported Macros
bogdanm 0:9b334a45a8ff 335 * @{
bogdanm 0:9b334a45a8ff 336 */
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /** @brief Reset CEC handle state
bogdanm 0:9b334a45a8ff 339 * @param __HANDLE__: CEC handle.
bogdanm 0:9b334a45a8ff 340 * @retval None
bogdanm 0:9b334a45a8ff 341 */
bogdanm 0:9b334a45a8ff 342 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CEC_STATE_RESET)
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 /** @brief Checks whether or not the specified CEC interrupt flag is set.
bogdanm 0:9b334a45a8ff 345 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 346 * @param __INTERRUPT__: specifies the interrupt to check.
bogdanm 0:9b334a45a8ff 347 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 348 * @arg CEC_ISR_RXBR : Rx-Byte Received
bogdanm 0:9b334a45a8ff 349 * @arg CEC_ISR_RXEND : End of Reception
bogdanm 0:9b334a45a8ff 350 * @arg CEC_ISR_RXOVR : Rx Overrun
bogdanm 0:9b334a45a8ff 351 * @arg CEC_ISR_BRE : Rx Bit Rising Error
bogdanm 0:9b334a45a8ff 352 * @arg CEC_ISR_SBPE : Rx Short Bit Period Error
bogdanm 0:9b334a45a8ff 353 * @arg CEC_ISR_LBPE : Rx Long Bit Period Error
bogdanm 0:9b334a45a8ff 354 * @arg CEC_ISR_RXACKE : Rx Missing Acknowledge
bogdanm 0:9b334a45a8ff 355 * @arg CEC_ISR_ARBLST : Arbitration lost
bogdanm 0:9b334a45a8ff 356 * @arg CEC_ISR_TXBR : Tx-Byte Request
bogdanm 0:9b334a45a8ff 357 * @arg CEC_ISR_TXEND : End of Transmission
bogdanm 0:9b334a45a8ff 358 * @arg CEC_ISR_TXUDR : Tx-buffer Underrun
bogdanm 0:9b334a45a8ff 359 * @arg CEC_ISR_TXERR : Tx Error
bogdanm 0:9b334a45a8ff 360 * @arg CEC_ISR_TXACKE : Tx Missing Acknowledge
bogdanm 0:9b334a45a8ff 361 * @retval ITStatus
bogdanm 0:9b334a45a8ff 362 */
bogdanm 0:9b334a45a8ff 363 #define __HAL_CEC_GET_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->ISR & (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 /** @brief Clears the interrupt or status flag when raised (write at 1)
bogdanm 0:9b334a45a8ff 366 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 367 * @param __FLAG__: specifies the interrupt/status flag to clear.
bogdanm 0:9b334a45a8ff 368 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 369 * @arg CEC_ISR_RXBR : Rx-Byte Received
bogdanm 0:9b334a45a8ff 370 * @arg CEC_ISR_RXEND : End of Reception
bogdanm 0:9b334a45a8ff 371 * @arg CEC_ISR_RXOVR : Rx Overrun
bogdanm 0:9b334a45a8ff 372 * @arg CEC_ISR_BRE : Rx Bit Rising Error
bogdanm 0:9b334a45a8ff 373 * @arg CEC_ISR_SBPE : Rx Short Bit Period Error
bogdanm 0:9b334a45a8ff 374 * @arg CEC_ISR_LBPE : Rx Long Bit Period Error
bogdanm 0:9b334a45a8ff 375 * @arg CEC_ISR_RXACKE : Rx Missing Acknowledge
bogdanm 0:9b334a45a8ff 376 * @arg CEC_ISR_ARBLST : Arbitration lost
bogdanm 0:9b334a45a8ff 377 * @arg CEC_ISR_TXBR : Tx-Byte Request
bogdanm 0:9b334a45a8ff 378 * @arg CEC_ISR_TXEND : End of Transmission
bogdanm 0:9b334a45a8ff 379 * @arg CEC_ISR_TXUDR : Tx-buffer Underrun
bogdanm 0:9b334a45a8ff 380 * @arg CEC_ISR_TXERR : Tx Error
bogdanm 0:9b334a45a8ff 381 * @arg CEC_ISR_TXACKE : Tx Missing Acknowledge
bogdanm 0:9b334a45a8ff 382 * @retval none
bogdanm 0:9b334a45a8ff 383 */
bogdanm 0:9b334a45a8ff 384 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR = (__FLAG__))
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 /** @brief Enables the specified CEC interrupt.
bogdanm 0:9b334a45a8ff 387 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 388 * @param __INTERRUPT__: specifies the CEC interrupt to enable.
bogdanm 0:9b334a45a8ff 389 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 390 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
bogdanm 0:9b334a45a8ff 391 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
bogdanm 0:9b334a45a8ff 392 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
bogdanm 0:9b334a45a8ff 393 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
bogdanm 0:9b334a45a8ff 394 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
bogdanm 0:9b334a45a8ff 395 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
bogdanm 0:9b334a45a8ff 396 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
bogdanm 0:9b334a45a8ff 397 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
bogdanm 0:9b334a45a8ff 398 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
bogdanm 0:9b334a45a8ff 399 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
bogdanm 0:9b334a45a8ff 400 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
bogdanm 0:9b334a45a8ff 401 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
bogdanm 0:9b334a45a8ff 402 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
bogdanm 0:9b334a45a8ff 403 * @retval none
bogdanm 0:9b334a45a8ff 404 */
bogdanm 0:9b334a45a8ff 405 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 /** @brief Disables the specified CEC interrupt.
bogdanm 0:9b334a45a8ff 408 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 409 * @param __INTERRUPT__: specifies the CEC interrupt to disable.
bogdanm 0:9b334a45a8ff 410 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 411 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
bogdanm 0:9b334a45a8ff 412 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
bogdanm 0:9b334a45a8ff 413 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
bogdanm 0:9b334a45a8ff 414 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
bogdanm 0:9b334a45a8ff 415 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
bogdanm 0:9b334a45a8ff 416 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
bogdanm 0:9b334a45a8ff 417 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
bogdanm 0:9b334a45a8ff 418 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
bogdanm 0:9b334a45a8ff 419 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
bogdanm 0:9b334a45a8ff 420 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
bogdanm 0:9b334a45a8ff 421 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
bogdanm 0:9b334a45a8ff 422 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
bogdanm 0:9b334a45a8ff 423 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
bogdanm 0:9b334a45a8ff 424 * @retval none
bogdanm 0:9b334a45a8ff 425 */
bogdanm 0:9b334a45a8ff 426 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 /** @brief Checks whether or not the specified CEC interrupt is enabled.
bogdanm 0:9b334a45a8ff 429 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 430 * @param __INTERRUPT__: specifies the CEC interrupt to check.
bogdanm 0:9b334a45a8ff 431 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 432 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
bogdanm 0:9b334a45a8ff 433 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
bogdanm 0:9b334a45a8ff 434 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
bogdanm 0:9b334a45a8ff 435 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
bogdanm 0:9b334a45a8ff 436 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
bogdanm 0:9b334a45a8ff 437 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
bogdanm 0:9b334a45a8ff 438 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
bogdanm 0:9b334a45a8ff 439 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
bogdanm 0:9b334a45a8ff 440 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
bogdanm 0:9b334a45a8ff 441 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
bogdanm 0:9b334a45a8ff 442 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
bogdanm 0:9b334a45a8ff 443 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
bogdanm 0:9b334a45a8ff 444 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
bogdanm 0:9b334a45a8ff 445 * @retval FlagStatus
bogdanm 0:9b334a45a8ff 446 */
bogdanm 0:9b334a45a8ff 447 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 /** @brief Enables the CEC device
bogdanm 0:9b334a45a8ff 450 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 451 * @retval none
bogdanm 0:9b334a45a8ff 452 */
bogdanm 0:9b334a45a8ff 453 #define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN)
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 /** @brief Disables the CEC device
bogdanm 0:9b334a45a8ff 456 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 457 * @retval none
bogdanm 0:9b334a45a8ff 458 */
bogdanm 0:9b334a45a8ff 459 #define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN)
bogdanm 0:9b334a45a8ff 460
bogdanm 0:9b334a45a8ff 461 /** @brief Set Transmission Start flag
bogdanm 0:9b334a45a8ff 462 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 463 * @retval none
bogdanm 0:9b334a45a8ff 464 */
bogdanm 0:9b334a45a8ff 465 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM)
bogdanm 0:9b334a45a8ff 466
bogdanm 0:9b334a45a8ff 467 /** @brief Set Transmission End flag
bogdanm 0:9b334a45a8ff 468 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 469 * @retval none
bogdanm 0:9b334a45a8ff 470 * If the CEC message consists of only one byte, TXEOM must be set before of TXSOM.
bogdanm 0:9b334a45a8ff 471 */
bogdanm 0:9b334a45a8ff 472 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM)
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 /** @brief Get Transmission Start flag
bogdanm 0:9b334a45a8ff 475 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 476 * @retval FlagStatus
bogdanm 0:9b334a45a8ff 477 */
bogdanm 0:9b334a45a8ff 478 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
bogdanm 0:9b334a45a8ff 479
bogdanm 0:9b334a45a8ff 480 /** @brief Get Transmission End flag
bogdanm 0:9b334a45a8ff 481 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 482 * @retval FlagStatus
bogdanm 0:9b334a45a8ff 483 */
bogdanm 0:9b334a45a8ff 484 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)
bogdanm 0:9b334a45a8ff 485
bogdanm 0:9b334a45a8ff 486 /** @brief Clear OAR register
bogdanm 0:9b334a45a8ff 487 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 488 * @retval none
bogdanm 0:9b334a45a8ff 489 */
bogdanm 0:9b334a45a8ff 490 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492 /** @brief Set OAR register (without resetting previously set address in case of multi-address mode)
bogdanm 0:9b334a45a8ff 493 * To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand
bogdanm 0:9b334a45a8ff 494 * @param __HANDLE__: specifies the CEC Handle.
bogdanm 0:9b334a45a8ff 495 * @param __ADDRESS__: Own Address value (CEC logical address is identified by bit position)
bogdanm 0:9b334a45a8ff 496 * @retval none
bogdanm 0:9b334a45a8ff 497 */
bogdanm 0:9b334a45a8ff 498 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
bogdanm 0:9b334a45a8ff 499
bogdanm 0:9b334a45a8ff 500 /** @brief Check CEC device Own Address Register (OAR) setting.
bogdanm 0:9b334a45a8ff 501 * OAR address is written in a 15-bit field within CEC_CFGR register.
bogdanm 0:9b334a45a8ff 502 * @param __ADDRESS__: CEC own address.
bogdanm 0:9b334a45a8ff 503 * @retval Test result (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 504 */
bogdanm 0:9b334a45a8ff 505 #define IS_CEC_OAR_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x07FFF)
bogdanm 0:9b334a45a8ff 506
bogdanm 0:9b334a45a8ff 507 /** @brief Check CEC initiator or destination logical address setting.
bogdanm 0:9b334a45a8ff 508 * Initiator and destination addresses are coded over 4 bits.
bogdanm 0:9b334a45a8ff 509 * @param __ADDRESS__: CEC initiator or logical address.
bogdanm 0:9b334a45a8ff 510 * @retval Test result (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 511 */
bogdanm 0:9b334a45a8ff 512 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
bogdanm 0:9b334a45a8ff 513
bogdanm 0:9b334a45a8ff 514 /** @brief Check CEC message size.
bogdanm 0:9b334a45a8ff 515 * The message size is the payload size: without counting the header,
bogdanm 0:9b334a45a8ff 516 * it varies from 0 byte (ping operation, one header only, no payload) to
bogdanm 0:9b334a45a8ff 517 * 15 bytes (1 opcode and up to 14 operands following the header).
bogdanm 0:9b334a45a8ff 518 * @param __SIZE__: CEC message size.
bogdanm 0:9b334a45a8ff 519 * @retval Test result (TRUE or FALSE).
bogdanm 0:9b334a45a8ff 520 */
bogdanm 0:9b334a45a8ff 521 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0xF)
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 /**
bogdanm 0:9b334a45a8ff 524 * @}
bogdanm 0:9b334a45a8ff 525 */
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 528 /** @addtogroup CEC_Exported_Functions CEC Exported Functions
bogdanm 0:9b334a45a8ff 529 * @{
bogdanm 0:9b334a45a8ff 530 */
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /** @addtogroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 533 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 534 * @{
bogdanm 0:9b334a45a8ff 535 */
bogdanm 0:9b334a45a8ff 536 /* Initialization and de-initialization functions ****************************/
bogdanm 0:9b334a45a8ff 537 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 538 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 539 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 540 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 541 /**
bogdanm 0:9b334a45a8ff 542 * @}
bogdanm 0:9b334a45a8ff 543 */
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /** @addtogroup CEC_Exported_Functions_Group2 Input and Output operation functions
bogdanm 0:9b334a45a8ff 546 * @brief CEC Transmit/Receive functions
bogdanm 0:9b334a45a8ff 547 * @{
bogdanm 0:9b334a45a8ff 548 */
bogdanm 0:9b334a45a8ff 549 /* IO operation functions *****************************************************/
bogdanm 0:9b334a45a8ff 550 HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 551 HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 552 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
bogdanm 0:9b334a45a8ff 553 HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData);
bogdanm 0:9b334a45a8ff 554 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 555 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 556 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 557 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 558 /**
bogdanm 0:9b334a45a8ff 559 * @}
bogdanm 0:9b334a45a8ff 560 */
bogdanm 0:9b334a45a8ff 561
bogdanm 0:9b334a45a8ff 562 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 563 * @brief CEC control functions
bogdanm 0:9b334a45a8ff 564 * @{
bogdanm 0:9b334a45a8ff 565 */
bogdanm 0:9b334a45a8ff 566 /* Peripheral State and Error functions ***************************************/
bogdanm 0:9b334a45a8ff 567 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 568 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
bogdanm 0:9b334a45a8ff 569 /**
bogdanm 0:9b334a45a8ff 570 * @}
bogdanm 0:9b334a45a8ff 571 */
bogdanm 0:9b334a45a8ff 572
bogdanm 0:9b334a45a8ff 573 /**
bogdanm 0:9b334a45a8ff 574 * @}
bogdanm 0:9b334a45a8ff 575 */
bogdanm 0:9b334a45a8ff 576
bogdanm 0:9b334a45a8ff 577 /**
bogdanm 0:9b334a45a8ff 578 * @}
bogdanm 0:9b334a45a8ff 579 */
bogdanm 0:9b334a45a8ff 580
bogdanm 0:9b334a45a8ff 581 /**
bogdanm 0:9b334a45a8ff 582 * @}
bogdanm 0:9b334a45a8ff 583 */
bogdanm 0:9b334a45a8ff 584
bogdanm 0:9b334a45a8ff 585 #endif /* defined(STM32F373xC) || defined(STM32F378xx) */
bogdanm 0:9b334a45a8ff 586
bogdanm 0:9b334a45a8ff 587 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 588 }
bogdanm 0:9b334a45a8ff 589 #endif
bogdanm 0:9b334a45a8ff 590
bogdanm 0:9b334a45a8ff 591 #endif /* __STM32F3xx_HAL_CEC_H */
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/