fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_cec.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f3xx_hal_cec.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
bogdanm | 0:9b334a45a8ff | 5 | * @version V1.1.0 |
bogdanm | 0:9b334a45a8ff | 6 | * @date 12-Sept-2014 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief CEC HAL module driver. |
bogdanm | 0:9b334a45a8ff | 8 | * |
bogdanm | 0:9b334a45a8ff | 9 | * This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 10 | * functionalities of the High Definition Multimedia Interface |
bogdanm | 0:9b334a45a8ff | 11 | * Consumer Electronics Control Peripheral (CEC). |
bogdanm | 0:9b334a45a8ff | 12 | * + Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 13 | * + IO operation functions |
bogdanm | 0:9b334a45a8ff | 14 | * + Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 15 | * |
bogdanm | 0:9b334a45a8ff | 16 | * |
bogdanm | 0:9b334a45a8ff | 17 | @verbatim |
bogdanm | 0:9b334a45a8ff | 18 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 19 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 20 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 21 | [..] |
bogdanm | 0:9b334a45a8ff | 22 | The CEC HAL driver can be used as follows: |
bogdanm | 0:9b334a45a8ff | 23 | |
bogdanm | 0:9b334a45a8ff | 24 | (#) Declare a CEC_HandleTypeDef handle structure. |
bogdanm | 0:9b334a45a8ff | 25 | (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API: |
bogdanm | 0:9b334a45a8ff | 26 | (##) Enable the CEC interface clock. |
bogdanm | 0:9b334a45a8ff | 27 | (##) CEC pins configuration: |
bogdanm | 0:9b334a45a8ff | 28 | (+) Enable the clock for the CEC GPIOs. |
bogdanm | 0:9b334a45a8ff | 29 | (+) Configure these CEC pins as alternate function pull-up. |
bogdanm | 0:9b334a45a8ff | 30 | (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 31 | and HAL_CEC_Receive_IT() APIs): |
bogdanm | 0:9b334a45a8ff | 32 | (+) Configure the CEC interrupt priority. |
bogdanm | 0:9b334a45a8ff | 33 | (+) Enable the NVIC CEC IRQ handle. |
bogdanm | 0:9b334a45a8ff | 34 | (@) The specific CEC interrupts (Transmission complete interrupt, |
bogdanm | 0:9b334a45a8ff | 35 | RXNE interrupt and Error Interrupts) will be managed using the macros |
bogdanm | 0:9b334a45a8ff | 36 | __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit |
bogdanm | 0:9b334a45a8ff | 37 | and receive process. |
bogdanm | 0:9b334a45a8ff | 38 | |
bogdanm | 0:9b334a45a8ff | 39 | (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in |
bogdanm | 0:9b334a45a8ff | 40 | in case of Bit Rising Error, Error-Bit generation conditions, device logical |
bogdanm | 0:9b334a45a8ff | 41 | address and Listen mode in the hcec Init structure. |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | (#) Initialize the CEC registers by calling the HAL_CEC_Init() API. |
bogdanm | 0:9b334a45a8ff | 44 | |
bogdanm | 0:9b334a45a8ff | 45 | (@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
bogdanm | 0:9b334a45a8ff | 46 | by calling the customed HAL_CEC_MspInit() API. |
bogdanm | 0:9b334a45a8ff | 47 | |
bogdanm | 0:9b334a45a8ff | 48 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 49 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 50 | * @attention |
bogdanm | 0:9b334a45a8ff | 51 | * |
bogdanm | 0:9b334a45a8ff | 52 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 53 | * |
bogdanm | 0:9b334a45a8ff | 54 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 55 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 56 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 57 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 58 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 59 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 60 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 61 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 62 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 63 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 64 | * |
bogdanm | 0:9b334a45a8ff | 65 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 66 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 67 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 68 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 69 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 70 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 71 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 72 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 73 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 74 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 75 | * |
bogdanm | 0:9b334a45a8ff | 76 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 77 | */ |
bogdanm | 0:9b334a45a8ff | 78 | |
bogdanm | 0:9b334a45a8ff | 79 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 80 | #include "stm32f3xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 81 | |
bogdanm | 0:9b334a45a8ff | 82 | /** @addtogroup STM32F3xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 83 | * @{ |
bogdanm | 0:9b334a45a8ff | 84 | */ |
bogdanm | 0:9b334a45a8ff | 85 | |
bogdanm | 0:9b334a45a8ff | 86 | #ifdef HAL_CEC_MODULE_ENABLED |
bogdanm | 0:9b334a45a8ff | 87 | |
bogdanm | 0:9b334a45a8ff | 88 | #if defined(STM32F373xC) || defined(STM32F378xx) |
bogdanm | 0:9b334a45a8ff | 89 | /** @defgroup CEC CEC HAL module driver |
bogdanm | 0:9b334a45a8ff | 90 | * @brief HAL CEC module driver |
bogdanm | 0:9b334a45a8ff | 91 | * @{ |
bogdanm | 0:9b334a45a8ff | 92 | */ |
bogdanm | 0:9b334a45a8ff | 93 | |
bogdanm | 0:9b334a45a8ff | 94 | /* Private typedef -----------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 95 | /* Private define ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 96 | /** @defgroup CEC_Private CEC Private Constants |
bogdanm | 0:9b334a45a8ff | 97 | * @{ |
bogdanm | 0:9b334a45a8ff | 98 | */ |
bogdanm | 0:9b334a45a8ff | 99 | #define CEC_CFGR_FIELDS (CEC_CFGR_SFT | CEC_CFGR_RXTOL | CEC_CFGR_BRESTP \ |
bogdanm | 0:9b334a45a8ff | 100 | | CEC_CFGR_BREGEN | CEC_CFGR_LBPEGEN | CEC_CFGR_SFTOPT \ |
bogdanm | 0:9b334a45a8ff | 101 | | CEC_CFGR_BRDNOGEN | CEC_CFGR_OAR | CEC_CFGR_LSTN) |
bogdanm | 0:9b334a45a8ff | 102 | /** |
bogdanm | 0:9b334a45a8ff | 103 | * @} |
bogdanm | 0:9b334a45a8ff | 104 | */ |
bogdanm | 0:9b334a45a8ff | 105 | /* Private macro -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 106 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 107 | /* Private function prototypes -----------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 108 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec); |
bogdanm | 0:9b334a45a8ff | 109 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec); |
bogdanm | 0:9b334a45a8ff | 110 | /* Exported functions ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 111 | |
bogdanm | 0:9b334a45a8ff | 112 | /** @defgroup CEC_Exported_Functions CEC Exported Functions |
bogdanm | 0:9b334a45a8ff | 113 | * @{ |
bogdanm | 0:9b334a45a8ff | 114 | */ |
bogdanm | 0:9b334a45a8ff | 115 | |
bogdanm | 0:9b334a45a8ff | 116 | /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 117 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 118 | * |
bogdanm | 0:9b334a45a8ff | 119 | @verbatim |
bogdanm | 0:9b334a45a8ff | 120 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 121 | ##### Initialization and Configuration functions ##### |
bogdanm | 0:9b334a45a8ff | 122 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 123 | [..] |
bogdanm | 0:9b334a45a8ff | 124 | This subsection provides a set of functions allowing to initialize the CEC |
bogdanm | 0:9b334a45a8ff | 125 | (+) The following parameters need to be configured: |
bogdanm | 0:9b334a45a8ff | 126 | (++) SignalFreeTime |
bogdanm | 0:9b334a45a8ff | 127 | (++) Tolerance |
bogdanm | 0:9b334a45a8ff | 128 | (++) BRERxStop (RX stopped or not upon Bit Rising Error) |
bogdanm | 0:9b334a45a8ff | 129 | (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error) |
bogdanm | 0:9b334a45a8ff | 130 | (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error) |
bogdanm | 0:9b334a45a8ff | 131 | (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error) |
bogdanm | 0:9b334a45a8ff | 132 | (++) SignalFreeTimeOption (SFT Timer start definition) |
bogdanm | 0:9b334a45a8ff | 133 | (++) OwnAddress (CEC device address) |
bogdanm | 0:9b334a45a8ff | 134 | (++) ListenMode |
bogdanm | 0:9b334a45a8ff | 135 | |
bogdanm | 0:9b334a45a8ff | 136 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 137 | * @{ |
bogdanm | 0:9b334a45a8ff | 138 | */ |
bogdanm | 0:9b334a45a8ff | 139 | |
bogdanm | 0:9b334a45a8ff | 140 | /** |
bogdanm | 0:9b334a45a8ff | 141 | * @brief Initializes the CEC mode according to the specified |
bogdanm | 0:9b334a45a8ff | 142 | * parameters in the CEC_InitTypeDef and creates the associated handle . |
bogdanm | 0:9b334a45a8ff | 143 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 144 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 145 | */ |
bogdanm | 0:9b334a45a8ff | 146 | HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 147 | { |
bogdanm | 0:9b334a45a8ff | 148 | uint32_t tmpreg = 0x0; |
bogdanm | 0:9b334a45a8ff | 149 | |
bogdanm | 0:9b334a45a8ff | 150 | /* Check the CEC handle allocation */ |
bogdanm | 0:9b334a45a8ff | 151 | if(hcec == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 152 | { |
bogdanm | 0:9b334a45a8ff | 153 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 154 | } |
bogdanm | 0:9b334a45a8ff | 155 | |
bogdanm | 0:9b334a45a8ff | 156 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 157 | assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
bogdanm | 0:9b334a45a8ff | 158 | assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime)); |
bogdanm | 0:9b334a45a8ff | 159 | assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance)); |
bogdanm | 0:9b334a45a8ff | 160 | assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop)); |
bogdanm | 0:9b334a45a8ff | 161 | assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen)); |
bogdanm | 0:9b334a45a8ff | 162 | assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen)); |
bogdanm | 0:9b334a45a8ff | 163 | assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen)); |
bogdanm | 0:9b334a45a8ff | 164 | assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption)); |
bogdanm | 0:9b334a45a8ff | 165 | assert_param(IS_CEC_OAR_ADDRESS(hcec->Init.OwnAddress)); |
bogdanm | 0:9b334a45a8ff | 166 | assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode)); |
bogdanm | 0:9b334a45a8ff | 167 | assert_param(IS_CEC_ADDRESS(hcec->Init.InitiatorAddress)); |
bogdanm | 0:9b334a45a8ff | 168 | |
bogdanm | 0:9b334a45a8ff | 169 | |
bogdanm | 0:9b334a45a8ff | 170 | if(hcec->State == HAL_CEC_STATE_RESET) |
bogdanm | 0:9b334a45a8ff | 171 | { |
bogdanm | 0:9b334a45a8ff | 172 | /* Init the low level hardware : GPIO, CLOCK */ |
bogdanm | 0:9b334a45a8ff | 173 | HAL_CEC_MspInit(hcec); |
bogdanm | 0:9b334a45a8ff | 174 | } |
bogdanm | 0:9b334a45a8ff | 175 | |
bogdanm | 0:9b334a45a8ff | 176 | hcec->State = HAL_CEC_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 177 | |
bogdanm | 0:9b334a45a8ff | 178 | /* Disable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 179 | __HAL_CEC_DISABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 180 | |
bogdanm | 0:9b334a45a8ff | 181 | tmpreg = hcec->Init.SignalFreeTime; |
bogdanm | 0:9b334a45a8ff | 182 | tmpreg |= hcec->Init.Tolerance; |
bogdanm | 0:9b334a45a8ff | 183 | tmpreg |= hcec->Init.BRERxStop; |
bogdanm | 0:9b334a45a8ff | 184 | tmpreg |= hcec->Init.BREErrorBitGen; |
bogdanm | 0:9b334a45a8ff | 185 | tmpreg |= hcec->Init.LBPEErrorBitGen; |
bogdanm | 0:9b334a45a8ff | 186 | tmpreg |= hcec->Init.BroadcastMsgNoErrorBitGen; |
bogdanm | 0:9b334a45a8ff | 187 | tmpreg |= hcec->Init.SignalFreeTimeOption; |
bogdanm | 0:9b334a45a8ff | 188 | tmpreg |= (hcec->Init.OwnAddress << CEC_CFGR_OAR_LSB_POS); |
bogdanm | 0:9b334a45a8ff | 189 | tmpreg |= hcec->Init.ListenMode; |
bogdanm | 0:9b334a45a8ff | 190 | |
bogdanm | 0:9b334a45a8ff | 191 | /* Write to CEC Control Register */ |
bogdanm | 0:9b334a45a8ff | 192 | MODIFY_REG(hcec->Instance->CFGR, CEC_CFGR_FIELDS, tmpreg); |
bogdanm | 0:9b334a45a8ff | 193 | |
bogdanm | 0:9b334a45a8ff | 194 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 195 | __HAL_CEC_ENABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 196 | |
bogdanm | 0:9b334a45a8ff | 197 | hcec->State = HAL_CEC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 198 | |
bogdanm | 0:9b334a45a8ff | 199 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 200 | } |
bogdanm | 0:9b334a45a8ff | 201 | |
bogdanm | 0:9b334a45a8ff | 202 | |
bogdanm | 0:9b334a45a8ff | 203 | |
bogdanm | 0:9b334a45a8ff | 204 | /** |
bogdanm | 0:9b334a45a8ff | 205 | * @brief DeInitializes the CEC peripheral |
bogdanm | 0:9b334a45a8ff | 206 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 207 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 208 | */ |
bogdanm | 0:9b334a45a8ff | 209 | HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 210 | { |
bogdanm | 0:9b334a45a8ff | 211 | /* Check the CEC handle allocation */ |
bogdanm | 0:9b334a45a8ff | 212 | if(hcec == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 213 | { |
bogdanm | 0:9b334a45a8ff | 214 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 215 | } |
bogdanm | 0:9b334a45a8ff | 216 | |
bogdanm | 0:9b334a45a8ff | 217 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 218 | assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
bogdanm | 0:9b334a45a8ff | 219 | |
bogdanm | 0:9b334a45a8ff | 220 | hcec->State = HAL_CEC_STATE_BUSY; |
bogdanm | 0:9b334a45a8ff | 221 | |
bogdanm | 0:9b334a45a8ff | 222 | /* DeInit the low level hardware */ |
bogdanm | 0:9b334a45a8ff | 223 | HAL_CEC_MspDeInit(hcec); |
bogdanm | 0:9b334a45a8ff | 224 | /* Disable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 225 | __HAL_CEC_DISABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 226 | |
bogdanm | 0:9b334a45a8ff | 227 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 228 | hcec->State = HAL_CEC_STATE_RESET; |
bogdanm | 0:9b334a45a8ff | 229 | |
bogdanm | 0:9b334a45a8ff | 230 | /* Process Unlock */ |
bogdanm | 0:9b334a45a8ff | 231 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 232 | |
bogdanm | 0:9b334a45a8ff | 233 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 234 | } |
bogdanm | 0:9b334a45a8ff | 235 | |
bogdanm | 0:9b334a45a8ff | 236 | /** |
bogdanm | 0:9b334a45a8ff | 237 | * @brief CEC MSP Init |
bogdanm | 0:9b334a45a8ff | 238 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 239 | * @retval None |
bogdanm | 0:9b334a45a8ff | 240 | */ |
bogdanm | 0:9b334a45a8ff | 241 | __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 242 | { |
bogdanm | 0:9b334a45a8ff | 243 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 244 | the HAL_CEC_MspInit can be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 245 | */ |
bogdanm | 0:9b334a45a8ff | 246 | } |
bogdanm | 0:9b334a45a8ff | 247 | |
bogdanm | 0:9b334a45a8ff | 248 | /** |
bogdanm | 0:9b334a45a8ff | 249 | * @brief CEC MSP DeInit |
bogdanm | 0:9b334a45a8ff | 250 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 251 | * @retval None |
bogdanm | 0:9b334a45a8ff | 252 | */ |
bogdanm | 0:9b334a45a8ff | 253 | __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 254 | { |
bogdanm | 0:9b334a45a8ff | 255 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 256 | the HAL_CEC_MspDeInit can be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 257 | */ |
bogdanm | 0:9b334a45a8ff | 258 | } |
bogdanm | 0:9b334a45a8ff | 259 | |
bogdanm | 0:9b334a45a8ff | 260 | /** |
bogdanm | 0:9b334a45a8ff | 261 | * @} |
bogdanm | 0:9b334a45a8ff | 262 | */ |
bogdanm | 0:9b334a45a8ff | 263 | |
bogdanm | 0:9b334a45a8ff | 264 | /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions |
bogdanm | 0:9b334a45a8ff | 265 | * @brief CEC Transmit/Receive functions |
bogdanm | 0:9b334a45a8ff | 266 | * |
bogdanm | 0:9b334a45a8ff | 267 | @verbatim |
bogdanm | 0:9b334a45a8ff | 268 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 269 | ##### I/O operation functions ##### |
bogdanm | 0:9b334a45a8ff | 270 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 271 | This subsection provides a set of functions allowing to manage the CEC data transfers. |
bogdanm | 0:9b334a45a8ff | 272 | |
bogdanm | 0:9b334a45a8ff | 273 | (#) The CEC handle must contain the initiator (TX side) and the destination (RX side) |
bogdanm | 0:9b334a45a8ff | 274 | logical addresses (4-bit long addresses, 0xF for broadcast messages destination) |
bogdanm | 0:9b334a45a8ff | 275 | |
bogdanm | 0:9b334a45a8ff | 276 | (#) There are two mode of transfer: |
bogdanm | 0:9b334a45a8ff | 277 | (+) Blocking mode: The communication is performed in polling mode. |
bogdanm | 0:9b334a45a8ff | 278 | The HAL status of all data processing is returned by the same function |
bogdanm | 0:9b334a45a8ff | 279 | after finishing transfer. |
bogdanm | 0:9b334a45a8ff | 280 | (+) No-Blocking mode: The communication is performed using Interrupts. |
bogdanm | 0:9b334a45a8ff | 281 | These API's return the HAL status. |
bogdanm | 0:9b334a45a8ff | 282 | The end of the data processing will be indicated through the |
bogdanm | 0:9b334a45a8ff | 283 | dedicated CEC IRQ when using Interrupt mode. |
bogdanm | 0:9b334a45a8ff | 284 | The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks |
bogdanm | 0:9b334a45a8ff | 285 | will be executed respectivelly at the end of the transmit or Receive process |
bogdanm | 0:9b334a45a8ff | 286 | The HAL_CEC_ErrorCallback()user callback will be executed when a communication |
bogdanm | 0:9b334a45a8ff | 287 | error is detected |
bogdanm | 0:9b334a45a8ff | 288 | |
bogdanm | 0:9b334a45a8ff | 289 | (#) Blocking mode API's are : |
bogdanm | 0:9b334a45a8ff | 290 | (+) HAL_CEC_Transmit() |
bogdanm | 0:9b334a45a8ff | 291 | (+) HAL_CEC_Receive() |
bogdanm | 0:9b334a45a8ff | 292 | |
bogdanm | 0:9b334a45a8ff | 293 | (#) Non-Blocking mode API's with Interrupt are : |
bogdanm | 0:9b334a45a8ff | 294 | (+) HAL_CEC_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 295 | (+) HAL_CEC_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 296 | (+) HAL_CEC_IRQHandler() |
bogdanm | 0:9b334a45a8ff | 297 | |
bogdanm | 0:9b334a45a8ff | 298 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
bogdanm | 0:9b334a45a8ff | 299 | (+) HAL_CEC_TxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 300 | (+) HAL_CEC_RxCpltCallback() |
bogdanm | 0:9b334a45a8ff | 301 | (+) HAL_CEC_ErrorCallback() |
bogdanm | 0:9b334a45a8ff | 302 | |
bogdanm | 0:9b334a45a8ff | 303 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 304 | * @{ |
bogdanm | 0:9b334a45a8ff | 305 | */ |
bogdanm | 0:9b334a45a8ff | 306 | |
bogdanm | 0:9b334a45a8ff | 307 | /** |
bogdanm | 0:9b334a45a8ff | 308 | * @brief Send data in blocking mode |
bogdanm | 0:9b334a45a8ff | 309 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 310 | * @param DestinationAddress: destination logical address |
bogdanm | 0:9b334a45a8ff | 311 | * @param pData: pointer to input byte data buffer |
bogdanm | 0:9b334a45a8ff | 312 | * @param Size: amount of data to be sent in bytes (without counting the header). |
bogdanm | 0:9b334a45a8ff | 313 | * 0 means only the header is sent (ping operation). |
bogdanm | 0:9b334a45a8ff | 314 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
bogdanm | 0:9b334a45a8ff | 315 | * @param Timeout: Timeout duration. |
bogdanm | 0:9b334a45a8ff | 316 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 317 | */ |
bogdanm | 0:9b334a45a8ff | 318 | HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 319 | { |
bogdanm | 0:9b334a45a8ff | 320 | uint8_t temp = 0; |
bogdanm | 0:9b334a45a8ff | 321 | uint32_t tempisr = 0; |
bogdanm | 0:9b334a45a8ff | 322 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 323 | |
bogdanm | 0:9b334a45a8ff | 324 | if((hcec->State == HAL_CEC_STATE_READY) && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
bogdanm | 0:9b334a45a8ff | 325 | { |
bogdanm | 0:9b334a45a8ff | 326 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 327 | if((pData == HAL_NULL) && (Size > 0)) |
bogdanm | 0:9b334a45a8ff | 328 | { |
bogdanm | 0:9b334a45a8ff | 329 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 330 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 331 | } |
bogdanm | 0:9b334a45a8ff | 332 | |
bogdanm | 0:9b334a45a8ff | 333 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
bogdanm | 0:9b334a45a8ff | 334 | assert_param(IS_CEC_MSGSIZE(Size)); |
bogdanm | 0:9b334a45a8ff | 335 | |
bogdanm | 0:9b334a45a8ff | 336 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 337 | __HAL_LOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 338 | |
bogdanm | 0:9b334a45a8ff | 339 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 340 | |
bogdanm | 0:9b334a45a8ff | 341 | hcec->TxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 342 | |
bogdanm | 0:9b334a45a8ff | 343 | /* case no data to be sent, sender is only pinging the system */ |
bogdanm | 0:9b334a45a8ff | 344 | if (Size == 0) |
bogdanm | 0:9b334a45a8ff | 345 | { |
bogdanm | 0:9b334a45a8ff | 346 | /* Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ |
bogdanm | 0:9b334a45a8ff | 347 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
bogdanm | 0:9b334a45a8ff | 348 | } |
bogdanm | 0:9b334a45a8ff | 349 | |
bogdanm | 0:9b334a45a8ff | 350 | /* send header block */ |
bogdanm | 0:9b334a45a8ff | 351 | temp = (uint8_t)((uint32_t)(hcec->Init.InitiatorAddress) << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
bogdanm | 0:9b334a45a8ff | 352 | hcec->Instance->TXDR = temp; |
bogdanm | 0:9b334a45a8ff | 353 | /* Set TX Start of Message (TXSOM) bit */ |
bogdanm | 0:9b334a45a8ff | 354 | __HAL_CEC_FIRST_BYTE_TX_SET(hcec); |
bogdanm | 0:9b334a45a8ff | 355 | |
bogdanm | 0:9b334a45a8ff | 356 | while (hcec->TxXferCount > 0) |
bogdanm | 0:9b334a45a8ff | 357 | { |
bogdanm | 0:9b334a45a8ff | 358 | hcec->TxXferCount--; |
bogdanm | 0:9b334a45a8ff | 359 | |
bogdanm | 0:9b334a45a8ff | 360 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 361 | while(HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_TXBR)) |
bogdanm | 0:9b334a45a8ff | 362 | { |
bogdanm | 0:9b334a45a8ff | 363 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 364 | { |
bogdanm | 0:9b334a45a8ff | 365 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 366 | { |
bogdanm | 0:9b334a45a8ff | 367 | hcec->State = HAL_CEC_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 368 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 369 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 370 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 371 | } |
bogdanm | 0:9b334a45a8ff | 372 | } |
bogdanm | 0:9b334a45a8ff | 373 | |
bogdanm | 0:9b334a45a8ff | 374 | /* check whether error occured while waiting for TXBR to be set: |
bogdanm | 0:9b334a45a8ff | 375 | * has Tx underrun occurred ? |
bogdanm | 0:9b334a45a8ff | 376 | * has Tx error occurred ? |
bogdanm | 0:9b334a45a8ff | 377 | * has Tx Missing Acknowledge error occurred ? |
bogdanm | 0:9b334a45a8ff | 378 | * has Arbitration Loss error occurred ? */ |
bogdanm | 0:9b334a45a8ff | 379 | tempisr = hcec->Instance->ISR; |
bogdanm | 0:9b334a45a8ff | 380 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)) != 0) |
bogdanm | 0:9b334a45a8ff | 381 | { |
bogdanm | 0:9b334a45a8ff | 382 | /* copy ISR for error handling purposes */ |
bogdanm | 0:9b334a45a8ff | 383 | hcec->ErrorCode = tempisr; |
bogdanm | 0:9b334a45a8ff | 384 | /* clear all error flags by default */ |
bogdanm | 0:9b334a45a8ff | 385 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)); |
bogdanm | 0:9b334a45a8ff | 386 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 387 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 388 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 389 | } |
bogdanm | 0:9b334a45a8ff | 390 | } |
bogdanm | 0:9b334a45a8ff | 391 | /* TXBR to clear BEFORE writing TXDR register */ |
bogdanm | 0:9b334a45a8ff | 392 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
bogdanm | 0:9b334a45a8ff | 393 | if (hcec->TxXferCount == 0) |
bogdanm | 0:9b334a45a8ff | 394 | { |
bogdanm | 0:9b334a45a8ff | 395 | /* if last byte transmission, set TX End of Message (TXEOM) bit */ |
bogdanm | 0:9b334a45a8ff | 396 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
bogdanm | 0:9b334a45a8ff | 397 | } |
bogdanm | 0:9b334a45a8ff | 398 | hcec->Instance->TXDR = *pData++; |
bogdanm | 0:9b334a45a8ff | 399 | |
bogdanm | 0:9b334a45a8ff | 400 | /* error check after TX byte write up */ |
bogdanm | 0:9b334a45a8ff | 401 | tempisr = hcec->Instance->ISR; |
bogdanm | 0:9b334a45a8ff | 402 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)) != 0) |
bogdanm | 0:9b334a45a8ff | 403 | { |
bogdanm | 0:9b334a45a8ff | 404 | /* copy ISR for error handling purposes */ |
bogdanm | 0:9b334a45a8ff | 405 | hcec->ErrorCode = tempisr; |
bogdanm | 0:9b334a45a8ff | 406 | /* clear all error flags by default */ |
bogdanm | 0:9b334a45a8ff | 407 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)); |
bogdanm | 0:9b334a45a8ff | 408 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 409 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 410 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 411 | } |
bogdanm | 0:9b334a45a8ff | 412 | } /* end while (while (hcec->TxXferCount > 0)) */ |
bogdanm | 0:9b334a45a8ff | 413 | |
bogdanm | 0:9b334a45a8ff | 414 | |
bogdanm | 0:9b334a45a8ff | 415 | /* if no error up to this point, check that transmission is |
bogdanm | 0:9b334a45a8ff | 416 | * complete, that is wait until TXEOM is reset */ |
bogdanm | 0:9b334a45a8ff | 417 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 418 | |
bogdanm | 0:9b334a45a8ff | 419 | while (HAL_IS_BIT_SET(hcec->Instance->CR, CEC_CR_TXEOM)) |
bogdanm | 0:9b334a45a8ff | 420 | { |
bogdanm | 0:9b334a45a8ff | 421 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 422 | { |
bogdanm | 0:9b334a45a8ff | 423 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 424 | { |
bogdanm | 0:9b334a45a8ff | 425 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 426 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 427 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 428 | } |
bogdanm | 0:9b334a45a8ff | 429 | } |
bogdanm | 0:9b334a45a8ff | 430 | } |
bogdanm | 0:9b334a45a8ff | 431 | |
bogdanm | 0:9b334a45a8ff | 432 | /* Final error check once all bytes have been transmitted */ |
bogdanm | 0:9b334a45a8ff | 433 | tempisr = hcec->Instance->ISR; |
bogdanm | 0:9b334a45a8ff | 434 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0) |
bogdanm | 0:9b334a45a8ff | 435 | { |
bogdanm | 0:9b334a45a8ff | 436 | /* copy ISR for error handling purposes */ |
bogdanm | 0:9b334a45a8ff | 437 | hcec->ErrorCode = tempisr; |
bogdanm | 0:9b334a45a8ff | 438 | /* clear all error flags by default */ |
bogdanm | 0:9b334a45a8ff | 439 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)); |
bogdanm | 0:9b334a45a8ff | 440 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 441 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 442 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 443 | } |
bogdanm | 0:9b334a45a8ff | 444 | |
bogdanm | 0:9b334a45a8ff | 445 | hcec->State = HAL_CEC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 446 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 447 | |
bogdanm | 0:9b334a45a8ff | 448 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 449 | } |
bogdanm | 0:9b334a45a8ff | 450 | else |
bogdanm | 0:9b334a45a8ff | 451 | { |
bogdanm | 0:9b334a45a8ff | 452 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 453 | } |
bogdanm | 0:9b334a45a8ff | 454 | } |
bogdanm | 0:9b334a45a8ff | 455 | |
bogdanm | 0:9b334a45a8ff | 456 | /** |
bogdanm | 0:9b334a45a8ff | 457 | * @brief Receive data in blocking mode. Must be invoked when RXBR has been set. |
bogdanm | 0:9b334a45a8ff | 458 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 459 | * @param pData: pointer to received data buffer. |
bogdanm | 0:9b334a45a8ff | 460 | * @param Timeout: Timeout duration. |
bogdanm | 0:9b334a45a8ff | 461 | * Note that the received data size is not known beforehand, the latter is known |
bogdanm | 0:9b334a45a8ff | 462 | * when the reception is complete and is stored in hcec->RxXferSize. |
bogdanm | 0:9b334a45a8ff | 463 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
bogdanm | 0:9b334a45a8ff | 464 | * If only a header is received, hcec->RxXferSize = 0 |
bogdanm | 0:9b334a45a8ff | 465 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 466 | */ |
bogdanm | 0:9b334a45a8ff | 467 | HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout) |
bogdanm | 0:9b334a45a8ff | 468 | { |
bogdanm | 0:9b334a45a8ff | 469 | uint32_t temp; |
bogdanm | 0:9b334a45a8ff | 470 | uint32_t tickstart = 0; |
bogdanm | 0:9b334a45a8ff | 471 | |
bogdanm | 0:9b334a45a8ff | 472 | if (hcec->State == HAL_CEC_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 473 | { |
bogdanm | 0:9b334a45a8ff | 474 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 475 | if (pData == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 476 | { |
bogdanm | 0:9b334a45a8ff | 477 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 478 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 479 | } |
bogdanm | 0:9b334a45a8ff | 480 | |
bogdanm | 0:9b334a45a8ff | 481 | hcec->RxXferSize = 0; |
bogdanm | 0:9b334a45a8ff | 482 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 483 | __HAL_LOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 484 | |
bogdanm | 0:9b334a45a8ff | 485 | |
bogdanm | 0:9b334a45a8ff | 486 | /* Rx loop until CEC_ISR_RXEND is set */ |
bogdanm | 0:9b334a45a8ff | 487 | while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND)) |
bogdanm | 0:9b334a45a8ff | 488 | { |
bogdanm | 0:9b334a45a8ff | 489 | tickstart = HAL_GetTick(); |
bogdanm | 0:9b334a45a8ff | 490 | /* Wait for next byte to be received */ |
bogdanm | 0:9b334a45a8ff | 491 | while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXBR)) |
bogdanm | 0:9b334a45a8ff | 492 | { |
bogdanm | 0:9b334a45a8ff | 493 | if(Timeout != HAL_MAX_DELAY) |
bogdanm | 0:9b334a45a8ff | 494 | { |
bogdanm | 0:9b334a45a8ff | 495 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
bogdanm | 0:9b334a45a8ff | 496 | { |
bogdanm | 0:9b334a45a8ff | 497 | hcec->State = HAL_CEC_STATE_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 498 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 499 | return HAL_TIMEOUT; |
bogdanm | 0:9b334a45a8ff | 500 | } |
bogdanm | 0:9b334a45a8ff | 501 | } |
bogdanm | 0:9b334a45a8ff | 502 | /* any error so far ? |
bogdanm | 0:9b334a45a8ff | 503 | * has Rx Missing Acknowledge occurred ? |
bogdanm | 0:9b334a45a8ff | 504 | * has Rx Long Bit Period error occurred ? |
bogdanm | 0:9b334a45a8ff | 505 | * has Rx Short Bit Period error occurred ? |
bogdanm | 0:9b334a45a8ff | 506 | * has Rx Bit Rising error occurred ? |
bogdanm | 0:9b334a45a8ff | 507 | * has Rx Overrun error occurred ? */ |
bogdanm | 0:9b334a45a8ff | 508 | temp = (uint32_t) (hcec->Instance->ISR); |
bogdanm | 0:9b334a45a8ff | 509 | if ((temp & (CEC_ISR_RXACKE|CEC_ISR_LBPE|CEC_ISR_SBPE|CEC_ISR_BRE|CEC_ISR_RXOVR)) != 0) |
bogdanm | 0:9b334a45a8ff | 510 | { |
bogdanm | 0:9b334a45a8ff | 511 | /* copy ISR for error handling purposes */ |
bogdanm | 0:9b334a45a8ff | 512 | hcec->ErrorCode = temp; |
bogdanm | 0:9b334a45a8ff | 513 | /* clear all error flags by default */ |
bogdanm | 0:9b334a45a8ff | 514 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_RXACKE|CEC_ISR_LBPE|CEC_ISR_SBPE|CEC_ISR_BRE|CEC_ISR_RXOVR)); |
bogdanm | 0:9b334a45a8ff | 515 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 516 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 517 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 518 | } |
bogdanm | 0:9b334a45a8ff | 519 | } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXBR)) */ |
bogdanm | 0:9b334a45a8ff | 520 | |
bogdanm | 0:9b334a45a8ff | 521 | |
bogdanm | 0:9b334a45a8ff | 522 | /* read received data */ |
bogdanm | 0:9b334a45a8ff | 523 | *pData++ = hcec->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 524 | temp = (uint32_t) (hcec->Instance->ISR); |
bogdanm | 0:9b334a45a8ff | 525 | /* end of message ? */ |
bogdanm | 0:9b334a45a8ff | 526 | if ((temp & CEC_ISR_RXEND) != 0) |
bogdanm | 0:9b334a45a8ff | 527 | { |
bogdanm | 0:9b334a45a8ff | 528 | assert_param(IS_CEC_MSGSIZE(hcec->RxXferSize)); |
bogdanm | 0:9b334a45a8ff | 529 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXEND); |
bogdanm | 0:9b334a45a8ff | 530 | hcec->State = HAL_CEC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 531 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 532 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 533 | } |
bogdanm | 0:9b334a45a8ff | 534 | |
bogdanm | 0:9b334a45a8ff | 535 | /* clear Rx-Byte Received flag */ |
bogdanm | 0:9b334a45a8ff | 536 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXBR); |
bogdanm | 0:9b334a45a8ff | 537 | /* increment payload byte counter */ |
bogdanm | 0:9b334a45a8ff | 538 | hcec->RxXferSize++; |
bogdanm | 0:9b334a45a8ff | 539 | } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND)) */ |
bogdanm | 0:9b334a45a8ff | 540 | |
bogdanm | 0:9b334a45a8ff | 541 | /* if the instructions below are executed, it means RXEND was set when RXBR was |
bogdanm | 0:9b334a45a8ff | 542 | * set for the first time: |
bogdanm | 0:9b334a45a8ff | 543 | * the code within the "while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND))" |
bogdanm | 0:9b334a45a8ff | 544 | * loop has not been executed and this means a single byte has been sent */ |
bogdanm | 0:9b334a45a8ff | 545 | *pData++ = hcec->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 546 | /* only one header is received: RxXferSize is set to 0 (no operand, no opcode) */ |
bogdanm | 0:9b334a45a8ff | 547 | hcec->RxXferSize = 0; |
bogdanm | 0:9b334a45a8ff | 548 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXEND); |
bogdanm | 0:9b334a45a8ff | 549 | |
bogdanm | 0:9b334a45a8ff | 550 | hcec->State = HAL_CEC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 551 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 552 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 553 | } |
bogdanm | 0:9b334a45a8ff | 554 | else |
bogdanm | 0:9b334a45a8ff | 555 | { |
bogdanm | 0:9b334a45a8ff | 556 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 557 | } |
bogdanm | 0:9b334a45a8ff | 558 | } |
bogdanm | 0:9b334a45a8ff | 559 | |
bogdanm | 0:9b334a45a8ff | 560 | |
bogdanm | 0:9b334a45a8ff | 561 | /** |
bogdanm | 0:9b334a45a8ff | 562 | * @brief Send data in interrupt mode |
bogdanm | 0:9b334a45a8ff | 563 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 564 | * @param DestinationAddress: destination logical address |
bogdanm | 0:9b334a45a8ff | 565 | * @param pData: pointer to input byte data buffer |
bogdanm | 0:9b334a45a8ff | 566 | * @param Size: amount of data to be sent in bytes (without counting the header). |
bogdanm | 0:9b334a45a8ff | 567 | * 0 means only the header is sent (ping operation). |
bogdanm | 0:9b334a45a8ff | 568 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
bogdanm | 0:9b334a45a8ff | 569 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 570 | */ |
bogdanm | 0:9b334a45a8ff | 571 | HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size) |
bogdanm | 0:9b334a45a8ff | 572 | { |
bogdanm | 0:9b334a45a8ff | 573 | uint8_t temp = 0; |
bogdanm | 0:9b334a45a8ff | 574 | /* if the IP isn't already busy and if there is no previous transmission |
bogdanm | 0:9b334a45a8ff | 575 | already pending due to arbitration lost */ |
bogdanm | 0:9b334a45a8ff | 576 | if (((hcec->State == HAL_CEC_STATE_READY) || (hcec->State == HAL_CEC_STATE_STANDBY_RX)) |
bogdanm | 0:9b334a45a8ff | 577 | && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
bogdanm | 0:9b334a45a8ff | 578 | { |
bogdanm | 0:9b334a45a8ff | 579 | if((pData == HAL_NULL) && (Size > 0)) |
bogdanm | 0:9b334a45a8ff | 580 | { |
bogdanm | 0:9b334a45a8ff | 581 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 582 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 583 | } |
bogdanm | 0:9b334a45a8ff | 584 | |
bogdanm | 0:9b334a45a8ff | 585 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
bogdanm | 0:9b334a45a8ff | 586 | assert_param(IS_CEC_MSGSIZE(Size)); |
bogdanm | 0:9b334a45a8ff | 587 | |
bogdanm | 0:9b334a45a8ff | 588 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 589 | __HAL_LOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 590 | hcec->pTxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 591 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 592 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 593 | |
bogdanm | 0:9b334a45a8ff | 594 | /* Disable Peripheral to write CEC_IER register */ |
bogdanm | 0:9b334a45a8ff | 595 | __HAL_CEC_DISABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 596 | |
bogdanm | 0:9b334a45a8ff | 597 | /* Enable the following two CEC Transmission interrupts as |
bogdanm | 0:9b334a45a8ff | 598 | * well as the following CEC Transmission Errors interrupts: |
bogdanm | 0:9b334a45a8ff | 599 | * Tx Byte Request IT |
bogdanm | 0:9b334a45a8ff | 600 | * End of Transmission IT |
bogdanm | 0:9b334a45a8ff | 601 | * Tx Missing Acknowledge IT |
bogdanm | 0:9b334a45a8ff | 602 | * Tx-Error IT |
bogdanm | 0:9b334a45a8ff | 603 | * Tx-Buffer Underrun IT |
bogdanm | 0:9b334a45a8ff | 604 | * Tx arbitration lost */ |
bogdanm | 0:9b334a45a8ff | 605 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE|CEC_IER_TX_ALL_ERR); |
bogdanm | 0:9b334a45a8ff | 606 | |
bogdanm | 0:9b334a45a8ff | 607 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 608 | __HAL_CEC_ENABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 609 | |
bogdanm | 0:9b334a45a8ff | 610 | /* initialize the number of bytes to send, |
bogdanm | 0:9b334a45a8ff | 611 | * 0 means only one header is sent (ping operation) */ |
bogdanm | 0:9b334a45a8ff | 612 | hcec->TxXferCount = Size; |
bogdanm | 0:9b334a45a8ff | 613 | |
bogdanm | 0:9b334a45a8ff | 614 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 615 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 616 | |
bogdanm | 0:9b334a45a8ff | 617 | /* in case of no payload (Size = 0), sender is only pinging the system; |
bogdanm | 0:9b334a45a8ff | 618 | * Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ |
bogdanm | 0:9b334a45a8ff | 619 | if (Size == 0) |
bogdanm | 0:9b334a45a8ff | 620 | { |
bogdanm | 0:9b334a45a8ff | 621 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
bogdanm | 0:9b334a45a8ff | 622 | } |
bogdanm | 0:9b334a45a8ff | 623 | |
bogdanm | 0:9b334a45a8ff | 624 | /* send header block */ |
bogdanm | 0:9b334a45a8ff | 625 | temp = (uint8_t)((uint32_t)(hcec->Init.InitiatorAddress) << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
bogdanm | 0:9b334a45a8ff | 626 | hcec->Instance->TXDR = temp; |
bogdanm | 0:9b334a45a8ff | 627 | /* Set TX Start of Message (TXSOM) bit */ |
bogdanm | 0:9b334a45a8ff | 628 | __HAL_CEC_FIRST_BYTE_TX_SET(hcec); |
bogdanm | 0:9b334a45a8ff | 629 | |
bogdanm | 0:9b334a45a8ff | 630 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 631 | } |
bogdanm | 0:9b334a45a8ff | 632 | /* if the IP is already busy or if there is a previous transmission |
bogdanm | 0:9b334a45a8ff | 633 | already pending due to arbitration loss */ |
bogdanm | 0:9b334a45a8ff | 634 | else if ((hcec->State == HAL_CEC_STATE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 635 | || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET)) |
bogdanm | 0:9b334a45a8ff | 636 | { |
bogdanm | 0:9b334a45a8ff | 637 | __HAL_LOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 638 | /* set state to BUSY TX, in case it wasn't set already (case |
bogdanm | 0:9b334a45a8ff | 639 | * of transmission new attempt after arbitration loss) */ |
bogdanm | 0:9b334a45a8ff | 640 | if (hcec->State != HAL_CEC_STATE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 641 | { |
bogdanm | 0:9b334a45a8ff | 642 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 643 | } |
bogdanm | 0:9b334a45a8ff | 644 | |
bogdanm | 0:9b334a45a8ff | 645 | /* if all data have been sent */ |
bogdanm | 0:9b334a45a8ff | 646 | if(hcec->TxXferCount == 0) |
bogdanm | 0:9b334a45a8ff | 647 | { |
bogdanm | 0:9b334a45a8ff | 648 | /* Disable Peripheral to write CEC_IER register */ |
bogdanm | 0:9b334a45a8ff | 649 | __HAL_CEC_DISABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 650 | |
bogdanm | 0:9b334a45a8ff | 651 | /* Disable the CEC Transmission Interrupts */ |
bogdanm | 0:9b334a45a8ff | 652 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE); |
bogdanm | 0:9b334a45a8ff | 653 | /* Disable the CEC Transmission Error Interrupts */ |
bogdanm | 0:9b334a45a8ff | 654 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR); |
bogdanm | 0:9b334a45a8ff | 655 | |
bogdanm | 0:9b334a45a8ff | 656 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 657 | __HAL_CEC_ENABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 658 | |
bogdanm | 0:9b334a45a8ff | 659 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR|CEC_ISR_TXEND); |
bogdanm | 0:9b334a45a8ff | 660 | |
bogdanm | 0:9b334a45a8ff | 661 | hcec->State = HAL_CEC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 662 | /* Call the Process Unlocked before calling the Tx call back API to give the possibility to |
bogdanm | 0:9b334a45a8ff | 663 | start again the Transmission under the Tx call back API */ |
bogdanm | 0:9b334a45a8ff | 664 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 665 | |
bogdanm | 0:9b334a45a8ff | 666 | HAL_CEC_TxCpltCallback(hcec); |
bogdanm | 0:9b334a45a8ff | 667 | |
bogdanm | 0:9b334a45a8ff | 668 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 669 | } |
bogdanm | 0:9b334a45a8ff | 670 | else |
bogdanm | 0:9b334a45a8ff | 671 | { |
bogdanm | 0:9b334a45a8ff | 672 | if (hcec->TxXferCount == 1) |
bogdanm | 0:9b334a45a8ff | 673 | { |
bogdanm | 0:9b334a45a8ff | 674 | /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ |
bogdanm | 0:9b334a45a8ff | 675 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
bogdanm | 0:9b334a45a8ff | 676 | } |
bogdanm | 0:9b334a45a8ff | 677 | /* clear Tx-Byte request flag */ |
bogdanm | 0:9b334a45a8ff | 678 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
bogdanm | 0:9b334a45a8ff | 679 | hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
bogdanm | 0:9b334a45a8ff | 680 | hcec->TxXferCount--; |
bogdanm | 0:9b334a45a8ff | 681 | |
bogdanm | 0:9b334a45a8ff | 682 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 683 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 684 | |
bogdanm | 0:9b334a45a8ff | 685 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 686 | } |
bogdanm | 0:9b334a45a8ff | 687 | } |
bogdanm | 0:9b334a45a8ff | 688 | else |
bogdanm | 0:9b334a45a8ff | 689 | { |
bogdanm | 0:9b334a45a8ff | 690 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 691 | } |
bogdanm | 0:9b334a45a8ff | 692 | } |
bogdanm | 0:9b334a45a8ff | 693 | |
bogdanm | 0:9b334a45a8ff | 694 | |
bogdanm | 0:9b334a45a8ff | 695 | /** |
bogdanm | 0:9b334a45a8ff | 696 | * @brief Receive data in interrupt mode. |
bogdanm | 0:9b334a45a8ff | 697 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 698 | * @param pData: pointer to received data buffer. |
bogdanm | 0:9b334a45a8ff | 699 | * Note that the received data size is not known beforehand, the latter is known |
bogdanm | 0:9b334a45a8ff | 700 | * when the reception is complete and is stored in hcec->RxXferSize. |
bogdanm | 0:9b334a45a8ff | 701 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
bogdanm | 0:9b334a45a8ff | 702 | * If only a header is received, hcec->RxXferSize = 0 |
bogdanm | 0:9b334a45a8ff | 703 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 704 | */ |
bogdanm | 0:9b334a45a8ff | 705 | HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData) |
bogdanm | 0:9b334a45a8ff | 706 | { |
bogdanm | 0:9b334a45a8ff | 707 | if(hcec->State == HAL_CEC_STATE_READY) |
bogdanm | 0:9b334a45a8ff | 708 | { |
bogdanm | 0:9b334a45a8ff | 709 | if(pData == HAL_NULL) |
bogdanm | 0:9b334a45a8ff | 710 | { |
bogdanm | 0:9b334a45a8ff | 711 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 712 | return HAL_ERROR; |
bogdanm | 0:9b334a45a8ff | 713 | } |
bogdanm | 0:9b334a45a8ff | 714 | |
bogdanm | 0:9b334a45a8ff | 715 | /* Process Locked */ |
bogdanm | 0:9b334a45a8ff | 716 | __HAL_LOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 717 | hcec->RxXferSize = 0; |
bogdanm | 0:9b334a45a8ff | 718 | hcec->pRxBuffPtr = pData; |
bogdanm | 0:9b334a45a8ff | 719 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
bogdanm | 0:9b334a45a8ff | 720 | /* the IP is moving to a ready to receive state */ |
bogdanm | 0:9b334a45a8ff | 721 | hcec->State = HAL_CEC_STATE_STANDBY_RX; |
bogdanm | 0:9b334a45a8ff | 722 | |
bogdanm | 0:9b334a45a8ff | 723 | /* Disable Peripheral to write CEC_IER register */ |
bogdanm | 0:9b334a45a8ff | 724 | __HAL_CEC_DISABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 725 | |
bogdanm | 0:9b334a45a8ff | 726 | /* Enable the following CEC Reception Error Interrupts: |
bogdanm | 0:9b334a45a8ff | 727 | * Rx overrun |
bogdanm | 0:9b334a45a8ff | 728 | * Rx bit rising error |
bogdanm | 0:9b334a45a8ff | 729 | * Rx short bit period error |
bogdanm | 0:9b334a45a8ff | 730 | * Rx long bit period error |
bogdanm | 0:9b334a45a8ff | 731 | * Rx missing acknowledge */ |
bogdanm | 0:9b334a45a8ff | 732 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_RX_ALL_ERR); |
bogdanm | 0:9b334a45a8ff | 733 | |
bogdanm | 0:9b334a45a8ff | 734 | /* Process Unlocked */ |
bogdanm | 0:9b334a45a8ff | 735 | __HAL_UNLOCK(hcec); |
bogdanm | 0:9b334a45a8ff | 736 | |
bogdanm | 0:9b334a45a8ff | 737 | /* Enable the following two CEC Reception interrupts: |
bogdanm | 0:9b334a45a8ff | 738 | * Rx Byte Received IT |
bogdanm | 0:9b334a45a8ff | 739 | * End of Reception IT */ |
bogdanm | 0:9b334a45a8ff | 740 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_RXBRIE|CEC_IER_RXENDIE); |
bogdanm | 0:9b334a45a8ff | 741 | |
bogdanm | 0:9b334a45a8ff | 742 | __HAL_CEC_ENABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 743 | |
bogdanm | 0:9b334a45a8ff | 744 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 745 | } |
bogdanm | 0:9b334a45a8ff | 746 | else |
bogdanm | 0:9b334a45a8ff | 747 | { |
bogdanm | 0:9b334a45a8ff | 748 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 749 | } |
bogdanm | 0:9b334a45a8ff | 750 | } |
bogdanm | 0:9b334a45a8ff | 751 | |
bogdanm | 0:9b334a45a8ff | 752 | |
bogdanm | 0:9b334a45a8ff | 753 | |
bogdanm | 0:9b334a45a8ff | 754 | /** |
bogdanm | 0:9b334a45a8ff | 755 | * @brief This function handles CEC interrupt requests. |
bogdanm | 0:9b334a45a8ff | 756 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 757 | * @retval None |
bogdanm | 0:9b334a45a8ff | 758 | */ |
bogdanm | 0:9b334a45a8ff | 759 | void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 760 | { |
bogdanm | 0:9b334a45a8ff | 761 | /* save interrupts register for further error or interrupts handling purposes */ |
bogdanm | 0:9b334a45a8ff | 762 | hcec->ErrorCode = hcec->Instance->ISR; |
bogdanm | 0:9b334a45a8ff | 763 | /* CEC TX missing acknowledge error interrupt occurred -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 764 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXACKEIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 765 | { |
bogdanm | 0:9b334a45a8ff | 766 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXACKE); |
bogdanm | 0:9b334a45a8ff | 767 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 768 | } |
bogdanm | 0:9b334a45a8ff | 769 | |
bogdanm | 0:9b334a45a8ff | 770 | /* CEC transmit error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 771 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXERR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXERRIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 772 | { |
bogdanm | 0:9b334a45a8ff | 773 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXERR); |
bogdanm | 0:9b334a45a8ff | 774 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 775 | } |
bogdanm | 0:9b334a45a8ff | 776 | |
bogdanm | 0:9b334a45a8ff | 777 | /* CEC TX underrun error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 778 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXUDR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXUDRIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 779 | { |
bogdanm | 0:9b334a45a8ff | 780 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXUDR); |
bogdanm | 0:9b334a45a8ff | 781 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 782 | } |
bogdanm | 0:9b334a45a8ff | 783 | |
bogdanm | 0:9b334a45a8ff | 784 | /* CEC TX arbitration error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 785 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_ARBLST) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_ARBLSTIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 786 | { |
bogdanm | 0:9b334a45a8ff | 787 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_ARBLST); |
bogdanm | 0:9b334a45a8ff | 788 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 789 | } |
bogdanm | 0:9b334a45a8ff | 790 | |
bogdanm | 0:9b334a45a8ff | 791 | /* CEC RX overrun error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 792 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXOVR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXOVRIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 793 | { |
bogdanm | 0:9b334a45a8ff | 794 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXOVR); |
bogdanm | 0:9b334a45a8ff | 795 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 796 | } |
bogdanm | 0:9b334a45a8ff | 797 | |
bogdanm | 0:9b334a45a8ff | 798 | /* CEC RX bit rising error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 799 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_BRE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_BREIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 800 | { |
bogdanm | 0:9b334a45a8ff | 801 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_BRE); |
bogdanm | 0:9b334a45a8ff | 802 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 803 | } |
bogdanm | 0:9b334a45a8ff | 804 | |
bogdanm | 0:9b334a45a8ff | 805 | /* CEC RX short bit period error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 806 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_SBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_SBPEIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 807 | { |
bogdanm | 0:9b334a45a8ff | 808 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_SBPE); |
bogdanm | 0:9b334a45a8ff | 809 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 810 | } |
bogdanm | 0:9b334a45a8ff | 811 | |
bogdanm | 0:9b334a45a8ff | 812 | /* CEC RX long bit period error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 813 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_LBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_LBPEIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 814 | { |
bogdanm | 0:9b334a45a8ff | 815 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_LBPE); |
bogdanm | 0:9b334a45a8ff | 816 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 817 | } |
bogdanm | 0:9b334a45a8ff | 818 | |
bogdanm | 0:9b334a45a8ff | 819 | /* CEC RX missing acknowledge error interrupt occured --------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 820 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXACKEIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 821 | { |
bogdanm | 0:9b334a45a8ff | 822 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXACKE); |
bogdanm | 0:9b334a45a8ff | 823 | hcec->State = HAL_CEC_STATE_ERROR; |
bogdanm | 0:9b334a45a8ff | 824 | } |
bogdanm | 0:9b334a45a8ff | 825 | |
bogdanm | 0:9b334a45a8ff | 826 | if ((hcec->ErrorCode & CEC_ISR_ALL_ERROR) != 0) |
bogdanm | 0:9b334a45a8ff | 827 | { |
bogdanm | 0:9b334a45a8ff | 828 | HAL_CEC_ErrorCallback(hcec); |
bogdanm | 0:9b334a45a8ff | 829 | } |
bogdanm | 0:9b334a45a8ff | 830 | |
bogdanm | 0:9b334a45a8ff | 831 | /* CEC RX byte received interrupt ---------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 832 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXBR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXBRIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 833 | { |
bogdanm | 0:9b334a45a8ff | 834 | /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
bogdanm | 0:9b334a45a8ff | 835 | CEC_Receive_IT(hcec); |
bogdanm | 0:9b334a45a8ff | 836 | } |
bogdanm | 0:9b334a45a8ff | 837 | |
bogdanm | 0:9b334a45a8ff | 838 | /* CEC RX end received interrupt ---------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 839 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXEND) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXENDIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 840 | { |
bogdanm | 0:9b334a45a8ff | 841 | /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
bogdanm | 0:9b334a45a8ff | 842 | CEC_Receive_IT(hcec); |
bogdanm | 0:9b334a45a8ff | 843 | } |
bogdanm | 0:9b334a45a8ff | 844 | |
bogdanm | 0:9b334a45a8ff | 845 | |
bogdanm | 0:9b334a45a8ff | 846 | /* CEC TX byte request interrupt ------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 847 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXBR) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXBRIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 848 | { |
bogdanm | 0:9b334a45a8ff | 849 | /* TXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
bogdanm | 0:9b334a45a8ff | 850 | CEC_Transmit_IT(hcec); |
bogdanm | 0:9b334a45a8ff | 851 | } |
bogdanm | 0:9b334a45a8ff | 852 | |
bogdanm | 0:9b334a45a8ff | 853 | /* CEC TX end interrupt ------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 854 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXEND) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXENDIE) != RESET)) |
bogdanm | 0:9b334a45a8ff | 855 | { |
bogdanm | 0:9b334a45a8ff | 856 | /* TXEND IT is cleared during HAL_CEC_Transmit_IT processing */ |
bogdanm | 0:9b334a45a8ff | 857 | CEC_Transmit_IT(hcec); |
bogdanm | 0:9b334a45a8ff | 858 | } |
bogdanm | 0:9b334a45a8ff | 859 | |
bogdanm | 0:9b334a45a8ff | 860 | } |
bogdanm | 0:9b334a45a8ff | 861 | |
bogdanm | 0:9b334a45a8ff | 862 | |
bogdanm | 0:9b334a45a8ff | 863 | /** |
bogdanm | 0:9b334a45a8ff | 864 | * @brief Tx Transfer completed callback |
bogdanm | 0:9b334a45a8ff | 865 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 866 | * @retval None |
bogdanm | 0:9b334a45a8ff | 867 | */ |
bogdanm | 0:9b334a45a8ff | 868 | __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 869 | { |
bogdanm | 0:9b334a45a8ff | 870 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 871 | the HAL_CEC_TxCpltCallback can be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 872 | */ |
bogdanm | 0:9b334a45a8ff | 873 | } |
bogdanm | 0:9b334a45a8ff | 874 | |
bogdanm | 0:9b334a45a8ff | 875 | /** |
bogdanm | 0:9b334a45a8ff | 876 | * @brief Rx Transfer completed callback |
bogdanm | 0:9b334a45a8ff | 877 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 878 | * @retval None |
bogdanm | 0:9b334a45a8ff | 879 | */ |
bogdanm | 0:9b334a45a8ff | 880 | __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 881 | { |
bogdanm | 0:9b334a45a8ff | 882 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 883 | the HAL_CEC_TxCpltCallback can be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 884 | */ |
bogdanm | 0:9b334a45a8ff | 885 | } |
bogdanm | 0:9b334a45a8ff | 886 | |
bogdanm | 0:9b334a45a8ff | 887 | /** |
bogdanm | 0:9b334a45a8ff | 888 | * @brief CEC error callbacks |
bogdanm | 0:9b334a45a8ff | 889 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 890 | * @retval None |
bogdanm | 0:9b334a45a8ff | 891 | */ |
bogdanm | 0:9b334a45a8ff | 892 | __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 893 | { |
bogdanm | 0:9b334a45a8ff | 894 | /* NOTE : This function should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 895 | the HAL_CEC_ErrorCallback can be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 896 | */ |
bogdanm | 0:9b334a45a8ff | 897 | } |
bogdanm | 0:9b334a45a8ff | 898 | |
bogdanm | 0:9b334a45a8ff | 899 | /** |
bogdanm | 0:9b334a45a8ff | 900 | * @} |
bogdanm | 0:9b334a45a8ff | 901 | */ |
bogdanm | 0:9b334a45a8ff | 902 | |
bogdanm | 0:9b334a45a8ff | 903 | /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 904 | * @brief CEC control functions |
bogdanm | 0:9b334a45a8ff | 905 | * |
bogdanm | 0:9b334a45a8ff | 906 | @verbatim |
bogdanm | 0:9b334a45a8ff | 907 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 908 | ##### Peripheral Control functions ##### |
bogdanm | 0:9b334a45a8ff | 909 | =============================================================================== |
bogdanm | 0:9b334a45a8ff | 910 | [..] |
bogdanm | 0:9b334a45a8ff | 911 | This subsection provides a set of functions allowing to control the CEC. |
bogdanm | 0:9b334a45a8ff | 912 | (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. |
bogdanm | 0:9b334a45a8ff | 913 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 914 | * @{ |
bogdanm | 0:9b334a45a8ff | 915 | */ |
bogdanm | 0:9b334a45a8ff | 916 | |
bogdanm | 0:9b334a45a8ff | 917 | |
bogdanm | 0:9b334a45a8ff | 918 | |
bogdanm | 0:9b334a45a8ff | 919 | |
bogdanm | 0:9b334a45a8ff | 920 | |
bogdanm | 0:9b334a45a8ff | 921 | /** |
bogdanm | 0:9b334a45a8ff | 922 | * @brief return the CEC state |
bogdanm | 0:9b334a45a8ff | 923 | * @param hcec: CEC handle |
bogdanm | 0:9b334a45a8ff | 924 | * @retval HAL state |
bogdanm | 0:9b334a45a8ff | 925 | */ |
bogdanm | 0:9b334a45a8ff | 926 | HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 927 | { |
bogdanm | 0:9b334a45a8ff | 928 | return hcec->State; |
bogdanm | 0:9b334a45a8ff | 929 | } |
bogdanm | 0:9b334a45a8ff | 930 | |
bogdanm | 0:9b334a45a8ff | 931 | /** |
bogdanm | 0:9b334a45a8ff | 932 | * @brief Return the CEC error code |
bogdanm | 0:9b334a45a8ff | 933 | * @param hcec : pointer to a CEC_HandleTypeDef structure that contains |
bogdanm | 0:9b334a45a8ff | 934 | * the configuration information for the specified CEC. |
bogdanm | 0:9b334a45a8ff | 935 | * @retval CEC Error Code |
bogdanm | 0:9b334a45a8ff | 936 | */ |
bogdanm | 0:9b334a45a8ff | 937 | uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 938 | { |
bogdanm | 0:9b334a45a8ff | 939 | return hcec->ErrorCode; |
bogdanm | 0:9b334a45a8ff | 940 | } |
bogdanm | 0:9b334a45a8ff | 941 | |
bogdanm | 0:9b334a45a8ff | 942 | /** |
bogdanm | 0:9b334a45a8ff | 943 | * @} |
bogdanm | 0:9b334a45a8ff | 944 | */ |
bogdanm | 0:9b334a45a8ff | 945 | |
bogdanm | 0:9b334a45a8ff | 946 | /** |
bogdanm | 0:9b334a45a8ff | 947 | * @} |
bogdanm | 0:9b334a45a8ff | 948 | */ |
bogdanm | 0:9b334a45a8ff | 949 | |
bogdanm | 0:9b334a45a8ff | 950 | /** @defgroup CEC_Private_Functions CEC Private Functions |
bogdanm | 0:9b334a45a8ff | 951 | * @{ |
bogdanm | 0:9b334a45a8ff | 952 | */ |
bogdanm | 0:9b334a45a8ff | 953 | |
bogdanm | 0:9b334a45a8ff | 954 | /** |
bogdanm | 0:9b334a45a8ff | 955 | * @brief Send data in interrupt mode |
bogdanm | 0:9b334a45a8ff | 956 | * @param hcec: CEC handle. |
bogdanm | 0:9b334a45a8ff | 957 | * Function called under interruption only, once |
bogdanm | 0:9b334a45a8ff | 958 | * interruptions have been enabled by HAL_CEC_Transmit_IT() |
bogdanm | 0:9b334a45a8ff | 959 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 960 | */ |
bogdanm | 0:9b334a45a8ff | 961 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 962 | { |
bogdanm | 0:9b334a45a8ff | 963 | /* if the IP is already busy or if there is a previous transmission |
bogdanm | 0:9b334a45a8ff | 964 | already pending due to arbitration loss */ |
bogdanm | 0:9b334a45a8ff | 965 | if ((hcec->State == HAL_CEC_STATE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 966 | || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET)) |
bogdanm | 0:9b334a45a8ff | 967 | { |
bogdanm | 0:9b334a45a8ff | 968 | |
bogdanm | 0:9b334a45a8ff | 969 | /* set state to BUSY TX, in case it wasn't set already (case |
bogdanm | 0:9b334a45a8ff | 970 | * of transmission new attempt after arbitration loss) */ |
bogdanm | 0:9b334a45a8ff | 971 | if (hcec->State != HAL_CEC_STATE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 972 | { |
bogdanm | 0:9b334a45a8ff | 973 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
bogdanm | 0:9b334a45a8ff | 974 | } |
bogdanm | 0:9b334a45a8ff | 975 | |
bogdanm | 0:9b334a45a8ff | 976 | /* if all data have been sent */ |
bogdanm | 0:9b334a45a8ff | 977 | if(hcec->TxXferCount == 0) |
bogdanm | 0:9b334a45a8ff | 978 | { |
bogdanm | 0:9b334a45a8ff | 979 | /* Disable Peripheral to write CEC_IER register */ |
bogdanm | 0:9b334a45a8ff | 980 | __HAL_CEC_DISABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 981 | |
bogdanm | 0:9b334a45a8ff | 982 | /* Disable the CEC Transmission Interrupts */ |
bogdanm | 0:9b334a45a8ff | 983 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE); |
bogdanm | 0:9b334a45a8ff | 984 | /* Disable the CEC Transmission Error Interrupts */ |
bogdanm | 0:9b334a45a8ff | 985 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR); |
bogdanm | 0:9b334a45a8ff | 986 | |
bogdanm | 0:9b334a45a8ff | 987 | /* Enable the Peripheral */ |
bogdanm | 0:9b334a45a8ff | 988 | __HAL_CEC_ENABLE(hcec); |
bogdanm | 0:9b334a45a8ff | 989 | |
bogdanm | 0:9b334a45a8ff | 990 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR|CEC_ISR_TXEND); |
bogdanm | 0:9b334a45a8ff | 991 | |
bogdanm | 0:9b334a45a8ff | 992 | hcec->State = HAL_CEC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 993 | |
bogdanm | 0:9b334a45a8ff | 994 | HAL_CEC_TxCpltCallback(hcec); |
bogdanm | 0:9b334a45a8ff | 995 | |
bogdanm | 0:9b334a45a8ff | 996 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 997 | } |
bogdanm | 0:9b334a45a8ff | 998 | else |
bogdanm | 0:9b334a45a8ff | 999 | { |
bogdanm | 0:9b334a45a8ff | 1000 | if (hcec->TxXferCount == 1) |
bogdanm | 0:9b334a45a8ff | 1001 | { |
bogdanm | 0:9b334a45a8ff | 1002 | /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ |
bogdanm | 0:9b334a45a8ff | 1003 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
bogdanm | 0:9b334a45a8ff | 1004 | } |
bogdanm | 0:9b334a45a8ff | 1005 | /* clear Tx-Byte request flag */ |
bogdanm | 0:9b334a45a8ff | 1006 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
bogdanm | 0:9b334a45a8ff | 1007 | hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
bogdanm | 0:9b334a45a8ff | 1008 | hcec->TxXferCount--; |
bogdanm | 0:9b334a45a8ff | 1009 | |
bogdanm | 0:9b334a45a8ff | 1010 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1011 | } |
bogdanm | 0:9b334a45a8ff | 1012 | } |
bogdanm | 0:9b334a45a8ff | 1013 | else |
bogdanm | 0:9b334a45a8ff | 1014 | { |
bogdanm | 0:9b334a45a8ff | 1015 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1016 | } |
bogdanm | 0:9b334a45a8ff | 1017 | } |
bogdanm | 0:9b334a45a8ff | 1018 | |
bogdanm | 0:9b334a45a8ff | 1019 | |
bogdanm | 0:9b334a45a8ff | 1020 | /** |
bogdanm | 0:9b334a45a8ff | 1021 | * @brief Receive data in interrupt mode. |
bogdanm | 0:9b334a45a8ff | 1022 | * @param hcec: CEC handle. |
bogdanm | 0:9b334a45a8ff | 1023 | * Function called under interruption only, once |
bogdanm | 0:9b334a45a8ff | 1024 | * interruptions have been enabled by HAL_CEC_Receive_IT() |
bogdanm | 0:9b334a45a8ff | 1025 | * @retval HAL status |
bogdanm | 0:9b334a45a8ff | 1026 | */ |
bogdanm | 0:9b334a45a8ff | 1027 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec) |
bogdanm | 0:9b334a45a8ff | 1028 | { |
bogdanm | 0:9b334a45a8ff | 1029 | uint32_t tempisr; |
bogdanm | 0:9b334a45a8ff | 1030 | |
bogdanm | 0:9b334a45a8ff | 1031 | /* Three different conditions are tested to carry out the RX IT processing: |
bogdanm | 0:9b334a45a8ff | 1032 | * - the IP is in reception stand-by (the IP state is HAL_CEC_STATE_STANDBY_RX) and |
bogdanm | 0:9b334a45a8ff | 1033 | * the reception of the first byte is starting |
bogdanm | 0:9b334a45a8ff | 1034 | * - a message reception is already on-going (the IP state is HAL_CEC_STATE_BUSY_RX) |
bogdanm | 0:9b334a45a8ff | 1035 | * and a new byte is being received |
bogdanm | 0:9b334a45a8ff | 1036 | * - a transmission has just been started (the IP state is HAL_CEC_STATE_BUSY_TX) |
bogdanm | 0:9b334a45a8ff | 1037 | * but has been interrupted by a new message reception or discarded due to |
bogdanm | 0:9b334a45a8ff | 1038 | * arbitration loss: the reception of the first or higher priority message |
bogdanm | 0:9b334a45a8ff | 1039 | * (the arbitration winner) is starting */ |
bogdanm | 0:9b334a45a8ff | 1040 | if ((hcec->State == HAL_CEC_STATE_STANDBY_RX) |
bogdanm | 0:9b334a45a8ff | 1041 | || (hcec->State == HAL_CEC_STATE_BUSY_RX) |
bogdanm | 0:9b334a45a8ff | 1042 | || (hcec->State == HAL_CEC_STATE_BUSY_TX)) |
bogdanm | 0:9b334a45a8ff | 1043 | { |
bogdanm | 0:9b334a45a8ff | 1044 | /* reception is starting */ |
bogdanm | 0:9b334a45a8ff | 1045 | hcec->State = HAL_CEC_STATE_BUSY_RX; |
bogdanm | 0:9b334a45a8ff | 1046 | tempisr = (uint32_t) (hcec->Instance->ISR); |
bogdanm | 0:9b334a45a8ff | 1047 | if ((tempisr & CEC_ISR_RXBR) != 0) |
bogdanm | 0:9b334a45a8ff | 1048 | { |
bogdanm | 0:9b334a45a8ff | 1049 | /* read received byte */ |
bogdanm | 0:9b334a45a8ff | 1050 | *hcec->pRxBuffPtr++ = hcec->Instance->RXDR; |
bogdanm | 0:9b334a45a8ff | 1051 | /* if last byte has been received */ |
bogdanm | 0:9b334a45a8ff | 1052 | if ((tempisr & CEC_ISR_RXEND) != 0) |
bogdanm | 0:9b334a45a8ff | 1053 | { |
bogdanm | 0:9b334a45a8ff | 1054 | /* clear IT */ |
bogdanm | 0:9b334a45a8ff | 1055 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXBR|CEC_ISR_RXEND); |
bogdanm | 0:9b334a45a8ff | 1056 | /* RX interrupts are not disabled at this point. |
bogdanm | 0:9b334a45a8ff | 1057 | * Indeed, to disable the IT, the IP must be disabled first |
bogdanm | 0:9b334a45a8ff | 1058 | * which resets the TXSOM flag. In case of arbitration loss, |
bogdanm | 0:9b334a45a8ff | 1059 | * this leads to a transmission abort. |
bogdanm | 0:9b334a45a8ff | 1060 | * Therefore, RX interruptions disabling if so required, |
bogdanm | 0:9b334a45a8ff | 1061 | * is done in HAL_CEC_RxCpltCallback */ |
bogdanm | 0:9b334a45a8ff | 1062 | |
bogdanm | 0:9b334a45a8ff | 1063 | /* IP state is moved to READY. |
bogdanm | 0:9b334a45a8ff | 1064 | * If the IP must remain in standby mode to listen |
bogdanm | 0:9b334a45a8ff | 1065 | * any new message, it is up to HAL_CEC_RxCpltCallback |
bogdanm | 0:9b334a45a8ff | 1066 | * to move it again to HAL_CEC_STATE_STANDBY_RX */ |
bogdanm | 0:9b334a45a8ff | 1067 | hcec->State = HAL_CEC_STATE_READY; |
bogdanm | 0:9b334a45a8ff | 1068 | |
bogdanm | 0:9b334a45a8ff | 1069 | HAL_CEC_RxCpltCallback(hcec); |
bogdanm | 0:9b334a45a8ff | 1070 | |
bogdanm | 0:9b334a45a8ff | 1071 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1072 | } |
bogdanm | 0:9b334a45a8ff | 1073 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXBR); |
bogdanm | 0:9b334a45a8ff | 1074 | |
bogdanm | 0:9b334a45a8ff | 1075 | hcec->RxXferSize++; |
bogdanm | 0:9b334a45a8ff | 1076 | |
bogdanm | 0:9b334a45a8ff | 1077 | return HAL_OK; |
bogdanm | 0:9b334a45a8ff | 1078 | } |
bogdanm | 0:9b334a45a8ff | 1079 | else |
bogdanm | 0:9b334a45a8ff | 1080 | { |
bogdanm | 0:9b334a45a8ff | 1081 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1082 | } |
bogdanm | 0:9b334a45a8ff | 1083 | } |
bogdanm | 0:9b334a45a8ff | 1084 | else |
bogdanm | 0:9b334a45a8ff | 1085 | { |
bogdanm | 0:9b334a45a8ff | 1086 | return HAL_BUSY; |
bogdanm | 0:9b334a45a8ff | 1087 | } |
bogdanm | 0:9b334a45a8ff | 1088 | } |
bogdanm | 0:9b334a45a8ff | 1089 | |
bogdanm | 0:9b334a45a8ff | 1090 | /** |
bogdanm | 0:9b334a45a8ff | 1091 | * @} |
bogdanm | 0:9b334a45a8ff | 1092 | */ |
bogdanm | 0:9b334a45a8ff | 1093 | |
bogdanm | 0:9b334a45a8ff | 1094 | /** |
bogdanm | 0:9b334a45a8ff | 1095 | * @} |
bogdanm | 0:9b334a45a8ff | 1096 | */ |
bogdanm | 0:9b334a45a8ff | 1097 | |
bogdanm | 0:9b334a45a8ff | 1098 | #endif /* defined(STM32F373xC) || defined(STM32F378xx) */ |
bogdanm | 0:9b334a45a8ff | 1099 | |
bogdanm | 0:9b334a45a8ff | 1100 | #endif /* HAL_CEC_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 1101 | /** |
bogdanm | 0:9b334a45a8ff | 1102 | * @} |
bogdanm | 0:9b334a45a8ff | 1103 | */ |
bogdanm | 0:9b334a45a8ff | 1104 | |
bogdanm | 0:9b334a45a8ff | 1105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |