en 129
fix LPC812 PWM
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mbed-dev
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_flash_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 124:6a4a5b7d7324
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal_flash_ex.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| mbed_official | 124:6a4a5b7d7324 | 5 | * @version V1.0.4 |
| mbed_official | 124:6a4a5b7d7324 | 6 | * @date 29-April-2016 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of Flash HAL Extended module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| mbed_official | 124:6a4a5b7d7324 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F1xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F1xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f1xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F1xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup FLASHEx |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /** @addtogroup FLASHEx_Private_Constants |
| bogdanm | 0:9b334a45a8ff | 58 | * @{ |
| bogdanm | 0:9b334a45a8ff | 59 | */ |
| bogdanm | 0:9b334a45a8ff | 60 | |
| bogdanm | 0:9b334a45a8ff | 61 | #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0) |
| bogdanm | 0:9b334a45a8ff | 62 | #define OBR_REG_INDEX ((uint32_t)1) |
| bogdanm | 0:9b334a45a8ff | 63 | #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) |
| bogdanm | 0:9b334a45a8ff | 64 | |
| bogdanm | 0:9b334a45a8ff | 65 | /** |
| bogdanm | 0:9b334a45a8ff | 66 | * @} |
| bogdanm | 0:9b334a45a8ff | 67 | */ |
| bogdanm | 0:9b334a45a8ff | 68 | |
| bogdanm | 0:9b334a45a8ff | 69 | /** @addtogroup FLASHEx_Private_Macros |
| bogdanm | 0:9b334a45a8ff | 70 | * @{ |
| bogdanm | 0:9b334a45a8ff | 71 | */ |
| bogdanm | 0:9b334a45a8ff | 72 | |
| mbed_official | 124:6a4a5b7d7324 | 73 | #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| bogdanm | 0:9b334a45a8ff | 74 | |
| bogdanm | 0:9b334a45a8ff | 75 | #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) |
| bogdanm | 0:9b334a45a8ff | 76 | |
| bogdanm | 0:9b334a45a8ff | 77 | #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 78 | |
| bogdanm | 0:9b334a45a8ff | 79 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) |
| bogdanm | 0:9b334a45a8ff | 80 | |
| bogdanm | 0:9b334a45a8ff | 81 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) |
| bogdanm | 0:9b334a45a8ff | 82 | |
| bogdanm | 0:9b334a45a8ff | 83 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| bogdanm | 0:9b334a45a8ff | 84 | |
| bogdanm | 0:9b334a45a8ff | 85 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| bogdanm | 0:9b334a45a8ff | 86 | |
| bogdanm | 0:9b334a45a8ff | 87 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| bogdanm | 0:9b334a45a8ff | 88 | |
| mbed_official | 124:6a4a5b7d7324 | 89 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 90 | #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) |
| mbed_official | 124:6a4a5b7d7324 | 91 | #endif /* FLASH_BANK2_END */ |
| bogdanm | 0:9b334a45a8ff | 92 | |
| bogdanm | 0:9b334a45a8ff | 93 | /* Low Density */ |
| mbed_official | 124:6a4a5b7d7324 | 94 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) |
| bogdanm | 0:9b334a45a8ff | 95 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ |
| bogdanm | 0:9b334a45a8ff | 96 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)) |
| bogdanm | 0:9b334a45a8ff | 97 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| bogdanm | 0:9b334a45a8ff | 98 | |
| bogdanm | 0:9b334a45a8ff | 99 | /* Medium Density */ |
| mbed_official | 124:6a4a5b7d7324 | 100 | #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
| bogdanm | 0:9b334a45a8ff | 101 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ |
| bogdanm | 0:9b334a45a8ff | 102 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \ |
| bogdanm | 0:9b334a45a8ff | 103 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ |
| bogdanm | 0:9b334a45a8ff | 104 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)))) |
| bogdanm | 0:9b334a45a8ff | 105 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
| bogdanm | 0:9b334a45a8ff | 106 | |
| bogdanm | 0:9b334a45a8ff | 107 | /* High Density */ |
| mbed_official | 124:6a4a5b7d7324 | 108 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) |
| bogdanm | 0:9b334a45a8ff | 109 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \ |
| bogdanm | 0:9b334a45a8ff | 110 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \ |
| bogdanm | 0:9b334a45a8ff | 111 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF))) |
| bogdanm | 0:9b334a45a8ff | 112 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
| bogdanm | 0:9b334a45a8ff | 113 | |
| bogdanm | 0:9b334a45a8ff | 114 | /* XL Density */ |
| mbed_official | 124:6a4a5b7d7324 | 115 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 116 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \ |
| bogdanm | 0:9b334a45a8ff | 117 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF)) |
| mbed_official | 124:6a4a5b7d7324 | 118 | #endif /* FLASH_BANK2_END */ |
| bogdanm | 0:9b334a45a8ff | 119 | |
| bogdanm | 0:9b334a45a8ff | 120 | /* Connectivity Line */ |
| mbed_official | 124:6a4a5b7d7324 | 121 | #if (defined(STM32F105xC) || defined(STM32F107xC)) |
| bogdanm | 0:9b334a45a8ff | 122 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \ |
| bogdanm | 0:9b334a45a8ff | 123 | (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ |
| bogdanm | 0:9b334a45a8ff | 124 | ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF))) |
| bogdanm | 0:9b334a45a8ff | 125 | #endif /* STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 126 | |
| bogdanm | 0:9b334a45a8ff | 127 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000)) |
| bogdanm | 0:9b334a45a8ff | 128 | |
| mbed_official | 124:6a4a5b7d7324 | 129 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 130 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
| bogdanm | 0:9b334a45a8ff | 131 | ((BANK) == FLASH_BANK_2) || \ |
| bogdanm | 0:9b334a45a8ff | 132 | ((BANK) == FLASH_BANK_BOTH)) |
| bogdanm | 0:9b334a45a8ff | 133 | #else |
| bogdanm | 0:9b334a45a8ff | 134 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
| mbed_official | 124:6a4a5b7d7324 | 135 | #endif /* FLASH_BANK2_END */ |
| bogdanm | 0:9b334a45a8ff | 136 | |
| bogdanm | 0:9b334a45a8ff | 137 | /* Low Density */ |
| mbed_official | 124:6a4a5b7d7324 | 138 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) |
| bogdanm | 0:9b334a45a8ff | 139 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ |
| bogdanm | 0:9b334a45a8ff | 140 | ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF))) |
| bogdanm | 0:9b334a45a8ff | 141 | |
| bogdanm | 0:9b334a45a8ff | 142 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| bogdanm | 0:9b334a45a8ff | 143 | |
| bogdanm | 0:9b334a45a8ff | 144 | /* Medium Density */ |
| mbed_official | 124:6a4a5b7d7324 | 145 | #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
| bogdanm | 0:9b334a45a8ff | 146 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ |
| bogdanm | 0:9b334a45a8ff | 147 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \ |
| bogdanm | 0:9b334a45a8ff | 148 | ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ |
| bogdanm | 0:9b334a45a8ff | 149 | ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF))))) |
| bogdanm | 0:9b334a45a8ff | 150 | |
| bogdanm | 0:9b334a45a8ff | 151 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
| bogdanm | 0:9b334a45a8ff | 152 | |
| bogdanm | 0:9b334a45a8ff | 153 | /* High Density */ |
| mbed_official | 124:6a4a5b7d7324 | 154 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) |
| bogdanm | 0:9b334a45a8ff | 155 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \ |
| bogdanm | 0:9b334a45a8ff | 156 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \ |
| bogdanm | 0:9b334a45a8ff | 157 | ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF)))) |
| bogdanm | 0:9b334a45a8ff | 158 | |
| bogdanm | 0:9b334a45a8ff | 159 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
| bogdanm | 0:9b334a45a8ff | 160 | |
| bogdanm | 0:9b334a45a8ff | 161 | /* XL Density */ |
| mbed_official | 124:6a4a5b7d7324 | 162 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 163 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \ |
| bogdanm | 0:9b334a45a8ff | 164 | ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF))) |
| bogdanm | 0:9b334a45a8ff | 165 | |
| mbed_official | 124:6a4a5b7d7324 | 166 | #endif /* FLASH_BANK2_END */ |
| bogdanm | 0:9b334a45a8ff | 167 | |
| bogdanm | 0:9b334a45a8ff | 168 | /* Connectivity Line */ |
| mbed_official | 124:6a4a5b7d7324 | 169 | #if (defined(STM32F105xC) || defined(STM32F107xC)) |
| bogdanm | 0:9b334a45a8ff | 170 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \ |
| bogdanm | 0:9b334a45a8ff | 171 | ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ |
| bogdanm | 0:9b334a45a8ff | 172 | ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF)))) |
| bogdanm | 0:9b334a45a8ff | 173 | |
| bogdanm | 0:9b334a45a8ff | 174 | #endif /* STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 175 | |
| bogdanm | 0:9b334a45a8ff | 176 | /** |
| bogdanm | 0:9b334a45a8ff | 177 | * @} |
| bogdanm | 0:9b334a45a8ff | 178 | */ |
| bogdanm | 0:9b334a45a8ff | 179 | |
| bogdanm | 0:9b334a45a8ff | 180 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 181 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
| bogdanm | 0:9b334a45a8ff | 182 | * @{ |
| bogdanm | 0:9b334a45a8ff | 183 | */ |
| bogdanm | 0:9b334a45a8ff | 184 | |
| bogdanm | 0:9b334a45a8ff | 185 | /** |
| bogdanm | 0:9b334a45a8ff | 186 | * @brief FLASH Erase structure definition |
| bogdanm | 0:9b334a45a8ff | 187 | */ |
| bogdanm | 0:9b334a45a8ff | 188 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 189 | { |
| bogdanm | 0:9b334a45a8ff | 190 | uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. |
| bogdanm | 0:9b334a45a8ff | 191 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| bogdanm | 0:9b334a45a8ff | 192 | |
| bogdanm | 0:9b334a45a8ff | 193 | uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. |
| bogdanm | 0:9b334a45a8ff | 194 | This parameter must be a value of @ref FLASHEx_Banks */ |
| bogdanm | 0:9b334a45a8ff | 195 | |
| bogdanm | 0:9b334a45a8ff | 196 | uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled |
| bogdanm | 0:9b334a45a8ff | 197 | This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END |
| bogdanm | 0:9b334a45a8ff | 198 | (x = 1 or 2 depending on devices)*/ |
| bogdanm | 0:9b334a45a8ff | 199 | |
| bogdanm | 0:9b334a45a8ff | 200 | uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. |
| bogdanm | 0:9b334a45a8ff | 201 | This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ |
| bogdanm | 0:9b334a45a8ff | 202 | |
| bogdanm | 0:9b334a45a8ff | 203 | } FLASH_EraseInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 204 | |
| bogdanm | 0:9b334a45a8ff | 205 | /** |
| bogdanm | 0:9b334a45a8ff | 206 | * @brief FLASH Options bytes program structure definition |
| bogdanm | 0:9b334a45a8ff | 207 | */ |
| bogdanm | 0:9b334a45a8ff | 208 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 209 | { |
| bogdanm | 0:9b334a45a8ff | 210 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
| bogdanm | 0:9b334a45a8ff | 211 | This parameter can be a value of @ref FLASHEx_OB_Type */ |
| bogdanm | 0:9b334a45a8ff | 212 | |
| bogdanm | 0:9b334a45a8ff | 213 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
| bogdanm | 0:9b334a45a8ff | 214 | This parameter can be a value of @ref FLASHEx_OB_WRP_State */ |
| bogdanm | 0:9b334a45a8ff | 215 | |
| bogdanm | 0:9b334a45a8ff | 216 | uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected |
| bogdanm | 0:9b334a45a8ff | 217 | This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ |
| bogdanm | 0:9b334a45a8ff | 218 | |
| bogdanm | 0:9b334a45a8ff | 219 | uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. |
| bogdanm | 0:9b334a45a8ff | 220 | This parameter must be a value of @ref FLASHEx_Banks */ |
| bogdanm | 0:9b334a45a8ff | 221 | |
| bogdanm | 0:9b334a45a8ff | 222 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
| bogdanm | 0:9b334a45a8ff | 223 | This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ |
| bogdanm | 0:9b334a45a8ff | 224 | |
| mbed_official | 124:6a4a5b7d7324 | 225 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 226 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
| bogdanm | 0:9b334a45a8ff | 227 | IWDG / STOP / STDBY / BOOT1 |
| bogdanm | 0:9b334a45a8ff | 228 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
| bogdanm | 0:9b334a45a8ff | 229 | @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ |
| bogdanm | 0:9b334a45a8ff | 230 | #else |
| bogdanm | 0:9b334a45a8ff | 231 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
| bogdanm | 0:9b334a45a8ff | 232 | IWDG / STOP / STDBY |
| bogdanm | 0:9b334a45a8ff | 233 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
| bogdanm | 0:9b334a45a8ff | 234 | @ref FLASHEx_OB_nRST_STDBY */ |
| mbed_official | 124:6a4a5b7d7324 | 235 | #endif /* FLASH_BANK2_END */ |
| bogdanm | 0:9b334a45a8ff | 236 | |
| mbed_official | 124:6a4a5b7d7324 | 237 | uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed |
| bogdanm | 0:9b334a45a8ff | 238 | This parameter can be a value of @ref FLASHEx_OB_Data_Address */ |
| bogdanm | 0:9b334a45a8ff | 239 | |
| bogdanm | 0:9b334a45a8ff | 240 | uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA |
| bogdanm | 0:9b334a45a8ff | 241 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| bogdanm | 0:9b334a45a8ff | 242 | } FLASH_OBProgramInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 243 | |
| bogdanm | 0:9b334a45a8ff | 244 | /** |
| bogdanm | 0:9b334a45a8ff | 245 | * @} |
| bogdanm | 0:9b334a45a8ff | 246 | */ |
| bogdanm | 0:9b334a45a8ff | 247 | |
| bogdanm | 0:9b334a45a8ff | 248 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 249 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
| bogdanm | 0:9b334a45a8ff | 250 | * @{ |
| bogdanm | 0:9b334a45a8ff | 251 | */ |
| bogdanm | 0:9b334a45a8ff | 252 | |
| bogdanm | 0:9b334a45a8ff | 253 | /** @defgroup FLASHEx_Constants FLASH Constants |
| bogdanm | 0:9b334a45a8ff | 254 | * @{ |
| bogdanm | 0:9b334a45a8ff | 255 | */ |
| bogdanm | 0:9b334a45a8ff | 256 | |
| bogdanm | 0:9b334a45a8ff | 257 | /** @defgroup FLASHEx_Page_Size Page Size |
| bogdanm | 0:9b334a45a8ff | 258 | * @{ |
| bogdanm | 0:9b334a45a8ff | 259 | */ |
| mbed_official | 124:6a4a5b7d7324 | 260 | #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) |
| bogdanm | 0:9b334a45a8ff | 261 | #define FLASH_PAGE_SIZE ((uint32_t)0x400) |
| bogdanm | 0:9b334a45a8ff | 262 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| bogdanm | 0:9b334a45a8ff | 263 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| bogdanm | 0:9b334a45a8ff | 264 | |
| mbed_official | 124:6a4a5b7d7324 | 265 | #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)) |
| bogdanm | 0:9b334a45a8ff | 266 | #define FLASH_PAGE_SIZE ((uint32_t)0x800) |
| bogdanm | 0:9b334a45a8ff | 267 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| bogdanm | 0:9b334a45a8ff | 268 | /* STM32F101xG || STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 269 | /* STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 270 | |
| bogdanm | 0:9b334a45a8ff | 271 | /** |
| bogdanm | 0:9b334a45a8ff | 272 | * @} |
| bogdanm | 0:9b334a45a8ff | 273 | */ |
| bogdanm | 0:9b334a45a8ff | 274 | |
| bogdanm | 0:9b334a45a8ff | 275 | /** @defgroup FLASHEx_Type_Erase Type Erase |
| bogdanm | 0:9b334a45a8ff | 276 | * @{ |
| bogdanm | 0:9b334a45a8ff | 277 | */ |
| bogdanm | 0:9b334a45a8ff | 278 | #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/ |
| bogdanm | 0:9b334a45a8ff | 279 | #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/ |
| bogdanm | 0:9b334a45a8ff | 280 | |
| bogdanm | 0:9b334a45a8ff | 281 | /** |
| bogdanm | 0:9b334a45a8ff | 282 | * @} |
| bogdanm | 0:9b334a45a8ff | 283 | */ |
| bogdanm | 0:9b334a45a8ff | 284 | |
| bogdanm | 0:9b334a45a8ff | 285 | /** @defgroup FLASHEx_Banks Banks |
| bogdanm | 0:9b334a45a8ff | 286 | * @{ |
| bogdanm | 0:9b334a45a8ff | 287 | */ |
| mbed_official | 124:6a4a5b7d7324 | 288 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 289 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| bogdanm | 0:9b334a45a8ff | 290 | #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */ |
| bogdanm | 0:9b334a45a8ff | 291 | #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ |
| bogdanm | 0:9b334a45a8ff | 292 | |
| bogdanm | 0:9b334a45a8ff | 293 | #else |
| bogdanm | 0:9b334a45a8ff | 294 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| bogdanm | 0:9b334a45a8ff | 295 | #endif |
| bogdanm | 0:9b334a45a8ff | 296 | /** |
| bogdanm | 0:9b334a45a8ff | 297 | * @} |
| bogdanm | 0:9b334a45a8ff | 298 | */ |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | /** |
| bogdanm | 0:9b334a45a8ff | 301 | * @} |
| bogdanm | 0:9b334a45a8ff | 302 | */ |
| bogdanm | 0:9b334a45a8ff | 303 | |
| bogdanm | 0:9b334a45a8ff | 304 | /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants |
| bogdanm | 0:9b334a45a8ff | 305 | * @{ |
| bogdanm | 0:9b334a45a8ff | 306 | */ |
| bogdanm | 0:9b334a45a8ff | 307 | |
| bogdanm | 0:9b334a45a8ff | 308 | /** @defgroup FLASHEx_OB_Type Option Bytes Type |
| bogdanm | 0:9b334a45a8ff | 309 | * @{ |
| bogdanm | 0:9b334a45a8ff | 310 | */ |
| bogdanm | 0:9b334a45a8ff | 311 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 312 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 313 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 314 | #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/ |
| bogdanm | 0:9b334a45a8ff | 315 | |
| bogdanm | 0:9b334a45a8ff | 316 | /** |
| bogdanm | 0:9b334a45a8ff | 317 | * @} |
| bogdanm | 0:9b334a45a8ff | 318 | */ |
| bogdanm | 0:9b334a45a8ff | 319 | |
| mbed_official | 124:6a4a5b7d7324 | 320 | /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State |
| bogdanm | 0:9b334a45a8ff | 321 | * @{ |
| bogdanm | 0:9b334a45a8ff | 322 | */ |
| mbed_official | 124:6a4a5b7d7324 | 323 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/ |
| mbed_official | 124:6a4a5b7d7324 | 324 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/ |
| bogdanm | 0:9b334a45a8ff | 325 | |
| bogdanm | 0:9b334a45a8ff | 326 | /** |
| bogdanm | 0:9b334a45a8ff | 327 | * @} |
| bogdanm | 0:9b334a45a8ff | 328 | */ |
| bogdanm | 0:9b334a45a8ff | 329 | |
| bogdanm | 0:9b334a45a8ff | 330 | /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection |
| bogdanm | 0:9b334a45a8ff | 331 | * @{ |
| bogdanm | 0:9b334a45a8ff | 332 | */ |
| bogdanm | 0:9b334a45a8ff | 333 | /* STM32 Low and Medium density devices */ |
| mbed_official | 124:6a4a5b7d7324 | 334 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \ |
| mbed_official | 124:6a4a5b7d7324 | 335 | || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \ |
| mbed_official | 124:6a4a5b7d7324 | 336 | || defined(STM32F103xB) |
| bogdanm | 0:9b334a45a8ff | 337 | #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */ |
| bogdanm | 0:9b334a45a8ff | 338 | #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */ |
| bogdanm | 0:9b334a45a8ff | 339 | #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */ |
| bogdanm | 0:9b334a45a8ff | 340 | #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */ |
| bogdanm | 0:9b334a45a8ff | 341 | #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */ |
| bogdanm | 0:9b334a45a8ff | 342 | #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */ |
| bogdanm | 0:9b334a45a8ff | 343 | #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */ |
| bogdanm | 0:9b334a45a8ff | 344 | #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */ |
| bogdanm | 0:9b334a45a8ff | 345 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| bogdanm | 0:9b334a45a8ff | 346 | /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| bogdanm | 0:9b334a45a8ff | 347 | |
| bogdanm | 0:9b334a45a8ff | 348 | /* STM32 Medium-density devices */ |
| bogdanm | 0:9b334a45a8ff | 349 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| bogdanm | 0:9b334a45a8ff | 350 | #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */ |
| bogdanm | 0:9b334a45a8ff | 351 | #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */ |
| bogdanm | 0:9b334a45a8ff | 352 | #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */ |
| bogdanm | 0:9b334a45a8ff | 353 | #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */ |
| bogdanm | 0:9b334a45a8ff | 354 | #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */ |
| bogdanm | 0:9b334a45a8ff | 355 | #define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */ |
| bogdanm | 0:9b334a45a8ff | 356 | #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */ |
| bogdanm | 0:9b334a45a8ff | 357 | #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */ |
| bogdanm | 0:9b334a45a8ff | 358 | #define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */ |
| bogdanm | 0:9b334a45a8ff | 359 | #define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */ |
| bogdanm | 0:9b334a45a8ff | 360 | #define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */ |
| bogdanm | 0:9b334a45a8ff | 361 | #define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */ |
| bogdanm | 0:9b334a45a8ff | 362 | #define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */ |
| bogdanm | 0:9b334a45a8ff | 363 | #define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */ |
| bogdanm | 0:9b334a45a8ff | 364 | #define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */ |
| bogdanm | 0:9b334a45a8ff | 365 | #define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */ |
| bogdanm | 0:9b334a45a8ff | 366 | #define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */ |
| bogdanm | 0:9b334a45a8ff | 367 | #define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */ |
| bogdanm | 0:9b334a45a8ff | 368 | #define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */ |
| bogdanm | 0:9b334a45a8ff | 369 | #define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */ |
| bogdanm | 0:9b334a45a8ff | 370 | #define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */ |
| bogdanm | 0:9b334a45a8ff | 371 | #define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */ |
| bogdanm | 0:9b334a45a8ff | 372 | #define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */ |
| bogdanm | 0:9b334a45a8ff | 373 | #define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */ |
| bogdanm | 0:9b334a45a8ff | 374 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| bogdanm | 0:9b334a45a8ff | 375 | |
| bogdanm | 0:9b334a45a8ff | 376 | |
| bogdanm | 0:9b334a45a8ff | 377 | /* STM32 High-density, XL-density and Connectivity line devices */ |
| mbed_official | 124:6a4a5b7d7324 | 378 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \ |
| mbed_official | 124:6a4a5b7d7324 | 379 | || defined(STM32F101xG) || defined(STM32F103xG) \ |
| mbed_official | 124:6a4a5b7d7324 | 380 | || defined(STM32F105xC) || defined(STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 381 | #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */ |
| bogdanm | 0:9b334a45a8ff | 382 | #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */ |
| bogdanm | 0:9b334a45a8ff | 383 | #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */ |
| bogdanm | 0:9b334a45a8ff | 384 | #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */ |
| bogdanm | 0:9b334a45a8ff | 385 | #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */ |
| bogdanm | 0:9b334a45a8ff | 386 | #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */ |
| bogdanm | 0:9b334a45a8ff | 387 | #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */ |
| bogdanm | 0:9b334a45a8ff | 388 | #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */ |
| bogdanm | 0:9b334a45a8ff | 389 | #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */ |
| bogdanm | 0:9b334a45a8ff | 390 | #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */ |
| bogdanm | 0:9b334a45a8ff | 391 | #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */ |
| bogdanm | 0:9b334a45a8ff | 392 | #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */ |
| bogdanm | 0:9b334a45a8ff | 393 | #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */ |
| bogdanm | 0:9b334a45a8ff | 394 | #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */ |
| bogdanm | 0:9b334a45a8ff | 395 | #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */ |
| bogdanm | 0:9b334a45a8ff | 396 | #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */ |
| bogdanm | 0:9b334a45a8ff | 397 | #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */ |
| bogdanm | 0:9b334a45a8ff | 398 | #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */ |
| bogdanm | 0:9b334a45a8ff | 399 | #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */ |
| bogdanm | 0:9b334a45a8ff | 400 | #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */ |
| bogdanm | 0:9b334a45a8ff | 401 | #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */ |
| bogdanm | 0:9b334a45a8ff | 402 | #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */ |
| bogdanm | 0:9b334a45a8ff | 403 | #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */ |
| bogdanm | 0:9b334a45a8ff | 404 | #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */ |
| bogdanm | 0:9b334a45a8ff | 405 | #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */ |
| bogdanm | 0:9b334a45a8ff | 406 | #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */ |
| bogdanm | 0:9b334a45a8ff | 407 | #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */ |
| bogdanm | 0:9b334a45a8ff | 408 | #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */ |
| bogdanm | 0:9b334a45a8ff | 409 | #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */ |
| bogdanm | 0:9b334a45a8ff | 410 | #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */ |
| bogdanm | 0:9b334a45a8ff | 411 | #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */ |
| bogdanm | 0:9b334a45a8ff | 412 | #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */ |
| bogdanm | 0:9b334a45a8ff | 413 | #define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */ |
| bogdanm | 0:9b334a45a8ff | 414 | #define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */ |
| bogdanm | 0:9b334a45a8ff | 415 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ |
| bogdanm | 0:9b334a45a8ff | 416 | /* STM32F101xG || STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 417 | /* STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 418 | |
| bogdanm | 0:9b334a45a8ff | 419 | #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ |
| bogdanm | 0:9b334a45a8ff | 420 | |
| bogdanm | 0:9b334a45a8ff | 421 | /* Low Density */ |
| bogdanm | 0:9b334a45a8ff | 422 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) |
| bogdanm | 0:9b334a45a8ff | 423 | #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) |
| bogdanm | 0:9b334a45a8ff | 424 | #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ |
| bogdanm | 0:9b334a45a8ff | 425 | |
| bogdanm | 0:9b334a45a8ff | 426 | /* Medium Density */ |
| bogdanm | 0:9b334a45a8ff | 427 | #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) |
| bogdanm | 0:9b334a45a8ff | 428 | #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) |
| bogdanm | 0:9b334a45a8ff | 429 | #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00) |
| bogdanm | 0:9b334a45a8ff | 430 | #define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000) |
| bogdanm | 0:9b334a45a8ff | 431 | #define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000) |
| bogdanm | 0:9b334a45a8ff | 432 | #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ |
| bogdanm | 0:9b334a45a8ff | 433 | |
| bogdanm | 0:9b334a45a8ff | 434 | /* High Density */ |
| bogdanm | 0:9b334a45a8ff | 435 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) |
| bogdanm | 0:9b334a45a8ff | 436 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
| bogdanm | 0:9b334a45a8ff | 437 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
| bogdanm | 0:9b334a45a8ff | 438 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
| bogdanm | 0:9b334a45a8ff | 439 | #define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000) |
| bogdanm | 0:9b334a45a8ff | 440 | #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ |
| bogdanm | 0:9b334a45a8ff | 441 | |
| bogdanm | 0:9b334a45a8ff | 442 | /* XL Density */ |
| bogdanm | 0:9b334a45a8ff | 443 | #if defined(STM32F101xG) || defined(STM32F103xG) |
| bogdanm | 0:9b334a45a8ff | 444 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
| bogdanm | 0:9b334a45a8ff | 445 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
| bogdanm | 0:9b334a45a8ff | 446 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
| bogdanm | 0:9b334a45a8ff | 447 | #define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000) |
| bogdanm | 0:9b334a45a8ff | 448 | #endif /* STM32F101xG || STM32F103xG */ |
| bogdanm | 0:9b334a45a8ff | 449 | |
| bogdanm | 0:9b334a45a8ff | 450 | /* Connectivity line devices */ |
| bogdanm | 0:9b334a45a8ff | 451 | #if defined(STM32F105xC) || defined(STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 452 | #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) |
| bogdanm | 0:9b334a45a8ff | 453 | #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) |
| bogdanm | 0:9b334a45a8ff | 454 | #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) |
| bogdanm | 0:9b334a45a8ff | 455 | #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000) |
| bogdanm | 0:9b334a45a8ff | 456 | #endif /* STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 457 | |
| bogdanm | 0:9b334a45a8ff | 458 | /** |
| bogdanm | 0:9b334a45a8ff | 459 | * @} |
| bogdanm | 0:9b334a45a8ff | 460 | */ |
| bogdanm | 0:9b334a45a8ff | 461 | |
| mbed_official | 124:6a4a5b7d7324 | 462 | /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection |
| mbed_official | 124:6a4a5b7d7324 | 463 | * @{ |
| mbed_official | 124:6a4a5b7d7324 | 464 | */ |
| mbed_official | 124:6a4a5b7d7324 | 465 | #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) |
| mbed_official | 124:6a4a5b7d7324 | 466 | #define OB_RDP_LEVEL_1 ((uint8_t)0x00) |
| mbed_official | 124:6a4a5b7d7324 | 467 | /** |
| mbed_official | 124:6a4a5b7d7324 | 468 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 469 | */ |
| mbed_official | 124:6a4a5b7d7324 | 470 | |
| mbed_official | 124:6a4a5b7d7324 | 471 | /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog |
| mbed_official | 124:6a4a5b7d7324 | 472 | * @{ |
| mbed_official | 124:6a4a5b7d7324 | 473 | */ |
| mbed_official | 124:6a4a5b7d7324 | 474 | #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ |
| mbed_official | 124:6a4a5b7d7324 | 475 | #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ |
| mbed_official | 124:6a4a5b7d7324 | 476 | /** |
| mbed_official | 124:6a4a5b7d7324 | 477 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 478 | */ |
| mbed_official | 124:6a4a5b7d7324 | 479 | |
| mbed_official | 124:6a4a5b7d7324 | 480 | /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP |
| mbed_official | 124:6a4a5b7d7324 | 481 | * @{ |
| mbed_official | 124:6a4a5b7d7324 | 482 | */ |
| mbed_official | 124:6a4a5b7d7324 | 483 | #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ |
| mbed_official | 124:6a4a5b7d7324 | 484 | #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ |
| mbed_official | 124:6a4a5b7d7324 | 485 | /** |
| mbed_official | 124:6a4a5b7d7324 | 486 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 487 | */ |
| mbed_official | 124:6a4a5b7d7324 | 488 | |
| mbed_official | 124:6a4a5b7d7324 | 489 | /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY |
| mbed_official | 124:6a4a5b7d7324 | 490 | * @{ |
| mbed_official | 124:6a4a5b7d7324 | 491 | */ |
| mbed_official | 124:6a4a5b7d7324 | 492 | #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ |
| mbed_official | 124:6a4a5b7d7324 | 493 | #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ |
| mbed_official | 124:6a4a5b7d7324 | 494 | /** |
| mbed_official | 124:6a4a5b7d7324 | 495 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 496 | */ |
| mbed_official | 124:6a4a5b7d7324 | 497 | |
| mbed_official | 124:6a4a5b7d7324 | 498 | #if defined(FLASH_BANK2_END) |
| mbed_official | 124:6a4a5b7d7324 | 499 | /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 |
| mbed_official | 124:6a4a5b7d7324 | 500 | * @{ |
| mbed_official | 124:6a4a5b7d7324 | 501 | */ |
| mbed_official | 124:6a4a5b7d7324 | 502 | #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ |
| mbed_official | 124:6a4a5b7d7324 | 503 | #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ |
| mbed_official | 124:6a4a5b7d7324 | 504 | /** |
| mbed_official | 124:6a4a5b7d7324 | 505 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 506 | */ |
| mbed_official | 124:6a4a5b7d7324 | 507 | #endif /* FLASH_BANK2_END */ |
| mbed_official | 124:6a4a5b7d7324 | 508 | |
| mbed_official | 124:6a4a5b7d7324 | 509 | /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address |
| mbed_official | 124:6a4a5b7d7324 | 510 | * @{ |
| mbed_official | 124:6a4a5b7d7324 | 511 | */ |
| mbed_official | 124:6a4a5b7d7324 | 512 | #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804) |
| mbed_official | 124:6a4a5b7d7324 | 513 | #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806) |
| mbed_official | 124:6a4a5b7d7324 | 514 | /** |
| mbed_official | 124:6a4a5b7d7324 | 515 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 516 | */ |
| mbed_official | 124:6a4a5b7d7324 | 517 | |
| bogdanm | 0:9b334a45a8ff | 518 | /** |
| bogdanm | 0:9b334a45a8ff | 519 | * @} |
| bogdanm | 0:9b334a45a8ff | 520 | */ |
| bogdanm | 0:9b334a45a8ff | 521 | |
| bogdanm | 0:9b334a45a8ff | 522 | /** @addtogroup FLASHEx_Constants |
| bogdanm | 0:9b334a45a8ff | 523 | * @{ |
| bogdanm | 0:9b334a45a8ff | 524 | */ |
| bogdanm | 0:9b334a45a8ff | 525 | |
| bogdanm | 0:9b334a45a8ff | 526 | /** @defgroup FLASH_Flag_definition Flag definition |
| bogdanm | 0:9b334a45a8ff | 527 | * @brief Flag definition |
| bogdanm | 0:9b334a45a8ff | 528 | * @{ |
| bogdanm | 0:9b334a45a8ff | 529 | */ |
| mbed_official | 124:6a4a5b7d7324 | 530 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 531 | #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ |
| bogdanm | 0:9b334a45a8ff | 532 | #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ |
| bogdanm | 0:9b334a45a8ff | 533 | #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ |
| bogdanm | 0:9b334a45a8ff | 534 | #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ |
| bogdanm | 0:9b334a45a8ff | 535 | |
| bogdanm | 0:9b334a45a8ff | 536 | #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ |
| bogdanm | 0:9b334a45a8ff | 537 | #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ |
| bogdanm | 0:9b334a45a8ff | 538 | #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ |
| bogdanm | 0:9b334a45a8ff | 539 | #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ |
| bogdanm | 0:9b334a45a8ff | 540 | |
| bogdanm | 0:9b334a45a8ff | 541 | #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */ |
| bogdanm | 0:9b334a45a8ff | 542 | #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */ |
| bogdanm | 0:9b334a45a8ff | 543 | #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */ |
| bogdanm | 0:9b334a45a8ff | 544 | #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */ |
| bogdanm | 0:9b334a45a8ff | 545 | |
| bogdanm | 0:9b334a45a8ff | 546 | #else |
| bogdanm | 0:9b334a45a8ff | 547 | |
| bogdanm | 0:9b334a45a8ff | 548 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ |
| bogdanm | 0:9b334a45a8ff | 549 | #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ |
| bogdanm | 0:9b334a45a8ff | 550 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ |
| bogdanm | 0:9b334a45a8ff | 551 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ |
| bogdanm | 0:9b334a45a8ff | 552 | |
| bogdanm | 0:9b334a45a8ff | 553 | #endif |
| bogdanm | 0:9b334a45a8ff | 554 | #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ |
| bogdanm | 0:9b334a45a8ff | 555 | /** |
| bogdanm | 0:9b334a45a8ff | 556 | * @} |
| bogdanm | 0:9b334a45a8ff | 557 | */ |
| bogdanm | 0:9b334a45a8ff | 558 | |
| bogdanm | 0:9b334a45a8ff | 559 | /** @defgroup FLASH_Interrupt_definition Interrupt definition |
| bogdanm | 0:9b334a45a8ff | 560 | * @brief FLASH Interrupt definition |
| bogdanm | 0:9b334a45a8ff | 561 | * @{ |
| bogdanm | 0:9b334a45a8ff | 562 | */ |
| mbed_official | 124:6a4a5b7d7324 | 563 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 564 | #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ |
| bogdanm | 0:9b334a45a8ff | 565 | #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ |
| bogdanm | 0:9b334a45a8ff | 566 | |
| bogdanm | 0:9b334a45a8ff | 567 | #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ |
| bogdanm | 0:9b334a45a8ff | 568 | #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ |
| bogdanm | 0:9b334a45a8ff | 569 | |
| bogdanm | 0:9b334a45a8ff | 570 | #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */ |
| bogdanm | 0:9b334a45a8ff | 571 | #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */ |
| bogdanm | 0:9b334a45a8ff | 572 | |
| bogdanm | 0:9b334a45a8ff | 573 | #else |
| bogdanm | 0:9b334a45a8ff | 574 | |
| bogdanm | 0:9b334a45a8ff | 575 | #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ |
| bogdanm | 0:9b334a45a8ff | 576 | #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ |
| bogdanm | 0:9b334a45a8ff | 577 | |
| bogdanm | 0:9b334a45a8ff | 578 | #endif |
| bogdanm | 0:9b334a45a8ff | 579 | /** |
| bogdanm | 0:9b334a45a8ff | 580 | * @} |
| bogdanm | 0:9b334a45a8ff | 581 | */ |
| bogdanm | 0:9b334a45a8ff | 582 | |
| bogdanm | 0:9b334a45a8ff | 583 | /** |
| bogdanm | 0:9b334a45a8ff | 584 | * @} |
| bogdanm | 0:9b334a45a8ff | 585 | */ |
| bogdanm | 0:9b334a45a8ff | 586 | |
| bogdanm | 0:9b334a45a8ff | 587 | |
| bogdanm | 0:9b334a45a8ff | 588 | /** |
| bogdanm | 0:9b334a45a8ff | 589 | * @} |
| bogdanm | 0:9b334a45a8ff | 590 | */ |
| bogdanm | 0:9b334a45a8ff | 591 | |
| bogdanm | 0:9b334a45a8ff | 592 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 593 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
| bogdanm | 0:9b334a45a8ff | 594 | * @{ |
| bogdanm | 0:9b334a45a8ff | 595 | */ |
| bogdanm | 0:9b334a45a8ff | 596 | |
| bogdanm | 0:9b334a45a8ff | 597 | /** @defgroup FLASH_Interrupt Interrupt |
| bogdanm | 0:9b334a45a8ff | 598 | * @brief macros to handle FLASH interrupts |
| bogdanm | 0:9b334a45a8ff | 599 | * @{ |
| bogdanm | 0:9b334a45a8ff | 600 | */ |
| bogdanm | 0:9b334a45a8ff | 601 | |
| mbed_official | 124:6a4a5b7d7324 | 602 | #if defined(FLASH_BANK2_END) |
| bogdanm | 0:9b334a45a8ff | 603 | /** |
| bogdanm | 0:9b334a45a8ff | 604 | * @brief Enable the specified FLASH interrupt. |
| mbed_official | 124:6a4a5b7d7324 | 605 | * @param __INTERRUPT__ FLASH interrupt |
| bogdanm | 0:9b334a45a8ff | 606 | * This parameter can be any combination of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 607 | * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 608 | * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 609 | * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 610 | * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 |
| bogdanm | 0:9b334a45a8ff | 611 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 612 | */ |
| bogdanm | 0:9b334a45a8ff | 613 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ |
| bogdanm | 0:9b334a45a8ff | 614 | /* Enable Bank1 IT */ \ |
| bogdanm | 0:9b334a45a8ff | 615 | SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ |
| bogdanm | 0:9b334a45a8ff | 616 | /* Enable Bank2 IT */ \ |
| bogdanm | 0:9b334a45a8ff | 617 | SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ |
| bogdanm | 0:9b334a45a8ff | 618 | } while(0) |
| bogdanm | 0:9b334a45a8ff | 619 | |
| bogdanm | 0:9b334a45a8ff | 620 | /** |
| bogdanm | 0:9b334a45a8ff | 621 | * @brief Disable the specified FLASH interrupt. |
| mbed_official | 124:6a4a5b7d7324 | 622 | * @param __INTERRUPT__ FLASH interrupt |
| bogdanm | 0:9b334a45a8ff | 623 | * This parameter can be any combination of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 624 | * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 625 | * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 626 | * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 627 | * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 |
| bogdanm | 0:9b334a45a8ff | 628 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 629 | */ |
| bogdanm | 0:9b334a45a8ff | 630 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ |
| bogdanm | 0:9b334a45a8ff | 631 | /* Disable Bank1 IT */ \ |
| bogdanm | 0:9b334a45a8ff | 632 | CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ |
| bogdanm | 0:9b334a45a8ff | 633 | /* Disable Bank2 IT */ \ |
| bogdanm | 0:9b334a45a8ff | 634 | CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ |
| bogdanm | 0:9b334a45a8ff | 635 | } while(0) |
| bogdanm | 0:9b334a45a8ff | 636 | |
| bogdanm | 0:9b334a45a8ff | 637 | /** |
| bogdanm | 0:9b334a45a8ff | 638 | * @brief Get the specified FLASH flag status. |
| mbed_official | 124:6a4a5b7d7324 | 639 | * @param __FLAG__ specifies the FLASH flag to check. |
| bogdanm | 0:9b334a45a8ff | 640 | * This parameter can be one of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 641 | * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 642 | * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 643 | * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 644 | * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 645 | * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 646 | * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 647 | * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 648 | * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 649 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
| bogdanm | 0:9b334a45a8ff | 650 | * @retval The new state of __FLAG__ (SET or RESET). |
| bogdanm | 0:9b334a45a8ff | 651 | */ |
| bogdanm | 0:9b334a45a8ff | 652 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
| bogdanm | 0:9b334a45a8ff | 653 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
| bogdanm | 0:9b334a45a8ff | 654 | ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ |
| bogdanm | 0:9b334a45a8ff | 655 | (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ |
| bogdanm | 0:9b334a45a8ff | 656 | (FLASH->SR2 & ((__FLAG__) >> 16)))) |
| bogdanm | 0:9b334a45a8ff | 657 | |
| bogdanm | 0:9b334a45a8ff | 658 | /** |
| bogdanm | 0:9b334a45a8ff | 659 | * @brief Clear the specified FLASH flag. |
| mbed_official | 124:6a4a5b7d7324 | 660 | * @param __FLAG__ specifies the FLASH flags to clear. |
| bogdanm | 0:9b334a45a8ff | 661 | * This parameter can be any combination of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 662 | * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 663 | * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 664 | * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 665 | * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 |
| mbed_official | 124:6a4a5b7d7324 | 666 | * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 667 | * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 668 | * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 669 | * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 |
| mbed_official | 124:6a4a5b7d7324 | 670 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
| bogdanm | 0:9b334a45a8ff | 671 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 672 | */ |
| bogdanm | 0:9b334a45a8ff | 673 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
| bogdanm | 0:9b334a45a8ff | 674 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
| bogdanm | 0:9b334a45a8ff | 675 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
| bogdanm | 0:9b334a45a8ff | 676 | { \ |
| bogdanm | 0:9b334a45a8ff | 677 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
| bogdanm | 0:9b334a45a8ff | 678 | } \ |
| bogdanm | 0:9b334a45a8ff | 679 | else { \ |
| bogdanm | 0:9b334a45a8ff | 680 | /* Clear Flag in Bank1 */ \ |
| bogdanm | 0:9b334a45a8ff | 681 | if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ |
| bogdanm | 0:9b334a45a8ff | 682 | { \ |
| bogdanm | 0:9b334a45a8ff | 683 | FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ |
| bogdanm | 0:9b334a45a8ff | 684 | } \ |
| bogdanm | 0:9b334a45a8ff | 685 | /* Clear Flag in Bank2 */ \ |
| bogdanm | 0:9b334a45a8ff | 686 | if (((__FLAG__) >> 16) != RESET) \ |
| bogdanm | 0:9b334a45a8ff | 687 | { \ |
| bogdanm | 0:9b334a45a8ff | 688 | FLASH->SR2 = ((__FLAG__) >> 16); \ |
| bogdanm | 0:9b334a45a8ff | 689 | } \ |
| bogdanm | 0:9b334a45a8ff | 690 | } \ |
| bogdanm | 0:9b334a45a8ff | 691 | } while(0) |
| bogdanm | 0:9b334a45a8ff | 692 | #else |
| bogdanm | 0:9b334a45a8ff | 693 | /** |
| bogdanm | 0:9b334a45a8ff | 694 | * @brief Enable the specified FLASH interrupt. |
| mbed_official | 124:6a4a5b7d7324 | 695 | * @param __INTERRUPT__ FLASH interrupt |
| bogdanm | 0:9b334a45a8ff | 696 | * This parameter can be any combination of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 697 | * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt |
| mbed_official | 124:6a4a5b7d7324 | 698 | * @arg @ref FLASH_IT_ERR Error Interrupt |
| bogdanm | 0:9b334a45a8ff | 699 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 700 | */ |
| bogdanm | 0:9b334a45a8ff | 701 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) |
| bogdanm | 0:9b334a45a8ff | 702 | |
| bogdanm | 0:9b334a45a8ff | 703 | /** |
| bogdanm | 0:9b334a45a8ff | 704 | * @brief Disable the specified FLASH interrupt. |
| mbed_official | 124:6a4a5b7d7324 | 705 | * @param __INTERRUPT__ FLASH interrupt |
| bogdanm | 0:9b334a45a8ff | 706 | * This parameter can be any combination of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 707 | * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt |
| mbed_official | 124:6a4a5b7d7324 | 708 | * @arg @ref FLASH_IT_ERR Error Interrupt |
| bogdanm | 0:9b334a45a8ff | 709 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 710 | */ |
| bogdanm | 0:9b334a45a8ff | 711 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) |
| bogdanm | 0:9b334a45a8ff | 712 | |
| bogdanm | 0:9b334a45a8ff | 713 | /** |
| bogdanm | 0:9b334a45a8ff | 714 | * @brief Get the specified FLASH flag status. |
| mbed_official | 124:6a4a5b7d7324 | 715 | * @param __FLAG__ specifies the FLASH flag to check. |
| bogdanm | 0:9b334a45a8ff | 716 | * This parameter can be one of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 717 | * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag |
| mbed_official | 124:6a4a5b7d7324 | 718 | * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag |
| mbed_official | 124:6a4a5b7d7324 | 719 | * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag |
| mbed_official | 124:6a4a5b7d7324 | 720 | * @arg @ref FLASH_FLAG_BSY FLASH Busy flag |
| mbed_official | 124:6a4a5b7d7324 | 721 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
| bogdanm | 0:9b334a45a8ff | 722 | * @retval The new state of __FLAG__ (SET or RESET). |
| bogdanm | 0:9b334a45a8ff | 723 | */ |
| bogdanm | 0:9b334a45a8ff | 724 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ |
| bogdanm | 0:9b334a45a8ff | 725 | (FLASH->OBR & FLASH_OBR_OPTERR) : \ |
| bogdanm | 0:9b334a45a8ff | 726 | (FLASH->SR & (__FLAG__))) |
| bogdanm | 0:9b334a45a8ff | 727 | /** |
| bogdanm | 0:9b334a45a8ff | 728 | * @brief Clear the specified FLASH flag. |
| mbed_official | 124:6a4a5b7d7324 | 729 | * @param __FLAG__ specifies the FLASH flags to clear. |
| bogdanm | 0:9b334a45a8ff | 730 | * This parameter can be any combination of the following values: |
| mbed_official | 124:6a4a5b7d7324 | 731 | * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag |
| mbed_official | 124:6a4a5b7d7324 | 732 | * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag |
| mbed_official | 124:6a4a5b7d7324 | 733 | * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag |
| mbed_official | 124:6a4a5b7d7324 | 734 | * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match |
| bogdanm | 0:9b334a45a8ff | 735 | * @retval none |
| bogdanm | 0:9b334a45a8ff | 736 | */ |
| bogdanm | 0:9b334a45a8ff | 737 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ |
| bogdanm | 0:9b334a45a8ff | 738 | /* Clear FLASH_FLAG_OPTVERR flag */ \ |
| bogdanm | 0:9b334a45a8ff | 739 | if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ |
| bogdanm | 0:9b334a45a8ff | 740 | { \ |
| bogdanm | 0:9b334a45a8ff | 741 | CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ |
| bogdanm | 0:9b334a45a8ff | 742 | } \ |
| bogdanm | 0:9b334a45a8ff | 743 | else { \ |
| bogdanm | 0:9b334a45a8ff | 744 | /* Clear Flag in Bank1 */ \ |
| bogdanm | 0:9b334a45a8ff | 745 | FLASH->SR = (__FLAG__); \ |
| bogdanm | 0:9b334a45a8ff | 746 | } \ |
| bogdanm | 0:9b334a45a8ff | 747 | } while(0) |
| bogdanm | 0:9b334a45a8ff | 748 | |
| bogdanm | 0:9b334a45a8ff | 749 | #endif |
| bogdanm | 0:9b334a45a8ff | 750 | |
| bogdanm | 0:9b334a45a8ff | 751 | /** |
| bogdanm | 0:9b334a45a8ff | 752 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 753 | */ |
| bogdanm | 0:9b334a45a8ff | 754 | |
| bogdanm | 0:9b334a45a8ff | 755 | /** |
| bogdanm | 0:9b334a45a8ff | 756 | * @} |
| mbed_official | 124:6a4a5b7d7324 | 757 | */ |
| bogdanm | 0:9b334a45a8ff | 758 | |
| bogdanm | 0:9b334a45a8ff | 759 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 760 | /** @addtogroup FLASHEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 761 | * @{ |
| bogdanm | 0:9b334a45a8ff | 762 | */ |
| mbed_official | 124:6a4a5b7d7324 | 763 | |
| bogdanm | 0:9b334a45a8ff | 764 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 765 | * @{ |
| bogdanm | 0:9b334a45a8ff | 766 | */ |
| bogdanm | 0:9b334a45a8ff | 767 | /* IO operation functions *****************************************************/ |
| bogdanm | 0:9b334a45a8ff | 768 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
| bogdanm | 0:9b334a45a8ff | 769 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| bogdanm | 0:9b334a45a8ff | 770 | |
| bogdanm | 0:9b334a45a8ff | 771 | /** |
| bogdanm | 0:9b334a45a8ff | 772 | * @} |
| bogdanm | 0:9b334a45a8ff | 773 | */ |
| mbed_official | 124:6a4a5b7d7324 | 774 | |
| bogdanm | 0:9b334a45a8ff | 775 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
| bogdanm | 0:9b334a45a8ff | 776 | * @{ |
| bogdanm | 0:9b334a45a8ff | 777 | */ |
| bogdanm | 0:9b334a45a8ff | 778 | /* Peripheral Control functions ***********************************************/ |
| bogdanm | 0:9b334a45a8ff | 779 | HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); |
| bogdanm | 0:9b334a45a8ff | 780 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| bogdanm | 0:9b334a45a8ff | 781 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| mbed_official | 124:6a4a5b7d7324 | 782 | uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); |
| bogdanm | 0:9b334a45a8ff | 783 | /** |
| bogdanm | 0:9b334a45a8ff | 784 | * @} |
| bogdanm | 0:9b334a45a8ff | 785 | */ |
| bogdanm | 0:9b334a45a8ff | 786 | |
| bogdanm | 0:9b334a45a8ff | 787 | /** |
| bogdanm | 0:9b334a45a8ff | 788 | * @} |
| bogdanm | 0:9b334a45a8ff | 789 | */ |
| bogdanm | 0:9b334a45a8ff | 790 | |
| bogdanm | 0:9b334a45a8ff | 791 | /** |
| bogdanm | 0:9b334a45a8ff | 792 | * @} |
| bogdanm | 0:9b334a45a8ff | 793 | */ |
| bogdanm | 0:9b334a45a8ff | 794 | |
| bogdanm | 0:9b334a45a8ff | 795 | /** |
| bogdanm | 0:9b334a45a8ff | 796 | * @} |
| bogdanm | 0:9b334a45a8ff | 797 | */ |
| bogdanm | 0:9b334a45a8ff | 798 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 799 | } |
| bogdanm | 0:9b334a45a8ff | 800 | #endif |
| bogdanm | 0:9b334a45a8ff | 801 | |
| bogdanm | 0:9b334a45a8ff | 802 | #endif /* __STM32F1xx_HAL_FLASH_EX_H */ |
| bogdanm | 0:9b334a45a8ff | 803 | |
| bogdanm | 0:9b334a45a8ff | 804 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |