en 129
fix LPC812 PWM
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mbed-dev
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_dac_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f0xx_hal_dac_ex.c |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.3.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 26-June-2015 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief DAC HAL module driver. |
| bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the extended |
| bogdanm | 0:9b334a45a8ff | 9 | * functionalities of the DAC peripheral. |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * |
| bogdanm | 0:9b334a45a8ff | 12 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 13 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 14 | ##### How to use this driver ##### |
| bogdanm | 0:9b334a45a8ff | 15 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 16 | [..] |
| bogdanm | 0:9b334a45a8ff | 17 | (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) : |
| bogdanm | 0:9b334a45a8ff | 18 | Use HAL_DACEx_DualGetValue() to get digital data to be converted and use |
| bogdanm | 0:9b334a45a8ff | 19 | HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2. |
| bogdanm | 0:9b334a45a8ff | 20 | (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal. |
| bogdanm | 0:9b334a45a8ff | 21 | (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal. |
| bogdanm | 0:9b334a45a8ff | 22 | |
| bogdanm | 0:9b334a45a8ff | 23 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 24 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 25 | * @attention |
| bogdanm | 0:9b334a45a8ff | 26 | * |
| bogdanm | 0:9b334a45a8ff | 27 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 28 | * |
| bogdanm | 0:9b334a45a8ff | 29 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 30 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 31 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 32 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 33 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 34 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 35 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 36 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 37 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 38 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 39 | * |
| bogdanm | 0:9b334a45a8ff | 40 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 41 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 42 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 43 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 44 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 45 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 46 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 47 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 48 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 49 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 50 | * |
| bogdanm | 0:9b334a45a8ff | 51 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 52 | */ |
| bogdanm | 0:9b334a45a8ff | 53 | |
| bogdanm | 0:9b334a45a8ff | 54 | |
| bogdanm | 0:9b334a45a8ff | 55 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 56 | #include "stm32f0xx_hal.h" |
| bogdanm | 0:9b334a45a8ff | 57 | |
| bogdanm | 0:9b334a45a8ff | 58 | /** @addtogroup STM32F0xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | #ifdef HAL_DAC_MODULE_ENABLED |
| bogdanm | 0:9b334a45a8ff | 63 | |
| bogdanm | 0:9b334a45a8ff | 64 | /** @addtogroup DAC |
| bogdanm | 0:9b334a45a8ff | 65 | * @{ |
| bogdanm | 0:9b334a45a8ff | 66 | */ |
| bogdanm | 0:9b334a45a8ff | 67 | |
| bogdanm | 0:9b334a45a8ff | 68 | #if defined(STM32F051x8) || defined(STM32F058xx) || \ |
| bogdanm | 0:9b334a45a8ff | 69 | defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 70 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 71 | |
| bogdanm | 0:9b334a45a8ff | 72 | /** @addtogroup DAC_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 73 | * @{ |
| bogdanm | 0:9b334a45a8ff | 74 | */ |
| bogdanm | 0:9b334a45a8ff | 75 | static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 76 | static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 77 | static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 78 | /** |
| bogdanm | 0:9b334a45a8ff | 79 | * @} |
| bogdanm | 0:9b334a45a8ff | 80 | */ |
| bogdanm | 0:9b334a45a8ff | 81 | |
| bogdanm | 0:9b334a45a8ff | 82 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 83 | /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 84 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 85 | |
| bogdanm | 0:9b334a45a8ff | 86 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 87 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 88 | |
| bogdanm | 0:9b334a45a8ff | 89 | /** @addtogroup DAC_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 90 | * @{ |
| bogdanm | 0:9b334a45a8ff | 91 | */ |
| bogdanm | 0:9b334a45a8ff | 92 | |
| bogdanm | 0:9b334a45a8ff | 93 | /* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */ |
| bogdanm | 0:9b334a45a8ff | 94 | /* are set by HAL_DAC_Start_DMA */ |
| bogdanm | 0:9b334a45a8ff | 95 | |
| bogdanm | 0:9b334a45a8ff | 96 | void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 97 | void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 98 | void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma); |
| bogdanm | 0:9b334a45a8ff | 99 | /** |
| bogdanm | 0:9b334a45a8ff | 100 | * @} |
| bogdanm | 0:9b334a45a8ff | 101 | */ |
| bogdanm | 0:9b334a45a8ff | 102 | |
| bogdanm | 0:9b334a45a8ff | 103 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 104 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 105 | |
| bogdanm | 0:9b334a45a8ff | 106 | /** @addtogroup DAC_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 107 | * @{ |
| bogdanm | 0:9b334a45a8ff | 108 | */ |
| bogdanm | 0:9b334a45a8ff | 109 | |
| bogdanm | 0:9b334a45a8ff | 110 | /** @addtogroup DAC_Exported_Functions_Group3 |
| bogdanm | 0:9b334a45a8ff | 111 | * @{ |
| bogdanm | 0:9b334a45a8ff | 112 | */ |
| bogdanm | 0:9b334a45a8ff | 113 | |
| bogdanm | 0:9b334a45a8ff | 114 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 115 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 116 | |
| bogdanm | 0:9b334a45a8ff | 117 | /** |
| bogdanm | 0:9b334a45a8ff | 118 | * @brief Configures the selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 119 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 120 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 121 | * @param sConfig: DAC configuration structure. |
| bogdanm | 0:9b334a45a8ff | 122 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 123 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 124 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 125 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| bogdanm | 0:9b334a45a8ff | 126 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 127 | */ |
| bogdanm | 0:9b334a45a8ff | 128 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 129 | { |
| bogdanm | 0:9b334a45a8ff | 130 | uint32_t tmpreg1 = 0, tmpreg2 = 0; |
| bogdanm | 0:9b334a45a8ff | 131 | |
| bogdanm | 0:9b334a45a8ff | 132 | /* Check the DAC parameters */ |
| bogdanm | 0:9b334a45a8ff | 133 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
| bogdanm | 0:9b334a45a8ff | 134 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
| bogdanm | 0:9b334a45a8ff | 135 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
| bogdanm | 0:9b334a45a8ff | 136 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 137 | |
| bogdanm | 0:9b334a45a8ff | 138 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 139 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 140 | |
| bogdanm | 0:9b334a45a8ff | 141 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 142 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 143 | |
| bogdanm | 0:9b334a45a8ff | 144 | /* Get the DAC CR value */ |
| bogdanm | 0:9b334a45a8ff | 145 | tmpreg1 = hdac->Instance->CR; |
| bogdanm | 0:9b334a45a8ff | 146 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
| bogdanm | 0:9b334a45a8ff | 147 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel); |
| bogdanm | 0:9b334a45a8ff | 148 | /* Configure for the selected DAC channel: buffer output, trigger */ |
| bogdanm | 0:9b334a45a8ff | 149 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
| bogdanm | 0:9b334a45a8ff | 150 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
| bogdanm | 0:9b334a45a8ff | 151 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
| bogdanm | 0:9b334a45a8ff | 152 | /* Calculate CR register value depending on DAC_Channel */ |
| bogdanm | 0:9b334a45a8ff | 153 | tmpreg1 |= tmpreg2 << Channel; |
| bogdanm | 0:9b334a45a8ff | 154 | /* Write to DAC CR */ |
| bogdanm | 0:9b334a45a8ff | 155 | hdac->Instance->CR = tmpreg1; |
| bogdanm | 0:9b334a45a8ff | 156 | |
| bogdanm | 0:9b334a45a8ff | 157 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 158 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 159 | |
| bogdanm | 0:9b334a45a8ff | 160 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 161 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 162 | |
| bogdanm | 0:9b334a45a8ff | 163 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 164 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 165 | } |
| bogdanm | 0:9b334a45a8ff | 166 | |
| bogdanm | 0:9b334a45a8ff | 167 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 168 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 169 | |
| bogdanm | 0:9b334a45a8ff | 170 | #if defined (STM32F051x8) || defined (STM32F058xx) |
| bogdanm | 0:9b334a45a8ff | 171 | |
| bogdanm | 0:9b334a45a8ff | 172 | /** |
| bogdanm | 0:9b334a45a8ff | 173 | * @brief Configures the selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 174 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 175 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 176 | * @param sConfig: DAC configuration structure. |
| bogdanm | 0:9b334a45a8ff | 177 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 178 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 179 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 180 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 181 | */ |
| bogdanm | 0:9b334a45a8ff | 182 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 183 | { |
| bogdanm | 0:9b334a45a8ff | 184 | uint32_t tmpreg1 = 0, tmpreg2 = 0; |
| bogdanm | 0:9b334a45a8ff | 185 | |
| bogdanm | 0:9b334a45a8ff | 186 | /* Check the DAC parameters */ |
| bogdanm | 0:9b334a45a8ff | 187 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
| bogdanm | 0:9b334a45a8ff | 188 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
| bogdanm | 0:9b334a45a8ff | 189 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
| bogdanm | 0:9b334a45a8ff | 190 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 191 | |
| bogdanm | 0:9b334a45a8ff | 192 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 193 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 196 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 197 | |
| bogdanm | 0:9b334a45a8ff | 198 | /* Get the DAC CR value */ |
| bogdanm | 0:9b334a45a8ff | 199 | tmpreg1 = hdac->Instance->CR; |
| bogdanm | 0:9b334a45a8ff | 200 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
| bogdanm | 0:9b334a45a8ff | 201 | tmpreg1 &= ~(((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel); |
| bogdanm | 0:9b334a45a8ff | 202 | /* Configure for the selected DAC channel: buffer output, trigger */ |
| bogdanm | 0:9b334a45a8ff | 203 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
| bogdanm | 0:9b334a45a8ff | 204 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
| bogdanm | 0:9b334a45a8ff | 205 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
| bogdanm | 0:9b334a45a8ff | 206 | /* Calculate CR register value depending on DAC_Channel */ |
| bogdanm | 0:9b334a45a8ff | 207 | tmpreg1 |= tmpreg2 << Channel; |
| bogdanm | 0:9b334a45a8ff | 208 | /* Write to DAC CR */ |
| bogdanm | 0:9b334a45a8ff | 209 | hdac->Instance->CR = tmpreg1; |
| bogdanm | 0:9b334a45a8ff | 210 | |
| bogdanm | 0:9b334a45a8ff | 211 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 212 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 213 | |
| bogdanm | 0:9b334a45a8ff | 214 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 215 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 216 | |
| bogdanm | 0:9b334a45a8ff | 217 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 218 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 219 | } |
| bogdanm | 0:9b334a45a8ff | 220 | |
| bogdanm | 0:9b334a45a8ff | 221 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 222 | |
| bogdanm | 0:9b334a45a8ff | 223 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 224 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 225 | /* DAC 1 has 2 channels 1 & 2 */ |
| bogdanm | 0:9b334a45a8ff | 226 | |
| bogdanm | 0:9b334a45a8ff | 227 | /** |
| bogdanm | 0:9b334a45a8ff | 228 | * @brief Returns the last data output value of the selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 229 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 230 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 231 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 232 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 233 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 234 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| bogdanm | 0:9b334a45a8ff | 235 | * @retval The selected DAC channel data output value. |
| bogdanm | 0:9b334a45a8ff | 236 | */ |
| bogdanm | 0:9b334a45a8ff | 237 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 238 | { |
| bogdanm | 0:9b334a45a8ff | 239 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 240 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 241 | |
| bogdanm | 0:9b334a45a8ff | 242 | /* Returns the DAC channel data output register value */ |
| bogdanm | 0:9b334a45a8ff | 243 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 244 | { |
| bogdanm | 0:9b334a45a8ff | 245 | return hdac->Instance->DOR1; |
| bogdanm | 0:9b334a45a8ff | 246 | } |
| bogdanm | 0:9b334a45a8ff | 247 | else |
| bogdanm | 0:9b334a45a8ff | 248 | { |
| bogdanm | 0:9b334a45a8ff | 249 | return hdac->Instance->DOR2; |
| bogdanm | 0:9b334a45a8ff | 250 | } |
| bogdanm | 0:9b334a45a8ff | 251 | } |
| bogdanm | 0:9b334a45a8ff | 252 | |
| bogdanm | 0:9b334a45a8ff | 253 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 254 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 255 | |
| bogdanm | 0:9b334a45a8ff | 256 | #if defined (STM32F051x8) || defined (STM32F058xx) |
| bogdanm | 0:9b334a45a8ff | 257 | |
| bogdanm | 0:9b334a45a8ff | 258 | /* DAC 1 has 1 channels */ |
| bogdanm | 0:9b334a45a8ff | 259 | |
| bogdanm | 0:9b334a45a8ff | 260 | /** |
| bogdanm | 0:9b334a45a8ff | 261 | * @brief Returns the last data output value of the selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 262 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 263 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 264 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 265 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 266 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 267 | * @retval The selected DAC channel data output value. |
| bogdanm | 0:9b334a45a8ff | 268 | */ |
| bogdanm | 0:9b334a45a8ff | 269 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 270 | { |
| bogdanm | 0:9b334a45a8ff | 271 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 272 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 273 | |
| bogdanm | 0:9b334a45a8ff | 274 | /* Returns the DAC channel data output register value */ |
| bogdanm | 0:9b334a45a8ff | 275 | return hdac->Instance->DOR1; |
| bogdanm | 0:9b334a45a8ff | 276 | } |
| bogdanm | 0:9b334a45a8ff | 277 | |
| bogdanm | 0:9b334a45a8ff | 278 | |
| bogdanm | 0:9b334a45a8ff | 279 | |
| bogdanm | 0:9b334a45a8ff | 280 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 281 | |
| bogdanm | 0:9b334a45a8ff | 282 | /** |
| bogdanm | 0:9b334a45a8ff | 283 | * @} |
| bogdanm | 0:9b334a45a8ff | 284 | */ |
| bogdanm | 0:9b334a45a8ff | 285 | |
| bogdanm | 0:9b334a45a8ff | 286 | /** @addtogroup DAC_Exported_Functions_Group2 |
| bogdanm | 0:9b334a45a8ff | 287 | * @{ |
| bogdanm | 0:9b334a45a8ff | 288 | */ |
| bogdanm | 0:9b334a45a8ff | 289 | |
| bogdanm | 0:9b334a45a8ff | 290 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 291 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 292 | |
| bogdanm | 0:9b334a45a8ff | 293 | /** |
| bogdanm | 0:9b334a45a8ff | 294 | * @brief Enables DAC and starts conversion of channel. |
| bogdanm | 0:9b334a45a8ff | 295 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 296 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 297 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 298 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 299 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 300 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| bogdanm | 0:9b334a45a8ff | 301 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 302 | */ |
| bogdanm | 0:9b334a45a8ff | 303 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 304 | { |
| bogdanm | 0:9b334a45a8ff | 305 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 306 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 307 | |
| bogdanm | 0:9b334a45a8ff | 308 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 309 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 310 | |
| bogdanm | 0:9b334a45a8ff | 311 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 312 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 313 | |
| bogdanm | 0:9b334a45a8ff | 314 | /* Enable the Peripharal */ |
| bogdanm | 0:9b334a45a8ff | 315 | __HAL_DAC_ENABLE(hdac, Channel); |
| bogdanm | 0:9b334a45a8ff | 316 | |
| bogdanm | 0:9b334a45a8ff | 317 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 318 | { |
| bogdanm | 0:9b334a45a8ff | 319 | /* Check if software trigger enabled */ |
| bogdanm | 0:9b334a45a8ff | 320 | if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1)) |
| bogdanm | 0:9b334a45a8ff | 321 | { |
| bogdanm | 0:9b334a45a8ff | 322 | /* Enable the selected DAC software conversion */ |
| bogdanm | 0:9b334a45a8ff | 323 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
| bogdanm | 0:9b334a45a8ff | 324 | } |
| bogdanm | 0:9b334a45a8ff | 325 | } |
| bogdanm | 0:9b334a45a8ff | 326 | else |
| bogdanm | 0:9b334a45a8ff | 327 | { |
| bogdanm | 0:9b334a45a8ff | 328 | /* Check if software trigger enabled */ |
| bogdanm | 0:9b334a45a8ff | 329 | if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2)) |
| bogdanm | 0:9b334a45a8ff | 330 | { |
| bogdanm | 0:9b334a45a8ff | 331 | /* Enable the selected DAC software conversion*/ |
| bogdanm | 0:9b334a45a8ff | 332 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
| bogdanm | 0:9b334a45a8ff | 333 | } |
| bogdanm | 0:9b334a45a8ff | 334 | } |
| bogdanm | 0:9b334a45a8ff | 335 | |
| bogdanm | 0:9b334a45a8ff | 336 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 337 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 338 | |
| bogdanm | 0:9b334a45a8ff | 339 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 340 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 341 | |
| bogdanm | 0:9b334a45a8ff | 342 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 343 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 344 | } |
| bogdanm | 0:9b334a45a8ff | 345 | |
| bogdanm | 0:9b334a45a8ff | 346 | /** |
| bogdanm | 0:9b334a45a8ff | 347 | * @brief Enables DAC and starts conversion of channel. |
| bogdanm | 0:9b334a45a8ff | 348 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 349 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 350 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 351 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 352 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 353 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| bogdanm | 0:9b334a45a8ff | 354 | * @param pData: The destination peripheral Buffer address. |
| bogdanm | 0:9b334a45a8ff | 355 | * @param Length: The length of data to be transferred from memory to DAC peripheral |
| bogdanm | 0:9b334a45a8ff | 356 | * @param Alignment: Specifies the data alignment for DAC channel. |
| bogdanm | 0:9b334a45a8ff | 357 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 358 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 359 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
| bogdanm | 0:9b334a45a8ff | 360 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 361 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 362 | */ |
| bogdanm | 0:9b334a45a8ff | 363 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
| bogdanm | 0:9b334a45a8ff | 364 | { |
| bogdanm | 0:9b334a45a8ff | 365 | uint32_t tmpreg = 0; |
| bogdanm | 0:9b334a45a8ff | 366 | |
| bogdanm | 0:9b334a45a8ff | 367 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 368 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 369 | assert_param(IS_DAC_ALIGN(Alignment)); |
| bogdanm | 0:9b334a45a8ff | 370 | |
| bogdanm | 0:9b334a45a8ff | 371 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 372 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 373 | |
| bogdanm | 0:9b334a45a8ff | 374 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 375 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 376 | |
| bogdanm | 0:9b334a45a8ff | 377 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 378 | { |
| bogdanm | 0:9b334a45a8ff | 379 | /* Set the DMA transfer complete callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 380 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
| bogdanm | 0:9b334a45a8ff | 381 | |
| bogdanm | 0:9b334a45a8ff | 382 | /* Set the DMA half transfer complete callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 383 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
| bogdanm | 0:9b334a45a8ff | 384 | |
| bogdanm | 0:9b334a45a8ff | 385 | /* Set the DMA error callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 386 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
| bogdanm | 0:9b334a45a8ff | 387 | |
| bogdanm | 0:9b334a45a8ff | 388 | /* Enable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 389 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
| bogdanm | 0:9b334a45a8ff | 390 | |
| bogdanm | 0:9b334a45a8ff | 391 | /* Case of use of channel 1 */ |
| bogdanm | 0:9b334a45a8ff | 392 | switch(Alignment) |
| bogdanm | 0:9b334a45a8ff | 393 | { |
| bogdanm | 0:9b334a45a8ff | 394 | case DAC_ALIGN_12B_R: |
| bogdanm | 0:9b334a45a8ff | 395 | /* Get DHR12R1 address */ |
| bogdanm | 0:9b334a45a8ff | 396 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
| bogdanm | 0:9b334a45a8ff | 397 | break; |
| bogdanm | 0:9b334a45a8ff | 398 | case DAC_ALIGN_12B_L: |
| bogdanm | 0:9b334a45a8ff | 399 | /* Get DHR12L1 address */ |
| bogdanm | 0:9b334a45a8ff | 400 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
| bogdanm | 0:9b334a45a8ff | 401 | break; |
| bogdanm | 0:9b334a45a8ff | 402 | case DAC_ALIGN_8B_R: |
| bogdanm | 0:9b334a45a8ff | 403 | /* Get DHR8R1 address */ |
| bogdanm | 0:9b334a45a8ff | 404 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
| bogdanm | 0:9b334a45a8ff | 405 | break; |
| bogdanm | 0:9b334a45a8ff | 406 | default: |
| bogdanm | 0:9b334a45a8ff | 407 | break; |
| bogdanm | 0:9b334a45a8ff | 408 | } |
| bogdanm | 0:9b334a45a8ff | 409 | } |
| bogdanm | 0:9b334a45a8ff | 410 | else |
| bogdanm | 0:9b334a45a8ff | 411 | { |
| bogdanm | 0:9b334a45a8ff | 412 | /* Set the DMA transfer complete callback for channel2 */ |
| bogdanm | 0:9b334a45a8ff | 413 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
| bogdanm | 0:9b334a45a8ff | 414 | |
| bogdanm | 0:9b334a45a8ff | 415 | /* Set the DMA half transfer complete callback for channel2 */ |
| bogdanm | 0:9b334a45a8ff | 416 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
| bogdanm | 0:9b334a45a8ff | 417 | |
| bogdanm | 0:9b334a45a8ff | 418 | /* Set the DMA error callback for channel2 */ |
| bogdanm | 0:9b334a45a8ff | 419 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
| bogdanm | 0:9b334a45a8ff | 420 | |
| bogdanm | 0:9b334a45a8ff | 421 | /* Enable the selected DAC channel2 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 422 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
| bogdanm | 0:9b334a45a8ff | 423 | |
| bogdanm | 0:9b334a45a8ff | 424 | /* Case of use of channel 2 */ |
| bogdanm | 0:9b334a45a8ff | 425 | switch(Alignment) |
| bogdanm | 0:9b334a45a8ff | 426 | { |
| bogdanm | 0:9b334a45a8ff | 427 | case DAC_ALIGN_12B_R: |
| bogdanm | 0:9b334a45a8ff | 428 | /* Get DHR12R2 address */ |
| bogdanm | 0:9b334a45a8ff | 429 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
| bogdanm | 0:9b334a45a8ff | 430 | break; |
| bogdanm | 0:9b334a45a8ff | 431 | case DAC_ALIGN_12B_L: |
| bogdanm | 0:9b334a45a8ff | 432 | /* Get DHR12L2 address */ |
| bogdanm | 0:9b334a45a8ff | 433 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
| bogdanm | 0:9b334a45a8ff | 434 | break; |
| bogdanm | 0:9b334a45a8ff | 435 | case DAC_ALIGN_8B_R: |
| bogdanm | 0:9b334a45a8ff | 436 | /* Get DHR8R2 address */ |
| bogdanm | 0:9b334a45a8ff | 437 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
| bogdanm | 0:9b334a45a8ff | 438 | break; |
| bogdanm | 0:9b334a45a8ff | 439 | default: |
| bogdanm | 0:9b334a45a8ff | 440 | break; |
| bogdanm | 0:9b334a45a8ff | 441 | } |
| bogdanm | 0:9b334a45a8ff | 442 | } |
| bogdanm | 0:9b334a45a8ff | 443 | |
| bogdanm | 0:9b334a45a8ff | 444 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 445 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 446 | { |
| bogdanm | 0:9b334a45a8ff | 447 | /* Enable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 448 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 449 | |
| bogdanm | 0:9b334a45a8ff | 450 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 451 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
| bogdanm | 0:9b334a45a8ff | 452 | } |
| bogdanm | 0:9b334a45a8ff | 453 | else |
| bogdanm | 0:9b334a45a8ff | 454 | { |
| bogdanm | 0:9b334a45a8ff | 455 | /* Enable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 456 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
| bogdanm | 0:9b334a45a8ff | 457 | |
| bogdanm | 0:9b334a45a8ff | 458 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 459 | HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
| bogdanm | 0:9b334a45a8ff | 460 | } |
| bogdanm | 0:9b334a45a8ff | 461 | |
| bogdanm | 0:9b334a45a8ff | 462 | /* Enable the Peripharal */ |
| bogdanm | 0:9b334a45a8ff | 463 | __HAL_DAC_ENABLE(hdac, Channel); |
| bogdanm | 0:9b334a45a8ff | 464 | |
| bogdanm | 0:9b334a45a8ff | 465 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 466 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 467 | |
| bogdanm | 0:9b334a45a8ff | 468 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 469 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 470 | } |
| bogdanm | 0:9b334a45a8ff | 471 | |
| bogdanm | 0:9b334a45a8ff | 472 | |
| bogdanm | 0:9b334a45a8ff | 473 | |
| bogdanm | 0:9b334a45a8ff | 474 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 475 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 476 | |
| bogdanm | 0:9b334a45a8ff | 477 | #if defined (STM32F051x8) || defined (STM32F058xx) |
| bogdanm | 0:9b334a45a8ff | 478 | |
| bogdanm | 0:9b334a45a8ff | 479 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 480 | { |
| bogdanm | 0:9b334a45a8ff | 481 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 482 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 483 | |
| bogdanm | 0:9b334a45a8ff | 484 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 485 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 486 | |
| bogdanm | 0:9b334a45a8ff | 487 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 488 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 489 | |
| bogdanm | 0:9b334a45a8ff | 490 | /* Enable the Peripharal */ |
| bogdanm | 0:9b334a45a8ff | 491 | __HAL_DAC_ENABLE(hdac, Channel); |
| bogdanm | 0:9b334a45a8ff | 492 | |
| bogdanm | 0:9b334a45a8ff | 493 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 494 | { |
| bogdanm | 0:9b334a45a8ff | 495 | /* Check if software trigger enabled */ |
| bogdanm | 0:9b334a45a8ff | 496 | if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1)) |
| bogdanm | 0:9b334a45a8ff | 497 | { |
| bogdanm | 0:9b334a45a8ff | 498 | /* Enable the selected DAC software conversion */ |
| bogdanm | 0:9b334a45a8ff | 499 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
| bogdanm | 0:9b334a45a8ff | 500 | } |
| bogdanm | 0:9b334a45a8ff | 501 | } |
| bogdanm | 0:9b334a45a8ff | 502 | |
| bogdanm | 0:9b334a45a8ff | 503 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 504 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 505 | |
| bogdanm | 0:9b334a45a8ff | 506 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 507 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 508 | |
| bogdanm | 0:9b334a45a8ff | 509 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 510 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 511 | } |
| bogdanm | 0:9b334a45a8ff | 512 | |
| bogdanm | 0:9b334a45a8ff | 513 | /** |
| bogdanm | 0:9b334a45a8ff | 514 | * @brief Enables DAC and starts conversion of channel. |
| bogdanm | 0:9b334a45a8ff | 515 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 516 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 517 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 518 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 519 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 520 | * @param pData: The destination peripheral Buffer address. |
| bogdanm | 0:9b334a45a8ff | 521 | * @param Length: The length of data to be transferred from memory to DAC peripheral |
| bogdanm | 0:9b334a45a8ff | 522 | * @param Alignment: Specifies the data alignment for DAC channel. |
| bogdanm | 0:9b334a45a8ff | 523 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 524 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 525 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
| bogdanm | 0:9b334a45a8ff | 526 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 527 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 528 | */ |
| bogdanm | 0:9b334a45a8ff | 529 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
| bogdanm | 0:9b334a45a8ff | 530 | { |
| bogdanm | 0:9b334a45a8ff | 531 | uint32_t tmpreg = 0; |
| bogdanm | 0:9b334a45a8ff | 532 | |
| bogdanm | 0:9b334a45a8ff | 533 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 534 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 535 | assert_param(IS_DAC_ALIGN(Alignment)); |
| bogdanm | 0:9b334a45a8ff | 536 | |
| bogdanm | 0:9b334a45a8ff | 537 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 538 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 539 | |
| bogdanm | 0:9b334a45a8ff | 540 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 541 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 542 | |
| bogdanm | 0:9b334a45a8ff | 543 | /* Set the DMA transfer complete callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 544 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
| bogdanm | 0:9b334a45a8ff | 545 | |
| bogdanm | 0:9b334a45a8ff | 546 | /* Set the DMA half transfer complete callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 547 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
| bogdanm | 0:9b334a45a8ff | 548 | |
| bogdanm | 0:9b334a45a8ff | 549 | /* Set the DMA error callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 550 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
| bogdanm | 0:9b334a45a8ff | 551 | |
| bogdanm | 0:9b334a45a8ff | 552 | /* Enable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 553 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
| bogdanm | 0:9b334a45a8ff | 554 | |
| bogdanm | 0:9b334a45a8ff | 555 | /* Case of use of channel 1 */ |
| bogdanm | 0:9b334a45a8ff | 556 | switch(Alignment) |
| bogdanm | 0:9b334a45a8ff | 557 | { |
| bogdanm | 0:9b334a45a8ff | 558 | case DAC_ALIGN_12B_R: |
| bogdanm | 0:9b334a45a8ff | 559 | /* Get DHR12R1 address */ |
| bogdanm | 0:9b334a45a8ff | 560 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
| bogdanm | 0:9b334a45a8ff | 561 | break; |
| bogdanm | 0:9b334a45a8ff | 562 | case DAC_ALIGN_12B_L: |
| bogdanm | 0:9b334a45a8ff | 563 | /* Get DHR12L1 address */ |
| bogdanm | 0:9b334a45a8ff | 564 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
| bogdanm | 0:9b334a45a8ff | 565 | break; |
| bogdanm | 0:9b334a45a8ff | 566 | case DAC_ALIGN_8B_R: |
| bogdanm | 0:9b334a45a8ff | 567 | /* Get DHR8R1 address */ |
| bogdanm | 0:9b334a45a8ff | 568 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
| bogdanm | 0:9b334a45a8ff | 569 | break; |
| bogdanm | 0:9b334a45a8ff | 570 | default: |
| bogdanm | 0:9b334a45a8ff | 571 | break; |
| bogdanm | 0:9b334a45a8ff | 572 | } |
| bogdanm | 0:9b334a45a8ff | 573 | |
| bogdanm | 0:9b334a45a8ff | 574 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 575 | /* Enable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 576 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 577 | |
| bogdanm | 0:9b334a45a8ff | 578 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 579 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
| bogdanm | 0:9b334a45a8ff | 580 | |
| bogdanm | 0:9b334a45a8ff | 581 | /* Enable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 582 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 583 | |
| bogdanm | 0:9b334a45a8ff | 584 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 585 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
| bogdanm | 0:9b334a45a8ff | 586 | |
| bogdanm | 0:9b334a45a8ff | 587 | /* Enable the Peripharal */ |
| bogdanm | 0:9b334a45a8ff | 588 | __HAL_DAC_ENABLE(hdac, Channel); |
| bogdanm | 0:9b334a45a8ff | 589 | |
| bogdanm | 0:9b334a45a8ff | 590 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 591 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 592 | |
| bogdanm | 0:9b334a45a8ff | 593 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 594 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 595 | } |
| bogdanm | 0:9b334a45a8ff | 596 | |
| bogdanm | 0:9b334a45a8ff | 597 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 598 | |
| bogdanm | 0:9b334a45a8ff | 599 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 600 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 601 | /* DAC channel 2 is available on top of DAC channel 1 */ |
| bogdanm | 0:9b334a45a8ff | 602 | |
| bogdanm | 0:9b334a45a8ff | 603 | /** |
| bogdanm | 0:9b334a45a8ff | 604 | * @brief Handles DAC interrupt request |
| bogdanm | 0:9b334a45a8ff | 605 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 606 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 607 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 608 | */ |
| bogdanm | 0:9b334a45a8ff | 609 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 610 | { |
| bogdanm | 0:9b334a45a8ff | 611 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
| bogdanm | 0:9b334a45a8ff | 612 | { |
| bogdanm | 0:9b334a45a8ff | 613 | /* Check underrun channel 1 flag */ |
| bogdanm | 0:9b334a45a8ff | 614 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
| bogdanm | 0:9b334a45a8ff | 615 | { |
| bogdanm | 0:9b334a45a8ff | 616 | /* Change DAC state to error state */ |
| bogdanm | 0:9b334a45a8ff | 617 | hdac->State = HAL_DAC_STATE_ERROR; |
| bogdanm | 0:9b334a45a8ff | 618 | |
| bogdanm | 0:9b334a45a8ff | 619 | /* Set DAC error code to channel1 DMA underrun error */ |
| bogdanm | 0:9b334a45a8ff | 620 | hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1; |
| bogdanm | 0:9b334a45a8ff | 621 | |
| bogdanm | 0:9b334a45a8ff | 622 | /* Clear the underrun flag */ |
| bogdanm | 0:9b334a45a8ff | 623 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 624 | |
| bogdanm | 0:9b334a45a8ff | 625 | /* Disable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 626 | hdac->Instance->CR &= ~DAC_CR_DMAEN1; |
| bogdanm | 0:9b334a45a8ff | 627 | |
| bogdanm | 0:9b334a45a8ff | 628 | /* Error callback */ |
| bogdanm | 0:9b334a45a8ff | 629 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
| bogdanm | 0:9b334a45a8ff | 630 | } |
| bogdanm | 0:9b334a45a8ff | 631 | } |
| bogdanm | 0:9b334a45a8ff | 632 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
| bogdanm | 0:9b334a45a8ff | 633 | { |
| bogdanm | 0:9b334a45a8ff | 634 | /* Check underrun channel 2 flag */ |
| bogdanm | 0:9b334a45a8ff | 635 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
| bogdanm | 0:9b334a45a8ff | 636 | { |
| bogdanm | 0:9b334a45a8ff | 637 | /* Change DAC state to error state */ |
| bogdanm | 0:9b334a45a8ff | 638 | hdac->State = HAL_DAC_STATE_ERROR; |
| bogdanm | 0:9b334a45a8ff | 639 | |
| bogdanm | 0:9b334a45a8ff | 640 | /* Set DAC error code to channel2 DMA underrun error */ |
| bogdanm | 0:9b334a45a8ff | 641 | hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2; |
| bogdanm | 0:9b334a45a8ff | 642 | |
| bogdanm | 0:9b334a45a8ff | 643 | /* Clear the underrun flag */ |
| bogdanm | 0:9b334a45a8ff | 644 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2); |
| bogdanm | 0:9b334a45a8ff | 645 | |
| bogdanm | 0:9b334a45a8ff | 646 | /* Disable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 647 | hdac->Instance->CR &= ~DAC_CR_DMAEN2; |
| bogdanm | 0:9b334a45a8ff | 648 | |
| bogdanm | 0:9b334a45a8ff | 649 | /* Error callback */ |
| bogdanm | 0:9b334a45a8ff | 650 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 651 | } |
| bogdanm | 0:9b334a45a8ff | 652 | } |
| bogdanm | 0:9b334a45a8ff | 653 | } |
| bogdanm | 0:9b334a45a8ff | 654 | |
| bogdanm | 0:9b334a45a8ff | 655 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 656 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 657 | |
| bogdanm | 0:9b334a45a8ff | 658 | #if defined (STM32F051x8) || defined (STM32F058xx) |
| bogdanm | 0:9b334a45a8ff | 659 | /* DAC channel 2 is NOT available. Only DAC channel 1 is available */ |
| bogdanm | 0:9b334a45a8ff | 660 | |
| bogdanm | 0:9b334a45a8ff | 661 | /** |
| bogdanm | 0:9b334a45a8ff | 662 | * @brief Handles DAC interrupt request |
| bogdanm | 0:9b334a45a8ff | 663 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 664 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 665 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 666 | */ |
| bogdanm | 0:9b334a45a8ff | 667 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 668 | { |
| bogdanm | 0:9b334a45a8ff | 669 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
| bogdanm | 0:9b334a45a8ff | 670 | { |
| bogdanm | 0:9b334a45a8ff | 671 | /* Check Overrun flag */ |
| bogdanm | 0:9b334a45a8ff | 672 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
| bogdanm | 0:9b334a45a8ff | 673 | { |
| bogdanm | 0:9b334a45a8ff | 674 | /* Change DAC state to error state */ |
| bogdanm | 0:9b334a45a8ff | 675 | hdac->State = HAL_DAC_STATE_ERROR; |
| bogdanm | 0:9b334a45a8ff | 676 | |
| bogdanm | 0:9b334a45a8ff | 677 | /* Set DAC error code to chanel1 DMA underrun error */ |
| bogdanm | 0:9b334a45a8ff | 678 | hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1; |
| bogdanm | 0:9b334a45a8ff | 679 | |
| bogdanm | 0:9b334a45a8ff | 680 | /* Clear the underrun flag */ |
| bogdanm | 0:9b334a45a8ff | 681 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 682 | |
| bogdanm | 0:9b334a45a8ff | 683 | /* Disable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 684 | hdac->Instance->CR &= ~DAC_CR_DMAEN1; |
| bogdanm | 0:9b334a45a8ff | 685 | |
| bogdanm | 0:9b334a45a8ff | 686 | /* Error callback */ |
| bogdanm | 0:9b334a45a8ff | 687 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
| bogdanm | 0:9b334a45a8ff | 688 | } |
| bogdanm | 0:9b334a45a8ff | 689 | } |
| bogdanm | 0:9b334a45a8ff | 690 | } |
| bogdanm | 0:9b334a45a8ff | 691 | |
| bogdanm | 0:9b334a45a8ff | 692 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 693 | |
| bogdanm | 0:9b334a45a8ff | 694 | /** |
| bogdanm | 0:9b334a45a8ff | 695 | * @} |
| bogdanm | 0:9b334a45a8ff | 696 | */ |
| bogdanm | 0:9b334a45a8ff | 697 | |
| bogdanm | 0:9b334a45a8ff | 698 | /** |
| bogdanm | 0:9b334a45a8ff | 699 | * @} |
| bogdanm | 0:9b334a45a8ff | 700 | */ |
| bogdanm | 0:9b334a45a8ff | 701 | |
| bogdanm | 0:9b334a45a8ff | 702 | #if defined(STM32F051x8) || defined(STM32F058xx) || \ |
| bogdanm | 0:9b334a45a8ff | 703 | defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 704 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 705 | |
| bogdanm | 0:9b334a45a8ff | 706 | /** @addtogroup DAC_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 707 | * @{ |
| bogdanm | 0:9b334a45a8ff | 708 | */ |
| bogdanm | 0:9b334a45a8ff | 709 | |
| bogdanm | 0:9b334a45a8ff | 710 | /** |
| bogdanm | 0:9b334a45a8ff | 711 | * @brief DMA conversion complete callback. |
| bogdanm | 0:9b334a45a8ff | 712 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 713 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 714 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 715 | */ |
| bogdanm | 0:9b334a45a8ff | 716 | static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 717 | { |
| bogdanm | 0:9b334a45a8ff | 718 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 719 | |
| bogdanm | 0:9b334a45a8ff | 720 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
| bogdanm | 0:9b334a45a8ff | 721 | |
| bogdanm | 0:9b334a45a8ff | 722 | hdac->State= HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 723 | } |
| bogdanm | 0:9b334a45a8ff | 724 | |
| bogdanm | 0:9b334a45a8ff | 725 | /** |
| bogdanm | 0:9b334a45a8ff | 726 | * @brief DMA half transfer complete callback. |
| bogdanm | 0:9b334a45a8ff | 727 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 728 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 729 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 730 | */ |
| bogdanm | 0:9b334a45a8ff | 731 | static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 732 | { |
| bogdanm | 0:9b334a45a8ff | 733 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 734 | /* Conversion complete callback */ |
| bogdanm | 0:9b334a45a8ff | 735 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
| bogdanm | 0:9b334a45a8ff | 736 | } |
| bogdanm | 0:9b334a45a8ff | 737 | |
| bogdanm | 0:9b334a45a8ff | 738 | /** |
| bogdanm | 0:9b334a45a8ff | 739 | * @brief DMA error callback |
| bogdanm | 0:9b334a45a8ff | 740 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 741 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 742 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 743 | */ |
| bogdanm | 0:9b334a45a8ff | 744 | static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 745 | { |
| bogdanm | 0:9b334a45a8ff | 746 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 747 | |
| bogdanm | 0:9b334a45a8ff | 748 | /* Set DAC error code to DMA error */ |
| bogdanm | 0:9b334a45a8ff | 749 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
| bogdanm | 0:9b334a45a8ff | 750 | |
| bogdanm | 0:9b334a45a8ff | 751 | HAL_DAC_ErrorCallbackCh1(hdac); |
| bogdanm | 0:9b334a45a8ff | 752 | |
| bogdanm | 0:9b334a45a8ff | 753 | hdac->State= HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 754 | } |
| bogdanm | 0:9b334a45a8ff | 755 | /** |
| bogdanm | 0:9b334a45a8ff | 756 | * @} |
| bogdanm | 0:9b334a45a8ff | 757 | */ |
| bogdanm | 0:9b334a45a8ff | 758 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 759 | /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 760 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 761 | |
| bogdanm | 0:9b334a45a8ff | 762 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 763 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 764 | |
| bogdanm | 0:9b334a45a8ff | 765 | /** @addtogroup DAC_Private_Functions |
| bogdanm | 0:9b334a45a8ff | 766 | * @{ |
| bogdanm | 0:9b334a45a8ff | 767 | */ |
| bogdanm | 0:9b334a45a8ff | 768 | |
| bogdanm | 0:9b334a45a8ff | 769 | /** |
| bogdanm | 0:9b334a45a8ff | 770 | * @brief DMA conversion complete callback. |
| bogdanm | 0:9b334a45a8ff | 771 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 772 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 773 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 774 | */ |
| bogdanm | 0:9b334a45a8ff | 775 | void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 776 | { |
| bogdanm | 0:9b334a45a8ff | 777 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 778 | |
| bogdanm | 0:9b334a45a8ff | 779 | HAL_DACEx_ConvCpltCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 780 | |
| bogdanm | 0:9b334a45a8ff | 781 | hdac->State= HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 782 | } |
| bogdanm | 0:9b334a45a8ff | 783 | |
| bogdanm | 0:9b334a45a8ff | 784 | /** |
| bogdanm | 0:9b334a45a8ff | 785 | * @brief DMA half transfer complete callback. |
| bogdanm | 0:9b334a45a8ff | 786 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 787 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 788 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 789 | */ |
| bogdanm | 0:9b334a45a8ff | 790 | void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 791 | { |
| bogdanm | 0:9b334a45a8ff | 792 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 793 | /* Conversion complete callback */ |
| bogdanm | 0:9b334a45a8ff | 794 | HAL_DACEx_ConvHalfCpltCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 795 | } |
| bogdanm | 0:9b334a45a8ff | 796 | |
| bogdanm | 0:9b334a45a8ff | 797 | /** |
| bogdanm | 0:9b334a45a8ff | 798 | * @brief DMA error callback |
| bogdanm | 0:9b334a45a8ff | 799 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 800 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 801 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 802 | */ |
| bogdanm | 0:9b334a45a8ff | 803 | void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 804 | { |
| bogdanm | 0:9b334a45a8ff | 805 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 806 | |
| bogdanm | 0:9b334a45a8ff | 807 | /* Set DAC error code to DMA error */ |
| bogdanm | 0:9b334a45a8ff | 808 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
| bogdanm | 0:9b334a45a8ff | 809 | |
| bogdanm | 0:9b334a45a8ff | 810 | HAL_DACEx_ErrorCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 811 | |
| bogdanm | 0:9b334a45a8ff | 812 | hdac->State= HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 813 | } |
| bogdanm | 0:9b334a45a8ff | 814 | |
| bogdanm | 0:9b334a45a8ff | 815 | /** |
| bogdanm | 0:9b334a45a8ff | 816 | * @} |
| bogdanm | 0:9b334a45a8ff | 817 | */ |
| bogdanm | 0:9b334a45a8ff | 818 | |
| bogdanm | 0:9b334a45a8ff | 819 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 820 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 821 | |
| bogdanm | 0:9b334a45a8ff | 822 | /** |
| bogdanm | 0:9b334a45a8ff | 823 | * @} |
| bogdanm | 0:9b334a45a8ff | 824 | */ |
| bogdanm | 0:9b334a45a8ff | 825 | |
| bogdanm | 0:9b334a45a8ff | 826 | /** @defgroup DACEx DACEx |
| bogdanm | 0:9b334a45a8ff | 827 | * @brief DACEx driver module |
| bogdanm | 0:9b334a45a8ff | 828 | * @{ |
| bogdanm | 0:9b334a45a8ff | 829 | */ |
| bogdanm | 0:9b334a45a8ff | 830 | |
| bogdanm | 0:9b334a45a8ff | 831 | /* Private typedef -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 832 | /* Private define ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 833 | /* Private macro -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 834 | /** @defgroup DACEx_Private_Macros DACEx Private Macros |
| bogdanm | 0:9b334a45a8ff | 835 | * @{ |
| bogdanm | 0:9b334a45a8ff | 836 | */ |
| bogdanm | 0:9b334a45a8ff | 837 | /** |
| bogdanm | 0:9b334a45a8ff | 838 | * @} |
| bogdanm | 0:9b334a45a8ff | 839 | */ |
| bogdanm | 0:9b334a45a8ff | 840 | |
| bogdanm | 0:9b334a45a8ff | 841 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 842 | /* Private function prototypes -----------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 843 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 844 | |
| bogdanm | 0:9b334a45a8ff | 845 | /** @defgroup DACEx_Exported_Functions DACEx Exported Functions |
| bogdanm | 0:9b334a45a8ff | 846 | * @{ |
| bogdanm | 0:9b334a45a8ff | 847 | */ |
| bogdanm | 0:9b334a45a8ff | 848 | |
| bogdanm | 0:9b334a45a8ff | 849 | /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions |
| bogdanm | 0:9b334a45a8ff | 850 | * @brief Extended features functions |
| bogdanm | 0:9b334a45a8ff | 851 | * |
| bogdanm | 0:9b334a45a8ff | 852 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 853 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 854 | ##### Extended features functions ##### |
| bogdanm | 0:9b334a45a8ff | 855 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 856 | [..] This section provides functions allowing to: |
| bogdanm | 0:9b334a45a8ff | 857 | (+) Start conversion. |
| bogdanm | 0:9b334a45a8ff | 858 | (+) Stop conversion. |
| bogdanm | 0:9b334a45a8ff | 859 | (+) Start conversion and enable DMA transfer. |
| bogdanm | 0:9b334a45a8ff | 860 | (+) Stop conversion and disable DMA transfer. |
| bogdanm | 0:9b334a45a8ff | 861 | (+) Get result of conversion. |
| bogdanm | 0:9b334a45a8ff | 862 | (+) Get result of dual mode conversion. |
| bogdanm | 0:9b334a45a8ff | 863 | |
| bogdanm | 0:9b334a45a8ff | 864 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 865 | * @{ |
| bogdanm | 0:9b334a45a8ff | 866 | */ |
| bogdanm | 0:9b334a45a8ff | 867 | |
| bogdanm | 0:9b334a45a8ff | 868 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 869 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 870 | |
| bogdanm | 0:9b334a45a8ff | 871 | /** |
| bogdanm | 0:9b334a45a8ff | 872 | * @brief Returns the last data output value of the selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 873 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 874 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 875 | * @retval The selected DAC channel data output value. |
| bogdanm | 0:9b334a45a8ff | 876 | */ |
| bogdanm | 0:9b334a45a8ff | 877 | uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 878 | { |
| bogdanm | 0:9b334a45a8ff | 879 | uint32_t tmp = 0; |
| bogdanm | 0:9b334a45a8ff | 880 | |
| bogdanm | 0:9b334a45a8ff | 881 | tmp |= hdac->Instance->DOR1; |
| bogdanm | 0:9b334a45a8ff | 882 | |
| bogdanm | 0:9b334a45a8ff | 883 | /* DAC channel 2 is present in DAC 1 */ |
| bogdanm | 0:9b334a45a8ff | 884 | tmp |= hdac->Instance->DOR2 << 16; |
| bogdanm | 0:9b334a45a8ff | 885 | |
| bogdanm | 0:9b334a45a8ff | 886 | /* Returns the DAC channel data output register value */ |
| bogdanm | 0:9b334a45a8ff | 887 | return tmp; |
| bogdanm | 0:9b334a45a8ff | 888 | } |
| bogdanm | 0:9b334a45a8ff | 889 | |
| bogdanm | 0:9b334a45a8ff | 890 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 891 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 892 | |
| bogdanm | 0:9b334a45a8ff | 893 | #if defined (STM32F051x8) || defined (STM32F058xx) |
| bogdanm | 0:9b334a45a8ff | 894 | |
| bogdanm | 0:9b334a45a8ff | 895 | /** |
| bogdanm | 0:9b334a45a8ff | 896 | * @brief Returns the last data output value of the selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 897 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 898 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 899 | * @retval The selected DAC channel data output value. |
| bogdanm | 0:9b334a45a8ff | 900 | */ |
| bogdanm | 0:9b334a45a8ff | 901 | uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 902 | { |
| bogdanm | 0:9b334a45a8ff | 903 | uint32_t tmp = 0; |
| bogdanm | 0:9b334a45a8ff | 904 | |
| bogdanm | 0:9b334a45a8ff | 905 | tmp |= hdac->Instance->DOR1; |
| bogdanm | 0:9b334a45a8ff | 906 | |
| bogdanm | 0:9b334a45a8ff | 907 | /* Returns the DAC channel data output register value */ |
| bogdanm | 0:9b334a45a8ff | 908 | return tmp; |
| bogdanm | 0:9b334a45a8ff | 909 | } |
| bogdanm | 0:9b334a45a8ff | 910 | |
| bogdanm | 0:9b334a45a8ff | 911 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 912 | |
| bogdanm | 0:9b334a45a8ff | 913 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 914 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 915 | |
| bogdanm | 0:9b334a45a8ff | 916 | /** |
| bogdanm | 0:9b334a45a8ff | 917 | * @brief Enables or disables the selected DAC channel wave generation. |
| bogdanm | 0:9b334a45a8ff | 918 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 919 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 920 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 921 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 922 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
| bogdanm | 0:9b334a45a8ff | 923 | * @param Amplitude: Select max triangle amplitude. |
| bogdanm | 0:9b334a45a8ff | 924 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 925 | * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1 |
| bogdanm | 0:9b334a45a8ff | 926 | * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3 |
| bogdanm | 0:9b334a45a8ff | 927 | * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7 |
| bogdanm | 0:9b334a45a8ff | 928 | * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15 |
| bogdanm | 0:9b334a45a8ff | 929 | * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31 |
| bogdanm | 0:9b334a45a8ff | 930 | * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63 |
| bogdanm | 0:9b334a45a8ff | 931 | * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127 |
| bogdanm | 0:9b334a45a8ff | 932 | * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255 |
| bogdanm | 0:9b334a45a8ff | 933 | * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511 |
| bogdanm | 0:9b334a45a8ff | 934 | * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023 |
| bogdanm | 0:9b334a45a8ff | 935 | * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047 |
| bogdanm | 0:9b334a45a8ff | 936 | * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095 |
| bogdanm | 0:9b334a45a8ff | 937 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 938 | */ |
| bogdanm | 0:9b334a45a8ff | 939 | HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
| bogdanm | 0:9b334a45a8ff | 940 | { |
| bogdanm | 0:9b334a45a8ff | 941 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 942 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 943 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
| bogdanm | 0:9b334a45a8ff | 944 | |
| bogdanm | 0:9b334a45a8ff | 945 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 946 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 947 | |
| bogdanm | 0:9b334a45a8ff | 948 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 949 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 950 | |
| bogdanm | 0:9b334a45a8ff | 951 | /* Enable the selected wave generation for the selected DAC channel */ |
| bogdanm | 0:9b334a45a8ff | 952 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel); |
| bogdanm | 0:9b334a45a8ff | 953 | |
| bogdanm | 0:9b334a45a8ff | 954 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 955 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 956 | |
| bogdanm | 0:9b334a45a8ff | 957 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 958 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 959 | |
| bogdanm | 0:9b334a45a8ff | 960 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 961 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 962 | } |
| bogdanm | 0:9b334a45a8ff | 963 | |
| bogdanm | 0:9b334a45a8ff | 964 | /** |
| bogdanm | 0:9b334a45a8ff | 965 | * @brief Enables or disables the selected DAC channel wave generation. |
| bogdanm | 0:9b334a45a8ff | 966 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 967 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 968 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 969 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 970 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
| bogdanm | 0:9b334a45a8ff | 971 | * @param Amplitude: Unmask DAC channel LFSR for noise wave generation. |
| bogdanm | 0:9b334a45a8ff | 972 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 973 | * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 974 | * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 975 | * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 976 | * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 977 | * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 978 | * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 979 | * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 980 | * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 981 | * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 982 | * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 983 | * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 984 | * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 985 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 986 | */ |
| bogdanm | 0:9b334a45a8ff | 987 | HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
| bogdanm | 0:9b334a45a8ff | 988 | { |
| bogdanm | 0:9b334a45a8ff | 989 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 990 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 991 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
| bogdanm | 0:9b334a45a8ff | 992 | |
| bogdanm | 0:9b334a45a8ff | 993 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 994 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 995 | |
| bogdanm | 0:9b334a45a8ff | 996 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 997 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 998 | |
| bogdanm | 0:9b334a45a8ff | 999 | /* Enable the selected wave generation for the selected DAC channel */ |
| bogdanm | 0:9b334a45a8ff | 1000 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel); |
| bogdanm | 0:9b334a45a8ff | 1001 | |
| bogdanm | 0:9b334a45a8ff | 1002 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 1003 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 1004 | |
| bogdanm | 0:9b334a45a8ff | 1005 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 1006 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 1007 | |
| bogdanm | 0:9b334a45a8ff | 1008 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1009 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1010 | } |
| bogdanm | 0:9b334a45a8ff | 1011 | |
| bogdanm | 0:9b334a45a8ff | 1012 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 1013 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 1014 | |
| bogdanm | 0:9b334a45a8ff | 1015 | /** |
| bogdanm | 0:9b334a45a8ff | 1016 | * @} |
| bogdanm | 0:9b334a45a8ff | 1017 | */ |
| bogdanm | 0:9b334a45a8ff | 1018 | |
| bogdanm | 0:9b334a45a8ff | 1019 | /** |
| bogdanm | 0:9b334a45a8ff | 1020 | * @} |
| bogdanm | 0:9b334a45a8ff | 1021 | */ |
| bogdanm | 0:9b334a45a8ff | 1022 | |
| bogdanm | 0:9b334a45a8ff | 1023 | #if defined(STM32F051x8) || defined(STM32F058xx) || \ |
| bogdanm | 0:9b334a45a8ff | 1024 | defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 1025 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 1026 | |
| bogdanm | 0:9b334a45a8ff | 1027 | /** @addtogroup DACEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 1028 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1029 | */ |
| bogdanm | 0:9b334a45a8ff | 1030 | |
| bogdanm | 0:9b334a45a8ff | 1031 | /** @addtogroup DACEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 1032 | * @brief Extended features functions |
| bogdanm | 0:9b334a45a8ff | 1033 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1034 | */ |
| bogdanm | 0:9b334a45a8ff | 1035 | |
| bogdanm | 0:9b334a45a8ff | 1036 | /** |
| bogdanm | 0:9b334a45a8ff | 1037 | * @brief Set the specified data holding register value for dual DAC channel. |
| bogdanm | 0:9b334a45a8ff | 1038 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 1039 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 1040 | * @param Alignment: Specifies the data alignment for dual channel DAC. |
| bogdanm | 0:9b334a45a8ff | 1041 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 1042 | * DAC_ALIGN_8B_R: 8bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 1043 | * DAC_ALIGN_12B_L: 12bit left data alignment selected |
| bogdanm | 0:9b334a45a8ff | 1044 | * DAC_ALIGN_12B_R: 12bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 1045 | * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register. |
| bogdanm | 0:9b334a45a8ff | 1046 | * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register. |
| bogdanm | 0:9b334a45a8ff | 1047 | * @note In dual mode, a unique register access is required to write in both |
| bogdanm | 0:9b334a45a8ff | 1048 | * DAC channels at the same time. |
| bogdanm | 0:9b334a45a8ff | 1049 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 1050 | */ |
| bogdanm | 0:9b334a45a8ff | 1051 | HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2) |
| bogdanm | 0:9b334a45a8ff | 1052 | { |
| bogdanm | 0:9b334a45a8ff | 1053 | uint32_t data = 0, tmp = 0; |
| bogdanm | 0:9b334a45a8ff | 1054 | |
| bogdanm | 0:9b334a45a8ff | 1055 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 1056 | assert_param(IS_DAC_ALIGN(Alignment)); |
| bogdanm | 0:9b334a45a8ff | 1057 | assert_param(IS_DAC_DATA(Data1)); |
| bogdanm | 0:9b334a45a8ff | 1058 | assert_param(IS_DAC_DATA(Data2)); |
| bogdanm | 0:9b334a45a8ff | 1059 | |
| bogdanm | 0:9b334a45a8ff | 1060 | /* Calculate and set dual DAC data holding register value */ |
| bogdanm | 0:9b334a45a8ff | 1061 | if (Alignment == DAC_ALIGN_8B_R) |
| bogdanm | 0:9b334a45a8ff | 1062 | { |
| bogdanm | 0:9b334a45a8ff | 1063 | data = ((uint32_t)Data2 << 8) | Data1; |
| bogdanm | 0:9b334a45a8ff | 1064 | } |
| bogdanm | 0:9b334a45a8ff | 1065 | else |
| bogdanm | 0:9b334a45a8ff | 1066 | { |
| bogdanm | 0:9b334a45a8ff | 1067 | data = ((uint32_t)Data2 << 16) | Data1; |
| bogdanm | 0:9b334a45a8ff | 1068 | } |
| bogdanm | 0:9b334a45a8ff | 1069 | |
| bogdanm | 0:9b334a45a8ff | 1070 | tmp = (uint32_t)hdac->Instance; |
| bogdanm | 0:9b334a45a8ff | 1071 | tmp += DAC_DHR12RD_ALIGNMENT(Alignment); |
| bogdanm | 0:9b334a45a8ff | 1072 | |
| bogdanm | 0:9b334a45a8ff | 1073 | /* Set the dual DAC selected data holding register */ |
| bogdanm | 0:9b334a45a8ff | 1074 | *(__IO uint32_t *)tmp = data; |
| bogdanm | 0:9b334a45a8ff | 1075 | |
| bogdanm | 0:9b334a45a8ff | 1076 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 1077 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 1078 | } |
| bogdanm | 0:9b334a45a8ff | 1079 | |
| bogdanm | 0:9b334a45a8ff | 1080 | /** |
| bogdanm | 0:9b334a45a8ff | 1081 | * @} |
| bogdanm | 0:9b334a45a8ff | 1082 | */ |
| bogdanm | 0:9b334a45a8ff | 1083 | |
| bogdanm | 0:9b334a45a8ff | 1084 | /** |
| bogdanm | 0:9b334a45a8ff | 1085 | * @} |
| bogdanm | 0:9b334a45a8ff | 1086 | */ |
| bogdanm | 0:9b334a45a8ff | 1087 | |
| bogdanm | 0:9b334a45a8ff | 1088 | #endif /* STM32F051x8 STM32F058xx */ |
| bogdanm | 0:9b334a45a8ff | 1089 | /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 1090 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 1091 | |
| bogdanm | 0:9b334a45a8ff | 1092 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 0:9b334a45a8ff | 1093 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 0:9b334a45a8ff | 1094 | |
| bogdanm | 0:9b334a45a8ff | 1095 | /** @addtogroup DACEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 1096 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1097 | */ |
| bogdanm | 0:9b334a45a8ff | 1098 | |
| bogdanm | 0:9b334a45a8ff | 1099 | /** @addtogroup DACEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 1100 | * @brief Extended features functions |
| bogdanm | 0:9b334a45a8ff | 1101 | * @{ |
| bogdanm | 0:9b334a45a8ff | 1102 | */ |
| bogdanm | 0:9b334a45a8ff | 1103 | |
| bogdanm | 0:9b334a45a8ff | 1104 | /** |
| bogdanm | 0:9b334a45a8ff | 1105 | * @brief Conversion complete callback in non blocking mode for Channel2 |
| bogdanm | 0:9b334a45a8ff | 1106 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 1107 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 1108 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1109 | */ |
| bogdanm | 0:9b334a45a8ff | 1110 | __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 1111 | { |
| bogdanm | 0:9b334a45a8ff | 1112 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 1113 | the HAL_DAC_ConvCpltCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 1114 | */ |
| bogdanm | 0:9b334a45a8ff | 1115 | } |
| bogdanm | 0:9b334a45a8ff | 1116 | |
| bogdanm | 0:9b334a45a8ff | 1117 | /** |
| bogdanm | 0:9b334a45a8ff | 1118 | * @brief Conversion half DMA transfer callback in non blocking mode for Channel2 |
| bogdanm | 0:9b334a45a8ff | 1119 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 1120 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 1121 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1122 | */ |
| bogdanm | 0:9b334a45a8ff | 1123 | __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 1124 | { |
| bogdanm | 0:9b334a45a8ff | 1125 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 1126 | the HAL_DAC_ConvHalfCpltCallbackCh2 could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 1127 | */ |
| bogdanm | 0:9b334a45a8ff | 1128 | } |
| bogdanm | 0:9b334a45a8ff | 1129 | |
| bogdanm | 0:9b334a45a8ff | 1130 | /** |
| bogdanm | 0:9b334a45a8ff | 1131 | * @brief Error DAC callback for Channel2. |
| bogdanm | 0:9b334a45a8ff | 1132 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 1133 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 1134 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1135 | */ |
| bogdanm | 0:9b334a45a8ff | 1136 | __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac) |
| bogdanm | 0:9b334a45a8ff | 1137 | { |
| bogdanm | 0:9b334a45a8ff | 1138 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 1139 | the HAL_DAC_ErrorCallback could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 1140 | */ |
| bogdanm | 0:9b334a45a8ff | 1141 | } |
| bogdanm | 0:9b334a45a8ff | 1142 | |
| bogdanm | 0:9b334a45a8ff | 1143 | /** |
| bogdanm | 0:9b334a45a8ff | 1144 | * @brief DMA underrun DAC callback for channel2. |
| bogdanm | 0:9b334a45a8ff | 1145 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 1146 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 1147 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 1148 | */ |
| bogdanm | 0:9b334a45a8ff | 1149 | __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac) |
| bogdanm | 0:9b334a45a8ff | 1150 | { |
| bogdanm | 0:9b334a45a8ff | 1151 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 1152 | the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 1153 | */ |
| bogdanm | 0:9b334a45a8ff | 1154 | } |
| bogdanm | 0:9b334a45a8ff | 1155 | |
| bogdanm | 0:9b334a45a8ff | 1156 | /** |
| bogdanm | 0:9b334a45a8ff | 1157 | * @} |
| bogdanm | 0:9b334a45a8ff | 1158 | */ |
| bogdanm | 0:9b334a45a8ff | 1159 | |
| bogdanm | 0:9b334a45a8ff | 1160 | /** |
| bogdanm | 0:9b334a45a8ff | 1161 | * @} |
| bogdanm | 0:9b334a45a8ff | 1162 | */ |
| bogdanm | 0:9b334a45a8ff | 1163 | |
| bogdanm | 0:9b334a45a8ff | 1164 | #endif /* STM32F071xB STM32F072xB STM32F078xx */ |
| bogdanm | 0:9b334a45a8ff | 1165 | /* STM32F091xC STM32F098xx */ |
| bogdanm | 0:9b334a45a8ff | 1166 | |
| bogdanm | 0:9b334a45a8ff | 1167 | /** |
| bogdanm | 0:9b334a45a8ff | 1168 | * @} |
| bogdanm | 0:9b334a45a8ff | 1169 | */ |
| bogdanm | 0:9b334a45a8ff | 1170 | |
| bogdanm | 0:9b334a45a8ff | 1171 | #endif /* HAL_DAC_MODULE_ENABLED */ |
| bogdanm | 0:9b334a45a8ff | 1172 | |
| bogdanm | 0:9b334a45a8ff | 1173 | /** |
| bogdanm | 0:9b334a45a8ff | 1174 | * @} |
| bogdanm | 0:9b334a45a8ff | 1175 | */ |
| bogdanm | 0:9b334a45a8ff | 1176 | |
| bogdanm | 0:9b334a45a8ff | 1177 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |