fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
nameless129
Date:
Mon May 16 16:50:30 2016 +0000
Revision:
129:2e517c56bcfb
Parent:
0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file startup_stm32f030x8.s
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V2.1.0
bogdanm 0:9b334a45a8ff 6 * @date 03-Oct-2014
bogdanm 0:9b334a45a8ff 7 * @brief STM32F030x8 devices vector table for Atollic TrueSTUDIO toolchain.
bogdanm 0:9b334a45a8ff 8 * This module performs:
bogdanm 0:9b334a45a8ff 9 * - Set the initial SP
bogdanm 0:9b334a45a8ff 10 * - Set the initial PC == Reset_Handler,
bogdanm 0:9b334a45a8ff 11 * - Set the vector table entries with the exceptions ISR address
bogdanm 0:9b334a45a8ff 12 * - Branches to main in the C library (which eventually
bogdanm 0:9b334a45a8ff 13 * calls main()).
bogdanm 0:9b334a45a8ff 14 * After Reset the Cortex-M0 processor is in Thread mode,
bogdanm 0:9b334a45a8ff 15 * priority is Privileged, and the Stack is set to Main.
bogdanm 0:9b334a45a8ff 16 ******************************************************************************
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 19 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 20 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 21 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 23 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 24 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 26 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 27 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 28 *
bogdanm 0:9b334a45a8ff 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 39 *
bogdanm 0:9b334a45a8ff 40 ******************************************************************************
bogdanm 0:9b334a45a8ff 41 */
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 .syntax unified
bogdanm 0:9b334a45a8ff 44 .cpu cortex-m0
bogdanm 0:9b334a45a8ff 45 .fpu softvfp
bogdanm 0:9b334a45a8ff 46 .thumb
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 .global g_pfnVectors
bogdanm 0:9b334a45a8ff 49 .global Default_Handler
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /* start address for the initialization values of the .data section.
bogdanm 0:9b334a45a8ff 52 defined in linker script */
bogdanm 0:9b334a45a8ff 53 .word _sidata
bogdanm 0:9b334a45a8ff 54 /* start address for the .data section. defined in linker script */
bogdanm 0:9b334a45a8ff 55 .word _sdata
bogdanm 0:9b334a45a8ff 56 /* end address for the .data section. defined in linker script */
bogdanm 0:9b334a45a8ff 57 .word _edata
bogdanm 0:9b334a45a8ff 58 /* start address for the .bss section. defined in linker script */
bogdanm 0:9b334a45a8ff 59 .word _sbss
bogdanm 0:9b334a45a8ff 60 /* end address for the .bss section. defined in linker script */
bogdanm 0:9b334a45a8ff 61 .word _ebss
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 .section .text.Reset_Handler
bogdanm 0:9b334a45a8ff 64 .weak Reset_Handler
bogdanm 0:9b334a45a8ff 65 .type Reset_Handler, %function
bogdanm 0:9b334a45a8ff 66 Reset_Handler:
bogdanm 0:9b334a45a8ff 67 ldr r0, =_estack
bogdanm 0:9b334a45a8ff 68 mov sp, r0 /* set stack pointer */
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 /* Copy the data segment initializers from flash to SRAM */
bogdanm 0:9b334a45a8ff 71 movs r1, #0
bogdanm 0:9b334a45a8ff 72 b LoopCopyDataInit
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 CopyDataInit:
bogdanm 0:9b334a45a8ff 75 ldr r3, =_sidata
bogdanm 0:9b334a45a8ff 76 ldr r3, [r3, r1]
bogdanm 0:9b334a45a8ff 77 str r3, [r0, r1]
bogdanm 0:9b334a45a8ff 78 adds r1, r1, #4
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 LoopCopyDataInit:
bogdanm 0:9b334a45a8ff 81 ldr r0, =_sdata
bogdanm 0:9b334a45a8ff 82 ldr r3, =_edata
bogdanm 0:9b334a45a8ff 83 adds r2, r0, r1
bogdanm 0:9b334a45a8ff 84 cmp r2, r3
bogdanm 0:9b334a45a8ff 85 bcc CopyDataInit
bogdanm 0:9b334a45a8ff 86 ldr r2, =_sbss
bogdanm 0:9b334a45a8ff 87 b LoopFillZerobss
bogdanm 0:9b334a45a8ff 88 /* Zero fill the bss segment. */
bogdanm 0:9b334a45a8ff 89 FillZerobss:
bogdanm 0:9b334a45a8ff 90 movs r3, #0
bogdanm 0:9b334a45a8ff 91 str r3, [r2]
bogdanm 0:9b334a45a8ff 92 adds r2, r2, #4
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 LoopFillZerobss:
bogdanm 0:9b334a45a8ff 96 ldr r3, = _ebss
bogdanm 0:9b334a45a8ff 97 cmp r2, r3
bogdanm 0:9b334a45a8ff 98 bcc FillZerobss
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /* Call the clock system intitialization function.*/
bogdanm 0:9b334a45a8ff 101 bl SystemInit
bogdanm 0:9b334a45a8ff 102 /* Call static constructors */
bogdanm 0:9b334a45a8ff 103 bl __libc_init_array
bogdanm 0:9b334a45a8ff 104 /* Call the application's entry point.*/
bogdanm 0:9b334a45a8ff 105 // bl main
bogdanm 0:9b334a45a8ff 106 bl _start
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 LoopForever:
bogdanm 0:9b334a45a8ff 109 b LoopForever
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 .size Reset_Handler, .-Reset_Handler
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 /**
bogdanm 0:9b334a45a8ff 115 * @brief This is the code that gets called when the processor receives an
bogdanm 0:9b334a45a8ff 116 * unexpected interrupt. This simply enters an infinite loop, preserving
bogdanm 0:9b334a45a8ff 117 * the system state for examination by a debugger.
bogdanm 0:9b334a45a8ff 118 *
bogdanm 0:9b334a45a8ff 119 * @param None
bogdanm 0:9b334a45a8ff 120 * @retval : None
bogdanm 0:9b334a45a8ff 121 */
bogdanm 0:9b334a45a8ff 122 .section .text.Default_Handler,"ax",%progbits
bogdanm 0:9b334a45a8ff 123 Default_Handler:
bogdanm 0:9b334a45a8ff 124 Infinite_Loop:
bogdanm 0:9b334a45a8ff 125 b Infinite_Loop
bogdanm 0:9b334a45a8ff 126 .size Default_Handler, .-Default_Handler
bogdanm 0:9b334a45a8ff 127 /******************************************************************************
bogdanm 0:9b334a45a8ff 128 *
bogdanm 0:9b334a45a8ff 129 * The minimal vector table for a Cortex M0. Note that the proper constructs
bogdanm 0:9b334a45a8ff 130 * must be placed on this to ensure that it ends up at physical address
bogdanm 0:9b334a45a8ff 131 * 0x0000.0000.
bogdanm 0:9b334a45a8ff 132 *
bogdanm 0:9b334a45a8ff 133 ******************************************************************************/
bogdanm 0:9b334a45a8ff 134 .section .isr_vector,"a",%progbits
bogdanm 0:9b334a45a8ff 135 .type g_pfnVectors, %object
bogdanm 0:9b334a45a8ff 136 .size g_pfnVectors, .-g_pfnVectors
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 g_pfnVectors:
bogdanm 0:9b334a45a8ff 140 .word _estack
bogdanm 0:9b334a45a8ff 141 .word Reset_Handler
bogdanm 0:9b334a45a8ff 142 .word NMI_Handler
bogdanm 0:9b334a45a8ff 143 .word HardFault_Handler
bogdanm 0:9b334a45a8ff 144 .word 0
bogdanm 0:9b334a45a8ff 145 .word 0
bogdanm 0:9b334a45a8ff 146 .word 0
bogdanm 0:9b334a45a8ff 147 .word 0
bogdanm 0:9b334a45a8ff 148 .word 0
bogdanm 0:9b334a45a8ff 149 .word 0
bogdanm 0:9b334a45a8ff 150 .word 0
bogdanm 0:9b334a45a8ff 151 .word SVC_Handler
bogdanm 0:9b334a45a8ff 152 .word 0
bogdanm 0:9b334a45a8ff 153 .word 0
bogdanm 0:9b334a45a8ff 154 .word PendSV_Handler
bogdanm 0:9b334a45a8ff 155 .word SysTick_Handler
bogdanm 0:9b334a45a8ff 156 .word WWDG_IRQHandler /* Window WatchDog */
bogdanm 0:9b334a45a8ff 157 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 158 .word RTC_IRQHandler /* RTC through the EXTI line */
bogdanm 0:9b334a45a8ff 159 .word FLASH_IRQHandler /* FLASH */
bogdanm 0:9b334a45a8ff 160 .word RCC_IRQHandler /* RCC */
bogdanm 0:9b334a45a8ff 161 .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
bogdanm 0:9b334a45a8ff 162 .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
bogdanm 0:9b334a45a8ff 163 .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
bogdanm 0:9b334a45a8ff 164 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 165 .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
bogdanm 0:9b334a45a8ff 166 .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
bogdanm 0:9b334a45a8ff 167 .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */
bogdanm 0:9b334a45a8ff 168 .word ADC1_IRQHandler /* ADC1 */
bogdanm 0:9b334a45a8ff 169 .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
bogdanm 0:9b334a45a8ff 170 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
bogdanm 0:9b334a45a8ff 171 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 172 .word TIM3_IRQHandler /* TIM3 */
bogdanm 0:9b334a45a8ff 173 .word TIM6_IRQHandler /* TIM6 */
bogdanm 0:9b334a45a8ff 174 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 175 .word TIM14_IRQHandler /* TIM14 */
bogdanm 0:9b334a45a8ff 176 .word TIM15_IRQHandler /* TIM15 */
bogdanm 0:9b334a45a8ff 177 .word TIM16_IRQHandler /* TIM16 */
bogdanm 0:9b334a45a8ff 178 .word TIM17_IRQHandler /* TIM17 */
bogdanm 0:9b334a45a8ff 179 .word I2C1_IRQHandler /* I2C1 */
bogdanm 0:9b334a45a8ff 180 .word I2C2_IRQHandler /* I2C2 */
bogdanm 0:9b334a45a8ff 181 .word SPI1_IRQHandler /* SPI1 */
bogdanm 0:9b334a45a8ff 182 .word SPI2_IRQHandler /* SPI2 */
bogdanm 0:9b334a45a8ff 183 .word USART1_IRQHandler /* USART1 */
bogdanm 0:9b334a45a8ff 184 .word USART2_IRQHandler /* USART2 */
bogdanm 0:9b334a45a8ff 185 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 186 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 187 .word 0 /* Reserved */
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 /*******************************************************************************
bogdanm 0:9b334a45a8ff 190 *
bogdanm 0:9b334a45a8ff 191 * Provide weak aliases for each Exception handler to the Default_Handler.
bogdanm 0:9b334a45a8ff 192 * As they are weak aliases, any function with the same name will override
bogdanm 0:9b334a45a8ff 193 * this definition.
bogdanm 0:9b334a45a8ff 194 *
bogdanm 0:9b334a45a8ff 195 *******************************************************************************/
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 .weak NMI_Handler
bogdanm 0:9b334a45a8ff 198 .thumb_set NMI_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 .weak HardFault_Handler
bogdanm 0:9b334a45a8ff 201 .thumb_set HardFault_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 .weak SVC_Handler
bogdanm 0:9b334a45a8ff 204 .thumb_set SVC_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 .weak PendSV_Handler
bogdanm 0:9b334a45a8ff 207 .thumb_set PendSV_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 .weak SysTick_Handler
bogdanm 0:9b334a45a8ff 210 .thumb_set SysTick_Handler,Default_Handler
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 .weak WWDG_IRQHandler
bogdanm 0:9b334a45a8ff 213 .thumb_set WWDG_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 .weak RTC_IRQHandler
bogdanm 0:9b334a45a8ff 216 .thumb_set RTC_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 .weak FLASH_IRQHandler
bogdanm 0:9b334a45a8ff 219 .thumb_set FLASH_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 .weak RCC_IRQHandler
bogdanm 0:9b334a45a8ff 222 .thumb_set RCC_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 .weak EXTI0_1_IRQHandler
bogdanm 0:9b334a45a8ff 225 .thumb_set EXTI0_1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 .weak EXTI2_3_IRQHandler
bogdanm 0:9b334a45a8ff 228 .thumb_set EXTI2_3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 .weak EXTI4_15_IRQHandler
bogdanm 0:9b334a45a8ff 231 .thumb_set EXTI4_15_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 .weak DMA1_Channel1_IRQHandler
bogdanm 0:9b334a45a8ff 234 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 .weak DMA1_Channel2_3_IRQHandler
bogdanm 0:9b334a45a8ff 237 .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 .weak DMA1_Channel4_5_IRQHandler
bogdanm 0:9b334a45a8ff 240 .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 .weak ADC1_IRQHandler
bogdanm 0:9b334a45a8ff 243 .thumb_set ADC1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 244
bogdanm 0:9b334a45a8ff 245 .weak TIM1_BRK_UP_TRG_COM_IRQHandler
bogdanm 0:9b334a45a8ff 246 .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 .weak TIM1_CC_IRQHandler
bogdanm 0:9b334a45a8ff 249 .thumb_set TIM1_CC_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 .weak TIM3_IRQHandler
bogdanm 0:9b334a45a8ff 252 .thumb_set TIM3_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 .weak TIM6_IRQHandler
bogdanm 0:9b334a45a8ff 255 .thumb_set TIM6_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 .weak TIM14_IRQHandler
bogdanm 0:9b334a45a8ff 258 .thumb_set TIM14_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 .weak TIM15_IRQHandler
bogdanm 0:9b334a45a8ff 261 .thumb_set TIM15_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 .weak TIM16_IRQHandler
bogdanm 0:9b334a45a8ff 264 .thumb_set TIM16_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 .weak TIM17_IRQHandler
bogdanm 0:9b334a45a8ff 267 .thumb_set TIM17_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 .weak I2C1_IRQHandler
bogdanm 0:9b334a45a8ff 270 .thumb_set I2C1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 .weak I2C2_IRQHandler
bogdanm 0:9b334a45a8ff 273 .thumb_set I2C2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275 .weak SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 276 .thumb_set SPI1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 .weak SPI2_IRQHandler
bogdanm 0:9b334a45a8ff 279 .thumb_set SPI2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 .weak USART1_IRQHandler
bogdanm 0:9b334a45a8ff 282 .thumb_set USART1_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 .weak USART2_IRQHandler
bogdanm 0:9b334a45a8ff 285 .thumb_set USART2_IRQHandler,Default_Handler
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 288