fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/cmsis_nvic.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 43:e3d4af315dd8
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | * CMSIS-style functionality to support dynamic vectors |
bogdanm | 0:9b334a45a8ff | 3 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 4 | * Copyright (c) 2015, STMicroelectronics |
bogdanm | 0:9b334a45a8ff | 5 | * All rights reserved. |
bogdanm | 0:9b334a45a8ff | 6 | * |
bogdanm | 0:9b334a45a8ff | 7 | * Redistribution and use in source and binary forms, with or without |
bogdanm | 0:9b334a45a8ff | 8 | * modification, are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 9 | * |
bogdanm | 0:9b334a45a8ff | 10 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 11 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 13 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 14 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 15 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 16 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 17 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 18 | * |
bogdanm | 0:9b334a45a8ff | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 29 | ******************************************************************************* |
mbed_official | 43:e3d4af315dd8 | 30 | */ |
bogdanm | 0:9b334a45a8ff | 31 | #include "cmsis_nvic.h" |
bogdanm | 0:9b334a45a8ff | 32 | |
bogdanm | 0:9b334a45a8ff | 33 | #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM |
bogdanm | 0:9b334a45a8ff | 34 | #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash |
bogdanm | 0:9b334a45a8ff | 35 | |
bogdanm | 0:9b334a45a8ff | 36 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
bogdanm | 0:9b334a45a8ff | 37 | int i; |
bogdanm | 0:9b334a45a8ff | 38 | |
bogdanm | 0:9b334a45a8ff | 39 | // Copy and switch to dynamic vectors if first time called |
mbed_official | 43:e3d4af315dd8 | 40 | if ((SYSCFG->CFGR1 & SYSCFG_CFGR1_MEM_MODE) != SYSCFG_CFGR1_MEM_MODE) { |
mbed_official | 43:e3d4af315dd8 | 41 | uint32_t *old_vectors = (uint32_t *)NVIC_FLASH_VECTOR_ADDRESS; |
mbed_official | 43:e3d4af315dd8 | 42 | for (i = 0; i < NVIC_NUM_VECTORS; i++) { |
mbed_official | 43:e3d4af315dd8 | 43 | *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (i*4))) = old_vectors[i]; |
mbed_official | 43:e3d4af315dd8 | 44 | } |
mbed_official | 43:e3d4af315dd8 | 45 | SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE; // Embedded SRAM mapped at 0x00000000 |
bogdanm | 0:9b334a45a8ff | 46 | } |
bogdanm | 0:9b334a45a8ff | 47 | |
bogdanm | 0:9b334a45a8ff | 48 | // Set the vector |
mbed_official | 43:e3d4af315dd8 | 49 | *((uint32_t *)(NVIC_RAM_VECTOR_ADDRESS + (IRQn*4) + (NVIC_USER_IRQ_OFFSET*4))) = vector; |
bogdanm | 0:9b334a45a8ff | 50 | } |
bogdanm | 0:9b334a45a8ff | 51 | |
bogdanm | 0:9b334a45a8ff | 52 | uint32_t NVIC_GetVector(IRQn_Type IRQn) { |
bogdanm | 0:9b334a45a8ff | 53 | uint32_t *vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; |
bogdanm | 0:9b334a45a8ff | 54 | // Return the vector |
bogdanm | 0:9b334a45a8ff | 55 | return vectors[IRQn + 16]; |
bogdanm | 0:9b334a45a8ff | 56 | } |