fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_ARM_SSG/TARGET_MPS2_M7/cmsis_nvic.c@129:2e517c56bcfb, 2016-05-16 (annotated)
- Committer:
- nameless129
- Date:
- Mon May 16 16:50:30 2016 +0000
- Revision:
- 129:2e517c56bcfb
- Parent:
- 0:9b334a45a8ff
PWM Fix:Duty 0%??H???????????????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /* MPS2 CMSIS Library |
bogdanm | 0:9b334a45a8ff | 2 | * |
bogdanm | 0:9b334a45a8ff | 3 | * Copyright (c) 2006-2015 ARM Limited |
bogdanm | 0:9b334a45a8ff | 4 | * All rights reserved. |
bogdanm | 0:9b334a45a8ff | 5 | * |
bogdanm | 0:9b334a45a8ff | 6 | * Redistribution and use in source and binary forms, with or without |
bogdanm | 0:9b334a45a8ff | 7 | * modification, are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 8 | * |
bogdanm | 0:9b334a45a8ff | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 10 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 11 | * |
bogdanm | 0:9b334a45a8ff | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 13 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 14 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 15 | * |
bogdanm | 0:9b334a45a8ff | 16 | * 3. Neither the name of the copyright holder nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 17 | * may be used to endorse or promote products derived from this software without |
bogdanm | 0:9b334a45a8ff | 18 | * specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 19 | * |
bogdanm | 0:9b334a45a8ff | 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
bogdanm | 0:9b334a45a8ff | 23 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
bogdanm | 0:9b334a45a8ff | 24 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
bogdanm | 0:9b334a45a8ff | 25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
bogdanm | 0:9b334a45a8ff | 26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
bogdanm | 0:9b334a45a8ff | 27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
bogdanm | 0:9b334a45a8ff | 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
bogdanm | 0:9b334a45a8ff | 29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
bogdanm | 0:9b334a45a8ff | 30 | * POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 31 | ******************************************************************************* |
bogdanm | 0:9b334a45a8ff | 32 | * CMSIS-style functionality to support dynamic vectors |
bogdanm | 0:9b334a45a8ff | 33 | *******************************************************************************/ |
bogdanm | 0:9b334a45a8ff | 34 | #include "cmsis_nvic.h" |
bogdanm | 0:9b334a45a8ff | 35 | |
bogdanm | 0:9b334a45a8ff | 36 | #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Location of vectors in RAM |
bogdanm | 0:9b334a45a8ff | 37 | #define NVIC_FLASH_VECTOR_ADDRESS (0x00000000) // Initial vector position in flash |
bogdanm | 0:9b334a45a8ff | 38 | |
bogdanm | 0:9b334a45a8ff | 39 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
bogdanm | 0:9b334a45a8ff | 40 | uint32_t *vectors = (uint32_t*)SCB->VTOR; |
bogdanm | 0:9b334a45a8ff | 41 | uint32_t i; |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | // Copy and switch to dynamic vectors if the first time called |
bogdanm | 0:9b334a45a8ff | 44 | if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) { |
bogdanm | 0:9b334a45a8ff | 45 | uint32_t *old_vectors = vectors; |
bogdanm | 0:9b334a45a8ff | 46 | vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; |
bogdanm | 0:9b334a45a8ff | 47 | for (i=0; i<NVIC_NUM_VECTORS; i++) { |
bogdanm | 0:9b334a45a8ff | 48 | vectors[i] = old_vectors[i]; |
bogdanm | 0:9b334a45a8ff | 49 | } |
bogdanm | 0:9b334a45a8ff | 50 | SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS; |
bogdanm | 0:9b334a45a8ff | 51 | } |
bogdanm | 0:9b334a45a8ff | 52 | vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector; |
bogdanm | 0:9b334a45a8ff | 53 | } |
bogdanm | 0:9b334a45a8ff | 54 | |
bogdanm | 0:9b334a45a8ff | 55 | uint32_t NVIC_GetVector(IRQn_Type IRQn) { |
bogdanm | 0:9b334a45a8ff | 56 | uint32_t *vectors = (uint32_t*)SCB->VTOR; |
bogdanm | 0:9b334a45a8ff | 57 | return vectors[IRQn + NVIC_USER_IRQ_OFFSET]; |
bogdanm | 0:9b334a45a8ff | 58 | } |