Tobi's ubw test branch

Dependencies:   mavlink_bridge mbed

Fork of AIT_UWB_Range by Benjamin Hepp

Revision:
45:01a33363bc21
Parent:
44:2e0045042a59
Child:
46:6398237672a0
--- a/DW1000/DW1000.cpp	Thu Mar 05 12:18:37 2015 +0000
+++ b/DW1000/DW1000.cpp	Sun Mar 08 15:59:14 2015 +0000
@@ -5,27 +5,53 @@
     
     deselect();                         // Chip must be deselected first
     spi.format(8,0);                    // Setup the spi for standard 8 bit data and SPI-Mode 0 (GPIO5, GPIO6 open circuit or ground on DW1000)
-    spi.frequency(1000000);             // with a 1MHz clock rate (worked up to 49MHz in our Test)
+    spi.frequency(5000000);             // with a 1MHz clock rate (worked up to 49MHz in our Test)
     
     resetAll();                         // we do a soft reset of the DW1000 everytime the driver starts
 
     // Configuration TODO: make method for that
+    // User Manual "2.5.5 Default Configurations that should be modified" p. 22
+    //Those values are for the standard mode (6.8Mbps, 5, 16Mhz, 32 Symbols) and are INCOMPLETE!
+//    writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
+//    writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
+//    writeRegister32(DW1000_DRX_CONF, 0x08, 0x311A002D);
+//    writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);
+//    writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);
+//    writeRegister32(DW1000_TX_POWER, 0, 0x0E082848);
+//    writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);
+//    writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);
+//    writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);
 
-    // User Manual "2.5.5 Default Configurations that should be modified" p. 22
-    writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
-    writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
-    writeRegister32(DW1000_DRX_CONF, 0x08, 0x311A002D);
-    writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);
-    writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);
-    writeRegister32(DW1000_TX_POWER, 0, 0x0E082848);
-    writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);
-    writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);
-    writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);
+
+    //Those values are for the 110kbps mode (5, 16MHz, 1024 Symbols) and are quite complete
+    writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);             //AGC_TUNE1 for 16MHz PRF
+    writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);         //AGC_TUNE2 (Universal)
+    writeRegister16(DW1000_AGC_CTRL, 0x12, 0x0055);             //AGC_TUNE3 (Universal)
+
+    writeRegister16(DW1000_DRX_CONF, 0x02, 0x000A);             //DRX_TUNE0b for 110kbps
+    writeRegister16(DW1000_DRX_CONF, 0x04, 0x0087);             //DRX_TUNE1a for 16MHz PRF
+    writeRegister16(DW1000_DRX_CONF, 0x06, 0x0064);             //DRX_TUNE1b for 110kbps & > 1024 symbols
+    writeRegister32(DW1000_DRX_CONF, 0x08, 0x351A009A);         //PAC size for 1024 symbols preamble & 16MHz PRF
+    //writeRegister32(DW1000_DRX_CONF, 0x08, 0x371A011D);               //PAC size for 2048 symbols preamble
+
+    writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);              //LDE_CFG1
+    writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);           //LDE_CFG2 for 16MHz PRF
+
+    writeRegister32(DW1000_TX_POWER, 0, 0x48484848);            //Power for channel 5
+
+    writeRegister8(DW1000_RF_CONF, 0x0B, 0xD8);                 //RF_RXCTRLH for channel 5
+    writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);          //RF_TXCTRL for channel 5
+
+    writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);                 //TC_PGDELAY for channel 5
+
+    writeRegister32 (DW1000_FS_CTRL, 0x07, 0x0800041D);         //FS_PLLCFG for channel 5
+    writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);                //FS_PLLTUNE for channel 5
+
     loadLDE();                          // important everytime DW1000 initialises/awakes otherwise the LDE algorithm must be turned of or there's receiving malfunction see User Manual LDELOAD on p22 & p158
     
     // 110kbps CAUTION: a lot of other registers have to be set for an optimized operation on 110kbps
-    //writeRegister16(DW1000_TX_FCTRL, 1, 0x2800 | 0x0100 | 0x0080); // use 2048 symbols preable (0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
-    //writeRegister8(DW1000_SYS_CFG, 2, 0x40);    // enable special receiving option for 110kbps!! (0x40) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
+    writeRegister16(DW1000_TX_FCTRL, 1, 0x0800 | 0x0100 | 0x0080); // use 1024 symbols preamble (0x0800) (previously 2048 - 0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
+    writeRegister8(DW1000_SYS_CFG, 2, 0x44);    // enable special receiving option for 110kbps (disable smartTxPower)!! (0x44) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
 
     writeRegister16(DW1000_TX_ANTD, 0, 16384); // set TX and RX Antenna delay to neutral because we calibrate afterwards
     writeRegister16(DW1000_LDE_CTRL, 0x1804, 16384); // = 2^14 a qurter of the range of the 16-Bit register which corresponds to zero calibration in a round trip (TX1+RX2+TX2+RX1)
@@ -122,7 +148,7 @@
     length = ((backup & 0xFC) << 8) | (length & 0x03FF);
     writeRegister16(DW1000_TX_FCTRL, 0, length);
 
-    writeRegister40(DW1000_DX_TIME, 0, TxTimestamp);
+    writeRegister40(DW1000_DX_TIME, 0, TxTimestamp);                //write the timestamp on which to send the message
 
     stopTRX();                                                      // stop receiving
     writeRegister8(DW1000_SYS_CTRL, 0, 0x02 | 0x04);                // trigger sending process by setting the TXSTRT and TXDLYS bit
@@ -253,4 +279,4 @@
 void DW1000::deselect() {   // always called to end an SPI transmission
     cs = 1;                 // set Cable Select pin high to stop transmission
     irq.enable_irq();       // reenable the interrupt handler
-}
\ No newline at end of file
+}