mattia griotti
Simple "hello world" style program for X-NUCLEO-IKS01A1 MEMS Inertial
Dependencies: BLE_API X_NUCLEO_IDB0XA1 X_NUCLEO_IKS01A1 mbed
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HelloWorld_IKS01A1
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stm32f4xx_gpio.h@8:1c6281289d67, 2015-11-15 (annotated)
- Committer:
- n0tform3
- Date:
- Sun Nov 15 09:00:40 2015 +0000
- Revision:
- 8:1c6281289d67
test with led
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| n0tform3 | 8:1c6281289d67 | 1 | /** |
| n0tform3 | 8:1c6281289d67 | 2 | ****************************************************************************** |
| n0tform3 | 8:1c6281289d67 | 3 | * @file stm32f4xx_gpio.h |
| n0tform3 | 8:1c6281289d67 | 4 | * @author MCD Application Team |
| n0tform3 | 8:1c6281289d67 | 5 | * @version V1.0.0 |
| n0tform3 | 8:1c6281289d67 | 6 | * @date 30-September-2011 |
| n0tform3 | 8:1c6281289d67 | 7 | * @brief This file contains all the functions prototypes for the GPIO firmware |
| n0tform3 | 8:1c6281289d67 | 8 | * library. |
| n0tform3 | 8:1c6281289d67 | 9 | ****************************************************************************** |
| n0tform3 | 8:1c6281289d67 | 10 | * @attention |
| n0tform3 | 8:1c6281289d67 | 11 | * |
| n0tform3 | 8:1c6281289d67 | 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| n0tform3 | 8:1c6281289d67 | 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
| n0tform3 | 8:1c6281289d67 | 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
| n0tform3 | 8:1c6281289d67 | 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
| n0tform3 | 8:1c6281289d67 | 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
| n0tform3 | 8:1c6281289d67 | 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
| n0tform3 | 8:1c6281289d67 | 18 | * |
| n0tform3 | 8:1c6281289d67 | 19 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
| n0tform3 | 8:1c6281289d67 | 20 | ****************************************************************************** |
| n0tform3 | 8:1c6281289d67 | 21 | */ |
| n0tform3 | 8:1c6281289d67 | 22 | |
| n0tform3 | 8:1c6281289d67 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 24 | #ifndef __STM32F4xx_GPIO_H |
| n0tform3 | 8:1c6281289d67 | 25 | #define __STM32F4xx_GPIO_H |
| n0tform3 | 8:1c6281289d67 | 26 | |
| n0tform3 | 8:1c6281289d67 | 27 | #ifdef __cplusplus |
| n0tform3 | 8:1c6281289d67 | 28 | extern "C" { |
| n0tform3 | 8:1c6281289d67 | 29 | #endif |
| n0tform3 | 8:1c6281289d67 | 30 | |
| n0tform3 | 8:1c6281289d67 | 31 | /* Includes ------------------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 32 | #include "stm32f4xx.h" |
| n0tform3 | 8:1c6281289d67 | 33 | |
| n0tform3 | 8:1c6281289d67 | 34 | /** @addtogroup STM32F4xx_StdPeriph_Driver |
| n0tform3 | 8:1c6281289d67 | 35 | * @{ |
| n0tform3 | 8:1c6281289d67 | 36 | */ |
| n0tform3 | 8:1c6281289d67 | 37 | |
| n0tform3 | 8:1c6281289d67 | 38 | /** @addtogroup GPIO |
| n0tform3 | 8:1c6281289d67 | 39 | * @{ |
| n0tform3 | 8:1c6281289d67 | 40 | */ |
| n0tform3 | 8:1c6281289d67 | 41 | |
| n0tform3 | 8:1c6281289d67 | 42 | /* Exported types ------------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 43 | |
| n0tform3 | 8:1c6281289d67 | 44 | #define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \ |
| n0tform3 | 8:1c6281289d67 | 45 | ((PERIPH) == GPIOB) || \ |
| n0tform3 | 8:1c6281289d67 | 46 | ((PERIPH) == GPIOC) || \ |
| n0tform3 | 8:1c6281289d67 | 47 | ((PERIPH) == GPIOD) || \ |
| n0tform3 | 8:1c6281289d67 | 48 | ((PERIPH) == GPIOE) || \ |
| n0tform3 | 8:1c6281289d67 | 49 | ((PERIPH) == GPIOF) || \ |
| n0tform3 | 8:1c6281289d67 | 50 | ((PERIPH) == GPIOG) || \ |
| n0tform3 | 8:1c6281289d67 | 51 | ((PERIPH) == GPIOH) || \ |
| n0tform3 | 8:1c6281289d67 | 52 | ((PERIPH) == GPIOI)) |
| n0tform3 | 8:1c6281289d67 | 53 | |
| n0tform3 | 8:1c6281289d67 | 54 | /** |
| n0tform3 | 8:1c6281289d67 | 55 | * @brief GPIO Configuration Mode enumeration |
| n0tform3 | 8:1c6281289d67 | 56 | */ |
| n0tform3 | 8:1c6281289d67 | 57 | typedef enum |
| n0tform3 | 8:1c6281289d67 | 58 | { |
| n0tform3 | 8:1c6281289d67 | 59 | GPIO_Mode_IN = 0x00, /*!< GPIO Input Mode */ |
| n0tform3 | 8:1c6281289d67 | 60 | GPIO_Mode_OUT = 0x01, /*!< GPIO Output Mode */ |
| n0tform3 | 8:1c6281289d67 | 61 | GPIO_Mode_AF = 0x02, /*!< GPIO Alternate function Mode */ |
| n0tform3 | 8:1c6281289d67 | 62 | GPIO_Mode_AN = 0x03 /*!< GPIO Analog Mode */ |
| n0tform3 | 8:1c6281289d67 | 63 | }GPIOMode_TypeDef; |
| n0tform3 | 8:1c6281289d67 | 64 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN) || ((MODE) == GPIO_Mode_OUT) || \ |
| n0tform3 | 8:1c6281289d67 | 65 | ((MODE) == GPIO_Mode_AF)|| ((MODE) == GPIO_Mode_AN)) |
| n0tform3 | 8:1c6281289d67 | 66 | |
| n0tform3 | 8:1c6281289d67 | 67 | /** |
| n0tform3 | 8:1c6281289d67 | 68 | * @brief GPIO Output type enumeration |
| n0tform3 | 8:1c6281289d67 | 69 | */ |
| n0tform3 | 8:1c6281289d67 | 70 | typedef enum |
| n0tform3 | 8:1c6281289d67 | 71 | { |
| n0tform3 | 8:1c6281289d67 | 72 | GPIO_OType_PP = 0x00, |
| n0tform3 | 8:1c6281289d67 | 73 | GPIO_OType_OD = 0x01 |
| n0tform3 | 8:1c6281289d67 | 74 | }GPIOOType_TypeDef; |
| n0tform3 | 8:1c6281289d67 | 75 | #define IS_GPIO_OTYPE(OTYPE) (((OTYPE) == GPIO_OType_PP) || ((OTYPE) == GPIO_OType_OD)) |
| n0tform3 | 8:1c6281289d67 | 76 | |
| n0tform3 | 8:1c6281289d67 | 77 | |
| n0tform3 | 8:1c6281289d67 | 78 | /** |
| n0tform3 | 8:1c6281289d67 | 79 | * @brief GPIO Output Maximum frequency enumeration |
| n0tform3 | 8:1c6281289d67 | 80 | */ |
| n0tform3 | 8:1c6281289d67 | 81 | typedef enum |
| n0tform3 | 8:1c6281289d67 | 82 | { |
| n0tform3 | 8:1c6281289d67 | 83 | GPIO_Speed_2MHz = 0x00, /*!< Low speed */ |
| n0tform3 | 8:1c6281289d67 | 84 | GPIO_Speed_25MHz = 0x01, /*!< Medium speed */ |
| n0tform3 | 8:1c6281289d67 | 85 | GPIO_Speed_50MHz = 0x02, /*!< Fast speed */ |
| n0tform3 | 8:1c6281289d67 | 86 | GPIO_Speed_100MHz = 0x03 /*!< High speed on 30 pF (80 MHz Output max speed on 15 pF) */ |
| n0tform3 | 8:1c6281289d67 | 87 | }GPIOSpeed_TypeDef; |
| n0tform3 | 8:1c6281289d67 | 88 | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_2MHz) || ((SPEED) == GPIO_Speed_25MHz) || \ |
| n0tform3 | 8:1c6281289d67 | 89 | ((SPEED) == GPIO_Speed_50MHz)|| ((SPEED) == GPIO_Speed_100MHz)) |
| n0tform3 | 8:1c6281289d67 | 90 | |
| n0tform3 | 8:1c6281289d67 | 91 | /** |
| n0tform3 | 8:1c6281289d67 | 92 | * @brief GPIO Configuration PullUp PullDown enumeration |
| n0tform3 | 8:1c6281289d67 | 93 | */ |
| n0tform3 | 8:1c6281289d67 | 94 | typedef enum |
| n0tform3 | 8:1c6281289d67 | 95 | { |
| n0tform3 | 8:1c6281289d67 | 96 | GPIO_PuPd_NOPULL = 0x00, |
| n0tform3 | 8:1c6281289d67 | 97 | GPIO_PuPd_UP = 0x01, |
| n0tform3 | 8:1c6281289d67 | 98 | GPIO_PuPd_DOWN = 0x02 |
| n0tform3 | 8:1c6281289d67 | 99 | }GPIOPuPd_TypeDef; |
| n0tform3 | 8:1c6281289d67 | 100 | #define IS_GPIO_PUPD(PUPD) (((PUPD) == GPIO_PuPd_NOPULL) || ((PUPD) == GPIO_PuPd_UP) || \ |
| n0tform3 | 8:1c6281289d67 | 101 | ((PUPD) == GPIO_PuPd_DOWN)) |
| n0tform3 | 8:1c6281289d67 | 102 | |
| n0tform3 | 8:1c6281289d67 | 103 | /** |
| n0tform3 | 8:1c6281289d67 | 104 | * @brief GPIO Bit SET and Bit RESET enumeration |
| n0tform3 | 8:1c6281289d67 | 105 | */ |
| n0tform3 | 8:1c6281289d67 | 106 | typedef enum |
| n0tform3 | 8:1c6281289d67 | 107 | { |
| n0tform3 | 8:1c6281289d67 | 108 | Bit_RESET = 0, |
| n0tform3 | 8:1c6281289d67 | 109 | Bit_SET |
| n0tform3 | 8:1c6281289d67 | 110 | }BitAction; |
| n0tform3 | 8:1c6281289d67 | 111 | #define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET)) |
| n0tform3 | 8:1c6281289d67 | 112 | |
| n0tform3 | 8:1c6281289d67 | 113 | |
| n0tform3 | 8:1c6281289d67 | 114 | /** |
| n0tform3 | 8:1c6281289d67 | 115 | * @brief GPIO Init structure definition |
| n0tform3 | 8:1c6281289d67 | 116 | */ |
| n0tform3 | 8:1c6281289d67 | 117 | typedef struct |
| n0tform3 | 8:1c6281289d67 | 118 | { |
| n0tform3 | 8:1c6281289d67 | 119 | uint32_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured. |
| n0tform3 | 8:1c6281289d67 | 120 | This parameter can be any value of @ref GPIO_pins_define */ |
| n0tform3 | 8:1c6281289d67 | 121 | |
| n0tform3 | 8:1c6281289d67 | 122 | GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. |
| n0tform3 | 8:1c6281289d67 | 123 | This parameter can be a value of @ref GPIOMode_TypeDef */ |
| n0tform3 | 8:1c6281289d67 | 124 | |
| n0tform3 | 8:1c6281289d67 | 125 | GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins. |
| n0tform3 | 8:1c6281289d67 | 126 | This parameter can be a value of @ref GPIOSpeed_TypeDef */ |
| n0tform3 | 8:1c6281289d67 | 127 | |
| n0tform3 | 8:1c6281289d67 | 128 | GPIOOType_TypeDef GPIO_OType; /*!< Specifies the operating output type for the selected pins. |
| n0tform3 | 8:1c6281289d67 | 129 | This parameter can be a value of @ref GPIOOType_TypeDef */ |
| n0tform3 | 8:1c6281289d67 | 130 | |
| n0tform3 | 8:1c6281289d67 | 131 | GPIOPuPd_TypeDef GPIO_PuPd; /*!< Specifies the operating Pull-up/Pull down for the selected pins. |
| n0tform3 | 8:1c6281289d67 | 132 | This parameter can be a value of @ref GPIOPuPd_TypeDef */ |
| n0tform3 | 8:1c6281289d67 | 133 | }GPIO_InitTypeDef; |
| n0tform3 | 8:1c6281289d67 | 134 | |
| n0tform3 | 8:1c6281289d67 | 135 | /* Exported constants --------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 136 | |
| n0tform3 | 8:1c6281289d67 | 137 | /** @defgroup GPIO_Exported_Constants |
| n0tform3 | 8:1c6281289d67 | 138 | * @{ |
| n0tform3 | 8:1c6281289d67 | 139 | */ |
| n0tform3 | 8:1c6281289d67 | 140 | |
| n0tform3 | 8:1c6281289d67 | 141 | /** @defgroup GPIO_pins_define |
| n0tform3 | 8:1c6281289d67 | 142 | * @{ |
| n0tform3 | 8:1c6281289d67 | 143 | */ |
| n0tform3 | 8:1c6281289d67 | 144 | #define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */ |
| n0tform3 | 8:1c6281289d67 | 145 | #define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */ |
| n0tform3 | 8:1c6281289d67 | 146 | #define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */ |
| n0tform3 | 8:1c6281289d67 | 147 | #define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */ |
| n0tform3 | 8:1c6281289d67 | 148 | #define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */ |
| n0tform3 | 8:1c6281289d67 | 149 | #define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */ |
| n0tform3 | 8:1c6281289d67 | 150 | #define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */ |
| n0tform3 | 8:1c6281289d67 | 151 | #define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */ |
| n0tform3 | 8:1c6281289d67 | 152 | #define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */ |
| n0tform3 | 8:1c6281289d67 | 153 | #define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */ |
| n0tform3 | 8:1c6281289d67 | 154 | #define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */ |
| n0tform3 | 8:1c6281289d67 | 155 | #define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */ |
| n0tform3 | 8:1c6281289d67 | 156 | #define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */ |
| n0tform3 | 8:1c6281289d67 | 157 | #define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */ |
| n0tform3 | 8:1c6281289d67 | 158 | #define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */ |
| n0tform3 | 8:1c6281289d67 | 159 | #define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */ |
| n0tform3 | 8:1c6281289d67 | 160 | #define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */ |
| n0tform3 | 8:1c6281289d67 | 161 | |
| n0tform3 | 8:1c6281289d67 | 162 | #define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00)) |
| n0tform3 | 8:1c6281289d67 | 163 | #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ |
| n0tform3 | 8:1c6281289d67 | 164 | ((PIN) == GPIO_Pin_1) || \ |
| n0tform3 | 8:1c6281289d67 | 165 | ((PIN) == GPIO_Pin_2) || \ |
| n0tform3 | 8:1c6281289d67 | 166 | ((PIN) == GPIO_Pin_3) || \ |
| n0tform3 | 8:1c6281289d67 | 167 | ((PIN) == GPIO_Pin_4) || \ |
| n0tform3 | 8:1c6281289d67 | 168 | ((PIN) == GPIO_Pin_5) || \ |
| n0tform3 | 8:1c6281289d67 | 169 | ((PIN) == GPIO_Pin_6) || \ |
| n0tform3 | 8:1c6281289d67 | 170 | ((PIN) == GPIO_Pin_7) || \ |
| n0tform3 | 8:1c6281289d67 | 171 | ((PIN) == GPIO_Pin_8) || \ |
| n0tform3 | 8:1c6281289d67 | 172 | ((PIN) == GPIO_Pin_9) || \ |
| n0tform3 | 8:1c6281289d67 | 173 | ((PIN) == GPIO_Pin_10) || \ |
| n0tform3 | 8:1c6281289d67 | 174 | ((PIN) == GPIO_Pin_11) || \ |
| n0tform3 | 8:1c6281289d67 | 175 | ((PIN) == GPIO_Pin_12) || \ |
| n0tform3 | 8:1c6281289d67 | 176 | ((PIN) == GPIO_Pin_13) || \ |
| n0tform3 | 8:1c6281289d67 | 177 | ((PIN) == GPIO_Pin_14) || \ |
| n0tform3 | 8:1c6281289d67 | 178 | ((PIN) == GPIO_Pin_15)) |
| n0tform3 | 8:1c6281289d67 | 179 | /** |
| n0tform3 | 8:1c6281289d67 | 180 | * @} |
| n0tform3 | 8:1c6281289d67 | 181 | */ |
| n0tform3 | 8:1c6281289d67 | 182 | |
| n0tform3 | 8:1c6281289d67 | 183 | |
| n0tform3 | 8:1c6281289d67 | 184 | /** @defgroup GPIO_Pin_sources |
| n0tform3 | 8:1c6281289d67 | 185 | * @{ |
| n0tform3 | 8:1c6281289d67 | 186 | */ |
| n0tform3 | 8:1c6281289d67 | 187 | #define GPIO_PinSource0 ((uint8_t)0x00) |
| n0tform3 | 8:1c6281289d67 | 188 | #define GPIO_PinSource1 ((uint8_t)0x01) |
| n0tform3 | 8:1c6281289d67 | 189 | #define GPIO_PinSource2 ((uint8_t)0x02) |
| n0tform3 | 8:1c6281289d67 | 190 | #define GPIO_PinSource3 ((uint8_t)0x03) |
| n0tform3 | 8:1c6281289d67 | 191 | #define GPIO_PinSource4 ((uint8_t)0x04) |
| n0tform3 | 8:1c6281289d67 | 192 | #define GPIO_PinSource5 ((uint8_t)0x05) |
| n0tform3 | 8:1c6281289d67 | 193 | #define GPIO_PinSource6 ((uint8_t)0x06) |
| n0tform3 | 8:1c6281289d67 | 194 | #define GPIO_PinSource7 ((uint8_t)0x07) |
| n0tform3 | 8:1c6281289d67 | 195 | #define GPIO_PinSource8 ((uint8_t)0x08) |
| n0tform3 | 8:1c6281289d67 | 196 | #define GPIO_PinSource9 ((uint8_t)0x09) |
| n0tform3 | 8:1c6281289d67 | 197 | #define GPIO_PinSource10 ((uint8_t)0x0A) |
| n0tform3 | 8:1c6281289d67 | 198 | #define GPIO_PinSource11 ((uint8_t)0x0B) |
| n0tform3 | 8:1c6281289d67 | 199 | #define GPIO_PinSource12 ((uint8_t)0x0C) |
| n0tform3 | 8:1c6281289d67 | 200 | #define GPIO_PinSource13 ((uint8_t)0x0D) |
| n0tform3 | 8:1c6281289d67 | 201 | #define GPIO_PinSource14 ((uint8_t)0x0E) |
| n0tform3 | 8:1c6281289d67 | 202 | #define GPIO_PinSource15 ((uint8_t)0x0F) |
| n0tform3 | 8:1c6281289d67 | 203 | |
| n0tform3 | 8:1c6281289d67 | 204 | #define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \ |
| n0tform3 | 8:1c6281289d67 | 205 | ((PINSOURCE) == GPIO_PinSource1) || \ |
| n0tform3 | 8:1c6281289d67 | 206 | ((PINSOURCE) == GPIO_PinSource2) || \ |
| n0tform3 | 8:1c6281289d67 | 207 | ((PINSOURCE) == GPIO_PinSource3) || \ |
| n0tform3 | 8:1c6281289d67 | 208 | ((PINSOURCE) == GPIO_PinSource4) || \ |
| n0tform3 | 8:1c6281289d67 | 209 | ((PINSOURCE) == GPIO_PinSource5) || \ |
| n0tform3 | 8:1c6281289d67 | 210 | ((PINSOURCE) == GPIO_PinSource6) || \ |
| n0tform3 | 8:1c6281289d67 | 211 | ((PINSOURCE) == GPIO_PinSource7) || \ |
| n0tform3 | 8:1c6281289d67 | 212 | ((PINSOURCE) == GPIO_PinSource8) || \ |
| n0tform3 | 8:1c6281289d67 | 213 | ((PINSOURCE) == GPIO_PinSource9) || \ |
| n0tform3 | 8:1c6281289d67 | 214 | ((PINSOURCE) == GPIO_PinSource10) || \ |
| n0tform3 | 8:1c6281289d67 | 215 | ((PINSOURCE) == GPIO_PinSource11) || \ |
| n0tform3 | 8:1c6281289d67 | 216 | ((PINSOURCE) == GPIO_PinSource12) || \ |
| n0tform3 | 8:1c6281289d67 | 217 | ((PINSOURCE) == GPIO_PinSource13) || \ |
| n0tform3 | 8:1c6281289d67 | 218 | ((PINSOURCE) == GPIO_PinSource14) || \ |
| n0tform3 | 8:1c6281289d67 | 219 | ((PINSOURCE) == GPIO_PinSource15)) |
| n0tform3 | 8:1c6281289d67 | 220 | /** |
| n0tform3 | 8:1c6281289d67 | 221 | * @} |
| n0tform3 | 8:1c6281289d67 | 222 | */ |
| n0tform3 | 8:1c6281289d67 | 223 | |
| n0tform3 | 8:1c6281289d67 | 224 | /** @defgroup GPIO_Alternat_function_selection_define |
| n0tform3 | 8:1c6281289d67 | 225 | * @{ |
| n0tform3 | 8:1c6281289d67 | 226 | */ |
| n0tform3 | 8:1c6281289d67 | 227 | /** |
| n0tform3 | 8:1c6281289d67 | 228 | * @brief AF 0 selection |
| n0tform3 | 8:1c6281289d67 | 229 | */ |
| n0tform3 | 8:1c6281289d67 | 230 | #define GPIO_AF_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 231 | #define GPIO_AF_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 232 | #define GPIO_AF_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 233 | #define GPIO_AF_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 234 | #define GPIO_AF_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 235 | |
| n0tform3 | 8:1c6281289d67 | 236 | /** |
| n0tform3 | 8:1c6281289d67 | 237 | * @brief AF 1 selection |
| n0tform3 | 8:1c6281289d67 | 238 | */ |
| n0tform3 | 8:1c6281289d67 | 239 | #define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 240 | #define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 241 | |
| n0tform3 | 8:1c6281289d67 | 242 | /** |
| n0tform3 | 8:1c6281289d67 | 243 | * @brief AF 2 selection |
| n0tform3 | 8:1c6281289d67 | 244 | */ |
| n0tform3 | 8:1c6281289d67 | 245 | #define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 246 | #define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 247 | #define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 248 | |
| n0tform3 | 8:1c6281289d67 | 249 | /** |
| n0tform3 | 8:1c6281289d67 | 250 | * @brief AF 3 selection |
| n0tform3 | 8:1c6281289d67 | 251 | */ |
| n0tform3 | 8:1c6281289d67 | 252 | #define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 253 | #define GPIO_AF_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 254 | #define GPIO_AF_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 255 | #define GPIO_AF_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 256 | |
| n0tform3 | 8:1c6281289d67 | 257 | /** |
| n0tform3 | 8:1c6281289d67 | 258 | * @brief AF 4 selection |
| n0tform3 | 8:1c6281289d67 | 259 | */ |
| n0tform3 | 8:1c6281289d67 | 260 | #define GPIO_AF_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 261 | #define GPIO_AF_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 262 | #define GPIO_AF_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 263 | |
| n0tform3 | 8:1c6281289d67 | 264 | /** |
| n0tform3 | 8:1c6281289d67 | 265 | * @brief AF 5 selection |
| n0tform3 | 8:1c6281289d67 | 266 | */ |
| n0tform3 | 8:1c6281289d67 | 267 | #define GPIO_AF_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 268 | #define GPIO_AF_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 269 | |
| n0tform3 | 8:1c6281289d67 | 270 | /** |
| n0tform3 | 8:1c6281289d67 | 271 | * @brief AF 6 selection |
| n0tform3 | 8:1c6281289d67 | 272 | */ |
| n0tform3 | 8:1c6281289d67 | 273 | #define GPIO_AF_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 274 | |
| n0tform3 | 8:1c6281289d67 | 275 | /** |
| n0tform3 | 8:1c6281289d67 | 276 | * @brief AF 7 selection |
| n0tform3 | 8:1c6281289d67 | 277 | */ |
| n0tform3 | 8:1c6281289d67 | 278 | #define GPIO_AF_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 279 | #define GPIO_AF_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 280 | #define GPIO_AF_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 281 | #define GPIO_AF_I2S3ext ((uint8_t)0x07) /* I2S3ext Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 282 | |
| n0tform3 | 8:1c6281289d67 | 283 | /** |
| n0tform3 | 8:1c6281289d67 | 284 | * @brief AF 8 selection |
| n0tform3 | 8:1c6281289d67 | 285 | */ |
| n0tform3 | 8:1c6281289d67 | 286 | #define GPIO_AF_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 287 | #define GPIO_AF_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 288 | #define GPIO_AF_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 289 | |
| n0tform3 | 8:1c6281289d67 | 290 | /** |
| n0tform3 | 8:1c6281289d67 | 291 | * @brief AF 9 selection |
| n0tform3 | 8:1c6281289d67 | 292 | */ |
| n0tform3 | 8:1c6281289d67 | 293 | #define GPIO_AF_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 294 | #define GPIO_AF_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 295 | #define GPIO_AF_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 296 | #define GPIO_AF_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 297 | #define GPIO_AF_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 298 | |
| n0tform3 | 8:1c6281289d67 | 299 | /** |
| n0tform3 | 8:1c6281289d67 | 300 | * @brief AF 10 selection |
| n0tform3 | 8:1c6281289d67 | 301 | */ |
| n0tform3 | 8:1c6281289d67 | 302 | #define GPIO_AF_OTG_FS ((uint8_t)0xA) /* OTG_FS Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 303 | #define GPIO_AF_OTG_HS ((uint8_t)0xA) /* OTG_HS Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 304 | |
| n0tform3 | 8:1c6281289d67 | 305 | /** |
| n0tform3 | 8:1c6281289d67 | 306 | * @brief AF 11 selection |
| n0tform3 | 8:1c6281289d67 | 307 | */ |
| n0tform3 | 8:1c6281289d67 | 308 | #define GPIO_AF_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 309 | |
| n0tform3 | 8:1c6281289d67 | 310 | /** |
| n0tform3 | 8:1c6281289d67 | 311 | * @brief AF 12 selection |
| n0tform3 | 8:1c6281289d67 | 312 | */ |
| n0tform3 | 8:1c6281289d67 | 313 | #define GPIO_AF_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 314 | #define GPIO_AF_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 315 | #define GPIO_AF_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 316 | |
| n0tform3 | 8:1c6281289d67 | 317 | /** |
| n0tform3 | 8:1c6281289d67 | 318 | * @brief AF 13 selection |
| n0tform3 | 8:1c6281289d67 | 319 | */ |
| n0tform3 | 8:1c6281289d67 | 320 | #define GPIO_AF_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 321 | |
| n0tform3 | 8:1c6281289d67 | 322 | /** |
| n0tform3 | 8:1c6281289d67 | 323 | * @brief AF 15 selection |
| n0tform3 | 8:1c6281289d67 | 324 | */ |
| n0tform3 | 8:1c6281289d67 | 325 | #define GPIO_AF_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ |
| n0tform3 | 8:1c6281289d67 | 326 | |
| n0tform3 | 8:1c6281289d67 | 327 | #define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \ |
| n0tform3 | 8:1c6281289d67 | 328 | ((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \ |
| n0tform3 | 8:1c6281289d67 | 329 | ((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \ |
| n0tform3 | 8:1c6281289d67 | 330 | ((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \ |
| n0tform3 | 8:1c6281289d67 | 331 | ((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \ |
| n0tform3 | 8:1c6281289d67 | 332 | ((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \ |
| n0tform3 | 8:1c6281289d67 | 333 | ((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \ |
| n0tform3 | 8:1c6281289d67 | 334 | ((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \ |
| n0tform3 | 8:1c6281289d67 | 335 | ((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \ |
| n0tform3 | 8:1c6281289d67 | 336 | ((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \ |
| n0tform3 | 8:1c6281289d67 | 337 | ((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \ |
| n0tform3 | 8:1c6281289d67 | 338 | ((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_UART4) || \ |
| n0tform3 | 8:1c6281289d67 | 339 | ((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \ |
| n0tform3 | 8:1c6281289d67 | 340 | ((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \ |
| n0tform3 | 8:1c6281289d67 | 341 | ((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \ |
| n0tform3 | 8:1c6281289d67 | 342 | ((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_FSMC) || \ |
| n0tform3 | 8:1c6281289d67 | 343 | ((AF) == GPIO_AF_OTG_HS_FS) || ((AF) == GPIO_AF_SDIO) || \ |
| n0tform3 | 8:1c6281289d67 | 344 | ((AF) == GPIO_AF_DCMI) || ((AF) == GPIO_AF_EVENTOUT)) |
| n0tform3 | 8:1c6281289d67 | 345 | /** |
| n0tform3 | 8:1c6281289d67 | 346 | * @} |
| n0tform3 | 8:1c6281289d67 | 347 | */ |
| n0tform3 | 8:1c6281289d67 | 348 | |
| n0tform3 | 8:1c6281289d67 | 349 | /** @defgroup GPIO_Legacy |
| n0tform3 | 8:1c6281289d67 | 350 | * @{ |
| n0tform3 | 8:1c6281289d67 | 351 | */ |
| n0tform3 | 8:1c6281289d67 | 352 | |
| n0tform3 | 8:1c6281289d67 | 353 | #define GPIO_Mode_AIN GPIO_Mode_AN |
| n0tform3 | 8:1c6281289d67 | 354 | |
| n0tform3 | 8:1c6281289d67 | 355 | #define GPIO_AF_OTG1_FS GPIO_AF_OTG_FS |
| n0tform3 | 8:1c6281289d67 | 356 | #define GPIO_AF_OTG2_HS GPIO_AF_OTG_HS |
| n0tform3 | 8:1c6281289d67 | 357 | #define GPIO_AF_OTG2_FS GPIO_AF_OTG_HS_FS |
| n0tform3 | 8:1c6281289d67 | 358 | |
| n0tform3 | 8:1c6281289d67 | 359 | /** |
| n0tform3 | 8:1c6281289d67 | 360 | * @} |
| n0tform3 | 8:1c6281289d67 | 361 | */ |
| n0tform3 | 8:1c6281289d67 | 362 | |
| n0tform3 | 8:1c6281289d67 | 363 | /** |
| n0tform3 | 8:1c6281289d67 | 364 | * @} |
| n0tform3 | 8:1c6281289d67 | 365 | */ |
| n0tform3 | 8:1c6281289d67 | 366 | |
| n0tform3 | 8:1c6281289d67 | 367 | /* Exported macro ------------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 368 | /* Exported functions --------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 369 | |
| n0tform3 | 8:1c6281289d67 | 370 | /* Function used to set the GPIO configuration to the default reset state ****/ |
| n0tform3 | 8:1c6281289d67 | 371 | void GPIO_DeInit(GPIO_TypeDef* GPIOx); |
| n0tform3 | 8:1c6281289d67 | 372 | |
| n0tform3 | 8:1c6281289d67 | 373 | /* Initialization and Configuration functions *********************************/ |
| n0tform3 | 8:1c6281289d67 | 374 | void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); |
| n0tform3 | 8:1c6281289d67 | 375 | void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); |
| n0tform3 | 8:1c6281289d67 | 376 | void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); |
| n0tform3 | 8:1c6281289d67 | 377 | |
| n0tform3 | 8:1c6281289d67 | 378 | /* GPIO Read and Write functions **********************************************/ |
| n0tform3 | 8:1c6281289d67 | 379 | uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); |
| n0tform3 | 8:1c6281289d67 | 380 | uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); |
| n0tform3 | 8:1c6281289d67 | 381 | uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); |
| n0tform3 | 8:1c6281289d67 | 382 | uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); |
| n0tform3 | 8:1c6281289d67 | 383 | void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); |
| n0tform3 | 8:1c6281289d67 | 384 | void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); |
| n0tform3 | 8:1c6281289d67 | 385 | void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); |
| n0tform3 | 8:1c6281289d67 | 386 | void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); |
| n0tform3 | 8:1c6281289d67 | 387 | void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); |
| n0tform3 | 8:1c6281289d67 | 388 | |
| n0tform3 | 8:1c6281289d67 | 389 | /* GPIO Alternate functions configuration function ****************************/ |
| n0tform3 | 8:1c6281289d67 | 390 | void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF); |
| n0tform3 | 8:1c6281289d67 | 391 | |
| n0tform3 | 8:1c6281289d67 | 392 | #ifdef __cplusplus |
| n0tform3 | 8:1c6281289d67 | 393 | } |
| n0tform3 | 8:1c6281289d67 | 394 | #endif |
| n0tform3 | 8:1c6281289d67 | 395 | |
| n0tform3 | 8:1c6281289d67 | 396 | #endif /*__STM32F4xx_GPIO_H */ |
| n0tform3 | 8:1c6281289d67 | 397 | |
| n0tform3 | 8:1c6281289d67 | 398 | /** |
| n0tform3 | 8:1c6281289d67 | 399 | * @} |
| n0tform3 | 8:1c6281289d67 | 400 | */ |
| n0tform3 | 8:1c6281289d67 | 401 | |
| n0tform3 | 8:1c6281289d67 | 402 | /** |
| n0tform3 | 8:1c6281289d67 | 403 | * @} |
| n0tform3 | 8:1c6281289d67 | 404 | */ |
| n0tform3 | 8:1c6281289d67 | 405 | |
| n0tform3 | 8:1c6281289d67 | 406 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |
| n0tform3 | 8:1c6281289d67 | 407 |