mattia griotti
Simple "hello world" style program for X-NUCLEO-IKS01A1 MEMS Inertial
Dependencies: BLE_API X_NUCLEO_IDB0XA1 X_NUCLEO_IKS01A1 mbed
Fork of
HelloWorld_IKS01A1
by 
ST
stm32f4xx_gpio.c@8:1c6281289d67, 2015-11-15 (annotated)
- Committer:
- n0tform3
- Date:
- Sun Nov 15 09:00:40 2015 +0000
- Revision:
- 8:1c6281289d67
test with led
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| n0tform3 | 8:1c6281289d67 | 1 | /** |
| n0tform3 | 8:1c6281289d67 | 2 | ****************************************************************************** |
| n0tform3 | 8:1c6281289d67 | 3 | * @file stm32f4xx_gpio.c |
| n0tform3 | 8:1c6281289d67 | 4 | * @author MCD Application Team |
| n0tform3 | 8:1c6281289d67 | 5 | * @version V1.0.0 |
| n0tform3 | 8:1c6281289d67 | 6 | * @date 30-September-2011 |
| n0tform3 | 8:1c6281289d67 | 7 | * @brief This file provides firmware functions to manage the following |
| n0tform3 | 8:1c6281289d67 | 8 | * functionalities of the GPIO peripheral: |
| n0tform3 | 8:1c6281289d67 | 9 | * - Initialization and Configuration |
| n0tform3 | 8:1c6281289d67 | 10 | * - GPIO Read and Write |
| n0tform3 | 8:1c6281289d67 | 11 | * - GPIO Alternate functions configuration |
| n0tform3 | 8:1c6281289d67 | 12 | * |
| n0tform3 | 8:1c6281289d67 | 13 | * @verbatim |
| n0tform3 | 8:1c6281289d67 | 14 | * |
| n0tform3 | 8:1c6281289d67 | 15 | * =================================================================== |
| n0tform3 | 8:1c6281289d67 | 16 | * How to use this driver |
| n0tform3 | 8:1c6281289d67 | 17 | * =================================================================== |
| n0tform3 | 8:1c6281289d67 | 18 | * 1. Enable the GPIO AHB clock using the following function |
| n0tform3 | 8:1c6281289d67 | 19 | * RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 20 | * |
| n0tform3 | 8:1c6281289d67 | 21 | * 2. Configure the GPIO pin(s) using GPIO_Init() |
| n0tform3 | 8:1c6281289d67 | 22 | * Four possible configuration are available for each pin: |
| n0tform3 | 8:1c6281289d67 | 23 | * - Input: Floating, Pull-up, Pull-down. |
| n0tform3 | 8:1c6281289d67 | 24 | * - Output: Push-Pull (Pull-up, Pull-down or no Pull) |
| n0tform3 | 8:1c6281289d67 | 25 | * Open Drain (Pull-up, Pull-down or no Pull). |
| n0tform3 | 8:1c6281289d67 | 26 | * In output mode, the speed is configurable: 2 MHz, 25 MHz, |
| n0tform3 | 8:1c6281289d67 | 27 | * 50 MHz or 100 MHz. |
| n0tform3 | 8:1c6281289d67 | 28 | * - Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull) |
| n0tform3 | 8:1c6281289d67 | 29 | * Open Drain (Pull-up, Pull-down or no Pull). |
| n0tform3 | 8:1c6281289d67 | 30 | * - Analog: required mode when a pin is to be used as ADC channel |
| n0tform3 | 8:1c6281289d67 | 31 | * or DAC output. |
| n0tform3 | 8:1c6281289d67 | 32 | * |
| n0tform3 | 8:1c6281289d67 | 33 | * 3- Peripherals alternate function: |
| n0tform3 | 8:1c6281289d67 | 34 | * - For ADC and DAC, configure the desired pin in analog mode using |
| n0tform3 | 8:1c6281289d67 | 35 | * GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN; |
| n0tform3 | 8:1c6281289d67 | 36 | * - For other peripherals (TIM, USART...): |
| n0tform3 | 8:1c6281289d67 | 37 | * - Connect the pin to the desired peripherals' Alternate |
| n0tform3 | 8:1c6281289d67 | 38 | * Function (AF) using GPIO_PinAFConfig() function |
| n0tform3 | 8:1c6281289d67 | 39 | * - Configure the desired pin in alternate function mode using |
| n0tform3 | 8:1c6281289d67 | 40 | * GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF |
| n0tform3 | 8:1c6281289d67 | 41 | * - Select the type, pull-up/pull-down and output speed via |
| n0tform3 | 8:1c6281289d67 | 42 | * GPIO_PuPd, GPIO_OType and GPIO_Speed members |
| n0tform3 | 8:1c6281289d67 | 43 | * - Call GPIO_Init() function |
| n0tform3 | 8:1c6281289d67 | 44 | * |
| n0tform3 | 8:1c6281289d67 | 45 | * 4. To get the level of a pin configured in input mode use GPIO_ReadInputDataBit() |
| n0tform3 | 8:1c6281289d67 | 46 | * |
| n0tform3 | 8:1c6281289d67 | 47 | * 5. To set/reset the level of a pin configured in output mode use |
| n0tform3 | 8:1c6281289d67 | 48 | * GPIO_SetBits()/GPIO_ResetBits() |
| n0tform3 | 8:1c6281289d67 | 49 | * |
| n0tform3 | 8:1c6281289d67 | 50 | * 6. During and just after reset, the alternate functions are not |
| n0tform3 | 8:1c6281289d67 | 51 | * active and the GPIO pins are configured in input floating mode |
| n0tform3 | 8:1c6281289d67 | 52 | * (except JTAG pins). |
| n0tform3 | 8:1c6281289d67 | 53 | * |
| n0tform3 | 8:1c6281289d67 | 54 | * 7. The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as |
| n0tform3 | 8:1c6281289d67 | 55 | * general-purpose (PC14 and PC15, respectively) when the LSE |
| n0tform3 | 8:1c6281289d67 | 56 | * oscillator is off. The LSE has priority over the GPIO function. |
| n0tform3 | 8:1c6281289d67 | 57 | * |
| n0tform3 | 8:1c6281289d67 | 58 | * 8. The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
| n0tform3 | 8:1c6281289d67 | 59 | * general-purpose PH0 and PH1, respectively, when the HSE |
| n0tform3 | 8:1c6281289d67 | 60 | * oscillator is off. The HSE has priority over the GPIO function. |
| n0tform3 | 8:1c6281289d67 | 61 | * |
| n0tform3 | 8:1c6281289d67 | 62 | * @endverbatim |
| n0tform3 | 8:1c6281289d67 | 63 | * |
| n0tform3 | 8:1c6281289d67 | 64 | ****************************************************************************** |
| n0tform3 | 8:1c6281289d67 | 65 | * @attention |
| n0tform3 | 8:1c6281289d67 | 66 | * |
| n0tform3 | 8:1c6281289d67 | 67 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| n0tform3 | 8:1c6281289d67 | 68 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
| n0tform3 | 8:1c6281289d67 | 69 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
| n0tform3 | 8:1c6281289d67 | 70 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
| n0tform3 | 8:1c6281289d67 | 71 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
| n0tform3 | 8:1c6281289d67 | 72 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
| n0tform3 | 8:1c6281289d67 | 73 | * |
| n0tform3 | 8:1c6281289d67 | 74 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
| n0tform3 | 8:1c6281289d67 | 75 | ****************************************************************************** |
| n0tform3 | 8:1c6281289d67 | 76 | */ |
| n0tform3 | 8:1c6281289d67 | 77 | |
| n0tform3 | 8:1c6281289d67 | 78 | /* Includes ------------------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 79 | #include "stm32f4xx_gpio.h" |
| n0tform3 | 8:1c6281289d67 | 80 | #include "stm32f4xx_rcc.h" |
| n0tform3 | 8:1c6281289d67 | 81 | |
| n0tform3 | 8:1c6281289d67 | 82 | /** @addtogroup STM32F4xx_StdPeriph_Driver |
| n0tform3 | 8:1c6281289d67 | 83 | * @{ |
| n0tform3 | 8:1c6281289d67 | 84 | */ |
| n0tform3 | 8:1c6281289d67 | 85 | |
| n0tform3 | 8:1c6281289d67 | 86 | /** @defgroup GPIO |
| n0tform3 | 8:1c6281289d67 | 87 | * @brief GPIO driver modules |
| n0tform3 | 8:1c6281289d67 | 88 | * @{ |
| n0tform3 | 8:1c6281289d67 | 89 | */ |
| n0tform3 | 8:1c6281289d67 | 90 | |
| n0tform3 | 8:1c6281289d67 | 91 | /* Private typedef -----------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 92 | /* Private define ------------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 93 | /* Private macro -------------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 94 | /* Private variables ---------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 95 | /* Private function prototypes -----------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 96 | /* Private functions ---------------------------------------------------------*/ |
| n0tform3 | 8:1c6281289d67 | 97 | |
| n0tform3 | 8:1c6281289d67 | 98 | /** @defgroup GPIO_Private_Functions |
| n0tform3 | 8:1c6281289d67 | 99 | * @{ |
| n0tform3 | 8:1c6281289d67 | 100 | */ |
| n0tform3 | 8:1c6281289d67 | 101 | |
| n0tform3 | 8:1c6281289d67 | 102 | /** @defgroup GPIO_Group1 Initialization and Configuration |
| n0tform3 | 8:1c6281289d67 | 103 | * @brief Initialization and Configuration |
| n0tform3 | 8:1c6281289d67 | 104 | * |
| n0tform3 | 8:1c6281289d67 | 105 | @verbatim |
| n0tform3 | 8:1c6281289d67 | 106 | =============================================================================== |
| n0tform3 | 8:1c6281289d67 | 107 | Initialization and Configuration |
| n0tform3 | 8:1c6281289d67 | 108 | =============================================================================== |
| n0tform3 | 8:1c6281289d67 | 109 | |
| n0tform3 | 8:1c6281289d67 | 110 | @endverbatim |
| n0tform3 | 8:1c6281289d67 | 111 | * @{ |
| n0tform3 | 8:1c6281289d67 | 112 | */ |
| n0tform3 | 8:1c6281289d67 | 113 | |
| n0tform3 | 8:1c6281289d67 | 114 | /** |
| n0tform3 | 8:1c6281289d67 | 115 | * @brief Deinitializes the GPIOx peripheral registers to their default reset values. |
| n0tform3 | 8:1c6281289d67 | 116 | * @note By default, The GPIO pins are configured in input floating mode (except JTAG pins). |
| n0tform3 | 8:1c6281289d67 | 117 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 118 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 119 | */ |
| n0tform3 | 8:1c6281289d67 | 120 | void GPIO_DeInit(GPIO_TypeDef* GPIOx) |
| n0tform3 | 8:1c6281289d67 | 121 | { |
| n0tform3 | 8:1c6281289d67 | 122 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 123 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 124 | |
| n0tform3 | 8:1c6281289d67 | 125 | if (GPIOx == GPIOA) |
| n0tform3 | 8:1c6281289d67 | 126 | { |
| n0tform3 | 8:1c6281289d67 | 127 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 128 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 129 | } |
| n0tform3 | 8:1c6281289d67 | 130 | else if (GPIOx == GPIOB) |
| n0tform3 | 8:1c6281289d67 | 131 | { |
| n0tform3 | 8:1c6281289d67 | 132 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 133 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 134 | } |
| n0tform3 | 8:1c6281289d67 | 135 | else if (GPIOx == GPIOC) |
| n0tform3 | 8:1c6281289d67 | 136 | { |
| n0tform3 | 8:1c6281289d67 | 137 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 138 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 139 | } |
| n0tform3 | 8:1c6281289d67 | 140 | else if (GPIOx == GPIOD) |
| n0tform3 | 8:1c6281289d67 | 141 | { |
| n0tform3 | 8:1c6281289d67 | 142 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 143 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 144 | } |
| n0tform3 | 8:1c6281289d67 | 145 | else if (GPIOx == GPIOE) |
| n0tform3 | 8:1c6281289d67 | 146 | { |
| n0tform3 | 8:1c6281289d67 | 147 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 148 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 149 | } |
| n0tform3 | 8:1c6281289d67 | 150 | else if (GPIOx == GPIOF) |
| n0tform3 | 8:1c6281289d67 | 151 | { |
| n0tform3 | 8:1c6281289d67 | 152 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 153 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 154 | } |
| n0tform3 | 8:1c6281289d67 | 155 | else if (GPIOx == GPIOG) |
| n0tform3 | 8:1c6281289d67 | 156 | { |
| n0tform3 | 8:1c6281289d67 | 157 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 158 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 159 | } |
| n0tform3 | 8:1c6281289d67 | 160 | else if (GPIOx == GPIOH) |
| n0tform3 | 8:1c6281289d67 | 161 | { |
| n0tform3 | 8:1c6281289d67 | 162 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 163 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 164 | } |
| n0tform3 | 8:1c6281289d67 | 165 | else |
| n0tform3 | 8:1c6281289d67 | 166 | { |
| n0tform3 | 8:1c6281289d67 | 167 | if (GPIOx == GPIOI) |
| n0tform3 | 8:1c6281289d67 | 168 | { |
| n0tform3 | 8:1c6281289d67 | 169 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE); |
| n0tform3 | 8:1c6281289d67 | 170 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE); |
| n0tform3 | 8:1c6281289d67 | 171 | } |
| n0tform3 | 8:1c6281289d67 | 172 | } |
| n0tform3 | 8:1c6281289d67 | 173 | } |
| n0tform3 | 8:1c6281289d67 | 174 | |
| n0tform3 | 8:1c6281289d67 | 175 | /** |
| n0tform3 | 8:1c6281289d67 | 176 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct. |
| n0tform3 | 8:1c6281289d67 | 177 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 178 | * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains |
| n0tform3 | 8:1c6281289d67 | 179 | * the configuration information for the specified GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 180 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 181 | */ |
| n0tform3 | 8:1c6281289d67 | 182 | void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) |
| n0tform3 | 8:1c6281289d67 | 183 | { |
| n0tform3 | 8:1c6281289d67 | 184 | uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00; |
| n0tform3 | 8:1c6281289d67 | 185 | |
| n0tform3 | 8:1c6281289d67 | 186 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 187 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 188 | assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); |
| n0tform3 | 8:1c6281289d67 | 189 | assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); |
| n0tform3 | 8:1c6281289d67 | 190 | assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd)); |
| n0tform3 | 8:1c6281289d67 | 191 | |
| n0tform3 | 8:1c6281289d67 | 192 | /* -------------------------Configure the port pins---------------- */ |
| n0tform3 | 8:1c6281289d67 | 193 | /*-- GPIO Mode Configuration --*/ |
| n0tform3 | 8:1c6281289d67 | 194 | for (pinpos = 0x00; pinpos < 0x10; pinpos++) |
| n0tform3 | 8:1c6281289d67 | 195 | { |
| n0tform3 | 8:1c6281289d67 | 196 | pos = ((uint32_t)0x01) << pinpos; |
| n0tform3 | 8:1c6281289d67 | 197 | /* Get the port pins position */ |
| n0tform3 | 8:1c6281289d67 | 198 | currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; |
| n0tform3 | 8:1c6281289d67 | 199 | |
| n0tform3 | 8:1c6281289d67 | 200 | if (currentpin == pos) |
| n0tform3 | 8:1c6281289d67 | 201 | { |
| n0tform3 | 8:1c6281289d67 | 202 | GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (pinpos * 2)); |
| n0tform3 | 8:1c6281289d67 | 203 | GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2)); |
| n0tform3 | 8:1c6281289d67 | 204 | |
| n0tform3 | 8:1c6281289d67 | 205 | if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF)) |
| n0tform3 | 8:1c6281289d67 | 206 | { |
| n0tform3 | 8:1c6281289d67 | 207 | /* Check Speed mode parameters */ |
| n0tform3 | 8:1c6281289d67 | 208 | assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); |
| n0tform3 | 8:1c6281289d67 | 209 | |
| n0tform3 | 8:1c6281289d67 | 210 | /* Speed mode configuration */ |
| n0tform3 | 8:1c6281289d67 | 211 | GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2)); |
| n0tform3 | 8:1c6281289d67 | 212 | GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2)); |
| n0tform3 | 8:1c6281289d67 | 213 | |
| n0tform3 | 8:1c6281289d67 | 214 | /* Check Output mode parameters */ |
| n0tform3 | 8:1c6281289d67 | 215 | assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType)); |
| n0tform3 | 8:1c6281289d67 | 216 | |
| n0tform3 | 8:1c6281289d67 | 217 | /* Output mode configuration*/ |
| n0tform3 | 8:1c6281289d67 | 218 | GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos)) ; |
| n0tform3 | 8:1c6281289d67 | 219 | GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos)); |
| n0tform3 | 8:1c6281289d67 | 220 | } |
| n0tform3 | 8:1c6281289d67 | 221 | |
| n0tform3 | 8:1c6281289d67 | 222 | /* Pull-up Pull down resistor configuration*/ |
| n0tform3 | 8:1c6281289d67 | 223 | GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2)); |
| n0tform3 | 8:1c6281289d67 | 224 | GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2)); |
| n0tform3 | 8:1c6281289d67 | 225 | } |
| n0tform3 | 8:1c6281289d67 | 226 | } |
| n0tform3 | 8:1c6281289d67 | 227 | } |
| n0tform3 | 8:1c6281289d67 | 228 | |
| n0tform3 | 8:1c6281289d67 | 229 | /** |
| n0tform3 | 8:1c6281289d67 | 230 | * @brief Fills each GPIO_InitStruct member with its default value. |
| n0tform3 | 8:1c6281289d67 | 231 | * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will be initialized. |
| n0tform3 | 8:1c6281289d67 | 232 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 233 | */ |
| n0tform3 | 8:1c6281289d67 | 234 | void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) |
| n0tform3 | 8:1c6281289d67 | 235 | { |
| n0tform3 | 8:1c6281289d67 | 236 | /* Reset GPIO init structure parameters values */ |
| n0tform3 | 8:1c6281289d67 | 237 | GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; |
| n0tform3 | 8:1c6281289d67 | 238 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN; |
| n0tform3 | 8:1c6281289d67 | 239 | GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; |
| n0tform3 | 8:1c6281289d67 | 240 | GPIO_InitStruct->GPIO_OType = GPIO_OType_PP; |
| n0tform3 | 8:1c6281289d67 | 241 | GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL; |
| n0tform3 | 8:1c6281289d67 | 242 | } |
| n0tform3 | 8:1c6281289d67 | 243 | |
| n0tform3 | 8:1c6281289d67 | 244 | /** |
| n0tform3 | 8:1c6281289d67 | 245 | * @brief Locks GPIO Pins configuration registers. |
| n0tform3 | 8:1c6281289d67 | 246 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
| n0tform3 | 8:1c6281289d67 | 247 | * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. |
| n0tform3 | 8:1c6281289d67 | 248 | * @note The configuration of the locked GPIO pins can no longer be modified |
| n0tform3 | 8:1c6281289d67 | 249 | * until the next reset. |
| n0tform3 | 8:1c6281289d67 | 250 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 251 | * @param GPIO_Pin: specifies the port bit to be locked. |
| n0tform3 | 8:1c6281289d67 | 252 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| n0tform3 | 8:1c6281289d67 | 253 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 254 | */ |
| n0tform3 | 8:1c6281289d67 | 255 | void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| n0tform3 | 8:1c6281289d67 | 256 | { |
| n0tform3 | 8:1c6281289d67 | 257 | __IO uint32_t tmp = 0x00010000; |
| n0tform3 | 8:1c6281289d67 | 258 | |
| n0tform3 | 8:1c6281289d67 | 259 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 260 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 261 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| n0tform3 | 8:1c6281289d67 | 262 | |
| n0tform3 | 8:1c6281289d67 | 263 | tmp |= GPIO_Pin; |
| n0tform3 | 8:1c6281289d67 | 264 | /* Set LCKK bit */ |
| n0tform3 | 8:1c6281289d67 | 265 | GPIOx->LCKR = tmp; |
| n0tform3 | 8:1c6281289d67 | 266 | /* Reset LCKK bit */ |
| n0tform3 | 8:1c6281289d67 | 267 | GPIOx->LCKR = GPIO_Pin; |
| n0tform3 | 8:1c6281289d67 | 268 | /* Set LCKK bit */ |
| n0tform3 | 8:1c6281289d67 | 269 | GPIOx->LCKR = tmp; |
| n0tform3 | 8:1c6281289d67 | 270 | /* Read LCKK bit*/ |
| n0tform3 | 8:1c6281289d67 | 271 | tmp = GPIOx->LCKR; |
| n0tform3 | 8:1c6281289d67 | 272 | /* Read LCKK bit*/ |
| n0tform3 | 8:1c6281289d67 | 273 | tmp = GPIOx->LCKR; |
| n0tform3 | 8:1c6281289d67 | 274 | } |
| n0tform3 | 8:1c6281289d67 | 275 | |
| n0tform3 | 8:1c6281289d67 | 276 | /** |
| n0tform3 | 8:1c6281289d67 | 277 | * @} |
| n0tform3 | 8:1c6281289d67 | 278 | */ |
| n0tform3 | 8:1c6281289d67 | 279 | |
| n0tform3 | 8:1c6281289d67 | 280 | /** @defgroup GPIO_Group2 GPIO Read and Write |
| n0tform3 | 8:1c6281289d67 | 281 | * @brief GPIO Read and Write |
| n0tform3 | 8:1c6281289d67 | 282 | * |
| n0tform3 | 8:1c6281289d67 | 283 | @verbatim |
| n0tform3 | 8:1c6281289d67 | 284 | =============================================================================== |
| n0tform3 | 8:1c6281289d67 | 285 | GPIO Read and Write |
| n0tform3 | 8:1c6281289d67 | 286 | =============================================================================== |
| n0tform3 | 8:1c6281289d67 | 287 | |
| n0tform3 | 8:1c6281289d67 | 288 | @endverbatim |
| n0tform3 | 8:1c6281289d67 | 289 | * @{ |
| n0tform3 | 8:1c6281289d67 | 290 | */ |
| n0tform3 | 8:1c6281289d67 | 291 | |
| n0tform3 | 8:1c6281289d67 | 292 | /** |
| n0tform3 | 8:1c6281289d67 | 293 | * @brief Reads the specified input port pin. |
| n0tform3 | 8:1c6281289d67 | 294 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 295 | * @param GPIO_Pin: specifies the port bit to read. |
| n0tform3 | 8:1c6281289d67 | 296 | * This parameter can be GPIO_Pin_x where x can be (0..15). |
| n0tform3 | 8:1c6281289d67 | 297 | * @retval The input port pin value. |
| n0tform3 | 8:1c6281289d67 | 298 | */ |
| n0tform3 | 8:1c6281289d67 | 299 | uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| n0tform3 | 8:1c6281289d67 | 300 | { |
| n0tform3 | 8:1c6281289d67 | 301 | uint8_t bitstatus = 0x00; |
| n0tform3 | 8:1c6281289d67 | 302 | |
| n0tform3 | 8:1c6281289d67 | 303 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 304 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 305 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
| n0tform3 | 8:1c6281289d67 | 306 | |
| n0tform3 | 8:1c6281289d67 | 307 | if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) |
| n0tform3 | 8:1c6281289d67 | 308 | { |
| n0tform3 | 8:1c6281289d67 | 309 | bitstatus = (uint8_t)Bit_SET; |
| n0tform3 | 8:1c6281289d67 | 310 | } |
| n0tform3 | 8:1c6281289d67 | 311 | else |
| n0tform3 | 8:1c6281289d67 | 312 | { |
| n0tform3 | 8:1c6281289d67 | 313 | bitstatus = (uint8_t)Bit_RESET; |
| n0tform3 | 8:1c6281289d67 | 314 | } |
| n0tform3 | 8:1c6281289d67 | 315 | return bitstatus; |
| n0tform3 | 8:1c6281289d67 | 316 | } |
| n0tform3 | 8:1c6281289d67 | 317 | |
| n0tform3 | 8:1c6281289d67 | 318 | /** |
| n0tform3 | 8:1c6281289d67 | 319 | * @brief Reads the specified GPIO input data port. |
| n0tform3 | 8:1c6281289d67 | 320 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 321 | * @retval GPIO input data port value. |
| n0tform3 | 8:1c6281289d67 | 322 | */ |
| n0tform3 | 8:1c6281289d67 | 323 | uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) |
| n0tform3 | 8:1c6281289d67 | 324 | { |
| n0tform3 | 8:1c6281289d67 | 325 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 326 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 327 | |
| n0tform3 | 8:1c6281289d67 | 328 | return ((uint16_t)GPIOx->IDR); |
| n0tform3 | 8:1c6281289d67 | 329 | } |
| n0tform3 | 8:1c6281289d67 | 330 | |
| n0tform3 | 8:1c6281289d67 | 331 | /** |
| n0tform3 | 8:1c6281289d67 | 332 | * @brief Reads the specified output data port bit. |
| n0tform3 | 8:1c6281289d67 | 333 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 334 | * @param GPIO_Pin: specifies the port bit to read. |
| n0tform3 | 8:1c6281289d67 | 335 | * This parameter can be GPIO_Pin_x where x can be (0..15). |
| n0tform3 | 8:1c6281289d67 | 336 | * @retval The output port pin value. |
| n0tform3 | 8:1c6281289d67 | 337 | */ |
| n0tform3 | 8:1c6281289d67 | 338 | uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| n0tform3 | 8:1c6281289d67 | 339 | { |
| n0tform3 | 8:1c6281289d67 | 340 | uint8_t bitstatus = 0x00; |
| n0tform3 | 8:1c6281289d67 | 341 | |
| n0tform3 | 8:1c6281289d67 | 342 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 343 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 344 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
| n0tform3 | 8:1c6281289d67 | 345 | |
| n0tform3 | 8:1c6281289d67 | 346 | if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET) |
| n0tform3 | 8:1c6281289d67 | 347 | { |
| n0tform3 | 8:1c6281289d67 | 348 | bitstatus = (uint8_t)Bit_SET; |
| n0tform3 | 8:1c6281289d67 | 349 | } |
| n0tform3 | 8:1c6281289d67 | 350 | else |
| n0tform3 | 8:1c6281289d67 | 351 | { |
| n0tform3 | 8:1c6281289d67 | 352 | bitstatus = (uint8_t)Bit_RESET; |
| n0tform3 | 8:1c6281289d67 | 353 | } |
| n0tform3 | 8:1c6281289d67 | 354 | return bitstatus; |
| n0tform3 | 8:1c6281289d67 | 355 | } |
| n0tform3 | 8:1c6281289d67 | 356 | |
| n0tform3 | 8:1c6281289d67 | 357 | /** |
| n0tform3 | 8:1c6281289d67 | 358 | * @brief Reads the specified GPIO output data port. |
| n0tform3 | 8:1c6281289d67 | 359 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 360 | * @retval GPIO output data port value. |
| n0tform3 | 8:1c6281289d67 | 361 | */ |
| n0tform3 | 8:1c6281289d67 | 362 | uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) |
| n0tform3 | 8:1c6281289d67 | 363 | { |
| n0tform3 | 8:1c6281289d67 | 364 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 365 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 366 | |
| n0tform3 | 8:1c6281289d67 | 367 | return ((uint16_t)GPIOx->ODR); |
| n0tform3 | 8:1c6281289d67 | 368 | } |
| n0tform3 | 8:1c6281289d67 | 369 | |
| n0tform3 | 8:1c6281289d67 | 370 | /** |
| n0tform3 | 8:1c6281289d67 | 371 | * @brief Sets the selected data port bits. |
| n0tform3 | 8:1c6281289d67 | 372 | * @note This functions uses GPIOx_BSRR register to allow atomic read/modify |
| n0tform3 | 8:1c6281289d67 | 373 | * accesses. In this way, there is no risk of an IRQ occurring between |
| n0tform3 | 8:1c6281289d67 | 374 | * the read and the modify access. |
| n0tform3 | 8:1c6281289d67 | 375 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 376 | * @param GPIO_Pin: specifies the port bits to be written. |
| n0tform3 | 8:1c6281289d67 | 377 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| n0tform3 | 8:1c6281289d67 | 378 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 379 | */ |
| n0tform3 | 8:1c6281289d67 | 380 | void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| n0tform3 | 8:1c6281289d67 | 381 | { |
| n0tform3 | 8:1c6281289d67 | 382 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 383 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 384 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| n0tform3 | 8:1c6281289d67 | 385 | |
| n0tform3 | 8:1c6281289d67 | 386 | GPIOx->BSRRL = GPIO_Pin; |
| n0tform3 | 8:1c6281289d67 | 387 | } |
| n0tform3 | 8:1c6281289d67 | 388 | |
| n0tform3 | 8:1c6281289d67 | 389 | /** |
| n0tform3 | 8:1c6281289d67 | 390 | * @brief Clears the selected data port bits. |
| n0tform3 | 8:1c6281289d67 | 391 | * @note This functions uses GPIOx_BSRR register to allow atomic read/modify |
| n0tform3 | 8:1c6281289d67 | 392 | * accesses. In this way, there is no risk of an IRQ occurring between |
| n0tform3 | 8:1c6281289d67 | 393 | * the read and the modify access. |
| n0tform3 | 8:1c6281289d67 | 394 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 395 | * @param GPIO_Pin: specifies the port bits to be written. |
| n0tform3 | 8:1c6281289d67 | 396 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| n0tform3 | 8:1c6281289d67 | 397 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 398 | */ |
| n0tform3 | 8:1c6281289d67 | 399 | void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| n0tform3 | 8:1c6281289d67 | 400 | { |
| n0tform3 | 8:1c6281289d67 | 401 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 402 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 403 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
| n0tform3 | 8:1c6281289d67 | 404 | |
| n0tform3 | 8:1c6281289d67 | 405 | GPIOx->BSRRH = GPIO_Pin; |
| n0tform3 | 8:1c6281289d67 | 406 | } |
| n0tform3 | 8:1c6281289d67 | 407 | |
| n0tform3 | 8:1c6281289d67 | 408 | /** |
| n0tform3 | 8:1c6281289d67 | 409 | * @brief Sets or clears the selected data port bit. |
| n0tform3 | 8:1c6281289d67 | 410 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 411 | * @param GPIO_Pin: specifies the port bit to be written. |
| n0tform3 | 8:1c6281289d67 | 412 | * This parameter can be one of GPIO_Pin_x where x can be (0..15). |
| n0tform3 | 8:1c6281289d67 | 413 | * @param BitVal: specifies the value to be written to the selected bit. |
| n0tform3 | 8:1c6281289d67 | 414 | * This parameter can be one of the BitAction enum values: |
| n0tform3 | 8:1c6281289d67 | 415 | * @arg Bit_RESET: to clear the port pin |
| n0tform3 | 8:1c6281289d67 | 416 | * @arg Bit_SET: to set the port pin |
| n0tform3 | 8:1c6281289d67 | 417 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 418 | */ |
| n0tform3 | 8:1c6281289d67 | 419 | void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) |
| n0tform3 | 8:1c6281289d67 | 420 | { |
| n0tform3 | 8:1c6281289d67 | 421 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 422 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 423 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
| n0tform3 | 8:1c6281289d67 | 424 | assert_param(IS_GPIO_BIT_ACTION(BitVal)); |
| n0tform3 | 8:1c6281289d67 | 425 | |
| n0tform3 | 8:1c6281289d67 | 426 | if (BitVal != Bit_RESET) |
| n0tform3 | 8:1c6281289d67 | 427 | { |
| n0tform3 | 8:1c6281289d67 | 428 | GPIOx->BSRRL = GPIO_Pin; |
| n0tform3 | 8:1c6281289d67 | 429 | } |
| n0tform3 | 8:1c6281289d67 | 430 | else |
| n0tform3 | 8:1c6281289d67 | 431 | { |
| n0tform3 | 8:1c6281289d67 | 432 | GPIOx->BSRRH = GPIO_Pin ; |
| n0tform3 | 8:1c6281289d67 | 433 | } |
| n0tform3 | 8:1c6281289d67 | 434 | } |
| n0tform3 | 8:1c6281289d67 | 435 | |
| n0tform3 | 8:1c6281289d67 | 436 | /** |
| n0tform3 | 8:1c6281289d67 | 437 | * @brief Writes data to the specified GPIO data port. |
| n0tform3 | 8:1c6281289d67 | 438 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 439 | * @param PortVal: specifies the value to be written to the port output data register. |
| n0tform3 | 8:1c6281289d67 | 440 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 441 | */ |
| n0tform3 | 8:1c6281289d67 | 442 | void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) |
| n0tform3 | 8:1c6281289d67 | 443 | { |
| n0tform3 | 8:1c6281289d67 | 444 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 445 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 446 | |
| n0tform3 | 8:1c6281289d67 | 447 | GPIOx->ODR = PortVal; |
| n0tform3 | 8:1c6281289d67 | 448 | } |
| n0tform3 | 8:1c6281289d67 | 449 | |
| n0tform3 | 8:1c6281289d67 | 450 | /** |
| n0tform3 | 8:1c6281289d67 | 451 | * @brief Toggles the specified GPIO pins.. |
| n0tform3 | 8:1c6281289d67 | 452 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 453 | * @param GPIO_Pin: Specifies the pins to be toggled. |
| n0tform3 | 8:1c6281289d67 | 454 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 455 | */ |
| n0tform3 | 8:1c6281289d67 | 456 | void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
| n0tform3 | 8:1c6281289d67 | 457 | { |
| n0tform3 | 8:1c6281289d67 | 458 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 459 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 460 | |
| n0tform3 | 8:1c6281289d67 | 461 | GPIOx->ODR ^= GPIO_Pin; |
| n0tform3 | 8:1c6281289d67 | 462 | } |
| n0tform3 | 8:1c6281289d67 | 463 | |
| n0tform3 | 8:1c6281289d67 | 464 | /** |
| n0tform3 | 8:1c6281289d67 | 465 | * @} |
| n0tform3 | 8:1c6281289d67 | 466 | */ |
| n0tform3 | 8:1c6281289d67 | 467 | |
| n0tform3 | 8:1c6281289d67 | 468 | /** @defgroup GPIO_Group3 GPIO Alternate functions configuration function |
| n0tform3 | 8:1c6281289d67 | 469 | * @brief GPIO Alternate functions configuration function |
| n0tform3 | 8:1c6281289d67 | 470 | * |
| n0tform3 | 8:1c6281289d67 | 471 | @verbatim |
| n0tform3 | 8:1c6281289d67 | 472 | =============================================================================== |
| n0tform3 | 8:1c6281289d67 | 473 | GPIO Alternate functions configuration function |
| n0tform3 | 8:1c6281289d67 | 474 | =============================================================================== |
| n0tform3 | 8:1c6281289d67 | 475 | |
| n0tform3 | 8:1c6281289d67 | 476 | @endverbatim |
| n0tform3 | 8:1c6281289d67 | 477 | * @{ |
| n0tform3 | 8:1c6281289d67 | 478 | */ |
| n0tform3 | 8:1c6281289d67 | 479 | |
| n0tform3 | 8:1c6281289d67 | 480 | /** |
| n0tform3 | 8:1c6281289d67 | 481 | * @brief Changes the mapping of the specified pin. |
| n0tform3 | 8:1c6281289d67 | 482 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral. |
| n0tform3 | 8:1c6281289d67 | 483 | * @param GPIO_PinSource: specifies the pin for the Alternate function. |
| n0tform3 | 8:1c6281289d67 | 484 | * This parameter can be GPIO_PinSourcex where x can be (0..15). |
| n0tform3 | 8:1c6281289d67 | 485 | * @param GPIO_AFSelection: selects the pin to used as Alternate function. |
| n0tform3 | 8:1c6281289d67 | 486 | * This parameter can be one of the following values: |
| n0tform3 | 8:1c6281289d67 | 487 | * @arg GPIO_AF_RTC_50Hz: Connect RTC_50Hz pin to AF0 (default after reset) |
| n0tform3 | 8:1c6281289d67 | 488 | * @arg GPIO_AF_MCO: Connect MCO pin (MCO1 and MCO2) to AF0 (default after reset) |
| n0tform3 | 8:1c6281289d67 | 489 | * @arg GPIO_AF_TAMPER: Connect TAMPER pins (TAMPER_1 and TAMPER_2) to AF0 (default after reset) |
| n0tform3 | 8:1c6281289d67 | 490 | * @arg GPIO_AF_SWJ: Connect SWJ pins (SWD and JTAG)to AF0 (default after reset) |
| n0tform3 | 8:1c6281289d67 | 491 | * @arg GPIO_AF_TRACE: Connect TRACE pins to AF0 (default after reset) |
| n0tform3 | 8:1c6281289d67 | 492 | * @arg GPIO_AF_TIM1: Connect TIM1 pins to AF1 |
| n0tform3 | 8:1c6281289d67 | 493 | * @arg GPIO_AF_TIM2: Connect TIM2 pins to AF1 |
| n0tform3 | 8:1c6281289d67 | 494 | * @arg GPIO_AF_TIM3: Connect TIM3 pins to AF2 |
| n0tform3 | 8:1c6281289d67 | 495 | * @arg GPIO_AF_TIM4: Connect TIM4 pins to AF2 |
| n0tform3 | 8:1c6281289d67 | 496 | * @arg GPIO_AF_TIM5: Connect TIM5 pins to AF2 |
| n0tform3 | 8:1c6281289d67 | 497 | * @arg GPIO_AF_TIM8: Connect TIM8 pins to AF3 |
| n0tform3 | 8:1c6281289d67 | 498 | * @arg GPIO_AF_TIM9: Connect TIM9 pins to AF3 |
| n0tform3 | 8:1c6281289d67 | 499 | * @arg GPIO_AF_TIM10: Connect TIM10 pins to AF3 |
| n0tform3 | 8:1c6281289d67 | 500 | * @arg GPIO_AF_TIM11: Connect TIM11 pins to AF3 |
| n0tform3 | 8:1c6281289d67 | 501 | * @arg GPIO_AF_I2C1: Connect I2C1 pins to AF4 |
| n0tform3 | 8:1c6281289d67 | 502 | * @arg GPIO_AF_I2C2: Connect I2C2 pins to AF4 |
| n0tform3 | 8:1c6281289d67 | 503 | * @arg GPIO_AF_I2C3: Connect I2C3 pins to AF4 |
| n0tform3 | 8:1c6281289d67 | 504 | * @arg GPIO_AF_SPI1: Connect SPI1 pins to AF5 |
| n0tform3 | 8:1c6281289d67 | 505 | * @arg GPIO_AF_SPI2: Connect SPI2/I2S2 pins to AF5 |
| n0tform3 | 8:1c6281289d67 | 506 | * @arg GPIO_AF_SPI3: Connect SPI3/I2S3 pins to AF6 |
| n0tform3 | 8:1c6281289d67 | 507 | * @arg GPIO_AF_I2S3ext: Connect I2S3ext pins to AF7 |
| n0tform3 | 8:1c6281289d67 | 508 | * @arg GPIO_AF_USART1: Connect USART1 pins to AF7 |
| n0tform3 | 8:1c6281289d67 | 509 | * @arg GPIO_AF_USART2: Connect USART2 pins to AF7 |
| n0tform3 | 8:1c6281289d67 | 510 | * @arg GPIO_AF_USART3: Connect USART3 pins to AF7 |
| n0tform3 | 8:1c6281289d67 | 511 | * @arg GPIO_AF_UART4: Connect UART4 pins to AF8 |
| n0tform3 | 8:1c6281289d67 | 512 | * @arg GPIO_AF_UART5: Connect UART5 pins to AF8 |
| n0tform3 | 8:1c6281289d67 | 513 | * @arg GPIO_AF_USART6: Connect USART6 pins to AF8 |
| n0tform3 | 8:1c6281289d67 | 514 | * @arg GPIO_AF_CAN1: Connect CAN1 pins to AF9 |
| n0tform3 | 8:1c6281289d67 | 515 | * @arg GPIO_AF_CAN2: Connect CAN2 pins to AF9 |
| n0tform3 | 8:1c6281289d67 | 516 | * @arg GPIO_AF_TIM12: Connect TIM12 pins to AF9 |
| n0tform3 | 8:1c6281289d67 | 517 | * @arg GPIO_AF_TIM13: Connect TIM13 pins to AF9 |
| n0tform3 | 8:1c6281289d67 | 518 | * @arg GPIO_AF_TIM14: Connect TIM14 pins to AF9 |
| n0tform3 | 8:1c6281289d67 | 519 | * @arg GPIO_AF_OTG_FS: Connect OTG_FS pins to AF10 |
| n0tform3 | 8:1c6281289d67 | 520 | * @arg GPIO_AF_OTG_HS: Connect OTG_HS pins to AF10 |
| n0tform3 | 8:1c6281289d67 | 521 | * @arg GPIO_AF_ETH: Connect ETHERNET pins to AF11 |
| n0tform3 | 8:1c6281289d67 | 522 | * @arg GPIO_AF_FSMC: Connect FSMC pins to AF12 |
| n0tform3 | 8:1c6281289d67 | 523 | * @arg GPIO_AF_OTG_HS_FS: Connect OTG HS (configured in FS) pins to AF12 |
| n0tform3 | 8:1c6281289d67 | 524 | * @arg GPIO_AF_SDIO: Connect SDIO pins to AF12 |
| n0tform3 | 8:1c6281289d67 | 525 | * @arg GPIO_AF_DCMI: Connect DCMI pins to AF13 |
| n0tform3 | 8:1c6281289d67 | 526 | * @arg GPIO_AF_EVENTOUT: Connect EVENTOUT pins to AF15 |
| n0tform3 | 8:1c6281289d67 | 527 | * @retval None |
| n0tform3 | 8:1c6281289d67 | 528 | */ |
| n0tform3 | 8:1c6281289d67 | 529 | void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF) |
| n0tform3 | 8:1c6281289d67 | 530 | { |
| n0tform3 | 8:1c6281289d67 | 531 | uint32_t temp = 0x00; |
| n0tform3 | 8:1c6281289d67 | 532 | uint32_t temp_2 = 0x00; |
| n0tform3 | 8:1c6281289d67 | 533 | |
| n0tform3 | 8:1c6281289d67 | 534 | /* Check the parameters */ |
| n0tform3 | 8:1c6281289d67 | 535 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| n0tform3 | 8:1c6281289d67 | 536 | assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); |
| n0tform3 | 8:1c6281289d67 | 537 | assert_param(IS_GPIO_AF(GPIO_AF)); |
| n0tform3 | 8:1c6281289d67 | 538 | |
| n0tform3 | 8:1c6281289d67 | 539 | temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ; |
| n0tform3 | 8:1c6281289d67 | 540 | GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ; |
| n0tform3 | 8:1c6281289d67 | 541 | temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp; |
| n0tform3 | 8:1c6281289d67 | 542 | GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2; |
| n0tform3 | 8:1c6281289d67 | 543 | } |
| n0tform3 | 8:1c6281289d67 | 544 | |
| n0tform3 | 8:1c6281289d67 | 545 | /** |
| n0tform3 | 8:1c6281289d67 | 546 | * @} |
| n0tform3 | 8:1c6281289d67 | 547 | */ |
| n0tform3 | 8:1c6281289d67 | 548 | |
| n0tform3 | 8:1c6281289d67 | 549 | /** |
| n0tform3 | 8:1c6281289d67 | 550 | * @} |
| n0tform3 | 8:1c6281289d67 | 551 | */ |
| n0tform3 | 8:1c6281289d67 | 552 | |
| n0tform3 | 8:1c6281289d67 | 553 | /** |
| n0tform3 | 8:1c6281289d67 | 554 | * @} |
| n0tform3 | 8:1c6281289d67 | 555 | */ |
| n0tform3 | 8:1c6281289d67 | 556 | |
| n0tform3 | 8:1c6281289d67 | 557 | /** |
| n0tform3 | 8:1c6281289d67 | 558 | * @} |
| n0tform3 | 8:1c6281289d67 | 559 | */ |
| n0tform3 | 8:1c6281289d67 | 560 | |
| n0tform3 | 8:1c6281289d67 | 561 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |
| n0tform3 | 8:1c6281289d67 | 562 |