mattia griotti / Mbed 2 deprecated HelloWorld_IKS01A1

Simple "hello world" style program for X-NUCLEO-IKS01A1 MEMS Inertial

Dependencies:   BLE_API X_NUCLEO_IDB0XA1 X_NUCLEO_IKS01A1 mbed

Fork of HelloWorld_IKS01A1 by ST

misc.h@8:1c6281289d67, 2015-11-15 (annotated)

Committer:
n0tform3
Date:
Sun Nov 15 09:00:40 2015 +0000
Revision:
8:1c6281289d67
test with led

Who changed what in which revision?

UserRevisionLine numberNew contents of line
n0tform3 8:1c6281289d67 1 /**
n0tform3 8:1c6281289d67 2 ******************************************************************************
n0tform3 8:1c6281289d67 3 * @file misc.h
n0tform3 8:1c6281289d67 4 * @author MCD Application Team
n0tform3 8:1c6281289d67 5 * @version V1.0.0
n0tform3 8:1c6281289d67 6 * @date 30-September-2011
n0tform3 8:1c6281289d67 7 * @brief This file contains all the functions prototypes for the miscellaneous
n0tform3 8:1c6281289d67 8 * firmware library functions (add-on to CMSIS functions).
n0tform3 8:1c6281289d67 9 ******************************************************************************
n0tform3 8:1c6281289d67 10 * @attention
n0tform3 8:1c6281289d67 11 *
n0tform3 8:1c6281289d67 12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
n0tform3 8:1c6281289d67 13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
n0tform3 8:1c6281289d67 14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
n0tform3 8:1c6281289d67 15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
n0tform3 8:1c6281289d67 16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
n0tform3 8:1c6281289d67 17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
n0tform3 8:1c6281289d67 18 *
n0tform3 8:1c6281289d67 19 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
n0tform3 8:1c6281289d67 20 ******************************************************************************
n0tform3 8:1c6281289d67 21 */
n0tform3 8:1c6281289d67 22
n0tform3 8:1c6281289d67 23 /* Define to prevent recursive inclusion -------------------------------------*/
n0tform3 8:1c6281289d67 24 #ifndef __MISC_H
n0tform3 8:1c6281289d67 25 #define __MISC_H
n0tform3 8:1c6281289d67 26
n0tform3 8:1c6281289d67 27 #ifdef __cplusplus
n0tform3 8:1c6281289d67 28 extern "C" {
n0tform3 8:1c6281289d67 29 #endif
n0tform3 8:1c6281289d67 30
n0tform3 8:1c6281289d67 31 /* Includes ------------------------------------------------------------------*/
n0tform3 8:1c6281289d67 32 #include "stm32f4xx.h"
n0tform3 8:1c6281289d67 33
n0tform3 8:1c6281289d67 34 /** @addtogroup STM32F4xx_StdPeriph_Driver
n0tform3 8:1c6281289d67 35 * @{
n0tform3 8:1c6281289d67 36 */
n0tform3 8:1c6281289d67 37
n0tform3 8:1c6281289d67 38 /** @addtogroup MISC
n0tform3 8:1c6281289d67 39 * @{
n0tform3 8:1c6281289d67 40 */
n0tform3 8:1c6281289d67 41
n0tform3 8:1c6281289d67 42 /* Exported types ------------------------------------------------------------*/
n0tform3 8:1c6281289d67 43
n0tform3 8:1c6281289d67 44 /**
n0tform3 8:1c6281289d67 45 * @brief NVIC Init Structure definition
n0tform3 8:1c6281289d67 46 */
n0tform3 8:1c6281289d67 47
n0tform3 8:1c6281289d67 48 typedef struct
n0tform3 8:1c6281289d67 49 {
n0tform3 8:1c6281289d67 50 uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
n0tform3 8:1c6281289d67 51 This parameter can be an enumerator of @ref IRQn_Type
n0tform3 8:1c6281289d67 52 enumeration (For the complete STM32 Devices IRQ Channels
n0tform3 8:1c6281289d67 53 list, please refer to stm32f4xx.h file) */
n0tform3 8:1c6281289d67 54
n0tform3 8:1c6281289d67 55 uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
n0tform3 8:1c6281289d67 56 specified in NVIC_IRQChannel. This parameter can be a value
n0tform3 8:1c6281289d67 57 between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
n0tform3 8:1c6281289d67 58 A lower priority value indicates a higher priority */
n0tform3 8:1c6281289d67 59
n0tform3 8:1c6281289d67 60 uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
n0tform3 8:1c6281289d67 61 in NVIC_IRQChannel. This parameter can be a value
n0tform3 8:1c6281289d67 62 between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
n0tform3 8:1c6281289d67 63 A lower priority value indicates a higher priority */
n0tform3 8:1c6281289d67 64
n0tform3 8:1c6281289d67 65 FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
n0tform3 8:1c6281289d67 66 will be enabled or disabled.
n0tform3 8:1c6281289d67 67 This parameter can be set either to ENABLE or DISABLE */
n0tform3 8:1c6281289d67 68 } NVIC_InitTypeDef;
n0tform3 8:1c6281289d67 69
n0tform3 8:1c6281289d67 70 /* Exported constants --------------------------------------------------------*/
n0tform3 8:1c6281289d67 71
n0tform3 8:1c6281289d67 72 /** @defgroup MISC_Exported_Constants
n0tform3 8:1c6281289d67 73 * @{
n0tform3 8:1c6281289d67 74 */
n0tform3 8:1c6281289d67 75
n0tform3 8:1c6281289d67 76 /** @defgroup MISC_Vector_Table_Base
n0tform3 8:1c6281289d67 77 * @{
n0tform3 8:1c6281289d67 78 */
n0tform3 8:1c6281289d67 79
n0tform3 8:1c6281289d67 80 #define NVIC_VectTab_RAM ((uint32_t)0x20000000)
n0tform3 8:1c6281289d67 81 #define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
n0tform3 8:1c6281289d67 82 #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
n0tform3 8:1c6281289d67 83 ((VECTTAB) == NVIC_VectTab_FLASH))
n0tform3 8:1c6281289d67 84 /**
n0tform3 8:1c6281289d67 85 * @}
n0tform3 8:1c6281289d67 86 */
n0tform3 8:1c6281289d67 87
n0tform3 8:1c6281289d67 88 /** @defgroup MISC_System_Low_Power
n0tform3 8:1c6281289d67 89 * @{
n0tform3 8:1c6281289d67 90 */
n0tform3 8:1c6281289d67 91
n0tform3 8:1c6281289d67 92 #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
n0tform3 8:1c6281289d67 93 #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
n0tform3 8:1c6281289d67 94 #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
n0tform3 8:1c6281289d67 95 #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
n0tform3 8:1c6281289d67 96 ((LP) == NVIC_LP_SLEEPDEEP) || \
n0tform3 8:1c6281289d67 97 ((LP) == NVIC_LP_SLEEPONEXIT))
n0tform3 8:1c6281289d67 98 /**
n0tform3 8:1c6281289d67 99 * @}
n0tform3 8:1c6281289d67 100 */
n0tform3 8:1c6281289d67 101
n0tform3 8:1c6281289d67 102 /** @defgroup MISC_Preemption_Priority_Group
n0tform3 8:1c6281289d67 103 * @{
n0tform3 8:1c6281289d67 104 */
n0tform3 8:1c6281289d67 105
n0tform3 8:1c6281289d67 106 #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
n0tform3 8:1c6281289d67 107 4 bits for subpriority */
n0tform3 8:1c6281289d67 108 #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
n0tform3 8:1c6281289d67 109 3 bits for subpriority */
n0tform3 8:1c6281289d67 110 #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
n0tform3 8:1c6281289d67 111 2 bits for subpriority */
n0tform3 8:1c6281289d67 112 #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
n0tform3 8:1c6281289d67 113 1 bits for subpriority */
n0tform3 8:1c6281289d67 114 #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
n0tform3 8:1c6281289d67 115 0 bits for subpriority */
n0tform3 8:1c6281289d67 116
n0tform3 8:1c6281289d67 117 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
n0tform3 8:1c6281289d67 118 ((GROUP) == NVIC_PriorityGroup_1) || \
n0tform3 8:1c6281289d67 119 ((GROUP) == NVIC_PriorityGroup_2) || \
n0tform3 8:1c6281289d67 120 ((GROUP) == NVIC_PriorityGroup_3) || \
n0tform3 8:1c6281289d67 121 ((GROUP) == NVIC_PriorityGroup_4))
n0tform3 8:1c6281289d67 122
n0tform3 8:1c6281289d67 123 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
n0tform3 8:1c6281289d67 124
n0tform3 8:1c6281289d67 125 #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
n0tform3 8:1c6281289d67 126
n0tform3 8:1c6281289d67 127 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
n0tform3 8:1c6281289d67 128
n0tform3 8:1c6281289d67 129 /**
n0tform3 8:1c6281289d67 130 * @}
n0tform3 8:1c6281289d67 131 */
n0tform3 8:1c6281289d67 132
n0tform3 8:1c6281289d67 133 /** @defgroup MISC_SysTick_clock_source
n0tform3 8:1c6281289d67 134 * @{
n0tform3 8:1c6281289d67 135 */
n0tform3 8:1c6281289d67 136
n0tform3 8:1c6281289d67 137 #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
n0tform3 8:1c6281289d67 138 #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
n0tform3 8:1c6281289d67 139 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
n0tform3 8:1c6281289d67 140 ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
n0tform3 8:1c6281289d67 141 /**
n0tform3 8:1c6281289d67 142 * @}
n0tform3 8:1c6281289d67 143 */
n0tform3 8:1c6281289d67 144
n0tform3 8:1c6281289d67 145 /**
n0tform3 8:1c6281289d67 146 * @}
n0tform3 8:1c6281289d67 147 */
n0tform3 8:1c6281289d67 148
n0tform3 8:1c6281289d67 149 /* Exported macro ------------------------------------------------------------*/
n0tform3 8:1c6281289d67 150 /* Exported functions --------------------------------------------------------*/
n0tform3 8:1c6281289d67 151
n0tform3 8:1c6281289d67 152 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
n0tform3 8:1c6281289d67 153 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
n0tform3 8:1c6281289d67 154 void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
n0tform3 8:1c6281289d67 155 void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
n0tform3 8:1c6281289d67 156 void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
n0tform3 8:1c6281289d67 157
n0tform3 8:1c6281289d67 158 #ifdef __cplusplus
n0tform3 8:1c6281289d67 159 }
n0tform3 8:1c6281289d67 160 #endif
n0tform3 8:1c6281289d67 161
n0tform3 8:1c6281289d67 162 #endif /* __MISC_H */
n0tform3 8:1c6281289d67 163
n0tform3 8:1c6281289d67 164 /**
n0tform3 8:1c6281289d67 165 * @}
n0tform3 8:1c6281289d67 166 */
n0tform3 8:1c6281289d67 167
n0tform3 8:1c6281289d67 168 /**
n0tform3 8:1c6281289d67 169 * @}
n0tform3 8:1c6281289d67 170 */
n0tform3 8:1c6281289d67 171
n0tform3 8:1c6281289d67 172 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
n0tform3 8:1c6281289d67 173