Official mbed Real Time Operating System based on the RTX implementation of the CMSIS-RTOS API open standard.
Dependents: DISCO-F746NG_rtos_test ecte433
Fork of mbed-rtos by
rtx/TARGET_ARM7/HAL_CM.c@96:8ac966e2cd3f, 2015-11-11 (annotated)
- Committer:
- mzta
- Date:
- Wed Nov 11 07:21:20 2015 +0000
- Revision:
- 96:8ac966e2cd3f
- Parent:
- 80:2dab120a94c2
Support Cortex-M7 target.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 80:2dab120a94c2 | 1 | /*---------------------------------------------------------------------------- |
mbed_official | 80:2dab120a94c2 | 2 | * RL-ARM - RTX |
mbed_official | 80:2dab120a94c2 | 3 | *---------------------------------------------------------------------------- |
mbed_official | 80:2dab120a94c2 | 4 | * Name: HAL_CM.C |
mbed_official | 80:2dab120a94c2 | 5 | * Purpose: Hardware Abstraction Layer for ARM7TDMI |
mbed_official | 80:2dab120a94c2 | 6 | * Rev.: V1.0 |
mbed_official | 80:2dab120a94c2 | 7 | *---------------------------------------------------------------------------- |
mbed_official | 80:2dab120a94c2 | 8 | * |
mbed_official | 80:2dab120a94c2 | 9 | * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH |
mbed_official | 80:2dab120a94c2 | 10 | * All rights reserved. |
mbed_official | 80:2dab120a94c2 | 11 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 80:2dab120a94c2 | 12 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 80:2dab120a94c2 | 13 | * - Redistributions of source code must retain the above copyright |
mbed_official | 80:2dab120a94c2 | 14 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 80:2dab120a94c2 | 15 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 80:2dab120a94c2 | 16 | * notice, this list of conditions and the following disclaimer in the |
mbed_official | 80:2dab120a94c2 | 17 | * documentation and/or other materials provided with the distribution. |
mbed_official | 80:2dab120a94c2 | 18 | * - Neither the name of ARM nor the names of its contributors may be used |
mbed_official | 80:2dab120a94c2 | 19 | * to endorse or promote products derived from this software without |
mbed_official | 80:2dab120a94c2 | 20 | * specific prior written permission. |
mbed_official | 80:2dab120a94c2 | 21 | * |
mbed_official | 80:2dab120a94c2 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 80:2dab120a94c2 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 80:2dab120a94c2 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
mbed_official | 80:2dab120a94c2 | 25 | * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
mbed_official | 80:2dab120a94c2 | 26 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
mbed_official | 80:2dab120a94c2 | 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
mbed_official | 80:2dab120a94c2 | 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
mbed_official | 80:2dab120a94c2 | 29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
mbed_official | 80:2dab120a94c2 | 30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
mbed_official | 80:2dab120a94c2 | 31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 80:2dab120a94c2 | 32 | * POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 80:2dab120a94c2 | 33 | *---------------------------------------------------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 34 | |
mbed_official | 80:2dab120a94c2 | 35 | #include "rt_TypeDef.h" |
mbed_official | 80:2dab120a94c2 | 36 | #include "RTX_Conf.h" |
mbed_official | 80:2dab120a94c2 | 37 | #include "rt_HAL_CM.h" |
mbed_official | 80:2dab120a94c2 | 38 | |
mbed_official | 80:2dab120a94c2 | 39 | |
mbed_official | 80:2dab120a94c2 | 40 | /*---------------------------------------------------------------------------- |
mbed_official | 80:2dab120a94c2 | 41 | * Global Variables |
mbed_official | 80:2dab120a94c2 | 42 | *---------------------------------------------------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 43 | |
mbed_official | 80:2dab120a94c2 | 44 | #ifdef DBG_MSG |
mbed_official | 80:2dab120a94c2 | 45 | BIT dbg_msg; |
mbed_official | 80:2dab120a94c2 | 46 | #endif |
mbed_official | 80:2dab120a94c2 | 47 | |
mbed_official | 80:2dab120a94c2 | 48 | /*---------------------------------------------------------------------------- |
mbed_official | 80:2dab120a94c2 | 49 | * Functions |
mbed_official | 80:2dab120a94c2 | 50 | *---------------------------------------------------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 51 | |
mbed_official | 80:2dab120a94c2 | 52 | |
mbed_official | 80:2dab120a94c2 | 53 | /*--------------------------- rt_init_stack ---------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 54 | |
mbed_official | 80:2dab120a94c2 | 55 | void rt_init_stack (P_TCB p_TCB, FUNCP task_body) { |
mbed_official | 80:2dab120a94c2 | 56 | /* Prepare TCB and saved context for a first time start of a task. */ |
mbed_official | 80:2dab120a94c2 | 57 | U32 *stk,i,size; |
mbed_official | 80:2dab120a94c2 | 58 | |
mbed_official | 80:2dab120a94c2 | 59 | /* Prepare a complete interrupt frame for first task start */ |
mbed_official | 80:2dab120a94c2 | 60 | size = p_TCB->priv_stack >> 2; |
mbed_official | 80:2dab120a94c2 | 61 | |
mbed_official | 80:2dab120a94c2 | 62 | /* Write to the top of stack. */ |
mbed_official | 80:2dab120a94c2 | 63 | stk = &p_TCB->stack[size]; |
mbed_official | 80:2dab120a94c2 | 64 | |
mbed_official | 80:2dab120a94c2 | 65 | /* Auto correct to 8-byte ARM stack alignment. */ |
mbed_official | 80:2dab120a94c2 | 66 | if ((U32)stk & 0x04) { |
mbed_official | 80:2dab120a94c2 | 67 | stk--; |
mbed_official | 80:2dab120a94c2 | 68 | } |
mbed_official | 80:2dab120a94c2 | 69 | |
mbed_official | 80:2dab120a94c2 | 70 | stk -= 16; |
mbed_official | 80:2dab120a94c2 | 71 | |
mbed_official | 80:2dab120a94c2 | 72 | /* Default xPSR and initial PC */ |
mbed_official | 80:2dab120a94c2 | 73 | stk[15] = (U32)task_body + 4; /* add 4 byte offset because SUB PC, LR - 4 */ |
mbed_official | 80:2dab120a94c2 | 74 | stk[0] = INITIAL_xPSR; |
mbed_official | 80:2dab120a94c2 | 75 | |
mbed_official | 80:2dab120a94c2 | 76 | /* Clear R0-R13/LR registers. */ |
mbed_official | 80:2dab120a94c2 | 77 | for (i = 1; i < 14; i++) { |
mbed_official | 80:2dab120a94c2 | 78 | stk[i] = 0; |
mbed_official | 80:2dab120a94c2 | 79 | } |
mbed_official | 80:2dab120a94c2 | 80 | |
mbed_official | 80:2dab120a94c2 | 81 | /* Assign a void pointer to R0. */ |
mbed_official | 80:2dab120a94c2 | 82 | stk[TCB_STACK_R0_OFFSET_DWORDS] = (U32)p_TCB->msg; |
mbed_official | 80:2dab120a94c2 | 83 | |
mbed_official | 80:2dab120a94c2 | 84 | /* Initial Task stack pointer. */ |
mbed_official | 80:2dab120a94c2 | 85 | p_TCB->tsk_stack = (U32)stk; |
mbed_official | 80:2dab120a94c2 | 86 | |
mbed_official | 80:2dab120a94c2 | 87 | /* Task entry point. */ |
mbed_official | 80:2dab120a94c2 | 88 | p_TCB->ptask = task_body; |
mbed_official | 80:2dab120a94c2 | 89 | |
mbed_official | 80:2dab120a94c2 | 90 | /* Set a magic word for checking of stack overflow. |
mbed_official | 80:2dab120a94c2 | 91 | For the main thread (ID: 0x01) the stack is in a memory area shared with the |
mbed_official | 80:2dab120a94c2 | 92 | heap, therefore the last word of the stack is a moving target. |
mbed_official | 80:2dab120a94c2 | 93 | We want to do stack/heap collision detection instead. |
mbed_official | 80:2dab120a94c2 | 94 | */ |
mbed_official | 80:2dab120a94c2 | 95 | if (p_TCB->task_id != 0x01) |
mbed_official | 80:2dab120a94c2 | 96 | p_TCB->stack[0] = MAGIC_WORD; |
mbed_official | 80:2dab120a94c2 | 97 | } |
mbed_official | 80:2dab120a94c2 | 98 | |
mbed_official | 80:2dab120a94c2 | 99 | |
mbed_official | 80:2dab120a94c2 | 100 | /*--------------------------- rt_ret_val ----------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 101 | |
mbed_official | 80:2dab120a94c2 | 102 | static __inline U32 *rt_ret_regs (P_TCB p_TCB) { |
mbed_official | 80:2dab120a94c2 | 103 | /* Get pointer to task return value registers (R0..R3) in Stack */ |
mbed_official | 80:2dab120a94c2 | 104 | |
mbed_official | 80:2dab120a94c2 | 105 | /* Stack Frame: CPSR,R0-R13,PC */ |
mbed_official | 80:2dab120a94c2 | 106 | return (U32 *)(p_TCB->tsk_stack + TCB_STACK_R0_OFFSET_BYTES); |
mbed_official | 80:2dab120a94c2 | 107 | } |
mbed_official | 80:2dab120a94c2 | 108 | |
mbed_official | 80:2dab120a94c2 | 109 | void rt_ret_val (P_TCB p_TCB, U32 v0) { |
mbed_official | 80:2dab120a94c2 | 110 | U32 *ret; |
mbed_official | 80:2dab120a94c2 | 111 | |
mbed_official | 80:2dab120a94c2 | 112 | ret = rt_ret_regs(p_TCB); |
mbed_official | 80:2dab120a94c2 | 113 | ret[0] = v0; |
mbed_official | 80:2dab120a94c2 | 114 | } |
mbed_official | 80:2dab120a94c2 | 115 | |
mbed_official | 80:2dab120a94c2 | 116 | void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) { |
mbed_official | 80:2dab120a94c2 | 117 | U32 *ret; |
mbed_official | 80:2dab120a94c2 | 118 | |
mbed_official | 80:2dab120a94c2 | 119 | ret = rt_ret_regs(p_TCB); |
mbed_official | 80:2dab120a94c2 | 120 | ret[0] = v0; |
mbed_official | 80:2dab120a94c2 | 121 | ret[1] = v1; |
mbed_official | 80:2dab120a94c2 | 122 | } |
mbed_official | 80:2dab120a94c2 | 123 | |
mbed_official | 80:2dab120a94c2 | 124 | |
mbed_official | 80:2dab120a94c2 | 125 | /*--------------------------- dbg_init --------------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 126 | |
mbed_official | 80:2dab120a94c2 | 127 | #ifdef DBG_MSG |
mbed_official | 80:2dab120a94c2 | 128 | void dbg_init (void) { |
mbed_official | 80:2dab120a94c2 | 129 | if ((DEMCR & DEMCR_TRCENA) && |
mbed_official | 80:2dab120a94c2 | 130 | (ITM_CONTROL & ITM_ITMENA) && |
mbed_official | 80:2dab120a94c2 | 131 | (ITM_ENABLE & (1UL << 31))) { |
mbed_official | 80:2dab120a94c2 | 132 | dbg_msg = __TRUE; |
mbed_official | 80:2dab120a94c2 | 133 | } |
mbed_official | 80:2dab120a94c2 | 134 | } |
mbed_official | 80:2dab120a94c2 | 135 | #endif |
mbed_official | 80:2dab120a94c2 | 136 | |
mbed_official | 80:2dab120a94c2 | 137 | /*--------------------------- dbg_task_notify -------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 138 | |
mbed_official | 80:2dab120a94c2 | 139 | #ifdef DBG_MSG |
mbed_official | 80:2dab120a94c2 | 140 | void dbg_task_notify (P_TCB p_tcb, BOOL create) { |
mbed_official | 80:2dab120a94c2 | 141 | while (ITM_PORT31_U32 == 0); |
mbed_official | 80:2dab120a94c2 | 142 | ITM_PORT31_U32 = (U32)p_tcb->ptask; |
mbed_official | 80:2dab120a94c2 | 143 | while (ITM_PORT31_U32 == 0); |
mbed_official | 80:2dab120a94c2 | 144 | ITM_PORT31_U16 = (create << 8) | p_tcb->task_id; |
mbed_official | 80:2dab120a94c2 | 145 | } |
mbed_official | 80:2dab120a94c2 | 146 | #endif |
mbed_official | 80:2dab120a94c2 | 147 | |
mbed_official | 80:2dab120a94c2 | 148 | /*--------------------------- dbg_task_switch -------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 149 | |
mbed_official | 80:2dab120a94c2 | 150 | #ifdef DBG_MSG |
mbed_official | 80:2dab120a94c2 | 151 | void dbg_task_switch (U32 task_id) { |
mbed_official | 80:2dab120a94c2 | 152 | while (ITM_PORT31_U32 == 0); |
mbed_official | 80:2dab120a94c2 | 153 | ITM_PORT31_U8 = task_id; |
mbed_official | 80:2dab120a94c2 | 154 | } |
mbed_official | 80:2dab120a94c2 | 155 | #endif |
mbed_official | 80:2dab120a94c2 | 156 | |
mbed_official | 80:2dab120a94c2 | 157 | |
mbed_official | 80:2dab120a94c2 | 158 | /*---------------------------------------------------------------------------- |
mbed_official | 80:2dab120a94c2 | 159 | * end of file |
mbed_official | 80:2dab120a94c2 | 160 | *---------------------------------------------------------------------------*/ |
mbed_official | 80:2dab120a94c2 | 161 |