Shift registers working
ShiftReg.h@2:b565b6a8f612, 2019-05-07 (annotated)
- Committer:
- mwthewsey
- Date:
- Tue May 07 13:53:06 2019 +0000
- Revision:
- 2:b565b6a8f612
- Parent:
- 1:9cc13bd590df
shift regs working
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
yoonghm | 0:a0e3fd47970f | 1 | /* mbed Shift Register Library, such as for NXP 74HC595 |
yoonghm | 0:a0e3fd47970f | 2 | * Copyright (c) 2012, YoongHM |
yoonghm | 0:a0e3fd47970f | 3 | * |
yoonghm | 0:a0e3fd47970f | 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
yoonghm | 0:a0e3fd47970f | 5 | * of this software and associated documentation files (the "Software"), to deal |
yoonghm | 0:a0e3fd47970f | 6 | * in the Software without restriction, including without limitation the rights |
yoonghm | 0:a0e3fd47970f | 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
yoonghm | 0:a0e3fd47970f | 8 | * copies of the Software, and to permit persons to whom the Software is |
yoonghm | 0:a0e3fd47970f | 9 | * furnished to do so, subject to the following conditions: |
yoonghm | 0:a0e3fd47970f | 10 | * |
yoonghm | 0:a0e3fd47970f | 11 | * The above copyright notice and this permission notice shall be included in |
yoonghm | 0:a0e3fd47970f | 12 | * all copies or substantial portions of the Software. |
yoonghm | 0:a0e3fd47970f | 13 | * |
yoonghm | 0:a0e3fd47970f | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
yoonghm | 0:a0e3fd47970f | 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
yoonghm | 0:a0e3fd47970f | 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
yoonghm | 0:a0e3fd47970f | 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
yoonghm | 0:a0e3fd47970f | 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
yoonghm | 0:a0e3fd47970f | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
yoonghm | 0:a0e3fd47970f | 20 | * THE SOFTWARE. |
yoonghm | 0:a0e3fd47970f | 21 | */ |
yoonghm | 0:a0e3fd47970f | 22 | |
yoonghm | 0:a0e3fd47970f | 23 | #ifndef _SHIFTREG_H |
yoonghm | 0:a0e3fd47970f | 24 | #define _SHIFTREG_H |
yoonghm | 0:a0e3fd47970f | 25 | |
yoonghm | 0:a0e3fd47970f | 26 | #include "mbed.h" |
yoonghm | 0:a0e3fd47970f | 27 | |
yoonghm | 0:a0e3fd47970f | 28 | /** A interface to drive shifter register as such 74HCT595 |
yoonghm | 0:a0e3fd47970f | 29 | * |
yoonghm | 0:a0e3fd47970f | 30 | * @code |
yoonghm | 0:a0e3fd47970f | 31 | * #include "mbed.h" |
yoonghm | 0:a0e3fd47970f | 32 | * #include "ShiftReg.h" |
yoonghm | 0:a0e3fd47970f | 33 | * |
yoonghm | 0:a0e3fd47970f | 34 | * ShiftReg HC595(p21, p22, p23); |
yoonghm | 0:a0e3fd47970f | 35 | * |
yoonghm | 0:a0e3fd47970f | 36 | * int main() { |
yoonghm | 0:a0e3fd47970f | 37 | * // clear shift and store registers initially |
yoonghm | 0:a0e3fd47970f | 38 | * HC595.ShiftByte(0x00, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 39 | * |
yoonghm | 0:a0e3fd47970f | 40 | * while(1) { |
yoonghm | 0:a0e3fd47970f | 41 | * // Demostrate to shift in bit by bit |
yoonghm | 0:a0e3fd47970f | 42 | * HC595.ShiftBit(1); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 43 | * for (int i = 0; i < 8; i++) { |
yoonghm | 0:a0e3fd47970f | 44 | * HC595.ShiftBit(0); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 45 | * } |
yoonghm | 0:a0e3fd47970f | 46 | |
yoonghm | 0:a0e3fd47970f | 47 | * // Demostrate to shift in byte-by-byte |
yoonghm | 0:a0e3fd47970f | 48 | * // HC595.ShiftByte(0x80, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 49 | * HC595.ShiftByte(0x40, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 50 | * HC595.ShiftByte(0x20, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 51 | * HC595.ShiftByte(0x10, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 52 | * HC595.ShiftByte(0x08, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 53 | * HC595.ShiftByte(0x04, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 54 | * HC595.ShiftByte(0x02, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 55 | * HC595.ShiftByte(0x01, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 56 | * HC595.ShiftByte(0x00, ShiftReg::MSBFirst); HC595.Latch(); wait(0.2); |
yoonghm | 0:a0e3fd47970f | 57 | * } |
yoonghm | 0:a0e3fd47970f | 58 | * } |
yoonghm | 0:a0e3fd47970f | 59 | * @endcode |
yoonghm | 0:a0e3fd47970f | 60 | */ |
yoonghm | 0:a0e3fd47970f | 61 | |
yoonghm | 0:a0e3fd47970f | 62 | class ShiftReg |
yoonghm | 0:a0e3fd47970f | 63 | { |
yoonghm | 0:a0e3fd47970f | 64 | public: |
yoonghm | 0:a0e3fd47970f | 65 | /** Bit order out format */ |
mwthewsey | 1:9cc13bd590df | 66 | enum BitOrd {MSBFirst = 0x8000, /**< Most significant bit first */LSBFirst = 0x0001 /**< Least significant bit first */}; |
yoonghm | 0:a0e3fd47970f | 67 | |
yoonghm | 0:a0e3fd47970f | 68 | /** Create a ShiftReg interface to shift register |
yoonghm | 0:a0e3fd47970f | 69 | * |
yoonghm | 0:a0e3fd47970f | 70 | * @param data Pin to serial input to shift register |
yoonghm | 0:a0e3fd47970f | 71 | * @param store Pin to store register |
yoonghm | 0:a0e3fd47970f | 72 | * @param clock Pin to shift into register |
yoonghm | 0:a0e3fd47970f | 73 | */ |
mwthewsey | 2:b565b6a8f612 | 74 | ShiftReg(PinName data, PinName store, PinName clock, PinName enable);//Constructor |
yoonghm | 0:a0e3fd47970f | 75 | |
yoonghm | 0:a0e3fd47970f | 76 | /** Shift out 8-bit data via the serial pin |
yoonghm | 0:a0e3fd47970f | 77 | * |
yoonghm | 0:a0e3fd47970f | 78 | * @param data Data to be shifted out via the serial pin |
yoonghm | 0:a0e3fd47970f | 79 | * @param order Bit order to shift out data. Default is MSBFirst |
yoonghm | 0:a0e3fd47970f | 80 | */ |
mwthewsey | 1:9cc13bd590df | 81 | void ShiftByte(uint16_t data,BitOrd ord = MSBFirst);//Shifting the data member function |
mwthewsey | 2:b565b6a8f612 | 82 | void Write(uint16_t data);//Writing data in it |
yoonghm | 0:a0e3fd47970f | 83 | /** Shift out 1-bit data via the serial pin |
yoonghm | 0:a0e3fd47970f | 84 | * |
yoonghm | 0:a0e3fd47970f | 85 | * @param data Data to be shifted out via the serial pin |
yoonghm | 0:a0e3fd47970f | 86 | */ |
mwthewsey | 1:9cc13bd590df | 87 | void ShiftBit(int8_t data = 0);//Shifting a single bit in |
yoonghm | 0:a0e3fd47970f | 88 | |
yoonghm | 0:a0e3fd47970f | 89 | /** Latch data out |
yoonghm | 0:a0e3fd47970f | 90 | */ |
mwthewsey | 1:9cc13bd590df | 91 | void Latch(); |
yoonghm | 0:a0e3fd47970f | 92 | |
yoonghm | 0:a0e3fd47970f | 93 | private: |
yoonghm | 0:a0e3fd47970f | 94 | DigitalOut _ds; // Serial in |
yoonghm | 0:a0e3fd47970f | 95 | DigitalOut _st; // store register or latch |
yoonghm | 0:a0e3fd47970f | 96 | DigitalOut _sh; // shift register |
mwthewsey | 2:b565b6a8f612 | 97 | DigitalOut _en; // shift enable |
yoonghm | 0:a0e3fd47970f | 98 | BitOrd _ord; // Bit order to shift out data |
yoonghm | 0:a0e3fd47970f | 99 | }; |
yoonghm | 0:a0e3fd47970f | 100 | |
yoonghm | 0:a0e3fd47970f | 101 | #endif // _SHIFTREG_H |