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sd-driver/SDBlockDevice.cpp@4:019309e6090e, 2018-01-09 (annotated)

Committer:
mslade
Date:
Tue Jan 09 16:39:28 2018 +0000
Revision:
4:019309e6090e
Parent:
1:84581acd1333 
Update for DLE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mslade 1:84581acd1333 1 /* mbed Microcontroller Library
mslade 1:84581acd1333 2 * Copyright (c) 2006-2012 ARM Limited
mslade 1:84581acd1333 3 *
mslade 1:84581acd1333 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
mslade 1:84581acd1333 5 * of this software and associated documentation files (the "Software"), to deal
mslade 1:84581acd1333 6 * in the Software without restriction, including without limitation the rights
mslade 1:84581acd1333 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
mslade 1:84581acd1333 8 * copies of the Software, and to permit persons to whom the Software is
mslade 1:84581acd1333 9 * furnished to do so, subject to the following conditions:
mslade 1:84581acd1333 10 *
mslade 1:84581acd1333 11 * The above copyright notice and this permission notice shall be included in
mslade 1:84581acd1333 12 * all copies or substantial portions of the Software.
mslade 1:84581acd1333 13 *
mslade 1:84581acd1333 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
mslade 1:84581acd1333 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
mslade 1:84581acd1333 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
mslade 1:84581acd1333 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
mslade 1:84581acd1333 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
mslade 1:84581acd1333 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
mslade 1:84581acd1333 20 * SOFTWARE.
mslade 1:84581acd1333 21 */
mslade 1:84581acd1333 22 /* Introduction
mslade 1:84581acd1333 23 * ------------
mslade 1:84581acd1333 24 * SD and MMC cards support a number of interfaces, but common to them all
mslade 1:84581acd1333 25 * is one based on SPI. Since we already have the mbed SPI Interface, it will
mslade 1:84581acd1333 26 * be used for SD cards.
mslade 1:84581acd1333 27 *
mslade 1:84581acd1333 28 * The main reference I'm using is Chapter 7, "SPI Mode" of:
mslade 1:84581acd1333 29 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
mslade 1:84581acd1333 30 *
mslade 1:84581acd1333 31 * SPI Startup
mslade 1:84581acd1333 32 * -----------
mslade 1:84581acd1333 33 * The SD card powers up in SD mode. The start-up procedure is complicated
mslade 1:84581acd1333 34 * by the requirement to support older SDCards in a backwards compatible
mslade 1:84581acd1333 35 * way with the new higher capacity variants SDHC and SDHC.
mslade 1:84581acd1333 36 *
mslade 1:84581acd1333 37 * The following figures from the specification with associated text describe
mslade 1:84581acd1333 38 * the SPI mode initialisation process:
mslade 1:84581acd1333 39 * - Figure 7-1: SD Memory Card State Diagram (SPI mode)
mslade 1:84581acd1333 40 * - Figure 7-2: SPI Mode Initialization Flow
mslade 1:84581acd1333 41 *
mslade 1:84581acd1333 42 * Firstly, a low initial clock should be selected (in the range of 100-
mslade 1:84581acd1333 43 * 400kHZ). After initialisation has been completed, the switch to a
mslade 1:84581acd1333 44 * higher clock speed can be made (e.g. 1MHz). Newer cards will support
mslade 1:84581acd1333 45 * higher speeds than the default _transfer_sck defined here.
mslade 1:84581acd1333 46 *
mslade 1:84581acd1333 47 * Next, note the following from the SDCard specification (note to
mslade 1:84581acd1333 48 * Figure 7-1):
mslade 1:84581acd1333 49 *
mslade 1:84581acd1333 50 * In any of the cases CMD1 is not recommended because it may be difficult for the host
mslade 1:84581acd1333 51 * to distinguish between MultiMediaCard and SD Memory Card
mslade 1:84581acd1333 52 *
mslade 1:84581acd1333 53 * Hence CMD1 is not used for the initialisation sequence.
mslade 1:84581acd1333 54 *
mslade 1:84581acd1333 55 * The SPI interface mode is selected by asserting CS low and sending the
mslade 1:84581acd1333 56 * reset command (CMD0). The card will respond with a (R1) response.
mslade 1:84581acd1333 57 * In practice many cards initially respond with 0xff or invalid data
mslade 1:84581acd1333 58 * which is ignored. Data is read until a valid response is received
mslade 1:84581acd1333 59 * or the number of re-reads has exceeded a maximim count. If a valid
mslade 1:84581acd1333 60 * response is not received then the CMD0 can be retried. This
mslade 1:84581acd1333 61 * has been found to successfully initialise cards where the SPI master
mslade 1:84581acd1333 62 * (on MCU) has been reset but the SDCard has not, so the first
mslade 1:84581acd1333 63 * CMD0 may be lost.
mslade 1:84581acd1333 64 *
mslade 1:84581acd1333 65 * CMD8 is optionally sent to determine the voltage range supported, and
mslade 1:84581acd1333 66 * indirectly determine whether it is a version 1.x SD/non-SD card or
mslade 1:84581acd1333 67 * version 2.x. I'll just ignore this for now.
mslade 1:84581acd1333 68 *
mslade 1:84581acd1333 69 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
mslade 1:84581acd1333 70 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
mslade 1:84581acd1333 71 *
mslade 1:84581acd1333 72 * You should also indicate whether the host supports High Capicity cards,
mslade 1:84581acd1333 73 * and check whether the card is high capacity - i'll also ignore this
mslade 1:84581acd1333 74 *
mslade 1:84581acd1333 75 * SPI Protocol
mslade 1:84581acd1333 76 * ------------
mslade 1:84581acd1333 77 * The SD SPI protocol is based on transactions made up of 8-bit words, with
mslade 1:84581acd1333 78 * the host starting every bus transaction by asserting the CS signal low. The
mslade 1:84581acd1333 79 * card always responds to commands, data blocks and errors.
mslade 1:84581acd1333 80 *
mslade 1:84581acd1333 81 * The protocol supports a CRC, but by default it is off (except for the
mslade 1:84581acd1333 82 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
mslade 1:84581acd1333 83 * I'll leave the CRC off I think!
mslade 1:84581acd1333 84 *
mslade 1:84581acd1333 85 * Standard capacity cards have variable data block sizes, whereas High
mslade 1:84581acd1333 86 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
mslade 1:84581acd1333 87 * just always use the Standard Capacity cards with a block size of 512 bytes.
mslade 1:84581acd1333 88 * This is set with CMD16.
mslade 1:84581acd1333 89 *
mslade 1:84581acd1333 90 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
mslade 1:84581acd1333 91 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
mslade 1:84581acd1333 92 * the card gets a read command, it responds with a response token, and then
mslade 1:84581acd1333 93 * a data token or an error.
mslade 1:84581acd1333 94 *
mslade 1:84581acd1333 95 * SPI Command Format
mslade 1:84581acd1333 96 * ------------------
mslade 1:84581acd1333 97 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
mslade 1:84581acd1333 98 *
mslade 1:84581acd1333 99 * +---------------+------------+------------+-----------+----------+--------------+
mslade 1:84581acd1333 100 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
mslade 1:84581acd1333 101 * +---------------+------------+------------+-----------+----------+--------------+
mslade 1:84581acd1333 102 *
mslade 1:84581acd1333 103 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
mslade 1:84581acd1333 104 *
mslade 1:84581acd1333 105 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
mslade 1:84581acd1333 106 *
mslade 1:84581acd1333 107 * SPI Response Format
mslade 1:84581acd1333 108 * -------------------
mslade 1:84581acd1333 109 * The main response format (R1) is a status byte (normally zero). Key flags:
mslade 1:84581acd1333 110 * idle - 1 if the card is in an idle state/initialising
mslade 1:84581acd1333 111 * cmd - 1 if an illegal command code was detected
mslade 1:84581acd1333 112 *
mslade 1:84581acd1333 113 * +-------------------------------------------------+
mslade 1:84581acd1333 114 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
mslade 1:84581acd1333 115 * +-------------------------------------------------+
mslade 1:84581acd1333 116 *
mslade 1:84581acd1333 117 * R1b is the same, except it is followed by a busy signal (zeros) until
mslade 1:84581acd1333 118 * the first non-zero byte when it is ready again.
mslade 1:84581acd1333 119 *
mslade 1:84581acd1333 120 * Data Response Token
mslade 1:84581acd1333 121 * -------------------
mslade 1:84581acd1333 122 * Every data block written to the card is acknowledged by a byte
mslade 1:84581acd1333 123 * response token
mslade 1:84581acd1333 124 *
mslade 1:84581acd1333 125 * +----------------------+
mslade 1:84581acd1333 126 * | xxx | 0 | status | 1 |
mslade 1:84581acd1333 127 * +----------------------+
mslade 1:84581acd1333 128 * 010 - OK!
mslade 1:84581acd1333 129 * 101 - CRC Error
mslade 1:84581acd1333 130 * 110 - Write Error
mslade 1:84581acd1333 131 *
mslade 1:84581acd1333 132 * Single Block Read and Write
mslade 1:84581acd1333 133 * ---------------------------
mslade 1:84581acd1333 134 *
mslade 1:84581acd1333 135 * Block transfers have a byte header, followed by the data, followed
mslade 1:84581acd1333 136 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
mslade 1:84581acd1333 137 *
mslade 1:84581acd1333 138 * +------+---------+---------+- - - -+---------+-----------+----------+
mslade 1:84581acd1333 139 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
mslade 1:84581acd1333 140 * +------+---------+---------+- - - -+---------+-----------+----------+
mslade 1:84581acd1333 141 */
mslade 1:84581acd1333 142
mslade 1:84581acd1333 143 /* If the target has no SPI support then SDCard is not supported */
mslade 1:84581acd1333 144 #ifdef DEVICE_SPI
mslade 1:84581acd1333 145
mslade 1:84581acd1333 146 #include "SDBlockDevice.h"
mslade 1:84581acd1333 147 #include "mbed_debug.h"
mslade 1:84581acd1333 148 #include <errno.h>
mslade 1:84581acd1333 149
mslade 1:84581acd1333 150 /* Required version: 5.6.1 and above */
mslade 1:84581acd1333 151 #ifdef MBED_MAJOR_VERSION
mslade 1:84581acd1333 152 #if (MBED_VERSION < MBED_ENCODE_VERSION(5,6,1))
mslade 1:84581acd1333 153 #error "Incompatible mbed-os version detected! Required 5.5.4 and above"
mslade 1:84581acd1333 154 #endif
mslade 1:84581acd1333 155 #else
mslade 1:84581acd1333 156 #warning "mbed-os version 5.6.1 or above required"
mslade 1:84581acd1333 157 #endif
mslade 1:84581acd1333 158
mslade 1:84581acd1333 159 #define SD_COMMAND_TIMEOUT 5000 /*!< Timeout in ms for response */
mslade 1:84581acd1333 160 #define SD_CMD0_GO_IDLE_STATE_RETRIES 5 /*!< Number of retries for sending CMDO */
mslade 1:84581acd1333 161 #define SD_DBG 0 /*!< 1 - Enable debugging */
mslade 1:84581acd1333 162 #define SD_CMD_TRACE 0 /*!< 1 - Enable SD command tracing */
mslade 1:84581acd1333 163
mslade 1:84581acd1333 164 #define SD_BLOCK_DEVICE_ERROR_WOULD_BLOCK -5001 /*!< operation would block */
mslade 1:84581acd1333 165 #define SD_BLOCK_DEVICE_ERROR_UNSUPPORTED -5002 /*!< unsupported operation */
mslade 1:84581acd1333 166 #define SD_BLOCK_DEVICE_ERROR_PARAMETER -5003 /*!< invalid parameter */
mslade 1:84581acd1333 167 #define SD_BLOCK_DEVICE_ERROR_NO_INIT -5004 /*!< uninitialized */
mslade 1:84581acd1333 168 #define SD_BLOCK_DEVICE_ERROR_NO_DEVICE -5005 /*!< device is missing or not connected */
mslade 1:84581acd1333 169 #define SD_BLOCK_DEVICE_ERROR_WRITE_PROTECTED -5006 /*!< write protected */
mslade 1:84581acd1333 170 #define SD_BLOCK_DEVICE_ERROR_UNUSABLE -5007 /*!< unusable card */
mslade 1:84581acd1333 171 #define SD_BLOCK_DEVICE_ERROR_NO_RESPONSE -5008 /*!< No response from device */
mslade 1:84581acd1333 172 #define SD_BLOCK_DEVICE_ERROR_CRC -5009 /*!< CRC error */
mslade 1:84581acd1333 173 #define SD_BLOCK_DEVICE_ERROR_ERASE -5010 /*!< Erase error: reset/sequence */
mslade 1:84581acd1333 174 #define SD_BLOCK_DEVICE_ERROR_WRITE -5011 /*!< SPI Write error: !SPI_DATA_ACCEPTED */
mslade 1:84581acd1333 175
mslade 1:84581acd1333 176 #define BLOCK_SIZE_HC 512 /*!< Block size supported for SD card is 512 bytes */
mslade 1:84581acd1333 177 #define WRITE_BL_PARTIAL 0 /*!< Partial block write - Not supported */
mslade 1:84581acd1333 178 #define CRC_SUPPORT 0 /*!< CRC - Not supported */
mslade 1:84581acd1333 179 #define SPI_CMD(x) (0x40 | (x & 0x3f))
mslade 1:84581acd1333 180
mslade 1:84581acd1333 181 /* R1 Response Format */
mslade 1:84581acd1333 182 #define R1_NO_RESPONSE (0xFF)
mslade 1:84581acd1333 183 #define R1_RESPONSE_RECV (0x80)
mslade 1:84581acd1333 184 #define R1_IDLE_STATE (1 << 0)
mslade 1:84581acd1333 185 #define R1_ERASE_RESET (1 << 1)
mslade 1:84581acd1333 186 #define R1_ILLEGAL_COMMAND (1 << 2)
mslade 1:84581acd1333 187 #define R1_COM_CRC_ERROR (1 << 3)
mslade 1:84581acd1333 188 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
mslade 1:84581acd1333 189 #define R1_ADDRESS_ERROR (1 << 5)
mslade 1:84581acd1333 190 #define R1_PARAMETER_ERROR (1 << 6)
mslade 1:84581acd1333 191
mslade 1:84581acd1333 192 // Types
mslade 1:84581acd1333 193 #define SDCARD_NONE 0 /**< No card is present */
mslade 1:84581acd1333 194 #define SDCARD_V1 1 /**< v1.x Standard Capacity */
mslade 1:84581acd1333 195 #define SDCARD_V2 2 /**< v2.x Standard capacity SD card */
mslade 1:84581acd1333 196 #define SDCARD_V2HC 3 /**< v2.x High capacity SD card */
mslade 1:84581acd1333 197 #define CARD_UNKNOWN 4 /**< Unknown or unsupported card */
mslade 1:84581acd1333 198
mslade 1:84581acd1333 199 /* SIZE in Bytes */
mslade 1:84581acd1333 200 #define PACKET_SIZE 6 /*!< SD Packet size CMD+ARG+CRC */
mslade 1:84581acd1333 201 #define R1_RESPONSE_SIZE 1 /*!< Size of R1 response */
mslade 1:84581acd1333 202 #define R2_RESPONSE_SIZE 2 /*!< Size of R2 response */
mslade 1:84581acd1333 203 #define R3_R7_RESPONSE_SIZE 5 /*!< Size of R3/R7 response */
mslade 1:84581acd1333 204
mslade 1:84581acd1333 205 /* R1b Response */
mslade 1:84581acd1333 206 #define DEVICE_BUSY (0x00)
mslade 1:84581acd1333 207
mslade 1:84581acd1333 208 /* R2 Response Format */
mslade 1:84581acd1333 209 #define R2_CARD_LOCKED (1 << 0)
mslade 1:84581acd1333 210 #define R2_CMD_FAILED (1 << 1)
mslade 1:84581acd1333 211 #define R2_ERROR (1 << 2)
mslade 1:84581acd1333 212 #define R2_CC_ERROR (1 << 3)
mslade 1:84581acd1333 213 #define R2_CC_FAILED (1 << 4)
mslade 1:84581acd1333 214 #define R2_WP_VIOLATION (1 << 5)
mslade 1:84581acd1333 215 #define R2_ERASE_PARAM (1 << 6)
mslade 1:84581acd1333 216 #define R2_OUT_OF_RANGE (1 << 7)
mslade 1:84581acd1333 217
mslade 1:84581acd1333 218 /* R3 Response : OCR Register */
mslade 1:84581acd1333 219 #define OCR_HCS_CCS (0x1 << 30)
mslade 1:84581acd1333 220 #define OCR_LOW_VOLTAGE (0x01 << 24)
mslade 1:84581acd1333 221 #define OCR_3_3V (0x1 << 20)
mslade 1:84581acd1333 222
mslade 1:84581acd1333 223 /* R7 response pattern for CMD8 */
mslade 1:84581acd1333 224 #define CMD8_PATTERN (0xAA)
mslade 1:84581acd1333 225
mslade 1:84581acd1333 226 /* CRC Enable */
mslade 1:84581acd1333 227 #define CRC_ENABLE (0) /*!< CRC 1 - Enable 0 - Disable */
mslade 1:84581acd1333 228
mslade 1:84581acd1333 229 /* Control Tokens */
mslade 1:84581acd1333 230 #define SPI_DATA_RESPONSE_MASK (0x1F)
mslade 1:84581acd1333 231 #define SPI_DATA_ACCEPTED (0x05)
mslade 1:84581acd1333 232 #define SPI_DATA_CRC_ERROR (0x0B)
mslade 1:84581acd1333 233 #define SPI_DATA_WRITE_ERROR (0x0D)
mslade 1:84581acd1333 234 #define SPI_START_BLOCK (0xFE) /*!< For Single Block Read/Write and Multiple Block Read */
mslade 1:84581acd1333 235 #define SPI_START_BLK_MUL_WRITE (0xFC) /*!< Start Multi-block write */
mslade 1:84581acd1333 236 #define SPI_STOP_TRAN (0xFD) /*!< Stop Multi-block write */
mslade 1:84581acd1333 237
mslade 1:84581acd1333 238 #define SPI_DATA_READ_ERROR_MASK (0xF) /*!< Data Error Token: 4 LSB bits */
mslade 1:84581acd1333 239 #define SPI_READ_ERROR (0x1 << 0) /*!< Error */
mslade 1:84581acd1333 240 #define SPI_READ_ERROR_CC (0x1 << 1) /*!< CC Error*/
mslade 1:84581acd1333 241 #define SPI_READ_ERROR_ECC_C (0x1 << 2) /*!< Card ECC failed */
mslade 1:84581acd1333 242 #define SPI_READ_ERROR_OFR (0x1 << 3) /*!< Out of Range */
mslade 1:84581acd1333 243
mslade 1:84581acd1333 244 SDBlockDevice::SDBlockDevice(PinName mosi, PinName miso, PinName sclk, PinName cs, uint64_t hz)
mslade 1:84581acd1333 245 : _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0)
mslade 1:84581acd1333 246 {
mslade 1:84581acd1333 247 _cs = 1;
mslade 1:84581acd1333 248 _card_type = SDCARD_NONE;
mslade 1:84581acd1333 249
mslade 1:84581acd1333 250 // Set default to 100kHz for initialisation and 1MHz for data transfer
mslade 1:84581acd1333 251 _init_sck = 100000;
mslade 1:84581acd1333 252 _transfer_sck = hz;
mslade 1:84581acd1333 253
mslade 1:84581acd1333 254 // Only HC block size is supported.
mslade 1:84581acd1333 255 _block_size = BLOCK_SIZE_HC;
mslade 1:84581acd1333 256 }
mslade 1:84581acd1333 257
mslade 1:84581acd1333 258 SDBlockDevice::~SDBlockDevice()
mslade 1:84581acd1333 259 {
mslade 1:84581acd1333 260 if (_is_initialized) {
mslade 1:84581acd1333 261 deinit();
mslade 1:84581acd1333 262 }
mslade 1:84581acd1333 263 }
mslade 1:84581acd1333 264
mslade 1:84581acd1333 265 int SDBlockDevice::_initialise_card()
mslade 1:84581acd1333 266 {
mslade 1:84581acd1333 267 // Detail debugging is for commands
mslade 1:84581acd1333 268 _dbg = SD_DBG ? SD_CMD_TRACE : 0;
mslade 1:84581acd1333 269 int32_t status = BD_ERROR_OK;
mslade 1:84581acd1333 270 uint32_t response, arg;
mslade 1:84581acd1333 271
mslade 1:84581acd1333 272 // Initialize the SPI interface: Card by default is in SD mode
mslade 1:84581acd1333 273 _spi_init();
mslade 1:84581acd1333 274
mslade 1:84581acd1333 275 // The card is transitioned from SDCard mode to SPI mode by sending the CMD0 + CS Asserted("0")
mslade 1:84581acd1333 276 if (_go_idle_state() != R1_IDLE_STATE) {
mslade 1:84581acd1333 277 debug_if(SD_DBG, "No disk, or could not put SD card in to SPI idle state\n");
mslade 1:84581acd1333 278 return SD_BLOCK_DEVICE_ERROR_NO_DEVICE;
mslade 1:84581acd1333 279 }
mslade 1:84581acd1333 280
mslade 1:84581acd1333 281 // Send CMD8, if the card rejects the command then it's probably using the
mslade 1:84581acd1333 282 // legacy protocol, or is a MMC, or just flat-out broken
mslade 1:84581acd1333 283 status = _cmd8();
mslade 1:84581acd1333 284 if (BD_ERROR_OK != status && SD_BLOCK_DEVICE_ERROR_UNSUPPORTED != status) {
mslade 1:84581acd1333 285 return status;
mslade 1:84581acd1333 286 }
mslade 1:84581acd1333 287
mslade 1:84581acd1333 288 // Read OCR - CMD58 Response contains OCR register
mslade 1:84581acd1333 289 if (BD_ERROR_OK != (status = _cmd(CMD58_READ_OCR, 0x0, 0x0, &response))) {
mslade 1:84581acd1333 290 return status;
mslade 1:84581acd1333 291 }
mslade 1:84581acd1333 292
mslade 1:84581acd1333 293 // Check if card supports voltage range: 3.3V
mslade 1:84581acd1333 294 if (!(response & OCR_3_3V)) {
mslade 1:84581acd1333 295 _card_type = CARD_UNKNOWN;
mslade 1:84581acd1333 296 status = SD_BLOCK_DEVICE_ERROR_UNUSABLE;
mslade 1:84581acd1333 297 return status;
mslade 1:84581acd1333 298 }
mslade 1:84581acd1333 299
mslade 1:84581acd1333 300 // HCS is set 1 for HC/XC capacity cards for ACMD41, if supported
mslade 1:84581acd1333 301 arg = 0x0;
mslade 1:84581acd1333 302 if (SDCARD_V2 == _card_type) {
mslade 1:84581acd1333 303 arg |= OCR_HCS_CCS;
mslade 1:84581acd1333 304 }
mslade 1:84581acd1333 305
mslade 1:84581acd1333 306 /* Idle state bit in the R1 response of ACMD41 is used by the card to inform the host
mslade 1:84581acd1333 307 * if initialization of ACMD41 is completed. "1" indicates that the card is still initializing.
mslade 1:84581acd1333 308 * "0" indicates completion of initialization. The host repeatedly issues ACMD41 until
mslade 1:84581acd1333 309 * this bit is set to "0".
mslade 1:84581acd1333 310 */
mslade 1:84581acd1333 311 _spi_timer.start();
mslade 1:84581acd1333 312 do {
mslade 1:84581acd1333 313 status = _cmd(ACMD41_SD_SEND_OP_COND, arg, 1, &response);
mslade 1:84581acd1333 314 } while ((response & R1_IDLE_STATE) && (_spi_timer.read_ms() < SD_COMMAND_TIMEOUT));
mslade 1:84581acd1333 315 _spi_timer.stop();
mslade 1:84581acd1333 316
mslade 1:84581acd1333 317 // Initialization complete: ACMD41 successful
mslade 1:84581acd1333 318 if ((BD_ERROR_OK != status) || (0x00 != response)) {
mslade 1:84581acd1333 319 _card_type = CARD_UNKNOWN;
mslade 1:84581acd1333 320 debug_if(SD_DBG, "Timeout waiting for card\n");
mslade 1:84581acd1333 321 return status;
mslade 1:84581acd1333 322 }
mslade 1:84581acd1333 323
mslade 1:84581acd1333 324 if (SDCARD_V2 == _card_type) {
mslade 1:84581acd1333 325 // Get the card capacity CCS: CMD58
mslade 1:84581acd1333 326 if (BD_ERROR_OK == (status = _cmd(CMD58_READ_OCR, 0x0, 0x0, &response))) {
mslade 1:84581acd1333 327 // High Capacity card
mslade 1:84581acd1333 328 if (response & OCR_HCS_CCS) {
mslade 1:84581acd1333 329 _card_type = SDCARD_V2HC;
mslade 1:84581acd1333 330 debug_if(SD_DBG, "Card Initialized: High Capacity Card \n");
mslade 1:84581acd1333 331 } else {
mslade 1:84581acd1333 332 debug_if(SD_DBG, "Card Initialized: Standard Capacity Card: Version 2.x \n");
mslade 1:84581acd1333 333 }
mslade 1:84581acd1333 334 }
mslade 1:84581acd1333 335 } else {
mslade 1:84581acd1333 336 _card_type = SDCARD_V1;
mslade 1:84581acd1333 337 debug_if(SD_DBG, "Card Initialized: Version 1.x Card\n");
mslade 1:84581acd1333 338 }
mslade 1:84581acd1333 339
mslade 1:84581acd1333 340 // Disable CRC
mslade 1:84581acd1333 341 status = _cmd(CMD59_CRC_ON_OFF, 0);
mslade 1:84581acd1333 342
mslade 1:84581acd1333 343 return status;
mslade 1:84581acd1333 344 }
mslade 1:84581acd1333 345
mslade 1:84581acd1333 346
mslade 1:84581acd1333 347 int SDBlockDevice::init()
mslade 1:84581acd1333 348 {
mslade 1:84581acd1333 349 _lock.lock();
mslade 1:84581acd1333 350 int err = _initialise_card();
mslade 1:84581acd1333 351 _is_initialized = (err == BD_ERROR_OK);
mslade 1:84581acd1333 352 if (!_is_initialized) {
mslade 1:84581acd1333 353 debug_if(SD_DBG, "Fail to initialize card\n");
mslade 1:84581acd1333 354 _lock.unlock();
mslade 1:84581acd1333 355 return err;
mslade 1:84581acd1333 356 }
mslade 1:84581acd1333 357 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
mslade 1:84581acd1333 358 _sectors = _sd_sectors();
mslade 1:84581acd1333 359 // CMD9 failed
mslade 1:84581acd1333 360 if (0 == _sectors) {
mslade 1:84581acd1333 361 _lock.unlock();
mslade 1:84581acd1333 362 return BD_ERROR_DEVICE_ERROR;
mslade 1:84581acd1333 363 }
mslade 1:84581acd1333 364
mslade 1:84581acd1333 365 // Set block length to 512 (CMD16)
mslade 1:84581acd1333 366 if (_cmd(CMD16_SET_BLOCKLEN, _block_size) != 0) {
mslade 1:84581acd1333 367 debug_if(SD_DBG, "Set %d-byte block timed out\n", _block_size);
mslade 1:84581acd1333 368 _lock.unlock();
mslade 1:84581acd1333 369 return BD_ERROR_DEVICE_ERROR;
mslade 1:84581acd1333 370 }
mslade 1:84581acd1333 371
mslade 1:84581acd1333 372 // Set SCK for data transfer
mslade 1:84581acd1333 373 err = _freq();
mslade 1:84581acd1333 374 if (err) {
mslade 1:84581acd1333 375 _lock.unlock();
mslade 1:84581acd1333 376 return err;
mslade 1:84581acd1333 377 }
mslade 1:84581acd1333 378 _lock.unlock();
mslade 1:84581acd1333 379 return BD_ERROR_OK;
mslade 1:84581acd1333 380 }
mslade 1:84581acd1333 381
mslade 1:84581acd1333 382 int SDBlockDevice::deinit()
mslade 1:84581acd1333 383 {
mslade 1:84581acd1333 384 _lock.lock();
mslade 1:84581acd1333 385 _is_initialized = false;
mslade 1:84581acd1333 386 _lock.unlock();
mslade 1:84581acd1333 387 return 0;
mslade 1:84581acd1333 388 }
mslade 1:84581acd1333 389
mslade 1:84581acd1333 390
mslade 1:84581acd1333 391 int SDBlockDevice::program(const void *b, bd_addr_t addr, bd_size_t size)
mslade 1:84581acd1333 392 {
mslade 1:84581acd1333 393 if (!is_valid_program(addr, size)) {
mslade 1:84581acd1333 394 return SD_BLOCK_DEVICE_ERROR_PARAMETER;
mslade 1:84581acd1333 395 }
mslade 1:84581acd1333 396
mslade 1:84581acd1333 397 _lock.lock();
mslade 1:84581acd1333 398 if (!_is_initialized) {
mslade 1:84581acd1333 399 _lock.unlock();
mslade 1:84581acd1333 400 return SD_BLOCK_DEVICE_ERROR_NO_INIT;
mslade 1:84581acd1333 401 }
mslade 1:84581acd1333 402
mslade 1:84581acd1333 403 const uint8_t *buffer = static_cast<const uint8_t*>(b);
mslade 1:84581acd1333 404 int status = BD_ERROR_OK;
mslade 1:84581acd1333 405 uint8_t response;
mslade 1:84581acd1333 406
mslade 1:84581acd1333 407 // Get block count
mslade 1:84581acd1333 408 bd_addr_t blockCnt = size / _block_size;
mslade 1:84581acd1333 409
mslade 1:84581acd1333 410 // SDSC Card (CCS=0) uses byte unit address
mslade 1:84581acd1333 411 // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
mslade 1:84581acd1333 412 if(SDCARD_V2HC == _card_type) {
mslade 1:84581acd1333 413 addr = addr / _block_size;
mslade 1:84581acd1333 414 }
mslade 1:84581acd1333 415
mslade 1:84581acd1333 416 // Send command to perform write operation
mslade 1:84581acd1333 417 if (blockCnt == 1) {
mslade 1:84581acd1333 418 // Single block write command
mslade 1:84581acd1333 419 if (BD_ERROR_OK != (status = _cmd(CMD24_WRITE_BLOCK, addr))) {
mslade 1:84581acd1333 420 _lock.unlock();
mslade 1:84581acd1333 421 return status;
mslade 1:84581acd1333 422 }
mslade 1:84581acd1333 423
mslade 1:84581acd1333 424 // Write data
mslade 1:84581acd1333 425 response = _write(buffer, SPI_START_BLOCK, _block_size);
mslade 1:84581acd1333 426
mslade 1:84581acd1333 427 // Only CRC and general write error are communicated via response token
mslade 1:84581acd1333 428 if ((response == SPI_DATA_CRC_ERROR) || (response == SPI_DATA_WRITE_ERROR)) {
mslade 1:84581acd1333 429 debug_if(SD_DBG, "Single Block Write failed: 0x%x \n", response);
mslade 1:84581acd1333 430 status = SD_BLOCK_DEVICE_ERROR_WRITE;
mslade 1:84581acd1333 431 }
mslade 1:84581acd1333 432 } else {
mslade 1:84581acd1333 433 // Pre-erase setting prior to multiple block write operation
mslade 1:84581acd1333 434 _cmd(ACMD23_SET_WR_BLK_ERASE_COUNT, blockCnt, 1);
mslade 1:84581acd1333 435
mslade 1:84581acd1333 436 // Multiple block write command
mslade 1:84581acd1333 437 if (BD_ERROR_OK != (status = _cmd(CMD25_WRITE_MULTIPLE_BLOCK, addr))) {
mslade 1:84581acd1333 438 _lock.unlock();
mslade 1:84581acd1333 439 return status;
mslade 1:84581acd1333 440 }
mslade 1:84581acd1333 441
mslade 1:84581acd1333 442 // Write the data: one block at a time
mslade 1:84581acd1333 443 do {
mslade 1:84581acd1333 444 response = _write(buffer, SPI_START_BLK_MUL_WRITE, _block_size);
mslade 1:84581acd1333 445 if (response != SPI_DATA_ACCEPTED) {
mslade 1:84581acd1333 446 debug_if(SD_DBG, "Multiple Block Write failed: 0x%x \n", response);
mslade 1:84581acd1333 447 break;
mslade 1:84581acd1333 448 }
mslade 1:84581acd1333 449 buffer += _block_size;
mslade 1:84581acd1333 450 }while (--blockCnt); // Receive all blocks of data
mslade 1:84581acd1333 451
mslade 1:84581acd1333 452 /* In a Multiple Block write operation, the stop transmission will be done by
mslade 1:84581acd1333 453 * sending 'Stop Tran' token instead of 'Start Block' token at the beginning
mslade 1:84581acd1333 454 * of the next block
mslade 1:84581acd1333 455 */
mslade 1:84581acd1333 456 _spi.write(SPI_STOP_TRAN);
mslade 1:84581acd1333 457 }
mslade 1:84581acd1333 458
mslade 1:84581acd1333 459 _deselect();
mslade 1:84581acd1333 460 _lock.unlock();
mslade 1:84581acd1333 461 return status;
mslade 1:84581acd1333 462 }
mslade 1:84581acd1333 463
mslade 1:84581acd1333 464 int SDBlockDevice::read(void *b, bd_addr_t addr, bd_size_t size)
mslade 1:84581acd1333 465 {
mslade 1:84581acd1333 466 if (!is_valid_read(addr, size)) {
mslade 1:84581acd1333 467 return SD_BLOCK_DEVICE_ERROR_PARAMETER;
mslade 1:84581acd1333 468 }
mslade 1:84581acd1333 469
mslade 1:84581acd1333 470 _lock.lock();
mslade 1:84581acd1333 471 if (!_is_initialized) {
mslade 1:84581acd1333 472 _lock.unlock();
mslade 1:84581acd1333 473 return SD_BLOCK_DEVICE_ERROR_PARAMETER;
mslade 1:84581acd1333 474 }
mslade 1:84581acd1333 475
mslade 1:84581acd1333 476 uint8_t *buffer = static_cast<uint8_t *>(b);
mslade 1:84581acd1333 477 int status = BD_ERROR_OK;
mslade 1:84581acd1333 478 bd_addr_t blockCnt = size / _block_size;
mslade 1:84581acd1333 479
mslade 1:84581acd1333 480 // SDSC Card (CCS=0) uses byte unit address
mslade 1:84581acd1333 481 // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
mslade 1:84581acd1333 482 if (SDCARD_V2HC == _card_type) {
mslade 1:84581acd1333 483 addr = addr / _block_size;
mslade 1:84581acd1333 484 }
mslade 1:84581acd1333 485
mslade 1:84581acd1333 486 // Write command ro receive data
mslade 1:84581acd1333 487 if (blockCnt > 1) {
mslade 1:84581acd1333 488 status = _cmd(CMD18_READ_MULTIPLE_BLOCK, addr);
mslade 1:84581acd1333 489 } else {
mslade 1:84581acd1333 490 status = _cmd(CMD17_READ_SINGLE_BLOCK, addr);
mslade 1:84581acd1333 491 }
mslade 1:84581acd1333 492 if (BD_ERROR_OK != status) {
mslade 1:84581acd1333 493 _lock.unlock();
mslade 1:84581acd1333 494 return status;
mslade 1:84581acd1333 495 }
mslade 1:84581acd1333 496
mslade 1:84581acd1333 497 // receive the data : one block at a time
mslade 1:84581acd1333 498 while (blockCnt) {
mslade 1:84581acd1333 499 if (0 != _read(buffer, _block_size)) {
mslade 1:84581acd1333 500 status = SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
mslade 1:84581acd1333 501 break;
mslade 1:84581acd1333 502 }
mslade 1:84581acd1333 503 buffer += _block_size;
mslade 1:84581acd1333 504 --blockCnt;
mslade 1:84581acd1333 505 }
mslade 1:84581acd1333 506 _deselect();
mslade 1:84581acd1333 507
mslade 1:84581acd1333 508 // Send CMD12(0x00000000) to stop the transmission for multi-block transfer
mslade 1:84581acd1333 509 if (size > _block_size) {
mslade 1:84581acd1333 510 status = _cmd(CMD12_STOP_TRANSMISSION, 0x0);
mslade 1:84581acd1333 511 }
mslade 1:84581acd1333 512 _lock.unlock();
mslade 1:84581acd1333 513 return status;
mslade 1:84581acd1333 514 }
mslade 1:84581acd1333 515
mslade 1:84581acd1333 516 bool SDBlockDevice::_is_valid_trim(bd_addr_t addr, bd_size_t size)
mslade 1:84581acd1333 517 {
mslade 1:84581acd1333 518 return (
mslade 1:84581acd1333 519 addr % _erase_size == 0 &&
mslade 1:84581acd1333 520 size % _erase_size == 0 &&
mslade 1:84581acd1333 521 addr + size <= this->size());
mslade 1:84581acd1333 522 }
mslade 1:84581acd1333 523
mslade 1:84581acd1333 524 int SDBlockDevice::trim(bd_addr_t addr, bd_size_t size)
mslade 1:84581acd1333 525 {
mslade 1:84581acd1333 526 if (!_is_valid_trim(addr, size)) {
mslade 1:84581acd1333 527 return SD_BLOCK_DEVICE_ERROR_PARAMETER;
mslade 1:84581acd1333 528 }
mslade 1:84581acd1333 529
mslade 1:84581acd1333 530 _lock.lock();
mslade 1:84581acd1333 531 if (!_is_initialized) {
mslade 1:84581acd1333 532 _lock.unlock();
mslade 1:84581acd1333 533 return SD_BLOCK_DEVICE_ERROR_NO_INIT;
mslade 1:84581acd1333 534 }
mslade 1:84581acd1333 535 int status = BD_ERROR_OK;
mslade 1:84581acd1333 536
mslade 1:84581acd1333 537 size -= _block_size;
mslade 1:84581acd1333 538 // SDSC Card (CCS=0) uses byte unit address
mslade 1:84581acd1333 539 // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
mslade 1:84581acd1333 540 if (SDCARD_V2HC == _card_type) {
mslade 1:84581acd1333 541 size = size / _block_size;
mslade 1:84581acd1333 542 addr = addr / _block_size;
mslade 1:84581acd1333 543 }
mslade 1:84581acd1333 544
mslade 1:84581acd1333 545 // Start lba sent in start command
mslade 1:84581acd1333 546 if (BD_ERROR_OK != (status = _cmd(CMD32_ERASE_WR_BLK_START_ADDR, addr))) {
mslade 1:84581acd1333 547 _lock.unlock();
mslade 1:84581acd1333 548 return status;
mslade 1:84581acd1333 549 }
mslade 1:84581acd1333 550
mslade 1:84581acd1333 551 // End lba = addr+size sent in end addr command
mslade 1:84581acd1333 552 if (BD_ERROR_OK != (status = _cmd(CMD33_ERASE_WR_BLK_END_ADDR, addr+size))) {
mslade 1:84581acd1333 553 _lock.unlock();
mslade 1:84581acd1333 554 return status;
mslade 1:84581acd1333 555 }
mslade 1:84581acd1333 556 status = _cmd(CMD38_ERASE, 0x0);
mslade 1:84581acd1333 557 _lock.unlock();
mslade 1:84581acd1333 558 return status;
mslade 1:84581acd1333 559 }
mslade 1:84581acd1333 560
mslade 1:84581acd1333 561 bd_size_t SDBlockDevice::get_read_size() const
mslade 1:84581acd1333 562 {
mslade 1:84581acd1333 563 return _block_size;
mslade 1:84581acd1333 564 }
mslade 1:84581acd1333 565
mslade 1:84581acd1333 566 bd_size_t SDBlockDevice::get_program_size() const
mslade 1:84581acd1333 567 {
mslade 1:84581acd1333 568 return _block_size;
mslade 1:84581acd1333 569 }
mslade 1:84581acd1333 570
mslade 1:84581acd1333 571 bd_size_t SDBlockDevice::size() const
mslade 1:84581acd1333 572 {
mslade 1:84581acd1333 573 bd_size_t sectors = 0;
mslade 1:84581acd1333 574 _lock.lock();
mslade 1:84581acd1333 575 if (_is_initialized) {
mslade 1:84581acd1333 576 sectors = _sectors;
mslade 1:84581acd1333 577 }
mslade 1:84581acd1333 578 _lock.unlock();
mslade 1:84581acd1333 579 return _block_size*sectors;
mslade 1:84581acd1333 580 }
mslade 1:84581acd1333 581
mslade 1:84581acd1333 582 void SDBlockDevice::debug(bool dbg)
mslade 1:84581acd1333 583 {
mslade 1:84581acd1333 584 _dbg = dbg;
mslade 1:84581acd1333 585 }
mslade 1:84581acd1333 586
mslade 1:84581acd1333 587 int SDBlockDevice::frequency(uint64_t freq)
mslade 1:84581acd1333 588 {
mslade 1:84581acd1333 589 _lock.lock();
mslade 1:84581acd1333 590 _transfer_sck = freq;
mslade 1:84581acd1333 591 int err = _freq();
mslade 1:84581acd1333 592 _lock.unlock();
mslade 1:84581acd1333 593 return err;
mslade 1:84581acd1333 594 }
mslade 1:84581acd1333 595
mslade 1:84581acd1333 596 // PRIVATE FUNCTIONS
mslade 1:84581acd1333 597 int SDBlockDevice::_freq(void)
mslade 1:84581acd1333 598 {
mslade 1:84581acd1333 599 // Max frequency supported is 25MHZ
mslade 1:84581acd1333 600 if (_transfer_sck <= 25000000) {
mslade 1:84581acd1333 601 _spi.frequency(_transfer_sck);
mslade 1:84581acd1333 602 return 0;
mslade 1:84581acd1333 603 } else { // TODO: Switch function to be implemented for higher frequency
mslade 1:84581acd1333 604 _transfer_sck = 25000000;
mslade 1:84581acd1333 605 _spi.frequency(_transfer_sck);
mslade 1:84581acd1333 606 return -EINVAL;
mslade 1:84581acd1333 607 }
mslade 1:84581acd1333 608 }
mslade 1:84581acd1333 609
mslade 1:84581acd1333 610 uint8_t SDBlockDevice::_cmd_spi(SDBlockDevice::cmdSupported cmd, uint32_t arg) {
mslade 1:84581acd1333 611 uint8_t response;
mslade 1:84581acd1333 612 char cmdPacket[PACKET_SIZE];
mslade 1:84581acd1333 613
mslade 1:84581acd1333 614 // Prepare the command packet
mslade 1:84581acd1333 615 cmdPacket[0] = SPI_CMD(cmd);
mslade 1:84581acd1333 616 cmdPacket[1] = (arg >> 24);
mslade 1:84581acd1333 617 cmdPacket[2] = (arg >> 16);
mslade 1:84581acd1333 618 cmdPacket[3] = (arg >> 8);
mslade 1:84581acd1333 619 cmdPacket[4] = (arg >> 0);
mslade 1:84581acd1333 620 // CMD0 is executed in SD mode, hence should have correct CRC
mslade 1:84581acd1333 621 // CMD8 CRC verification is always enabled
mslade 1:84581acd1333 622 switch(cmd) {
mslade 1:84581acd1333 623 case CMD0_GO_IDLE_STATE:
mslade 1:84581acd1333 624 cmdPacket[5] = 0x95;
mslade 1:84581acd1333 625 break;
mslade 1:84581acd1333 626 case CMD8_SEND_IF_COND:
mslade 1:84581acd1333 627 cmdPacket[5] = 0x87;
mslade 1:84581acd1333 628 break;
mslade 1:84581acd1333 629 default:
mslade 1:84581acd1333 630 cmdPacket[5] = 0xFF; // Make sure bit 0-End bit is high
mslade 1:84581acd1333 631 break;
mslade 1:84581acd1333 632 }
mslade 1:84581acd1333 633
mslade 1:84581acd1333 634 // send a command
mslade 1:84581acd1333 635 for (int i = 0; i < PACKET_SIZE; i++) {
mslade 1:84581acd1333 636 _spi.write(cmdPacket[i]);
mslade 1:84581acd1333 637 }
mslade 1:84581acd1333 638
mslade 1:84581acd1333 639 // The received byte immediataly following CMD12 is a stuff byte,
mslade 1:84581acd1333 640 // it should be discarded before receive the response of the CMD12.
mslade 1:84581acd1333 641 if (CMD12_STOP_TRANSMISSION == cmd) {
mslade 1:84581acd1333 642 _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 643 }
mslade 1:84581acd1333 644
mslade 1:84581acd1333 645 // Loop for response: Response is sent back within command response time (NCR), 0 to 8 bytes for SDC
mslade 1:84581acd1333 646 for (int i = 0; i < 0x10; i++) {
mslade 1:84581acd1333 647 response = _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 648 // Got the response
mslade 1:84581acd1333 649 if (!(response & R1_RESPONSE_RECV)) {
mslade 1:84581acd1333 650 break;
mslade 1:84581acd1333 651 }
mslade 1:84581acd1333 652 }
mslade 1:84581acd1333 653 return response;
mslade 1:84581acd1333 654 }
mslade 1:84581acd1333 655
mslade 1:84581acd1333 656 int SDBlockDevice::_cmd(SDBlockDevice::cmdSupported cmd, uint32_t arg, bool isAcmd, uint32_t *resp) {
mslade 1:84581acd1333 657 int32_t status = BD_ERROR_OK;
mslade 1:84581acd1333 658 uint32_t response;
mslade 1:84581acd1333 659
mslade 1:84581acd1333 660 // Select card and wait for card to be ready before sending next command
mslade 1:84581acd1333 661 // Note: next command will fail if card is not ready
mslade 1:84581acd1333 662 _select();
mslade 1:84581acd1333 663
mslade 1:84581acd1333 664 // No need to wait for card to be ready when sending the stop command
mslade 1:84581acd1333 665 if (CMD12_STOP_TRANSMISSION != cmd) {
mslade 1:84581acd1333 666 if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
mslade 1:84581acd1333 667 debug_if(SD_DBG, "Card not ready yet \n");
mslade 1:84581acd1333 668 }
mslade 1:84581acd1333 669 }
mslade 1:84581acd1333 670
mslade 1:84581acd1333 671 // Re-try command
mslade 1:84581acd1333 672 for(int i = 0; i < 3; i++) {
mslade 1:84581acd1333 673 // Send CMD55 for APP command first
mslade 1:84581acd1333 674 if (isAcmd) {
mslade 1:84581acd1333 675 response = _cmd_spi(CMD55_APP_CMD, 0x0);
mslade 1:84581acd1333 676 // Wait for card to be ready after CMD55
mslade 1:84581acd1333 677 if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
mslade 1:84581acd1333 678 debug_if(SD_DBG, "Card not ready yet \n");
mslade 1:84581acd1333 679 }
mslade 1:84581acd1333 680 }
mslade 1:84581acd1333 681
mslade 1:84581acd1333 682 // Send command over SPI interface
mslade 1:84581acd1333 683 response = _cmd_spi(cmd, arg);
mslade 1:84581acd1333 684 if (R1_NO_RESPONSE == response) {
mslade 1:84581acd1333 685 debug_if(SD_DBG, "No response CMD:%d \n", cmd);
mslade 1:84581acd1333 686 continue;
mslade 1:84581acd1333 687 }
mslade 1:84581acd1333 688 break;
mslade 1:84581acd1333 689 }
mslade 1:84581acd1333 690
mslade 1:84581acd1333 691 // Pass the response to the command call if required
mslade 1:84581acd1333 692 if (NULL != resp) {
mslade 1:84581acd1333 693 *resp = response;
mslade 1:84581acd1333 694 }
mslade 1:84581acd1333 695
mslade 1:84581acd1333 696 // Process the response R1 : Exit on CRC/Illegal command error/No response
mslade 1:84581acd1333 697 if (R1_NO_RESPONSE == response) {
mslade 1:84581acd1333 698 _deselect();
mslade 1:84581acd1333 699 debug_if(SD_DBG, "No response CMD:%d response: 0x%x\n",cmd, response);
mslade 1:84581acd1333 700 return SD_BLOCK_DEVICE_ERROR_NO_DEVICE; // No device
mslade 1:84581acd1333 701 }
mslade 1:84581acd1333 702 if (response & R1_COM_CRC_ERROR) {
mslade 1:84581acd1333 703 _deselect();
mslade 1:84581acd1333 704 debug_if(SD_DBG, "CRC error CMD:%d response 0x%x \n",cmd, response);
mslade 1:84581acd1333 705 return SD_BLOCK_DEVICE_ERROR_CRC; // CRC error
mslade 1:84581acd1333 706 }
mslade 1:84581acd1333 707 if (response & R1_ILLEGAL_COMMAND) {
mslade 1:84581acd1333 708 _deselect();
mslade 1:84581acd1333 709 debug_if(SD_DBG, "Illegal command CMD:%d response 0x%x\n",cmd, response);
mslade 1:84581acd1333 710 if (CMD8_SEND_IF_COND == cmd) { // Illegal command is for Ver1 or not SD Card
mslade 1:84581acd1333 711 _card_type = CARD_UNKNOWN;
mslade 1:84581acd1333 712 }
mslade 1:84581acd1333 713 return SD_BLOCK_DEVICE_ERROR_UNSUPPORTED; // Command not supported
mslade 1:84581acd1333 714 }
mslade 1:84581acd1333 715
mslade 1:84581acd1333 716 debug_if(_dbg, "CMD:%d \t arg:0x%x \t Response:0x%x \n", cmd, arg, response);
mslade 1:84581acd1333 717 // Set status for other errors
mslade 1:84581acd1333 718 if ((response & R1_ERASE_RESET) || (response & R1_ERASE_SEQUENCE_ERROR)) {
mslade 1:84581acd1333 719 status = SD_BLOCK_DEVICE_ERROR_ERASE; // Erase error
mslade 1:84581acd1333 720 }else if ((response & R1_ADDRESS_ERROR) || (response & R1_PARAMETER_ERROR)) {
mslade 1:84581acd1333 721 // Misaligned address / invalid address block length
mslade 1:84581acd1333 722 status = SD_BLOCK_DEVICE_ERROR_PARAMETER;
mslade 1:84581acd1333 723 }
mslade 1:84581acd1333 724
mslade 1:84581acd1333 725 // Get rest of the response part for other commands
mslade 1:84581acd1333 726 switch(cmd) {
mslade 1:84581acd1333 727 case CMD8_SEND_IF_COND: // Response R7
mslade 1:84581acd1333 728 debug_if(_dbg, "V2-Version Card\n");
mslade 1:84581acd1333 729 _card_type = SDCARD_V2;
mslade 1:84581acd1333 730 // Note: No break here, need to read rest of the response
mslade 1:84581acd1333 731 case CMD58_READ_OCR: // Response R3
mslade 1:84581acd1333 732 response = (_spi.write(SPI_FILL_CHAR) << 24);
mslade 1:84581acd1333 733 response |= (_spi.write(SPI_FILL_CHAR) << 16);
mslade 1:84581acd1333 734 response |= (_spi.write(SPI_FILL_CHAR) << 8);
mslade 1:84581acd1333 735 response |= _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 736 debug_if(_dbg, "R3/R7: 0x%x \n", response);
mslade 1:84581acd1333 737 break;
mslade 1:84581acd1333 738
mslade 1:84581acd1333 739 case CMD12_STOP_TRANSMISSION: // Response R1b
mslade 1:84581acd1333 740 case CMD38_ERASE:
mslade 1:84581acd1333 741 _wait_ready(SD_COMMAND_TIMEOUT);
mslade 1:84581acd1333 742 break;
mslade 1:84581acd1333 743
mslade 1:84581acd1333 744 case ACMD13_SD_STATUS: // Response R2
mslade 1:84581acd1333 745 response = _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 746 debug_if(_dbg, "R2: 0x%x \n", response);
mslade 1:84581acd1333 747 break;
mslade 1:84581acd1333 748
mslade 1:84581acd1333 749 default: // Response R1
mslade 1:84581acd1333 750 break;
mslade 1:84581acd1333 751 }
mslade 1:84581acd1333 752
mslade 1:84581acd1333 753 // Pass the updated response to the command
mslade 1:84581acd1333 754 if (NULL != resp) {
mslade 1:84581acd1333 755 *resp = response;
mslade 1:84581acd1333 756 }
mslade 1:84581acd1333 757
mslade 1:84581acd1333 758 // Do not deselect card if read is in progress.
mslade 1:84581acd1333 759 if (((CMD9_SEND_CSD == cmd) || (ACMD22_SEND_NUM_WR_BLOCKS == cmd) ||
mslade 1:84581acd1333 760 (CMD24_WRITE_BLOCK == cmd) || (CMD25_WRITE_MULTIPLE_BLOCK == cmd) ||
mslade 1:84581acd1333 761 (CMD17_READ_SINGLE_BLOCK == cmd) || (CMD18_READ_MULTIPLE_BLOCK == cmd))
mslade 1:84581acd1333 762 && (BD_ERROR_OK == status)) {
mslade 1:84581acd1333 763 return BD_ERROR_OK;
mslade 1:84581acd1333 764 }
mslade 1:84581acd1333 765 // Deselect card
mslade 1:84581acd1333 766 _deselect();
mslade 1:84581acd1333 767 return status;
mslade 1:84581acd1333 768 }
mslade 1:84581acd1333 769
mslade 1:84581acd1333 770 int SDBlockDevice::_cmd8() {
mslade 1:84581acd1333 771 uint32_t arg = (CMD8_PATTERN << 0); // [7:0]check pattern
mslade 1:84581acd1333 772 uint32_t response = 0;
mslade 1:84581acd1333 773 int32_t status = BD_ERROR_OK;
mslade 1:84581acd1333 774
mslade 1:84581acd1333 775 arg |= (0x1 << 8); // 2.7-3.6V // [11:8]supply voltage(VHS)
mslade 1:84581acd1333 776
mslade 1:84581acd1333 777 status = _cmd(CMD8_SEND_IF_COND, arg, 0x0, &response);
mslade 1:84581acd1333 778 // Verify voltage and pattern for V2 version of card
mslade 1:84581acd1333 779 if ((BD_ERROR_OK == status) && (SDCARD_V2 == _card_type)) {
mslade 1:84581acd1333 780 // If check pattern is not matched, CMD8 communication is not valid
mslade 1:84581acd1333 781 if((response & 0xFFF) != arg)
mslade 1:84581acd1333 782 {
mslade 1:84581acd1333 783 debug_if(SD_DBG, "CMD8 Pattern mismatch 0x%x : 0x%x\n", arg, response);
mslade 1:84581acd1333 784 _card_type = CARD_UNKNOWN;
mslade 1:84581acd1333 785 status = SD_BLOCK_DEVICE_ERROR_UNUSABLE;
mslade 1:84581acd1333 786 }
mslade 1:84581acd1333 787 }
mslade 1:84581acd1333 788 return status;
mslade 1:84581acd1333 789 }
mslade 1:84581acd1333 790
mslade 1:84581acd1333 791 uint32_t SDBlockDevice::_go_idle_state() {
mslade 1:84581acd1333 792 uint32_t response;
mslade 1:84581acd1333 793
mslade 1:84581acd1333 794 /* Reseting the MCU SPI master may not reset the on-board SDCard, in which
mslade 1:84581acd1333 795 * case when MCU power-on occurs the SDCard will resume operations as
mslade 1:84581acd1333 796 * though there was no reset. In this scenario the first CMD0 will
mslade 1:84581acd1333 797 * not be interpreted as a command and get lost. For some cards retrying
mslade 1:84581acd1333 798 * the command overcomes this situation. */
mslade 1:84581acd1333 799 for (int i = 0; i < SD_CMD0_GO_IDLE_STATE_RETRIES; i++) {
mslade 1:84581acd1333 800 _cmd(CMD0_GO_IDLE_STATE, 0x0, 0x0, &response);
mslade 1:84581acd1333 801 if (R1_IDLE_STATE == response)
mslade 1:84581acd1333 802 break;
mslade 1:84581acd1333 803 wait_ms(1);
mslade 1:84581acd1333 804 }
mslade 1:84581acd1333 805 return response;
mslade 1:84581acd1333 806 }
mslade 1:84581acd1333 807
mslade 1:84581acd1333 808 int SDBlockDevice::_read_bytes(uint8_t *buffer, uint32_t length) {
mslade 1:84581acd1333 809 uint16_t crc;
mslade 1:84581acd1333 810
mslade 1:84581acd1333 811 // read until start byte (0xFE)
mslade 1:84581acd1333 812 if (false == _wait_token(SPI_START_BLOCK)) {
mslade 1:84581acd1333 813 debug_if(SD_DBG, "Read timeout\n");
mslade 1:84581acd1333 814 _deselect();
mslade 1:84581acd1333 815 return SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
mslade 1:84581acd1333 816 }
mslade 1:84581acd1333 817
mslade 1:84581acd1333 818 // read data
mslade 1:84581acd1333 819 for (uint32_t i = 0; i < length; i++) {
mslade 1:84581acd1333 820 buffer[i] = _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 821 }
mslade 1:84581acd1333 822
mslade 1:84581acd1333 823 // Read the CRC16 checksum for the data block
mslade 1:84581acd1333 824 crc = (_spi.write(SPI_FILL_CHAR) << 8);
mslade 1:84581acd1333 825 crc |= _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 826
mslade 1:84581acd1333 827 _deselect();
mslade 1:84581acd1333 828 return 0;
mslade 1:84581acd1333 829 }
mslade 1:84581acd1333 830
mslade 1:84581acd1333 831 int SDBlockDevice::_read(uint8_t *buffer, uint32_t length) {
mslade 1:84581acd1333 832 uint16_t crc;
mslade 1:84581acd1333 833
mslade 1:84581acd1333 834 // read until start byte (0xFE)
mslade 1:84581acd1333 835 if (false == _wait_token(SPI_START_BLOCK)) {
mslade 1:84581acd1333 836 debug_if(SD_DBG, "Read timeout\n");
mslade 1:84581acd1333 837 _deselect();
mslade 1:84581acd1333 838 return SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
mslade 1:84581acd1333 839 }
mslade 1:84581acd1333 840
mslade 1:84581acd1333 841 // read data
mslade 1:84581acd1333 842 _spi.write(NULL, 0, (char*)buffer, length);
mslade 1:84581acd1333 843
mslade 1:84581acd1333 844 // Read the CRC16 checksum for the data block
mslade 1:84581acd1333 845 crc = (_spi.write(SPI_FILL_CHAR) << 8);
mslade 1:84581acd1333 846 crc |= _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 847
mslade 1:84581acd1333 848 return 0;
mslade 1:84581acd1333 849 }
mslade 1:84581acd1333 850
mslade 1:84581acd1333 851 uint8_t SDBlockDevice::_write(const uint8_t *buffer, uint8_t token, uint32_t length) {
mslade 1:84581acd1333 852 uint16_t crc = 0xFFFF;
mslade 1:84581acd1333 853 uint8_t response = 0xFF;
mslade 1:84581acd1333 854
mslade 1:84581acd1333 855 // indicate start of block
mslade 1:84581acd1333 856 _spi.write(token);
mslade 1:84581acd1333 857
mslade 1:84581acd1333 858 // write the data
mslade 1:84581acd1333 859 _spi.write((char*)buffer, length, NULL, 0);
mslade 1:84581acd1333 860
mslade 1:84581acd1333 861 // write the checksum CRC16
mslade 1:84581acd1333 862 _spi.write(crc >> 8);
mslade 1:84581acd1333 863 _spi.write(crc);
mslade 1:84581acd1333 864
mslade 1:84581acd1333 865 // check the response token
mslade 1:84581acd1333 866 response = _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 867
mslade 1:84581acd1333 868 // Wait for last block to be written
mslade 1:84581acd1333 869 if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
mslade 1:84581acd1333 870 debug_if(SD_DBG, "Card not ready yet \n");
mslade 1:84581acd1333 871 }
mslade 1:84581acd1333 872
mslade 1:84581acd1333 873 return (response & SPI_DATA_RESPONSE_MASK);
mslade 1:84581acd1333 874 }
mslade 1:84581acd1333 875
mslade 1:84581acd1333 876 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
mslade 1:84581acd1333 877 uint32_t bits = 0;
mslade 1:84581acd1333 878 uint32_t size = 1 + msb - lsb;
mslade 1:84581acd1333 879 for (uint32_t i = 0; i < size; i++) {
mslade 1:84581acd1333 880 uint32_t position = lsb + i;
mslade 1:84581acd1333 881 uint32_t byte = 15 - (position >> 3);
mslade 1:84581acd1333 882 uint32_t bit = position & 0x7;
mslade 1:84581acd1333 883 uint32_t value = (data[byte] >> bit) & 1;
mslade 1:84581acd1333 884 bits |= value << i;
mslade 1:84581acd1333 885 }
mslade 1:84581acd1333 886 return bits;
mslade 1:84581acd1333 887 }
mslade 1:84581acd1333 888
mslade 1:84581acd1333 889 uint32_t SDBlockDevice::_sd_sectors() {
mslade 1:84581acd1333 890 uint32_t c_size, c_size_mult, read_bl_len;
mslade 1:84581acd1333 891 uint32_t block_len, mult, blocknr;
mslade 1:84581acd1333 892 uint32_t hc_c_size;
mslade 1:84581acd1333 893 bd_size_t blocks = 0, capacity = 0;
mslade 1:84581acd1333 894
mslade 1:84581acd1333 895 // CMD9, Response R2 (R1 byte + 16-byte block read)
mslade 1:84581acd1333 896 if (_cmd(CMD9_SEND_CSD, 0x0) != 0x0) {
mslade 1:84581acd1333 897 debug_if(SD_DBG, "Didn't get a response from the disk\n");
mslade 1:84581acd1333 898 return 0;
mslade 1:84581acd1333 899 }
mslade 1:84581acd1333 900 uint8_t csd[16];
mslade 1:84581acd1333 901 if (_read_bytes(csd, 16) != 0) {
mslade 1:84581acd1333 902 debug_if(SD_DBG, "Couldn't read csd response from disk\n");
mslade 1:84581acd1333 903 return 0;
mslade 1:84581acd1333 904 }
mslade 1:84581acd1333 905
mslade 1:84581acd1333 906 // csd_structure : csd[127:126]
mslade 1:84581acd1333 907 int csd_structure = ext_bits(csd, 127, 126);
mslade 1:84581acd1333 908 switch (csd_structure) {
mslade 1:84581acd1333 909 case 0:
mslade 1:84581acd1333 910 c_size = ext_bits(csd, 73, 62); // c_size : csd[73:62]
mslade 1:84581acd1333 911 c_size_mult = ext_bits(csd, 49, 47); // c_size_mult : csd[49:47]
mslade 1:84581acd1333 912 read_bl_len = ext_bits(csd, 83, 80); // read_bl_len : csd[83:80] - the *maximum* read block length
mslade 1:84581acd1333 913 block_len = 1 << read_bl_len; // BLOCK_LEN = 2^READ_BL_LEN
mslade 1:84581acd1333 914 mult = 1 << (c_size_mult + 2); // MULT = 2^C_SIZE_MULT+2 (C_SIZE_MULT < 8)
mslade 1:84581acd1333 915 blocknr = (c_size + 1) * mult; // BLOCKNR = (C_SIZE+1) * MULT
mslade 1:84581acd1333 916 capacity = blocknr * block_len; // memory capacity = BLOCKNR * BLOCK_LEN
mslade 1:84581acd1333 917 blocks = capacity / _block_size;
mslade 1:84581acd1333 918 debug_if(SD_DBG, "Standard Capacity: c_size: %d \n", c_size);
mslade 1:84581acd1333 919 debug_if(SD_DBG, "Sectors: 0x%x : %llu\n", blocks, blocks);
mslade 1:84581acd1333 920 debug_if(SD_DBG, "Capacity: 0x%x : %llu MB\n", capacity, (capacity/(1024U*1024U)));
mslade 1:84581acd1333 921
mslade 1:84581acd1333 922 // ERASE_BLK_EN = 1: Erase in multiple of 512 bytes supported
mslade 1:84581acd1333 923 if (ext_bits(csd, 46, 46)) {
mslade 1:84581acd1333 924 _erase_size = BLOCK_SIZE_HC;
mslade 1:84581acd1333 925 } else {
mslade 1:84581acd1333 926 // ERASE_BLK_EN = 1: Erase in multiple of SECTOR_SIZE supported
mslade 1:84581acd1333 927 _erase_size = BLOCK_SIZE_HC * (ext_bits(csd, 45, 39) + 1);
mslade 1:84581acd1333 928 }
mslade 1:84581acd1333 929 break;
mslade 1:84581acd1333 930
mslade 1:84581acd1333 931 case 1:
mslade 1:84581acd1333 932 hc_c_size = ext_bits(csd, 69, 48); // device size : C_SIZE : [69:48]
mslade 1:84581acd1333 933 blocks = (hc_c_size+1) << 10; // block count = C_SIZE+1) * 1K byte (512B is block size)
mslade 1:84581acd1333 934 debug_if(SD_DBG, "SDHC/SDXC Card: hc_c_size: %d \n", hc_c_size);
mslade 1:84581acd1333 935 debug_if(SD_DBG, "Sectors: 0x%x : %llu\n", blocks, blocks);
mslade 1:84581acd1333 936 debug_if(SD_DBG, "Capacity: %llu MB\n", (blocks/(2048U)));
mslade 1:84581acd1333 937 // ERASE_BLK_EN is fixed to 1, which means host can erase one or multiple of 512 bytes.
mslade 1:84581acd1333 938 _erase_size = BLOCK_SIZE_HC;
mslade 1:84581acd1333 939 break;
mslade 1:84581acd1333 940
mslade 1:84581acd1333 941 default:
mslade 1:84581acd1333 942 debug_if(SD_DBG, "CSD struct unsupported\r\n");
mslade 1:84581acd1333 943 return 0;
mslade 1:84581acd1333 944 };
mslade 1:84581acd1333 945 return blocks;
mslade 1:84581acd1333 946 }
mslade 1:84581acd1333 947
mslade 1:84581acd1333 948 // SPI function to wait till chip is ready and sends start token
mslade 1:84581acd1333 949 bool SDBlockDevice::_wait_token(uint8_t token) {
mslade 1:84581acd1333 950 _spi_timer.reset();
mslade 1:84581acd1333 951 _spi_timer.start();
mslade 1:84581acd1333 952
mslade 1:84581acd1333 953 do {
mslade 1:84581acd1333 954 if (token == _spi.write(SPI_FILL_CHAR)) {
mslade 1:84581acd1333 955 _spi_timer.stop();
mslade 1:84581acd1333 956 return true;
mslade 1:84581acd1333 957 }
mslade 1:84581acd1333 958 } while (_spi_timer.read_ms() < 300); // Wait for 300 msec for start token
mslade 1:84581acd1333 959 _spi_timer.stop();
mslade 1:84581acd1333 960 debug_if(SD_DBG, "_wait_token: timeout\n");
mslade 1:84581acd1333 961 return false;
mslade 1:84581acd1333 962 }
mslade 1:84581acd1333 963
mslade 1:84581acd1333 964 // SPI function to wait till chip is ready
mslade 1:84581acd1333 965 // The host controller should wait for end of the process until DO goes high (a 0xFF is received).
mslade 1:84581acd1333 966 bool SDBlockDevice::_wait_ready(uint16_t ms) {
mslade 1:84581acd1333 967 uint8_t response;
mslade 1:84581acd1333 968 _spi_timer.reset();
mslade 1:84581acd1333 969 _spi_timer.start();
mslade 1:84581acd1333 970 do {
mslade 1:84581acd1333 971 response = _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 972 if (response == 0xFF) {
mslade 1:84581acd1333 973 _spi_timer.stop();
mslade 1:84581acd1333 974 return true;
mslade 1:84581acd1333 975 }
mslade 1:84581acd1333 976 } while (_spi_timer.read_ms() < ms);
mslade 1:84581acd1333 977 _spi_timer.stop();
mslade 1:84581acd1333 978 return false;
mslade 1:84581acd1333 979 }
mslade 1:84581acd1333 980
mslade 1:84581acd1333 981 // SPI function to wait for count
mslade 1:84581acd1333 982 void SDBlockDevice::_spi_wait(uint8_t count)
mslade 1:84581acd1333 983 {
mslade 1:84581acd1333 984 for (uint8_t i = 0; i < count; ++i) {
mslade 1:84581acd1333 985 _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 986 }
mslade 1:84581acd1333 987 }
mslade 1:84581acd1333 988
mslade 1:84581acd1333 989 void SDBlockDevice::_spi_init() {
mslade 1:84581acd1333 990 _spi.lock();
mslade 1:84581acd1333 991 // Set to SCK for initialization, and clock card with cs = 1
mslade 1:84581acd1333 992 _spi.frequency(_init_sck);
mslade 1:84581acd1333 993 _spi.format(8, 0);
mslade 1:84581acd1333 994 _spi.set_default_write_value(SPI_FILL_CHAR);
mslade 1:84581acd1333 995 // Initial 74 cycles required for few cards, before selecting SPI mode
mslade 1:84581acd1333 996 _cs = 1;
mslade 1:84581acd1333 997 _spi_wait(10);
mslade 1:84581acd1333 998 _spi.unlock();
mslade 1:84581acd1333 999 }
mslade 1:84581acd1333 1000
mslade 1:84581acd1333 1001 void SDBlockDevice::_select() {
mslade 1:84581acd1333 1002 _spi.lock();
mslade 1:84581acd1333 1003 _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 1004 _cs = 0;
mslade 1:84581acd1333 1005 }
mslade 1:84581acd1333 1006
mslade 1:84581acd1333 1007 void SDBlockDevice::_deselect() {
mslade 1:84581acd1333 1008 _cs = 1;
mslade 1:84581acd1333 1009 _spi.write(SPI_FILL_CHAR);
mslade 1:84581acd1333 1010 _spi.unlock();
mslade 1:84581acd1333 1011 }
mslade 1:84581acd1333 1012
mslade 1:84581acd1333 1013 #endif /* DEVICE_SPI */