A library for using FeRAM from Ramtron
FeRAM.h@0:f93930fa4df5, 2012-01-19 (annotated)
- Committer:
- ms523
- Date:
- Thu Jan 19 16:51:29 2012 +0000
- Revision:
- 0:f93930fa4df5
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
ms523 | 0:f93930fa4df5 | 1 | /* FeRAM Library |
ms523 | 0:f93930fa4df5 | 2 | * |
ms523 | 0:f93930fa4df5 | 3 | * Martin Smith 2012 |
ms523 | 0:f93930fa4df5 | 4 | * |
ms523 | 0:f93930fa4df5 | 5 | * Working with FM25H20-DG 2 Mbit FeRAM IC |
ms523 | 0:f93930fa4df5 | 6 | */ |
ms523 | 0:f93930fa4df5 | 7 | |
ms523 | 0:f93930fa4df5 | 8 | #include "mbed.h" |
ms523 | 0:f93930fa4df5 | 9 | |
ms523 | 0:f93930fa4df5 | 10 | #ifndef FERAM_H |
ms523 | 0:f93930fa4df5 | 11 | #define FERAM_H |
ms523 | 0:f93930fa4df5 | 12 | |
ms523 | 0:f93930fa4df5 | 13 | // LCP1768 SSP regiester defines |
ms523 | 0:f93930fa4df5 | 14 | #define TNF 0x02 // Transmit buffer not full |
ms523 | 0:f93930fa4df5 | 15 | #define TFE 0x01 // Transmit buffer full |
ms523 | 0:f93930fa4df5 | 16 | #define RNE 0x04 // Receive buffer not empty |
ms523 | 0:f93930fa4df5 | 17 | #define p6_GPIO 0xFFFFCFFF |
ms523 | 0:f93930fa4df5 | 18 | #define p14_GPIO 0xFFFFFFFC |
ms523 | 0:f93930fa4df5 | 19 | #define p6_SSEL 0x00002000 |
ms523 | 0:f93930fa4df5 | 20 | #define p14_SSEL 0x00000002 |
ms523 | 0:f93930fa4df5 | 21 | // FeRAM command defines |
ms523 | 0:f93930fa4df5 | 22 | #define WREN 0x06 // Write enable |
ms523 | 0:f93930fa4df5 | 23 | #define WRITE 0x02 // Write command |
ms523 | 0:f93930fa4df5 | 24 | #define READ 0x03 // Read command |
ms523 | 0:f93930fa4df5 | 25 | |
ms523 | 0:f93930fa4df5 | 26 | /* |
ms523 | 0:f93930fa4df5 | 27 | * Connections for IC: |
ms523 | 0:f93930fa4df5 | 28 | * chip pin 1 - Chip Select - mbed p8 / p14 |
ms523 | 0:f93930fa4df5 | 29 | * chip pin 2 - MISO - mbed p6 / p12 |
ms523 | 0:f93930fa4df5 | 30 | * chip pin 3 - Write Protect - mbed VOUT (p40) |
ms523 | 0:f93930fa4df5 | 31 | * chip pin 4 - VSS - mbed GND (p1) |
ms523 | 0:f93930fa4df5 | 32 | * chip pin 5 - MOSI - mbed p5 / p11 |
ms523 | 0:f93930fa4df5 | 33 | * chip pin 6 - SCLK - mbed p7 / p13 |
ms523 | 0:f93930fa4df5 | 34 | * chip pin 7 - Hold - mbed VOUT (p40) |
ms523 | 0:f93930fa4df5 | 35 | * chip pin 8 - VDD - mbed VOUT (p40) |
ms523 | 0:f93930fa4df5 | 36 | */ |
ms523 | 0:f93930fa4df5 | 37 | |
ms523 | 0:f93930fa4df5 | 38 | class FeRAM { |
ms523 | 0:f93930fa4df5 | 39 | public: |
ms523 | 0:f93930fa4df5 | 40 | FeRAM(PinName mosi, PinName miso, PinName sclk); |
ms523 | 0:f93930fa4df5 | 41 | void write_byte (int address, unsigned char data); |
ms523 | 0:f93930fa4df5 | 42 | unsigned char read_byte (int address); |
ms523 | 0:f93930fa4df5 | 43 | void write_multiple_bytes (int start_address, unsigned char* data, int length); |
ms523 | 0:f93930fa4df5 | 44 | void read_multiple_bytes (int start_address, unsigned char* data, int length); |
ms523 | 0:f93930fa4df5 | 45 | private: |
ms523 | 0:f93930fa4df5 | 46 | SPI _spi; |
ms523 | 0:f93930fa4df5 | 47 | PinName _miso; |
ms523 | 0:f93930fa4df5 | 48 | void spi_write_SSP0 (unsigned char data); |
ms523 | 0:f93930fa4df5 | 49 | void spi_write_SSP1 (unsigned char data); |
ms523 | 0:f93930fa4df5 | 50 | }; |
ms523 | 0:f93930fa4df5 | 51 | #endif |