Sertel_Srinath Gopalan / TARGET_LPC1768i2c

myi2c test

core_cmInstr.h@0:559a8e4aab60, 2015-06-29 (annotated)

Committer:
mrsoundhar
Date:
Mon Jun 29 12:59:52 2015 +0000
Revision:
0:559a8e4aab60
i2c

Who changed what in which revision?

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mrsoundhar 0:559a8e4aab60 1 /**************************************************************************//**
mrsoundhar 0:559a8e4aab60 2 * @file core_cmInstr.h
mrsoundhar 0:559a8e4aab60 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
mrsoundhar 0:559a8e4aab60 4 * @version V3.20
mrsoundhar 0:559a8e4aab60 5 * @date 05. March 2013
mrsoundhar 0:559a8e4aab60 6 *
mrsoundhar 0:559a8e4aab60 7 * @note
mrsoundhar 0:559a8e4aab60 8 *
mrsoundhar 0:559a8e4aab60 9 ******************************************************************************/
mrsoundhar 0:559a8e4aab60 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
mrsoundhar 0:559a8e4aab60 11
mrsoundhar 0:559a8e4aab60 12 All rights reserved.
mrsoundhar 0:559a8e4aab60 13 Redistribution and use in source and binary forms, with or without
mrsoundhar 0:559a8e4aab60 14 modification, are permitted provided that the following conditions are met:
mrsoundhar 0:559a8e4aab60 15 - Redistributions of source code must retain the above copyright
mrsoundhar 0:559a8e4aab60 16 notice, this list of conditions and the following disclaimer.
mrsoundhar 0:559a8e4aab60 17 - Redistributions in binary form must reproduce the above copyright
mrsoundhar 0:559a8e4aab60 18 notice, this list of conditions and the following disclaimer in the
mrsoundhar 0:559a8e4aab60 19 documentation and/or other materials provided with the distribution.
mrsoundhar 0:559a8e4aab60 20 - Neither the name of ARM nor the names of its contributors may be used
mrsoundhar 0:559a8e4aab60 21 to endorse or promote products derived from this software without
mrsoundhar 0:559a8e4aab60 22 specific prior written permission.
mrsoundhar 0:559a8e4aab60 23 *
mrsoundhar 0:559a8e4aab60 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mrsoundhar 0:559a8e4aab60 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mrsoundhar 0:559a8e4aab60 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mrsoundhar 0:559a8e4aab60 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mrsoundhar 0:559a8e4aab60 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mrsoundhar 0:559a8e4aab60 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mrsoundhar 0:559a8e4aab60 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mrsoundhar 0:559a8e4aab60 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mrsoundhar 0:559a8e4aab60 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mrsoundhar 0:559a8e4aab60 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mrsoundhar 0:559a8e4aab60 34 POSSIBILITY OF SUCH DAMAGE.
mrsoundhar 0:559a8e4aab60 35 ---------------------------------------------------------------------------*/
mrsoundhar 0:559a8e4aab60 36
mrsoundhar 0:559a8e4aab60 37
mrsoundhar 0:559a8e4aab60 38 #ifndef __CORE_CMINSTR_H
mrsoundhar 0:559a8e4aab60 39 #define __CORE_CMINSTR_H
mrsoundhar 0:559a8e4aab60 40
mrsoundhar 0:559a8e4aab60 41
mrsoundhar 0:559a8e4aab60 42 /* ########################## Core Instruction Access ######################### */
mrsoundhar 0:559a8e4aab60 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
mrsoundhar 0:559a8e4aab60 44 Access to dedicated instructions
mrsoundhar 0:559a8e4aab60 45 @{
mrsoundhar 0:559a8e4aab60 46 */
mrsoundhar 0:559a8e4aab60 47
mrsoundhar 0:559a8e4aab60 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
mrsoundhar 0:559a8e4aab60 49 /* ARM armcc specific functions */
mrsoundhar 0:559a8e4aab60 50
mrsoundhar 0:559a8e4aab60 51 #if (__ARMCC_VERSION < 400677)
mrsoundhar 0:559a8e4aab60 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
mrsoundhar 0:559a8e4aab60 53 #endif
mrsoundhar 0:559a8e4aab60 54
mrsoundhar 0:559a8e4aab60 55
mrsoundhar 0:559a8e4aab60 56 /** \brief No Operation
mrsoundhar 0:559a8e4aab60 57
mrsoundhar 0:559a8e4aab60 58 No Operation does nothing. This instruction can be used for code alignment purposes.
mrsoundhar 0:559a8e4aab60 59 */
mrsoundhar 0:559a8e4aab60 60 #define __NOP __nop
mrsoundhar 0:559a8e4aab60 61
mrsoundhar 0:559a8e4aab60 62
mrsoundhar 0:559a8e4aab60 63 /** \brief Wait For Interrupt
mrsoundhar 0:559a8e4aab60 64
mrsoundhar 0:559a8e4aab60 65 Wait For Interrupt is a hint instruction that suspends execution
mrsoundhar 0:559a8e4aab60 66 until one of a number of events occurs.
mrsoundhar 0:559a8e4aab60 67 */
mrsoundhar 0:559a8e4aab60 68 #define __WFI __wfi
mrsoundhar 0:559a8e4aab60 69
mrsoundhar 0:559a8e4aab60 70
mrsoundhar 0:559a8e4aab60 71 /** \brief Wait For Event
mrsoundhar 0:559a8e4aab60 72
mrsoundhar 0:559a8e4aab60 73 Wait For Event is a hint instruction that permits the processor to enter
mrsoundhar 0:559a8e4aab60 74 a low-power state until one of a number of events occurs.
mrsoundhar 0:559a8e4aab60 75 */
mrsoundhar 0:559a8e4aab60 76 #define __WFE __wfe
mrsoundhar 0:559a8e4aab60 77
mrsoundhar 0:559a8e4aab60 78
mrsoundhar 0:559a8e4aab60 79 /** \brief Send Event
mrsoundhar 0:559a8e4aab60 80
mrsoundhar 0:559a8e4aab60 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
mrsoundhar 0:559a8e4aab60 82 */
mrsoundhar 0:559a8e4aab60 83 #define __SEV __sev
mrsoundhar 0:559a8e4aab60 84
mrsoundhar 0:559a8e4aab60 85
mrsoundhar 0:559a8e4aab60 86 /** \brief Instruction Synchronization Barrier
mrsoundhar 0:559a8e4aab60 87
mrsoundhar 0:559a8e4aab60 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
mrsoundhar 0:559a8e4aab60 89 so that all instructions following the ISB are fetched from cache or
mrsoundhar 0:559a8e4aab60 90 memory, after the instruction has been completed.
mrsoundhar 0:559a8e4aab60 91 */
mrsoundhar 0:559a8e4aab60 92 #define __ISB() __isb(0xF)
mrsoundhar 0:559a8e4aab60 93
mrsoundhar 0:559a8e4aab60 94
mrsoundhar 0:559a8e4aab60 95 /** \brief Data Synchronization Barrier
mrsoundhar 0:559a8e4aab60 96
mrsoundhar 0:559a8e4aab60 97 This function acts as a special kind of Data Memory Barrier.
mrsoundhar 0:559a8e4aab60 98 It completes when all explicit memory accesses before this instruction complete.
mrsoundhar 0:559a8e4aab60 99 */
mrsoundhar 0:559a8e4aab60 100 #define __DSB() __dsb(0xF)
mrsoundhar 0:559a8e4aab60 101
mrsoundhar 0:559a8e4aab60 102
mrsoundhar 0:559a8e4aab60 103 /** \brief Data Memory Barrier
mrsoundhar 0:559a8e4aab60 104
mrsoundhar 0:559a8e4aab60 105 This function ensures the apparent order of the explicit memory operations before
mrsoundhar 0:559a8e4aab60 106 and after the instruction, without ensuring their completion.
mrsoundhar 0:559a8e4aab60 107 */
mrsoundhar 0:559a8e4aab60 108 #define __DMB() __dmb(0xF)
mrsoundhar 0:559a8e4aab60 109
mrsoundhar 0:559a8e4aab60 110
mrsoundhar 0:559a8e4aab60 111 /** \brief Reverse byte order (32 bit)
mrsoundhar 0:559a8e4aab60 112
mrsoundhar 0:559a8e4aab60 113 This function reverses the byte order in integer value.
mrsoundhar 0:559a8e4aab60 114
mrsoundhar 0:559a8e4aab60 115 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 116 \return Reversed value
mrsoundhar 0:559a8e4aab60 117 */
mrsoundhar 0:559a8e4aab60 118 #define __REV __rev
mrsoundhar 0:559a8e4aab60 119
mrsoundhar 0:559a8e4aab60 120
mrsoundhar 0:559a8e4aab60 121 /** \brief Reverse byte order (16 bit)
mrsoundhar 0:559a8e4aab60 122
mrsoundhar 0:559a8e4aab60 123 This function reverses the byte order in two unsigned short values.
mrsoundhar 0:559a8e4aab60 124
mrsoundhar 0:559a8e4aab60 125 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 126 \return Reversed value
mrsoundhar 0:559a8e4aab60 127 */
mrsoundhar 0:559a8e4aab60 128 #ifndef __NO_EMBEDDED_ASM
mrsoundhar 0:559a8e4aab60 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
mrsoundhar 0:559a8e4aab60 130 {
mrsoundhar 0:559a8e4aab60 131 rev16 r0, r0
mrsoundhar 0:559a8e4aab60 132 bx lr
mrsoundhar 0:559a8e4aab60 133 }
mrsoundhar 0:559a8e4aab60 134 #endif
mrsoundhar 0:559a8e4aab60 135
mrsoundhar 0:559a8e4aab60 136 /** \brief Reverse byte order in signed short value
mrsoundhar 0:559a8e4aab60 137
mrsoundhar 0:559a8e4aab60 138 This function reverses the byte order in a signed short value with sign extension to integer.
mrsoundhar 0:559a8e4aab60 139
mrsoundhar 0:559a8e4aab60 140 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 141 \return Reversed value
mrsoundhar 0:559a8e4aab60 142 */
mrsoundhar 0:559a8e4aab60 143 #ifndef __NO_EMBEDDED_ASM
mrsoundhar 0:559a8e4aab60 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
mrsoundhar 0:559a8e4aab60 145 {
mrsoundhar 0:559a8e4aab60 146 revsh r0, r0
mrsoundhar 0:559a8e4aab60 147 bx lr
mrsoundhar 0:559a8e4aab60 148 }
mrsoundhar 0:559a8e4aab60 149 #endif
mrsoundhar 0:559a8e4aab60 150
mrsoundhar 0:559a8e4aab60 151
mrsoundhar 0:559a8e4aab60 152 /** \brief Rotate Right in unsigned value (32 bit)
mrsoundhar 0:559a8e4aab60 153
mrsoundhar 0:559a8e4aab60 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
mrsoundhar 0:559a8e4aab60 155
mrsoundhar 0:559a8e4aab60 156 \param [in] value Value to rotate
mrsoundhar 0:559a8e4aab60 157 \param [in] value Number of Bits to rotate
mrsoundhar 0:559a8e4aab60 158 \return Rotated value
mrsoundhar 0:559a8e4aab60 159 */
mrsoundhar 0:559a8e4aab60 160 #define __ROR __ror
mrsoundhar 0:559a8e4aab60 161
mrsoundhar 0:559a8e4aab60 162
mrsoundhar 0:559a8e4aab60 163 /** \brief Breakpoint
mrsoundhar 0:559a8e4aab60 164
mrsoundhar 0:559a8e4aab60 165 This function causes the processor to enter Debug state.
mrsoundhar 0:559a8e4aab60 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
mrsoundhar 0:559a8e4aab60 167
mrsoundhar 0:559a8e4aab60 168 \param [in] value is ignored by the processor.
mrsoundhar 0:559a8e4aab60 169 If required, a debugger can use it to store additional information about the breakpoint.
mrsoundhar 0:559a8e4aab60 170 */
mrsoundhar 0:559a8e4aab60 171 #define __BKPT(value) __breakpoint(value)
mrsoundhar 0:559a8e4aab60 172
mrsoundhar 0:559a8e4aab60 173
mrsoundhar 0:559a8e4aab60 174 #if (__CORTEX_M >= 0x03)
mrsoundhar 0:559a8e4aab60 175
mrsoundhar 0:559a8e4aab60 176 /** \brief Reverse bit order of value
mrsoundhar 0:559a8e4aab60 177
mrsoundhar 0:559a8e4aab60 178 This function reverses the bit order of the given value.
mrsoundhar 0:559a8e4aab60 179
mrsoundhar 0:559a8e4aab60 180 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 181 \return Reversed value
mrsoundhar 0:559a8e4aab60 182 */
mrsoundhar 0:559a8e4aab60 183 #define __RBIT __rbit
mrsoundhar 0:559a8e4aab60 184
mrsoundhar 0:559a8e4aab60 185
mrsoundhar 0:559a8e4aab60 186 /** \brief LDR Exclusive (8 bit)
mrsoundhar 0:559a8e4aab60 187
mrsoundhar 0:559a8e4aab60 188 This function performs a exclusive LDR command for 8 bit value.
mrsoundhar 0:559a8e4aab60 189
mrsoundhar 0:559a8e4aab60 190 \param [in] ptr Pointer to data
mrsoundhar 0:559a8e4aab60 191 \return value of type uint8_t at (*ptr)
mrsoundhar 0:559a8e4aab60 192 */
mrsoundhar 0:559a8e4aab60 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
mrsoundhar 0:559a8e4aab60 194
mrsoundhar 0:559a8e4aab60 195
mrsoundhar 0:559a8e4aab60 196 /** \brief LDR Exclusive (16 bit)
mrsoundhar 0:559a8e4aab60 197
mrsoundhar 0:559a8e4aab60 198 This function performs a exclusive LDR command for 16 bit values.
mrsoundhar 0:559a8e4aab60 199
mrsoundhar 0:559a8e4aab60 200 \param [in] ptr Pointer to data
mrsoundhar 0:559a8e4aab60 201 \return value of type uint16_t at (*ptr)
mrsoundhar 0:559a8e4aab60 202 */
mrsoundhar 0:559a8e4aab60 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
mrsoundhar 0:559a8e4aab60 204
mrsoundhar 0:559a8e4aab60 205
mrsoundhar 0:559a8e4aab60 206 /** \brief LDR Exclusive (32 bit)
mrsoundhar 0:559a8e4aab60 207
mrsoundhar 0:559a8e4aab60 208 This function performs a exclusive LDR command for 32 bit values.
mrsoundhar 0:559a8e4aab60 209
mrsoundhar 0:559a8e4aab60 210 \param [in] ptr Pointer to data
mrsoundhar 0:559a8e4aab60 211 \return value of type uint32_t at (*ptr)
mrsoundhar 0:559a8e4aab60 212 */
mrsoundhar 0:559a8e4aab60 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
mrsoundhar 0:559a8e4aab60 214
mrsoundhar 0:559a8e4aab60 215
mrsoundhar 0:559a8e4aab60 216 /** \brief STR Exclusive (8 bit)
mrsoundhar 0:559a8e4aab60 217
mrsoundhar 0:559a8e4aab60 218 This function performs a exclusive STR command for 8 bit values.
mrsoundhar 0:559a8e4aab60 219
mrsoundhar 0:559a8e4aab60 220 \param [in] value Value to store
mrsoundhar 0:559a8e4aab60 221 \param [in] ptr Pointer to location
mrsoundhar 0:559a8e4aab60 222 \return 0 Function succeeded
mrsoundhar 0:559a8e4aab60 223 \return 1 Function failed
mrsoundhar 0:559a8e4aab60 224 */
mrsoundhar 0:559a8e4aab60 225 #define __STREXB(value, ptr) __strex(value, ptr)
mrsoundhar 0:559a8e4aab60 226
mrsoundhar 0:559a8e4aab60 227
mrsoundhar 0:559a8e4aab60 228 /** \brief STR Exclusive (16 bit)
mrsoundhar 0:559a8e4aab60 229
mrsoundhar 0:559a8e4aab60 230 This function performs a exclusive STR command for 16 bit values.
mrsoundhar 0:559a8e4aab60 231
mrsoundhar 0:559a8e4aab60 232 \param [in] value Value to store
mrsoundhar 0:559a8e4aab60 233 \param [in] ptr Pointer to location
mrsoundhar 0:559a8e4aab60 234 \return 0 Function succeeded
mrsoundhar 0:559a8e4aab60 235 \return 1 Function failed
mrsoundhar 0:559a8e4aab60 236 */
mrsoundhar 0:559a8e4aab60 237 #define __STREXH(value, ptr) __strex(value, ptr)
mrsoundhar 0:559a8e4aab60 238
mrsoundhar 0:559a8e4aab60 239
mrsoundhar 0:559a8e4aab60 240 /** \brief STR Exclusive (32 bit)
mrsoundhar 0:559a8e4aab60 241
mrsoundhar 0:559a8e4aab60 242 This function performs a exclusive STR command for 32 bit values.
mrsoundhar 0:559a8e4aab60 243
mrsoundhar 0:559a8e4aab60 244 \param [in] value Value to store
mrsoundhar 0:559a8e4aab60 245 \param [in] ptr Pointer to location
mrsoundhar 0:559a8e4aab60 246 \return 0 Function succeeded
mrsoundhar 0:559a8e4aab60 247 \return 1 Function failed
mrsoundhar 0:559a8e4aab60 248 */
mrsoundhar 0:559a8e4aab60 249 #define __STREXW(value, ptr) __strex(value, ptr)
mrsoundhar 0:559a8e4aab60 250
mrsoundhar 0:559a8e4aab60 251
mrsoundhar 0:559a8e4aab60 252 /** \brief Remove the exclusive lock
mrsoundhar 0:559a8e4aab60 253
mrsoundhar 0:559a8e4aab60 254 This function removes the exclusive lock which is created by LDREX.
mrsoundhar 0:559a8e4aab60 255
mrsoundhar 0:559a8e4aab60 256 */
mrsoundhar 0:559a8e4aab60 257 #define __CLREX __clrex
mrsoundhar 0:559a8e4aab60 258
mrsoundhar 0:559a8e4aab60 259
mrsoundhar 0:559a8e4aab60 260 /** \brief Signed Saturate
mrsoundhar 0:559a8e4aab60 261
mrsoundhar 0:559a8e4aab60 262 This function saturates a signed value.
mrsoundhar 0:559a8e4aab60 263
mrsoundhar 0:559a8e4aab60 264 \param [in] value Value to be saturated
mrsoundhar 0:559a8e4aab60 265 \param [in] sat Bit position to saturate to (1..32)
mrsoundhar 0:559a8e4aab60 266 \return Saturated value
mrsoundhar 0:559a8e4aab60 267 */
mrsoundhar 0:559a8e4aab60 268 #define __SSAT __ssat
mrsoundhar 0:559a8e4aab60 269
mrsoundhar 0:559a8e4aab60 270
mrsoundhar 0:559a8e4aab60 271 /** \brief Unsigned Saturate
mrsoundhar 0:559a8e4aab60 272
mrsoundhar 0:559a8e4aab60 273 This function saturates an unsigned value.
mrsoundhar 0:559a8e4aab60 274
mrsoundhar 0:559a8e4aab60 275 \param [in] value Value to be saturated
mrsoundhar 0:559a8e4aab60 276 \param [in] sat Bit position to saturate to (0..31)
mrsoundhar 0:559a8e4aab60 277 \return Saturated value
mrsoundhar 0:559a8e4aab60 278 */
mrsoundhar 0:559a8e4aab60 279 #define __USAT __usat
mrsoundhar 0:559a8e4aab60 280
mrsoundhar 0:559a8e4aab60 281
mrsoundhar 0:559a8e4aab60 282 /** \brief Count leading zeros
mrsoundhar 0:559a8e4aab60 283
mrsoundhar 0:559a8e4aab60 284 This function counts the number of leading zeros of a data value.
mrsoundhar 0:559a8e4aab60 285
mrsoundhar 0:559a8e4aab60 286 \param [in] value Value to count the leading zeros
mrsoundhar 0:559a8e4aab60 287 \return number of leading zeros in value
mrsoundhar 0:559a8e4aab60 288 */
mrsoundhar 0:559a8e4aab60 289 #define __CLZ __clz
mrsoundhar 0:559a8e4aab60 290
mrsoundhar 0:559a8e4aab60 291 #endif /* (__CORTEX_M >= 0x03) */
mrsoundhar 0:559a8e4aab60 292
mrsoundhar 0:559a8e4aab60 293
mrsoundhar 0:559a8e4aab60 294
mrsoundhar 0:559a8e4aab60 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
mrsoundhar 0:559a8e4aab60 296 /* IAR iccarm specific functions */
mrsoundhar 0:559a8e4aab60 297
mrsoundhar 0:559a8e4aab60 298 #include <cmsis_iar.h>
mrsoundhar 0:559a8e4aab60 299
mrsoundhar 0:559a8e4aab60 300
mrsoundhar 0:559a8e4aab60 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
mrsoundhar 0:559a8e4aab60 302 /* TI CCS specific functions */
mrsoundhar 0:559a8e4aab60 303
mrsoundhar 0:559a8e4aab60 304 #include <cmsis_ccs.h>
mrsoundhar 0:559a8e4aab60 305
mrsoundhar 0:559a8e4aab60 306
mrsoundhar 0:559a8e4aab60 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
mrsoundhar 0:559a8e4aab60 308 /* GNU gcc specific functions */
mrsoundhar 0:559a8e4aab60 309
mrsoundhar 0:559a8e4aab60 310 /* Define macros for porting to both thumb1 and thumb2.
mrsoundhar 0:559a8e4aab60 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
mrsoundhar 0:559a8e4aab60 312 * Otherwise, use general registers, specified by constrant "r" */
mrsoundhar 0:559a8e4aab60 313 #if defined (__thumb__) && !defined (__thumb2__)
mrsoundhar 0:559a8e4aab60 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
mrsoundhar 0:559a8e4aab60 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
mrsoundhar 0:559a8e4aab60 316 #else
mrsoundhar 0:559a8e4aab60 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
mrsoundhar 0:559a8e4aab60 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
mrsoundhar 0:559a8e4aab60 319 #endif
mrsoundhar 0:559a8e4aab60 320
mrsoundhar 0:559a8e4aab60 321 /** \brief No Operation
mrsoundhar 0:559a8e4aab60 322
mrsoundhar 0:559a8e4aab60 323 No Operation does nothing. This instruction can be used for code alignment purposes.
mrsoundhar 0:559a8e4aab60 324 */
mrsoundhar 0:559a8e4aab60 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
mrsoundhar 0:559a8e4aab60 326 {
mrsoundhar 0:559a8e4aab60 327 __ASM volatile ("nop");
mrsoundhar 0:559a8e4aab60 328 }
mrsoundhar 0:559a8e4aab60 329
mrsoundhar 0:559a8e4aab60 330
mrsoundhar 0:559a8e4aab60 331 /** \brief Wait For Interrupt
mrsoundhar 0:559a8e4aab60 332
mrsoundhar 0:559a8e4aab60 333 Wait For Interrupt is a hint instruction that suspends execution
mrsoundhar 0:559a8e4aab60 334 until one of a number of events occurs.
mrsoundhar 0:559a8e4aab60 335 */
mrsoundhar 0:559a8e4aab60 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
mrsoundhar 0:559a8e4aab60 337 {
mrsoundhar 0:559a8e4aab60 338 __ASM volatile ("wfi");
mrsoundhar 0:559a8e4aab60 339 }
mrsoundhar 0:559a8e4aab60 340
mrsoundhar 0:559a8e4aab60 341
mrsoundhar 0:559a8e4aab60 342 /** \brief Wait For Event
mrsoundhar 0:559a8e4aab60 343
mrsoundhar 0:559a8e4aab60 344 Wait For Event is a hint instruction that permits the processor to enter
mrsoundhar 0:559a8e4aab60 345 a low-power state until one of a number of events occurs.
mrsoundhar 0:559a8e4aab60 346 */
mrsoundhar 0:559a8e4aab60 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
mrsoundhar 0:559a8e4aab60 348 {
mrsoundhar 0:559a8e4aab60 349 __ASM volatile ("wfe");
mrsoundhar 0:559a8e4aab60 350 }
mrsoundhar 0:559a8e4aab60 351
mrsoundhar 0:559a8e4aab60 352
mrsoundhar 0:559a8e4aab60 353 /** \brief Send Event
mrsoundhar 0:559a8e4aab60 354
mrsoundhar 0:559a8e4aab60 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
mrsoundhar 0:559a8e4aab60 356 */
mrsoundhar 0:559a8e4aab60 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
mrsoundhar 0:559a8e4aab60 358 {
mrsoundhar 0:559a8e4aab60 359 __ASM volatile ("sev");
mrsoundhar 0:559a8e4aab60 360 }
mrsoundhar 0:559a8e4aab60 361
mrsoundhar 0:559a8e4aab60 362
mrsoundhar 0:559a8e4aab60 363 /** \brief Instruction Synchronization Barrier
mrsoundhar 0:559a8e4aab60 364
mrsoundhar 0:559a8e4aab60 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
mrsoundhar 0:559a8e4aab60 366 so that all instructions following the ISB are fetched from cache or
mrsoundhar 0:559a8e4aab60 367 memory, after the instruction has been completed.
mrsoundhar 0:559a8e4aab60 368 */
mrsoundhar 0:559a8e4aab60 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
mrsoundhar 0:559a8e4aab60 370 {
mrsoundhar 0:559a8e4aab60 371 __ASM volatile ("isb");
mrsoundhar 0:559a8e4aab60 372 }
mrsoundhar 0:559a8e4aab60 373
mrsoundhar 0:559a8e4aab60 374
mrsoundhar 0:559a8e4aab60 375 /** \brief Data Synchronization Barrier
mrsoundhar 0:559a8e4aab60 376
mrsoundhar 0:559a8e4aab60 377 This function acts as a special kind of Data Memory Barrier.
mrsoundhar 0:559a8e4aab60 378 It completes when all explicit memory accesses before this instruction complete.
mrsoundhar 0:559a8e4aab60 379 */
mrsoundhar 0:559a8e4aab60 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
mrsoundhar 0:559a8e4aab60 381 {
mrsoundhar 0:559a8e4aab60 382 __ASM volatile ("dsb");
mrsoundhar 0:559a8e4aab60 383 }
mrsoundhar 0:559a8e4aab60 384
mrsoundhar 0:559a8e4aab60 385
mrsoundhar 0:559a8e4aab60 386 /** \brief Data Memory Barrier
mrsoundhar 0:559a8e4aab60 387
mrsoundhar 0:559a8e4aab60 388 This function ensures the apparent order of the explicit memory operations before
mrsoundhar 0:559a8e4aab60 389 and after the instruction, without ensuring their completion.
mrsoundhar 0:559a8e4aab60 390 */
mrsoundhar 0:559a8e4aab60 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
mrsoundhar 0:559a8e4aab60 392 {
mrsoundhar 0:559a8e4aab60 393 __ASM volatile ("dmb");
mrsoundhar 0:559a8e4aab60 394 }
mrsoundhar 0:559a8e4aab60 395
mrsoundhar 0:559a8e4aab60 396
mrsoundhar 0:559a8e4aab60 397 /** \brief Reverse byte order (32 bit)
mrsoundhar 0:559a8e4aab60 398
mrsoundhar 0:559a8e4aab60 399 This function reverses the byte order in integer value.
mrsoundhar 0:559a8e4aab60 400
mrsoundhar 0:559a8e4aab60 401 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 402 \return Reversed value
mrsoundhar 0:559a8e4aab60 403 */
mrsoundhar 0:559a8e4aab60 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
mrsoundhar 0:559a8e4aab60 405 {
mrsoundhar 0:559a8e4aab60 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
mrsoundhar 0:559a8e4aab60 407 return __builtin_bswap32(value);
mrsoundhar 0:559a8e4aab60 408 #else
mrsoundhar 0:559a8e4aab60 409 uint32_t result;
mrsoundhar 0:559a8e4aab60 410
mrsoundhar 0:559a8e4aab60 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
mrsoundhar 0:559a8e4aab60 412 return(result);
mrsoundhar 0:559a8e4aab60 413 #endif
mrsoundhar 0:559a8e4aab60 414 }
mrsoundhar 0:559a8e4aab60 415
mrsoundhar 0:559a8e4aab60 416
mrsoundhar 0:559a8e4aab60 417 /** \brief Reverse byte order (16 bit)
mrsoundhar 0:559a8e4aab60 418
mrsoundhar 0:559a8e4aab60 419 This function reverses the byte order in two unsigned short values.
mrsoundhar 0:559a8e4aab60 420
mrsoundhar 0:559a8e4aab60 421 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 422 \return Reversed value
mrsoundhar 0:559a8e4aab60 423 */
mrsoundhar 0:559a8e4aab60 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
mrsoundhar 0:559a8e4aab60 425 {
mrsoundhar 0:559a8e4aab60 426 uint32_t result;
mrsoundhar 0:559a8e4aab60 427
mrsoundhar 0:559a8e4aab60 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
mrsoundhar 0:559a8e4aab60 429 return(result);
mrsoundhar 0:559a8e4aab60 430 }
mrsoundhar 0:559a8e4aab60 431
mrsoundhar 0:559a8e4aab60 432
mrsoundhar 0:559a8e4aab60 433 /** \brief Reverse byte order in signed short value
mrsoundhar 0:559a8e4aab60 434
mrsoundhar 0:559a8e4aab60 435 This function reverses the byte order in a signed short value with sign extension to integer.
mrsoundhar 0:559a8e4aab60 436
mrsoundhar 0:559a8e4aab60 437 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 438 \return Reversed value
mrsoundhar 0:559a8e4aab60 439 */
mrsoundhar 0:559a8e4aab60 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
mrsoundhar 0:559a8e4aab60 441 {
mrsoundhar 0:559a8e4aab60 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
mrsoundhar 0:559a8e4aab60 443 return (short)__builtin_bswap16(value);
mrsoundhar 0:559a8e4aab60 444 #else
mrsoundhar 0:559a8e4aab60 445 uint32_t result;
mrsoundhar 0:559a8e4aab60 446
mrsoundhar 0:559a8e4aab60 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
mrsoundhar 0:559a8e4aab60 448 return(result);
mrsoundhar 0:559a8e4aab60 449 #endif
mrsoundhar 0:559a8e4aab60 450 }
mrsoundhar 0:559a8e4aab60 451
mrsoundhar 0:559a8e4aab60 452
mrsoundhar 0:559a8e4aab60 453 /** \brief Rotate Right in unsigned value (32 bit)
mrsoundhar 0:559a8e4aab60 454
mrsoundhar 0:559a8e4aab60 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
mrsoundhar 0:559a8e4aab60 456
mrsoundhar 0:559a8e4aab60 457 \param [in] value Value to rotate
mrsoundhar 0:559a8e4aab60 458 \param [in] value Number of Bits to rotate
mrsoundhar 0:559a8e4aab60 459 \return Rotated value
mrsoundhar 0:559a8e4aab60 460 */
mrsoundhar 0:559a8e4aab60 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
mrsoundhar 0:559a8e4aab60 462 {
mrsoundhar 0:559a8e4aab60 463 return (op1 >> op2) | (op1 << (32 - op2));
mrsoundhar 0:559a8e4aab60 464 }
mrsoundhar 0:559a8e4aab60 465
mrsoundhar 0:559a8e4aab60 466
mrsoundhar 0:559a8e4aab60 467 /** \brief Breakpoint
mrsoundhar 0:559a8e4aab60 468
mrsoundhar 0:559a8e4aab60 469 This function causes the processor to enter Debug state.
mrsoundhar 0:559a8e4aab60 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
mrsoundhar 0:559a8e4aab60 471
mrsoundhar 0:559a8e4aab60 472 \param [in] value is ignored by the processor.
mrsoundhar 0:559a8e4aab60 473 If required, a debugger can use it to store additional information about the breakpoint.
mrsoundhar 0:559a8e4aab60 474 */
mrsoundhar 0:559a8e4aab60 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
mrsoundhar 0:559a8e4aab60 476
mrsoundhar 0:559a8e4aab60 477
mrsoundhar 0:559a8e4aab60 478 #if (__CORTEX_M >= 0x03)
mrsoundhar 0:559a8e4aab60 479
mrsoundhar 0:559a8e4aab60 480 /** \brief Reverse bit order of value
mrsoundhar 0:559a8e4aab60 481
mrsoundhar 0:559a8e4aab60 482 This function reverses the bit order of the given value.
mrsoundhar 0:559a8e4aab60 483
mrsoundhar 0:559a8e4aab60 484 \param [in] value Value to reverse
mrsoundhar 0:559a8e4aab60 485 \return Reversed value
mrsoundhar 0:559a8e4aab60 486 */
mrsoundhar 0:559a8e4aab60 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
mrsoundhar 0:559a8e4aab60 488 {
mrsoundhar 0:559a8e4aab60 489 uint32_t result;
mrsoundhar 0:559a8e4aab60 490
mrsoundhar 0:559a8e4aab60 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
mrsoundhar 0:559a8e4aab60 492 return(result);
mrsoundhar 0:559a8e4aab60 493 }
mrsoundhar 0:559a8e4aab60 494
mrsoundhar 0:559a8e4aab60 495
mrsoundhar 0:559a8e4aab60 496 /** \brief LDR Exclusive (8 bit)
mrsoundhar 0:559a8e4aab60 497
mrsoundhar 0:559a8e4aab60 498 This function performs a exclusive LDR command for 8 bit value.
mrsoundhar 0:559a8e4aab60 499
mrsoundhar 0:559a8e4aab60 500 \param [in] ptr Pointer to data
mrsoundhar 0:559a8e4aab60 501 \return value of type uint8_t at (*ptr)
mrsoundhar 0:559a8e4aab60 502 */
mrsoundhar 0:559a8e4aab60 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
mrsoundhar 0:559a8e4aab60 504 {
mrsoundhar 0:559a8e4aab60 505 uint32_t result;
mrsoundhar 0:559a8e4aab60 506
mrsoundhar 0:559a8e4aab60 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
mrsoundhar 0:559a8e4aab60 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
mrsoundhar 0:559a8e4aab60 509 #else
mrsoundhar 0:559a8e4aab60 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
mrsoundhar 0:559a8e4aab60 511 accepted by assembler. So has to use following less efficient pattern.
mrsoundhar 0:559a8e4aab60 512 */
mrsoundhar 0:559a8e4aab60 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
mrsoundhar 0:559a8e4aab60 514 #endif
mrsoundhar 0:559a8e4aab60 515 return(result);
mrsoundhar 0:559a8e4aab60 516 }
mrsoundhar 0:559a8e4aab60 517
mrsoundhar 0:559a8e4aab60 518
mrsoundhar 0:559a8e4aab60 519 /** \brief LDR Exclusive (16 bit)
mrsoundhar 0:559a8e4aab60 520
mrsoundhar 0:559a8e4aab60 521 This function performs a exclusive LDR command for 16 bit values.
mrsoundhar 0:559a8e4aab60 522
mrsoundhar 0:559a8e4aab60 523 \param [in] ptr Pointer to data
mrsoundhar 0:559a8e4aab60 524 \return value of type uint16_t at (*ptr)
mrsoundhar 0:559a8e4aab60 525 */
mrsoundhar 0:559a8e4aab60 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
mrsoundhar 0:559a8e4aab60 527 {
mrsoundhar 0:559a8e4aab60 528 uint32_t result;
mrsoundhar 0:559a8e4aab60 529
mrsoundhar 0:559a8e4aab60 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
mrsoundhar 0:559a8e4aab60 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
mrsoundhar 0:559a8e4aab60 532 #else
mrsoundhar 0:559a8e4aab60 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
mrsoundhar 0:559a8e4aab60 534 accepted by assembler. So has to use following less efficient pattern.
mrsoundhar 0:559a8e4aab60 535 */
mrsoundhar 0:559a8e4aab60 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
mrsoundhar 0:559a8e4aab60 537 #endif
mrsoundhar 0:559a8e4aab60 538 return(result);
mrsoundhar 0:559a8e4aab60 539 }
mrsoundhar 0:559a8e4aab60 540
mrsoundhar 0:559a8e4aab60 541
mrsoundhar 0:559a8e4aab60 542 /** \brief LDR Exclusive (32 bit)
mrsoundhar 0:559a8e4aab60 543
mrsoundhar 0:559a8e4aab60 544 This function performs a exclusive LDR command for 32 bit values.
mrsoundhar 0:559a8e4aab60 545
mrsoundhar 0:559a8e4aab60 546 \param [in] ptr Pointer to data
mrsoundhar 0:559a8e4aab60 547 \return value of type uint32_t at (*ptr)
mrsoundhar 0:559a8e4aab60 548 */
mrsoundhar 0:559a8e4aab60 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
mrsoundhar 0:559a8e4aab60 550 {
mrsoundhar 0:559a8e4aab60 551 uint32_t result;
mrsoundhar 0:559a8e4aab60 552
mrsoundhar 0:559a8e4aab60 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
mrsoundhar 0:559a8e4aab60 554 return(result);
mrsoundhar 0:559a8e4aab60 555 }
mrsoundhar 0:559a8e4aab60 556
mrsoundhar 0:559a8e4aab60 557
mrsoundhar 0:559a8e4aab60 558 /** \brief STR Exclusive (8 bit)
mrsoundhar 0:559a8e4aab60 559
mrsoundhar 0:559a8e4aab60 560 This function performs a exclusive STR command for 8 bit values.
mrsoundhar 0:559a8e4aab60 561
mrsoundhar 0:559a8e4aab60 562 \param [in] value Value to store
mrsoundhar 0:559a8e4aab60 563 \param [in] ptr Pointer to location
mrsoundhar 0:559a8e4aab60 564 \return 0 Function succeeded
mrsoundhar 0:559a8e4aab60 565 \return 1 Function failed
mrsoundhar 0:559a8e4aab60 566 */
mrsoundhar 0:559a8e4aab60 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
mrsoundhar 0:559a8e4aab60 568 {
mrsoundhar 0:559a8e4aab60 569 uint32_t result;
mrsoundhar 0:559a8e4aab60 570
mrsoundhar 0:559a8e4aab60 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
mrsoundhar 0:559a8e4aab60 572 return(result);
mrsoundhar 0:559a8e4aab60 573 }
mrsoundhar 0:559a8e4aab60 574
mrsoundhar 0:559a8e4aab60 575
mrsoundhar 0:559a8e4aab60 576 /** \brief STR Exclusive (16 bit)
mrsoundhar 0:559a8e4aab60 577
mrsoundhar 0:559a8e4aab60 578 This function performs a exclusive STR command for 16 bit values.
mrsoundhar 0:559a8e4aab60 579
mrsoundhar 0:559a8e4aab60 580 \param [in] value Value to store
mrsoundhar 0:559a8e4aab60 581 \param [in] ptr Pointer to location
mrsoundhar 0:559a8e4aab60 582 \return 0 Function succeeded
mrsoundhar 0:559a8e4aab60 583 \return 1 Function failed
mrsoundhar 0:559a8e4aab60 584 */
mrsoundhar 0:559a8e4aab60 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
mrsoundhar 0:559a8e4aab60 586 {
mrsoundhar 0:559a8e4aab60 587 uint32_t result;
mrsoundhar 0:559a8e4aab60 588
mrsoundhar 0:559a8e4aab60 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
mrsoundhar 0:559a8e4aab60 590 return(result);
mrsoundhar 0:559a8e4aab60 591 }
mrsoundhar 0:559a8e4aab60 592
mrsoundhar 0:559a8e4aab60 593
mrsoundhar 0:559a8e4aab60 594 /** \brief STR Exclusive (32 bit)
mrsoundhar 0:559a8e4aab60 595
mrsoundhar 0:559a8e4aab60 596 This function performs a exclusive STR command for 32 bit values.
mrsoundhar 0:559a8e4aab60 597
mrsoundhar 0:559a8e4aab60 598 \param [in] value Value to store
mrsoundhar 0:559a8e4aab60 599 \param [in] ptr Pointer to location
mrsoundhar 0:559a8e4aab60 600 \return 0 Function succeeded
mrsoundhar 0:559a8e4aab60 601 \return 1 Function failed
mrsoundhar 0:559a8e4aab60 602 */
mrsoundhar 0:559a8e4aab60 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
mrsoundhar 0:559a8e4aab60 604 {
mrsoundhar 0:559a8e4aab60 605 uint32_t result;
mrsoundhar 0:559a8e4aab60 606
mrsoundhar 0:559a8e4aab60 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
mrsoundhar 0:559a8e4aab60 608 return(result);
mrsoundhar 0:559a8e4aab60 609 }
mrsoundhar 0:559a8e4aab60 610
mrsoundhar 0:559a8e4aab60 611
mrsoundhar 0:559a8e4aab60 612 /** \brief Remove the exclusive lock
mrsoundhar 0:559a8e4aab60 613
mrsoundhar 0:559a8e4aab60 614 This function removes the exclusive lock which is created by LDREX.
mrsoundhar 0:559a8e4aab60 615
mrsoundhar 0:559a8e4aab60 616 */
mrsoundhar 0:559a8e4aab60 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
mrsoundhar 0:559a8e4aab60 618 {
mrsoundhar 0:559a8e4aab60 619 __ASM volatile ("clrex" ::: "memory");
mrsoundhar 0:559a8e4aab60 620 }
mrsoundhar 0:559a8e4aab60 621
mrsoundhar 0:559a8e4aab60 622
mrsoundhar 0:559a8e4aab60 623 /** \brief Signed Saturate
mrsoundhar 0:559a8e4aab60 624
mrsoundhar 0:559a8e4aab60 625 This function saturates a signed value.
mrsoundhar 0:559a8e4aab60 626
mrsoundhar 0:559a8e4aab60 627 \param [in] value Value to be saturated
mrsoundhar 0:559a8e4aab60 628 \param [in] sat Bit position to saturate to (1..32)
mrsoundhar 0:559a8e4aab60 629 \return Saturated value
mrsoundhar 0:559a8e4aab60 630 */
mrsoundhar 0:559a8e4aab60 631 #define __SSAT(ARG1,ARG2) \
mrsoundhar 0:559a8e4aab60 632 ({ \
mrsoundhar 0:559a8e4aab60 633 uint32_t __RES, __ARG1 = (ARG1); \
mrsoundhar 0:559a8e4aab60 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
mrsoundhar 0:559a8e4aab60 635 __RES; \
mrsoundhar 0:559a8e4aab60 636 })
mrsoundhar 0:559a8e4aab60 637
mrsoundhar 0:559a8e4aab60 638
mrsoundhar 0:559a8e4aab60 639 /** \brief Unsigned Saturate
mrsoundhar 0:559a8e4aab60 640
mrsoundhar 0:559a8e4aab60 641 This function saturates an unsigned value.
mrsoundhar 0:559a8e4aab60 642
mrsoundhar 0:559a8e4aab60 643 \param [in] value Value to be saturated
mrsoundhar 0:559a8e4aab60 644 \param [in] sat Bit position to saturate to (0..31)
mrsoundhar 0:559a8e4aab60 645 \return Saturated value
mrsoundhar 0:559a8e4aab60 646 */
mrsoundhar 0:559a8e4aab60 647 #define __USAT(ARG1,ARG2) \
mrsoundhar 0:559a8e4aab60 648 ({ \
mrsoundhar 0:559a8e4aab60 649 uint32_t __RES, __ARG1 = (ARG1); \
mrsoundhar 0:559a8e4aab60 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
mrsoundhar 0:559a8e4aab60 651 __RES; \
mrsoundhar 0:559a8e4aab60 652 })
mrsoundhar 0:559a8e4aab60 653
mrsoundhar 0:559a8e4aab60 654
mrsoundhar 0:559a8e4aab60 655 /** \brief Count leading zeros
mrsoundhar 0:559a8e4aab60 656
mrsoundhar 0:559a8e4aab60 657 This function counts the number of leading zeros of a data value.
mrsoundhar 0:559a8e4aab60 658
mrsoundhar 0:559a8e4aab60 659 \param [in] value Value to count the leading zeros
mrsoundhar 0:559a8e4aab60 660 \return number of leading zeros in value
mrsoundhar 0:559a8e4aab60 661 */
mrsoundhar 0:559a8e4aab60 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
mrsoundhar 0:559a8e4aab60 663 {
mrsoundhar 0:559a8e4aab60 664 uint32_t result;
mrsoundhar 0:559a8e4aab60 665
mrsoundhar 0:559a8e4aab60 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
mrsoundhar 0:559a8e4aab60 667 return(result);
mrsoundhar 0:559a8e4aab60 668 }
mrsoundhar 0:559a8e4aab60 669
mrsoundhar 0:559a8e4aab60 670 #endif /* (__CORTEX_M >= 0x03) */
mrsoundhar 0:559a8e4aab60 671
mrsoundhar 0:559a8e4aab60 672
mrsoundhar 0:559a8e4aab60 673
mrsoundhar 0:559a8e4aab60 674
mrsoundhar 0:559a8e4aab60 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
mrsoundhar 0:559a8e4aab60 676 /* TASKING carm specific functions */
mrsoundhar 0:559a8e4aab60 677
mrsoundhar 0:559a8e4aab60 678 /*
mrsoundhar 0:559a8e4aab60 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
mrsoundhar 0:559a8e4aab60 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
mrsoundhar 0:559a8e4aab60 681 * Including the CMSIS ones.
mrsoundhar 0:559a8e4aab60 682 */
mrsoundhar 0:559a8e4aab60 683
mrsoundhar 0:559a8e4aab60 684 #endif
mrsoundhar 0:559a8e4aab60 685
mrsoundhar 0:559a8e4aab60 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
mrsoundhar 0:559a8e4aab60 687
mrsoundhar 0:559a8e4aab60 688 #endif /* __CORE_CMINSTR_H */