Sertel_Srinath Gopalan / TARGET_LPC1768i2c

myi2c test

core_cmFunc.h@0:559a8e4aab60, 2015-06-29 (annotated)

Committer:
mrsoundhar
Date:
Mon Jun 29 12:59:52 2015 +0000
Revision:
0:559a8e4aab60
i2c

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mrsoundhar 0:559a8e4aab60 1 /**************************************************************************//**
mrsoundhar 0:559a8e4aab60 2 * @file core_cmFunc.h
mrsoundhar 0:559a8e4aab60 3 * @brief CMSIS Cortex-M Core Function Access Header File
mrsoundhar 0:559a8e4aab60 4 * @version V3.20
mrsoundhar 0:559a8e4aab60 5 * @date 25. February 2013
mrsoundhar 0:559a8e4aab60 6 *
mrsoundhar 0:559a8e4aab60 7 * @note
mrsoundhar 0:559a8e4aab60 8 *
mrsoundhar 0:559a8e4aab60 9 ******************************************************************************/
mrsoundhar 0:559a8e4aab60 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
mrsoundhar 0:559a8e4aab60 11
mrsoundhar 0:559a8e4aab60 12 All rights reserved.
mrsoundhar 0:559a8e4aab60 13 Redistribution and use in source and binary forms, with or without
mrsoundhar 0:559a8e4aab60 14 modification, are permitted provided that the following conditions are met:
mrsoundhar 0:559a8e4aab60 15 - Redistributions of source code must retain the above copyright
mrsoundhar 0:559a8e4aab60 16 notice, this list of conditions and the following disclaimer.
mrsoundhar 0:559a8e4aab60 17 - Redistributions in binary form must reproduce the above copyright
mrsoundhar 0:559a8e4aab60 18 notice, this list of conditions and the following disclaimer in the
mrsoundhar 0:559a8e4aab60 19 documentation and/or other materials provided with the distribution.
mrsoundhar 0:559a8e4aab60 20 - Neither the name of ARM nor the names of its contributors may be used
mrsoundhar 0:559a8e4aab60 21 to endorse or promote products derived from this software without
mrsoundhar 0:559a8e4aab60 22 specific prior written permission.
mrsoundhar 0:559a8e4aab60 23 *
mrsoundhar 0:559a8e4aab60 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mrsoundhar 0:559a8e4aab60 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mrsoundhar 0:559a8e4aab60 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mrsoundhar 0:559a8e4aab60 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mrsoundhar 0:559a8e4aab60 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mrsoundhar 0:559a8e4aab60 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mrsoundhar 0:559a8e4aab60 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mrsoundhar 0:559a8e4aab60 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mrsoundhar 0:559a8e4aab60 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mrsoundhar 0:559a8e4aab60 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mrsoundhar 0:559a8e4aab60 34 POSSIBILITY OF SUCH DAMAGE.
mrsoundhar 0:559a8e4aab60 35 ---------------------------------------------------------------------------*/
mrsoundhar 0:559a8e4aab60 36
mrsoundhar 0:559a8e4aab60 37
mrsoundhar 0:559a8e4aab60 38 #ifndef __CORE_CMFUNC_H
mrsoundhar 0:559a8e4aab60 39 #define __CORE_CMFUNC_H
mrsoundhar 0:559a8e4aab60 40
mrsoundhar 0:559a8e4aab60 41
mrsoundhar 0:559a8e4aab60 42 /* ########################### Core Function Access ########################### */
mrsoundhar 0:559a8e4aab60 43 /** \ingroup CMSIS_Core_FunctionInterface
mrsoundhar 0:559a8e4aab60 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
mrsoundhar 0:559a8e4aab60 45 @{
mrsoundhar 0:559a8e4aab60 46 */
mrsoundhar 0:559a8e4aab60 47
mrsoundhar 0:559a8e4aab60 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
mrsoundhar 0:559a8e4aab60 49 /* ARM armcc specific functions */
mrsoundhar 0:559a8e4aab60 50
mrsoundhar 0:559a8e4aab60 51 #if (__ARMCC_VERSION < 400677)
mrsoundhar 0:559a8e4aab60 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
mrsoundhar 0:559a8e4aab60 53 #endif
mrsoundhar 0:559a8e4aab60 54
mrsoundhar 0:559a8e4aab60 55 /* intrinsic void __enable_irq(); */
mrsoundhar 0:559a8e4aab60 56 /* intrinsic void __disable_irq(); */
mrsoundhar 0:559a8e4aab60 57
mrsoundhar 0:559a8e4aab60 58 /** \brief Get Control Register
mrsoundhar 0:559a8e4aab60 59
mrsoundhar 0:559a8e4aab60 60 This function returns the content of the Control Register.
mrsoundhar 0:559a8e4aab60 61
mrsoundhar 0:559a8e4aab60 62 \return Control Register value
mrsoundhar 0:559a8e4aab60 63 */
mrsoundhar 0:559a8e4aab60 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
mrsoundhar 0:559a8e4aab60 65 {
mrsoundhar 0:559a8e4aab60 66 register uint32_t __regControl __ASM("control");
mrsoundhar 0:559a8e4aab60 67 return(__regControl);
mrsoundhar 0:559a8e4aab60 68 }
mrsoundhar 0:559a8e4aab60 69
mrsoundhar 0:559a8e4aab60 70
mrsoundhar 0:559a8e4aab60 71 /** \brief Set Control Register
mrsoundhar 0:559a8e4aab60 72
mrsoundhar 0:559a8e4aab60 73 This function writes the given value to the Control Register.
mrsoundhar 0:559a8e4aab60 74
mrsoundhar 0:559a8e4aab60 75 \param [in] control Control Register value to set
mrsoundhar 0:559a8e4aab60 76 */
mrsoundhar 0:559a8e4aab60 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
mrsoundhar 0:559a8e4aab60 78 {
mrsoundhar 0:559a8e4aab60 79 register uint32_t __regControl __ASM("control");
mrsoundhar 0:559a8e4aab60 80 __regControl = control;
mrsoundhar 0:559a8e4aab60 81 }
mrsoundhar 0:559a8e4aab60 82
mrsoundhar 0:559a8e4aab60 83
mrsoundhar 0:559a8e4aab60 84 /** \brief Get IPSR Register
mrsoundhar 0:559a8e4aab60 85
mrsoundhar 0:559a8e4aab60 86 This function returns the content of the IPSR Register.
mrsoundhar 0:559a8e4aab60 87
mrsoundhar 0:559a8e4aab60 88 \return IPSR Register value
mrsoundhar 0:559a8e4aab60 89 */
mrsoundhar 0:559a8e4aab60 90 __STATIC_INLINE uint32_t __get_IPSR(void)
mrsoundhar 0:559a8e4aab60 91 {
mrsoundhar 0:559a8e4aab60 92 register uint32_t __regIPSR __ASM("ipsr");
mrsoundhar 0:559a8e4aab60 93 return(__regIPSR);
mrsoundhar 0:559a8e4aab60 94 }
mrsoundhar 0:559a8e4aab60 95
mrsoundhar 0:559a8e4aab60 96
mrsoundhar 0:559a8e4aab60 97 /** \brief Get APSR Register
mrsoundhar 0:559a8e4aab60 98
mrsoundhar 0:559a8e4aab60 99 This function returns the content of the APSR Register.
mrsoundhar 0:559a8e4aab60 100
mrsoundhar 0:559a8e4aab60 101 \return APSR Register value
mrsoundhar 0:559a8e4aab60 102 */
mrsoundhar 0:559a8e4aab60 103 __STATIC_INLINE uint32_t __get_APSR(void)
mrsoundhar 0:559a8e4aab60 104 {
mrsoundhar 0:559a8e4aab60 105 register uint32_t __regAPSR __ASM("apsr");
mrsoundhar 0:559a8e4aab60 106 return(__regAPSR);
mrsoundhar 0:559a8e4aab60 107 }
mrsoundhar 0:559a8e4aab60 108
mrsoundhar 0:559a8e4aab60 109
mrsoundhar 0:559a8e4aab60 110 /** \brief Get xPSR Register
mrsoundhar 0:559a8e4aab60 111
mrsoundhar 0:559a8e4aab60 112 This function returns the content of the xPSR Register.
mrsoundhar 0:559a8e4aab60 113
mrsoundhar 0:559a8e4aab60 114 \return xPSR Register value
mrsoundhar 0:559a8e4aab60 115 */
mrsoundhar 0:559a8e4aab60 116 __STATIC_INLINE uint32_t __get_xPSR(void)
mrsoundhar 0:559a8e4aab60 117 {
mrsoundhar 0:559a8e4aab60 118 register uint32_t __regXPSR __ASM("xpsr");
mrsoundhar 0:559a8e4aab60 119 return(__regXPSR);
mrsoundhar 0:559a8e4aab60 120 }
mrsoundhar 0:559a8e4aab60 121
mrsoundhar 0:559a8e4aab60 122
mrsoundhar 0:559a8e4aab60 123 /** \brief Get Process Stack Pointer
mrsoundhar 0:559a8e4aab60 124
mrsoundhar 0:559a8e4aab60 125 This function returns the current value of the Process Stack Pointer (PSP).
mrsoundhar 0:559a8e4aab60 126
mrsoundhar 0:559a8e4aab60 127 \return PSP Register value
mrsoundhar 0:559a8e4aab60 128 */
mrsoundhar 0:559a8e4aab60 129 __STATIC_INLINE uint32_t __get_PSP(void)
mrsoundhar 0:559a8e4aab60 130 {
mrsoundhar 0:559a8e4aab60 131 register uint32_t __regProcessStackPointer __ASM("psp");
mrsoundhar 0:559a8e4aab60 132 return(__regProcessStackPointer);
mrsoundhar 0:559a8e4aab60 133 }
mrsoundhar 0:559a8e4aab60 134
mrsoundhar 0:559a8e4aab60 135
mrsoundhar 0:559a8e4aab60 136 /** \brief Set Process Stack Pointer
mrsoundhar 0:559a8e4aab60 137
mrsoundhar 0:559a8e4aab60 138 This function assigns the given value to the Process Stack Pointer (PSP).
mrsoundhar 0:559a8e4aab60 139
mrsoundhar 0:559a8e4aab60 140 \param [in] topOfProcStack Process Stack Pointer value to set
mrsoundhar 0:559a8e4aab60 141 */
mrsoundhar 0:559a8e4aab60 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
mrsoundhar 0:559a8e4aab60 143 {
mrsoundhar 0:559a8e4aab60 144 register uint32_t __regProcessStackPointer __ASM("psp");
mrsoundhar 0:559a8e4aab60 145 __regProcessStackPointer = topOfProcStack;
mrsoundhar 0:559a8e4aab60 146 }
mrsoundhar 0:559a8e4aab60 147
mrsoundhar 0:559a8e4aab60 148
mrsoundhar 0:559a8e4aab60 149 /** \brief Get Main Stack Pointer
mrsoundhar 0:559a8e4aab60 150
mrsoundhar 0:559a8e4aab60 151 This function returns the current value of the Main Stack Pointer (MSP).
mrsoundhar 0:559a8e4aab60 152
mrsoundhar 0:559a8e4aab60 153 \return MSP Register value
mrsoundhar 0:559a8e4aab60 154 */
mrsoundhar 0:559a8e4aab60 155 __STATIC_INLINE uint32_t __get_MSP(void)
mrsoundhar 0:559a8e4aab60 156 {
mrsoundhar 0:559a8e4aab60 157 register uint32_t __regMainStackPointer __ASM("msp");
mrsoundhar 0:559a8e4aab60 158 return(__regMainStackPointer);
mrsoundhar 0:559a8e4aab60 159 }
mrsoundhar 0:559a8e4aab60 160
mrsoundhar 0:559a8e4aab60 161
mrsoundhar 0:559a8e4aab60 162 /** \brief Set Main Stack Pointer
mrsoundhar 0:559a8e4aab60 163
mrsoundhar 0:559a8e4aab60 164 This function assigns the given value to the Main Stack Pointer (MSP).
mrsoundhar 0:559a8e4aab60 165
mrsoundhar 0:559a8e4aab60 166 \param [in] topOfMainStack Main Stack Pointer value to set
mrsoundhar 0:559a8e4aab60 167 */
mrsoundhar 0:559a8e4aab60 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
mrsoundhar 0:559a8e4aab60 169 {
mrsoundhar 0:559a8e4aab60 170 register uint32_t __regMainStackPointer __ASM("msp");
mrsoundhar 0:559a8e4aab60 171 __regMainStackPointer = topOfMainStack;
mrsoundhar 0:559a8e4aab60 172 }
mrsoundhar 0:559a8e4aab60 173
mrsoundhar 0:559a8e4aab60 174
mrsoundhar 0:559a8e4aab60 175 /** \brief Get Priority Mask
mrsoundhar 0:559a8e4aab60 176
mrsoundhar 0:559a8e4aab60 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
mrsoundhar 0:559a8e4aab60 178
mrsoundhar 0:559a8e4aab60 179 \return Priority Mask value
mrsoundhar 0:559a8e4aab60 180 */
mrsoundhar 0:559a8e4aab60 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
mrsoundhar 0:559a8e4aab60 182 {
mrsoundhar 0:559a8e4aab60 183 register uint32_t __regPriMask __ASM("primask");
mrsoundhar 0:559a8e4aab60 184 return(__regPriMask);
mrsoundhar 0:559a8e4aab60 185 }
mrsoundhar 0:559a8e4aab60 186
mrsoundhar 0:559a8e4aab60 187
mrsoundhar 0:559a8e4aab60 188 /** \brief Set Priority Mask
mrsoundhar 0:559a8e4aab60 189
mrsoundhar 0:559a8e4aab60 190 This function assigns the given value to the Priority Mask Register.
mrsoundhar 0:559a8e4aab60 191
mrsoundhar 0:559a8e4aab60 192 \param [in] priMask Priority Mask
mrsoundhar 0:559a8e4aab60 193 */
mrsoundhar 0:559a8e4aab60 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
mrsoundhar 0:559a8e4aab60 195 {
mrsoundhar 0:559a8e4aab60 196 register uint32_t __regPriMask __ASM("primask");
mrsoundhar 0:559a8e4aab60 197 __regPriMask = (priMask);
mrsoundhar 0:559a8e4aab60 198 }
mrsoundhar 0:559a8e4aab60 199
mrsoundhar 0:559a8e4aab60 200
mrsoundhar 0:559a8e4aab60 201 #if (__CORTEX_M >= 0x03)
mrsoundhar 0:559a8e4aab60 202
mrsoundhar 0:559a8e4aab60 203 /** \brief Enable FIQ
mrsoundhar 0:559a8e4aab60 204
mrsoundhar 0:559a8e4aab60 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
mrsoundhar 0:559a8e4aab60 206 Can only be executed in Privileged modes.
mrsoundhar 0:559a8e4aab60 207 */
mrsoundhar 0:559a8e4aab60 208 #define __enable_fault_irq __enable_fiq
mrsoundhar 0:559a8e4aab60 209
mrsoundhar 0:559a8e4aab60 210
mrsoundhar 0:559a8e4aab60 211 /** \brief Disable FIQ
mrsoundhar 0:559a8e4aab60 212
mrsoundhar 0:559a8e4aab60 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
mrsoundhar 0:559a8e4aab60 214 Can only be executed in Privileged modes.
mrsoundhar 0:559a8e4aab60 215 */
mrsoundhar 0:559a8e4aab60 216 #define __disable_fault_irq __disable_fiq
mrsoundhar 0:559a8e4aab60 217
mrsoundhar 0:559a8e4aab60 218
mrsoundhar 0:559a8e4aab60 219 /** \brief Get Base Priority
mrsoundhar 0:559a8e4aab60 220
mrsoundhar 0:559a8e4aab60 221 This function returns the current value of the Base Priority register.
mrsoundhar 0:559a8e4aab60 222
mrsoundhar 0:559a8e4aab60 223 \return Base Priority register value
mrsoundhar 0:559a8e4aab60 224 */
mrsoundhar 0:559a8e4aab60 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
mrsoundhar 0:559a8e4aab60 226 {
mrsoundhar 0:559a8e4aab60 227 register uint32_t __regBasePri __ASM("basepri");
mrsoundhar 0:559a8e4aab60 228 return(__regBasePri);
mrsoundhar 0:559a8e4aab60 229 }
mrsoundhar 0:559a8e4aab60 230
mrsoundhar 0:559a8e4aab60 231
mrsoundhar 0:559a8e4aab60 232 /** \brief Set Base Priority
mrsoundhar 0:559a8e4aab60 233
mrsoundhar 0:559a8e4aab60 234 This function assigns the given value to the Base Priority register.
mrsoundhar 0:559a8e4aab60 235
mrsoundhar 0:559a8e4aab60 236 \param [in] basePri Base Priority value to set
mrsoundhar 0:559a8e4aab60 237 */
mrsoundhar 0:559a8e4aab60 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
mrsoundhar 0:559a8e4aab60 239 {
mrsoundhar 0:559a8e4aab60 240 register uint32_t __regBasePri __ASM("basepri");
mrsoundhar 0:559a8e4aab60 241 __regBasePri = (basePri & 0xff);
mrsoundhar 0:559a8e4aab60 242 }
mrsoundhar 0:559a8e4aab60 243
mrsoundhar 0:559a8e4aab60 244
mrsoundhar 0:559a8e4aab60 245 /** \brief Get Fault Mask
mrsoundhar 0:559a8e4aab60 246
mrsoundhar 0:559a8e4aab60 247 This function returns the current value of the Fault Mask register.
mrsoundhar 0:559a8e4aab60 248
mrsoundhar 0:559a8e4aab60 249 \return Fault Mask register value
mrsoundhar 0:559a8e4aab60 250 */
mrsoundhar 0:559a8e4aab60 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
mrsoundhar 0:559a8e4aab60 252 {
mrsoundhar 0:559a8e4aab60 253 register uint32_t __regFaultMask __ASM("faultmask");
mrsoundhar 0:559a8e4aab60 254 return(__regFaultMask);
mrsoundhar 0:559a8e4aab60 255 }
mrsoundhar 0:559a8e4aab60 256
mrsoundhar 0:559a8e4aab60 257
mrsoundhar 0:559a8e4aab60 258 /** \brief Set Fault Mask
mrsoundhar 0:559a8e4aab60 259
mrsoundhar 0:559a8e4aab60 260 This function assigns the given value to the Fault Mask register.
mrsoundhar 0:559a8e4aab60 261
mrsoundhar 0:559a8e4aab60 262 \param [in] faultMask Fault Mask value to set
mrsoundhar 0:559a8e4aab60 263 */
mrsoundhar 0:559a8e4aab60 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
mrsoundhar 0:559a8e4aab60 265 {
mrsoundhar 0:559a8e4aab60 266 register uint32_t __regFaultMask __ASM("faultmask");
mrsoundhar 0:559a8e4aab60 267 __regFaultMask = (faultMask & (uint32_t)1);
mrsoundhar 0:559a8e4aab60 268 }
mrsoundhar 0:559a8e4aab60 269
mrsoundhar 0:559a8e4aab60 270 #endif /* (__CORTEX_M >= 0x03) */
mrsoundhar 0:559a8e4aab60 271
mrsoundhar 0:559a8e4aab60 272
mrsoundhar 0:559a8e4aab60 273 #if (__CORTEX_M == 0x04)
mrsoundhar 0:559a8e4aab60 274
mrsoundhar 0:559a8e4aab60 275 /** \brief Get FPSCR
mrsoundhar 0:559a8e4aab60 276
mrsoundhar 0:559a8e4aab60 277 This function returns the current value of the Floating Point Status/Control register.
mrsoundhar 0:559a8e4aab60 278
mrsoundhar 0:559a8e4aab60 279 \return Floating Point Status/Control register value
mrsoundhar 0:559a8e4aab60 280 */
mrsoundhar 0:559a8e4aab60 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
mrsoundhar 0:559a8e4aab60 282 {
mrsoundhar 0:559a8e4aab60 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mrsoundhar 0:559a8e4aab60 284 register uint32_t __regfpscr __ASM("fpscr");
mrsoundhar 0:559a8e4aab60 285 return(__regfpscr);
mrsoundhar 0:559a8e4aab60 286 #else
mrsoundhar 0:559a8e4aab60 287 return(0);
mrsoundhar 0:559a8e4aab60 288 #endif
mrsoundhar 0:559a8e4aab60 289 }
mrsoundhar 0:559a8e4aab60 290
mrsoundhar 0:559a8e4aab60 291
mrsoundhar 0:559a8e4aab60 292 /** \brief Set FPSCR
mrsoundhar 0:559a8e4aab60 293
mrsoundhar 0:559a8e4aab60 294 This function assigns the given value to the Floating Point Status/Control register.
mrsoundhar 0:559a8e4aab60 295
mrsoundhar 0:559a8e4aab60 296 \param [in] fpscr Floating Point Status/Control value to set
mrsoundhar 0:559a8e4aab60 297 */
mrsoundhar 0:559a8e4aab60 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
mrsoundhar 0:559a8e4aab60 299 {
mrsoundhar 0:559a8e4aab60 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mrsoundhar 0:559a8e4aab60 301 register uint32_t __regfpscr __ASM("fpscr");
mrsoundhar 0:559a8e4aab60 302 __regfpscr = (fpscr);
mrsoundhar 0:559a8e4aab60 303 #endif
mrsoundhar 0:559a8e4aab60 304 }
mrsoundhar 0:559a8e4aab60 305
mrsoundhar 0:559a8e4aab60 306 #endif /* (__CORTEX_M == 0x04) */
mrsoundhar 0:559a8e4aab60 307
mrsoundhar 0:559a8e4aab60 308
mrsoundhar 0:559a8e4aab60 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
mrsoundhar 0:559a8e4aab60 310 /* IAR iccarm specific functions */
mrsoundhar 0:559a8e4aab60 311
mrsoundhar 0:559a8e4aab60 312 #include <cmsis_iar.h>
mrsoundhar 0:559a8e4aab60 313
mrsoundhar 0:559a8e4aab60 314
mrsoundhar 0:559a8e4aab60 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
mrsoundhar 0:559a8e4aab60 316 /* TI CCS specific functions */
mrsoundhar 0:559a8e4aab60 317
mrsoundhar 0:559a8e4aab60 318 #include <cmsis_ccs.h>
mrsoundhar 0:559a8e4aab60 319
mrsoundhar 0:559a8e4aab60 320
mrsoundhar 0:559a8e4aab60 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
mrsoundhar 0:559a8e4aab60 322 /* GNU gcc specific functions */
mrsoundhar 0:559a8e4aab60 323
mrsoundhar 0:559a8e4aab60 324 /** \brief Enable IRQ Interrupts
mrsoundhar 0:559a8e4aab60 325
mrsoundhar 0:559a8e4aab60 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
mrsoundhar 0:559a8e4aab60 327 Can only be executed in Privileged modes.
mrsoundhar 0:559a8e4aab60 328 */
mrsoundhar 0:559a8e4aab60 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
mrsoundhar 0:559a8e4aab60 330 {
mrsoundhar 0:559a8e4aab60 331 __ASM volatile ("cpsie i" : : : "memory");
mrsoundhar 0:559a8e4aab60 332 }
mrsoundhar 0:559a8e4aab60 333
mrsoundhar 0:559a8e4aab60 334
mrsoundhar 0:559a8e4aab60 335 /** \brief Disable IRQ Interrupts
mrsoundhar 0:559a8e4aab60 336
mrsoundhar 0:559a8e4aab60 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
mrsoundhar 0:559a8e4aab60 338 Can only be executed in Privileged modes.
mrsoundhar 0:559a8e4aab60 339 */
mrsoundhar 0:559a8e4aab60 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
mrsoundhar 0:559a8e4aab60 341 {
mrsoundhar 0:559a8e4aab60 342 __ASM volatile ("cpsid i" : : : "memory");
mrsoundhar 0:559a8e4aab60 343 }
mrsoundhar 0:559a8e4aab60 344
mrsoundhar 0:559a8e4aab60 345
mrsoundhar 0:559a8e4aab60 346 /** \brief Get Control Register
mrsoundhar 0:559a8e4aab60 347
mrsoundhar 0:559a8e4aab60 348 This function returns the content of the Control Register.
mrsoundhar 0:559a8e4aab60 349
mrsoundhar 0:559a8e4aab60 350 \return Control Register value
mrsoundhar 0:559a8e4aab60 351 */
mrsoundhar 0:559a8e4aab60 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
mrsoundhar 0:559a8e4aab60 353 {
mrsoundhar 0:559a8e4aab60 354 uint32_t result;
mrsoundhar 0:559a8e4aab60 355
mrsoundhar 0:559a8e4aab60 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 357 return(result);
mrsoundhar 0:559a8e4aab60 358 }
mrsoundhar 0:559a8e4aab60 359
mrsoundhar 0:559a8e4aab60 360
mrsoundhar 0:559a8e4aab60 361 /** \brief Set Control Register
mrsoundhar 0:559a8e4aab60 362
mrsoundhar 0:559a8e4aab60 363 This function writes the given value to the Control Register.
mrsoundhar 0:559a8e4aab60 364
mrsoundhar 0:559a8e4aab60 365 \param [in] control Control Register value to set
mrsoundhar 0:559a8e4aab60 366 */
mrsoundhar 0:559a8e4aab60 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
mrsoundhar 0:559a8e4aab60 368 {
mrsoundhar 0:559a8e4aab60 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
mrsoundhar 0:559a8e4aab60 370 }
mrsoundhar 0:559a8e4aab60 371
mrsoundhar 0:559a8e4aab60 372
mrsoundhar 0:559a8e4aab60 373 /** \brief Get IPSR Register
mrsoundhar 0:559a8e4aab60 374
mrsoundhar 0:559a8e4aab60 375 This function returns the content of the IPSR Register.
mrsoundhar 0:559a8e4aab60 376
mrsoundhar 0:559a8e4aab60 377 \return IPSR Register value
mrsoundhar 0:559a8e4aab60 378 */
mrsoundhar 0:559a8e4aab60 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
mrsoundhar 0:559a8e4aab60 380 {
mrsoundhar 0:559a8e4aab60 381 uint32_t result;
mrsoundhar 0:559a8e4aab60 382
mrsoundhar 0:559a8e4aab60 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 384 return(result);
mrsoundhar 0:559a8e4aab60 385 }
mrsoundhar 0:559a8e4aab60 386
mrsoundhar 0:559a8e4aab60 387
mrsoundhar 0:559a8e4aab60 388 /** \brief Get APSR Register
mrsoundhar 0:559a8e4aab60 389
mrsoundhar 0:559a8e4aab60 390 This function returns the content of the APSR Register.
mrsoundhar 0:559a8e4aab60 391
mrsoundhar 0:559a8e4aab60 392 \return APSR Register value
mrsoundhar 0:559a8e4aab60 393 */
mrsoundhar 0:559a8e4aab60 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
mrsoundhar 0:559a8e4aab60 395 {
mrsoundhar 0:559a8e4aab60 396 uint32_t result;
mrsoundhar 0:559a8e4aab60 397
mrsoundhar 0:559a8e4aab60 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 399 return(result);
mrsoundhar 0:559a8e4aab60 400 }
mrsoundhar 0:559a8e4aab60 401
mrsoundhar 0:559a8e4aab60 402
mrsoundhar 0:559a8e4aab60 403 /** \brief Get xPSR Register
mrsoundhar 0:559a8e4aab60 404
mrsoundhar 0:559a8e4aab60 405 This function returns the content of the xPSR Register.
mrsoundhar 0:559a8e4aab60 406
mrsoundhar 0:559a8e4aab60 407 \return xPSR Register value
mrsoundhar 0:559a8e4aab60 408 */
mrsoundhar 0:559a8e4aab60 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
mrsoundhar 0:559a8e4aab60 410 {
mrsoundhar 0:559a8e4aab60 411 uint32_t result;
mrsoundhar 0:559a8e4aab60 412
mrsoundhar 0:559a8e4aab60 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 414 return(result);
mrsoundhar 0:559a8e4aab60 415 }
mrsoundhar 0:559a8e4aab60 416
mrsoundhar 0:559a8e4aab60 417
mrsoundhar 0:559a8e4aab60 418 /** \brief Get Process Stack Pointer
mrsoundhar 0:559a8e4aab60 419
mrsoundhar 0:559a8e4aab60 420 This function returns the current value of the Process Stack Pointer (PSP).
mrsoundhar 0:559a8e4aab60 421
mrsoundhar 0:559a8e4aab60 422 \return PSP Register value
mrsoundhar 0:559a8e4aab60 423 */
mrsoundhar 0:559a8e4aab60 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
mrsoundhar 0:559a8e4aab60 425 {
mrsoundhar 0:559a8e4aab60 426 register uint32_t result;
mrsoundhar 0:559a8e4aab60 427
mrsoundhar 0:559a8e4aab60 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 429 return(result);
mrsoundhar 0:559a8e4aab60 430 }
mrsoundhar 0:559a8e4aab60 431
mrsoundhar 0:559a8e4aab60 432
mrsoundhar 0:559a8e4aab60 433 /** \brief Set Process Stack Pointer
mrsoundhar 0:559a8e4aab60 434
mrsoundhar 0:559a8e4aab60 435 This function assigns the given value to the Process Stack Pointer (PSP).
mrsoundhar 0:559a8e4aab60 436
mrsoundhar 0:559a8e4aab60 437 \param [in] topOfProcStack Process Stack Pointer value to set
mrsoundhar 0:559a8e4aab60 438 */
mrsoundhar 0:559a8e4aab60 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
mrsoundhar 0:559a8e4aab60 440 {
mrsoundhar 0:559a8e4aab60 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
mrsoundhar 0:559a8e4aab60 442 }
mrsoundhar 0:559a8e4aab60 443
mrsoundhar 0:559a8e4aab60 444
mrsoundhar 0:559a8e4aab60 445 /** \brief Get Main Stack Pointer
mrsoundhar 0:559a8e4aab60 446
mrsoundhar 0:559a8e4aab60 447 This function returns the current value of the Main Stack Pointer (MSP).
mrsoundhar 0:559a8e4aab60 448
mrsoundhar 0:559a8e4aab60 449 \return MSP Register value
mrsoundhar 0:559a8e4aab60 450 */
mrsoundhar 0:559a8e4aab60 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
mrsoundhar 0:559a8e4aab60 452 {
mrsoundhar 0:559a8e4aab60 453 register uint32_t result;
mrsoundhar 0:559a8e4aab60 454
mrsoundhar 0:559a8e4aab60 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 456 return(result);
mrsoundhar 0:559a8e4aab60 457 }
mrsoundhar 0:559a8e4aab60 458
mrsoundhar 0:559a8e4aab60 459
mrsoundhar 0:559a8e4aab60 460 /** \brief Set Main Stack Pointer
mrsoundhar 0:559a8e4aab60 461
mrsoundhar 0:559a8e4aab60 462 This function assigns the given value to the Main Stack Pointer (MSP).
mrsoundhar 0:559a8e4aab60 463
mrsoundhar 0:559a8e4aab60 464 \param [in] topOfMainStack Main Stack Pointer value to set
mrsoundhar 0:559a8e4aab60 465 */
mrsoundhar 0:559a8e4aab60 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
mrsoundhar 0:559a8e4aab60 467 {
mrsoundhar 0:559a8e4aab60 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
mrsoundhar 0:559a8e4aab60 469 }
mrsoundhar 0:559a8e4aab60 470
mrsoundhar 0:559a8e4aab60 471
mrsoundhar 0:559a8e4aab60 472 /** \brief Get Priority Mask
mrsoundhar 0:559a8e4aab60 473
mrsoundhar 0:559a8e4aab60 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
mrsoundhar 0:559a8e4aab60 475
mrsoundhar 0:559a8e4aab60 476 \return Priority Mask value
mrsoundhar 0:559a8e4aab60 477 */
mrsoundhar 0:559a8e4aab60 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
mrsoundhar 0:559a8e4aab60 479 {
mrsoundhar 0:559a8e4aab60 480 uint32_t result;
mrsoundhar 0:559a8e4aab60 481
mrsoundhar 0:559a8e4aab60 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 483 return(result);
mrsoundhar 0:559a8e4aab60 484 }
mrsoundhar 0:559a8e4aab60 485
mrsoundhar 0:559a8e4aab60 486
mrsoundhar 0:559a8e4aab60 487 /** \brief Set Priority Mask
mrsoundhar 0:559a8e4aab60 488
mrsoundhar 0:559a8e4aab60 489 This function assigns the given value to the Priority Mask Register.
mrsoundhar 0:559a8e4aab60 490
mrsoundhar 0:559a8e4aab60 491 \param [in] priMask Priority Mask
mrsoundhar 0:559a8e4aab60 492 */
mrsoundhar 0:559a8e4aab60 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
mrsoundhar 0:559a8e4aab60 494 {
mrsoundhar 0:559a8e4aab60 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
mrsoundhar 0:559a8e4aab60 496 }
mrsoundhar 0:559a8e4aab60 497
mrsoundhar 0:559a8e4aab60 498
mrsoundhar 0:559a8e4aab60 499 #if (__CORTEX_M >= 0x03)
mrsoundhar 0:559a8e4aab60 500
mrsoundhar 0:559a8e4aab60 501 /** \brief Enable FIQ
mrsoundhar 0:559a8e4aab60 502
mrsoundhar 0:559a8e4aab60 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
mrsoundhar 0:559a8e4aab60 504 Can only be executed in Privileged modes.
mrsoundhar 0:559a8e4aab60 505 */
mrsoundhar 0:559a8e4aab60 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
mrsoundhar 0:559a8e4aab60 507 {
mrsoundhar 0:559a8e4aab60 508 __ASM volatile ("cpsie f" : : : "memory");
mrsoundhar 0:559a8e4aab60 509 }
mrsoundhar 0:559a8e4aab60 510
mrsoundhar 0:559a8e4aab60 511
mrsoundhar 0:559a8e4aab60 512 /** \brief Disable FIQ
mrsoundhar 0:559a8e4aab60 513
mrsoundhar 0:559a8e4aab60 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
mrsoundhar 0:559a8e4aab60 515 Can only be executed in Privileged modes.
mrsoundhar 0:559a8e4aab60 516 */
mrsoundhar 0:559a8e4aab60 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
mrsoundhar 0:559a8e4aab60 518 {
mrsoundhar 0:559a8e4aab60 519 __ASM volatile ("cpsid f" : : : "memory");
mrsoundhar 0:559a8e4aab60 520 }
mrsoundhar 0:559a8e4aab60 521
mrsoundhar 0:559a8e4aab60 522
mrsoundhar 0:559a8e4aab60 523 /** \brief Get Base Priority
mrsoundhar 0:559a8e4aab60 524
mrsoundhar 0:559a8e4aab60 525 This function returns the current value of the Base Priority register.
mrsoundhar 0:559a8e4aab60 526
mrsoundhar 0:559a8e4aab60 527 \return Base Priority register value
mrsoundhar 0:559a8e4aab60 528 */
mrsoundhar 0:559a8e4aab60 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
mrsoundhar 0:559a8e4aab60 530 {
mrsoundhar 0:559a8e4aab60 531 uint32_t result;
mrsoundhar 0:559a8e4aab60 532
mrsoundhar 0:559a8e4aab60 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 534 return(result);
mrsoundhar 0:559a8e4aab60 535 }
mrsoundhar 0:559a8e4aab60 536
mrsoundhar 0:559a8e4aab60 537
mrsoundhar 0:559a8e4aab60 538 /** \brief Set Base Priority
mrsoundhar 0:559a8e4aab60 539
mrsoundhar 0:559a8e4aab60 540 This function assigns the given value to the Base Priority register.
mrsoundhar 0:559a8e4aab60 541
mrsoundhar 0:559a8e4aab60 542 \param [in] basePri Base Priority value to set
mrsoundhar 0:559a8e4aab60 543 */
mrsoundhar 0:559a8e4aab60 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
mrsoundhar 0:559a8e4aab60 545 {
mrsoundhar 0:559a8e4aab60 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
mrsoundhar 0:559a8e4aab60 547 }
mrsoundhar 0:559a8e4aab60 548
mrsoundhar 0:559a8e4aab60 549
mrsoundhar 0:559a8e4aab60 550 /** \brief Get Fault Mask
mrsoundhar 0:559a8e4aab60 551
mrsoundhar 0:559a8e4aab60 552 This function returns the current value of the Fault Mask register.
mrsoundhar 0:559a8e4aab60 553
mrsoundhar 0:559a8e4aab60 554 \return Fault Mask register value
mrsoundhar 0:559a8e4aab60 555 */
mrsoundhar 0:559a8e4aab60 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
mrsoundhar 0:559a8e4aab60 557 {
mrsoundhar 0:559a8e4aab60 558 uint32_t result;
mrsoundhar 0:559a8e4aab60 559
mrsoundhar 0:559a8e4aab60 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 561 return(result);
mrsoundhar 0:559a8e4aab60 562 }
mrsoundhar 0:559a8e4aab60 563
mrsoundhar 0:559a8e4aab60 564
mrsoundhar 0:559a8e4aab60 565 /** \brief Set Fault Mask
mrsoundhar 0:559a8e4aab60 566
mrsoundhar 0:559a8e4aab60 567 This function assigns the given value to the Fault Mask register.
mrsoundhar 0:559a8e4aab60 568
mrsoundhar 0:559a8e4aab60 569 \param [in] faultMask Fault Mask value to set
mrsoundhar 0:559a8e4aab60 570 */
mrsoundhar 0:559a8e4aab60 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
mrsoundhar 0:559a8e4aab60 572 {
mrsoundhar 0:559a8e4aab60 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
mrsoundhar 0:559a8e4aab60 574 }
mrsoundhar 0:559a8e4aab60 575
mrsoundhar 0:559a8e4aab60 576 #endif /* (__CORTEX_M >= 0x03) */
mrsoundhar 0:559a8e4aab60 577
mrsoundhar 0:559a8e4aab60 578
mrsoundhar 0:559a8e4aab60 579 #if (__CORTEX_M == 0x04)
mrsoundhar 0:559a8e4aab60 580
mrsoundhar 0:559a8e4aab60 581 /** \brief Get FPSCR
mrsoundhar 0:559a8e4aab60 582
mrsoundhar 0:559a8e4aab60 583 This function returns the current value of the Floating Point Status/Control register.
mrsoundhar 0:559a8e4aab60 584
mrsoundhar 0:559a8e4aab60 585 \return Floating Point Status/Control register value
mrsoundhar 0:559a8e4aab60 586 */
mrsoundhar 0:559a8e4aab60 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
mrsoundhar 0:559a8e4aab60 588 {
mrsoundhar 0:559a8e4aab60 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mrsoundhar 0:559a8e4aab60 590 uint32_t result;
mrsoundhar 0:559a8e4aab60 591
mrsoundhar 0:559a8e4aab60 592 /* Empty asm statement works as a scheduling barrier */
mrsoundhar 0:559a8e4aab60 593 __ASM volatile ("");
mrsoundhar 0:559a8e4aab60 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
mrsoundhar 0:559a8e4aab60 595 __ASM volatile ("");
mrsoundhar 0:559a8e4aab60 596 return(result);
mrsoundhar 0:559a8e4aab60 597 #else
mrsoundhar 0:559a8e4aab60 598 return(0);
mrsoundhar 0:559a8e4aab60 599 #endif
mrsoundhar 0:559a8e4aab60 600 }
mrsoundhar 0:559a8e4aab60 601
mrsoundhar 0:559a8e4aab60 602
mrsoundhar 0:559a8e4aab60 603 /** \brief Set FPSCR
mrsoundhar 0:559a8e4aab60 604
mrsoundhar 0:559a8e4aab60 605 This function assigns the given value to the Floating Point Status/Control register.
mrsoundhar 0:559a8e4aab60 606
mrsoundhar 0:559a8e4aab60 607 \param [in] fpscr Floating Point Status/Control value to set
mrsoundhar 0:559a8e4aab60 608 */
mrsoundhar 0:559a8e4aab60 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
mrsoundhar 0:559a8e4aab60 610 {
mrsoundhar 0:559a8e4aab60 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mrsoundhar 0:559a8e4aab60 612 /* Empty asm statement works as a scheduling barrier */
mrsoundhar 0:559a8e4aab60 613 __ASM volatile ("");
mrsoundhar 0:559a8e4aab60 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
mrsoundhar 0:559a8e4aab60 615 __ASM volatile ("");
mrsoundhar 0:559a8e4aab60 616 #endif
mrsoundhar 0:559a8e4aab60 617 }
mrsoundhar 0:559a8e4aab60 618
mrsoundhar 0:559a8e4aab60 619 #endif /* (__CORTEX_M == 0x04) */
mrsoundhar 0:559a8e4aab60 620
mrsoundhar 0:559a8e4aab60 621
mrsoundhar 0:559a8e4aab60 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
mrsoundhar 0:559a8e4aab60 623 /* TASKING carm specific functions */
mrsoundhar 0:559a8e4aab60 624
mrsoundhar 0:559a8e4aab60 625 /*
mrsoundhar 0:559a8e4aab60 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
mrsoundhar 0:559a8e4aab60 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
mrsoundhar 0:559a8e4aab60 628 * Including the CMSIS ones.
mrsoundhar 0:559a8e4aab60 629 */
mrsoundhar 0:559a8e4aab60 630
mrsoundhar 0:559a8e4aab60 631 #endif
mrsoundhar 0:559a8e4aab60 632
mrsoundhar 0:559a8e4aab60 633 /*@} end of CMSIS_Core_RegAccFunctions */
mrsoundhar 0:559a8e4aab60 634
mrsoundhar 0:559a8e4aab60 635
mrsoundhar 0:559a8e4aab60 636 #endif /* __CORE_CMFUNC_H */