Diff: targets/TARGET_Silicon_Labs/mbed_rtx.h

Revision:

153:fa9ff456f731

Parent:

149:156823d33999

diff -r 9a67f0b066fc -r fa9ff456f731 targets/TARGET_Silicon_Labs/mbed_rtx.h
--- a/targets/TARGET_Silicon_Labs/mbed_rtx.h	Thu Dec 15 11:48:27 2016 +0000
+++ b/targets/TARGET_Silicon_Labs/mbed_rtx.h	Tue Dec 20 17:27:56 2016 +0000
@@ -23,6 +23,20 @@
 #define OS_CLOCK                  REFERENCE_FREQUENCY
 #endif
 
+#if defined(__CC_ARM)
+extern uint32_t HEAP$$Base;
+extern uint32_t HEAP$$Limit;
+extern uint32_t STACK$$Limit;
+extern uint32_t STACK$$Base;
+#ifndef INITIAL_SP
+#define INITIAL_SP            ((uint32_t)&STACK$$Limit)
+#endif
+#define ISR_STACK_START       ((uint32_t)&STACK$$Base)
+#define ISR_STACK_SIZE        ((uint32_t) ((uint32_t)&STACK$$Limit - (uint32_t)&STACK$$Base))
+#define HEAP_START            ((unsigned char*) ((uint32_t)&HEAP$$Base))
+#define HEAP_SIZE             ((uint32_t) ((uint32_t)&HEAP$$Limit - (uint32_t)&HEAP$$Base))
+#endif
+
 #if defined(TARGET_EFM32GG_STK3700)
 
 #ifndef INITIAL_SP
@@ -88,6 +102,19 @@
 #define OS_MAINSTKSIZE          128
 #endif
 
+#elif defined(TARGET_EFR32MG1)
+
+#ifndef INITIAL_SP
+#define INITIAL_SP              (0x20007C00UL)
+#endif
+
+#ifndef OS_TASKCNT
+#define OS_TASKCNT              5
+#endif
+#ifndef OS_MAINSTKSIZE
+#define OS_MAINSTKSIZE          256
+#endif
+
 #endif
 
 #endif  // MBED_MBED_RTX_H