Mike Pulice / ublox_C200Test

Integrating the ublox LISA C200 modem

Fork of SprintUSBModemHTTPClientTest by Donatien Garnier

mbed-src/targets/hal/TARGET_NXP/TARGET_LPC176X/rtc_api.c@5:3f93dd1d4cb3, 2013-09-26 (annotated)

Committer:
sam_grove
Date:
Thu Sep 26 00:44:20 2013 -0500
Revision:
5:3f93dd1d4cb3
Exported program and replaced contents of the repo with the source

to build and debug using keil mdk. Libs NOT upto date are lwip, lwip-sys

and socket. these have newer versions under mbed_official but were starting

from a know working point

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sam_grove 5:3f93dd1d4cb3 1 /* mbed Microcontroller Library
sam_grove 5:3f93dd1d4cb3 2 * Copyright (c) 2006-2013 ARM Limited
sam_grove 5:3f93dd1d4cb3 3 *
sam_grove 5:3f93dd1d4cb3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sam_grove 5:3f93dd1d4cb3 5 * you may not use this file except in compliance with the License.
sam_grove 5:3f93dd1d4cb3 6 * You may obtain a copy of the License at
sam_grove 5:3f93dd1d4cb3 7 *
sam_grove 5:3f93dd1d4cb3 8 * http://www.apache.org/licenses/LICENSE-2.0
sam_grove 5:3f93dd1d4cb3 9 *
sam_grove 5:3f93dd1d4cb3 10 * Unless required by applicable law or agreed to in writing, software
sam_grove 5:3f93dd1d4cb3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sam_grove 5:3f93dd1d4cb3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sam_grove 5:3f93dd1d4cb3 13 * See the License for the specific language governing permissions and
sam_grove 5:3f93dd1d4cb3 14 * limitations under the License.
sam_grove 5:3f93dd1d4cb3 15 */
sam_grove 5:3f93dd1d4cb3 16 #include "rtc_api.h"
sam_grove 5:3f93dd1d4cb3 17
sam_grove 5:3f93dd1d4cb3 18 // ensure rtc is running (unchanged if already running)
sam_grove 5:3f93dd1d4cb3 19
sam_grove 5:3f93dd1d4cb3 20 /* Setup the RTC based on a time structure, ensuring RTC is enabled
sam_grove 5:3f93dd1d4cb3 21 *
sam_grove 5:3f93dd1d4cb3 22 * Can be clocked by a 32.768KHz oscillator or prescale divider based on the APB clock
sam_grove 5:3f93dd1d4cb3 23 * - We want to use the 32khz clock, allowing for sleep mode
sam_grove 5:3f93dd1d4cb3 24 *
sam_grove 5:3f93dd1d4cb3 25 * Most registers are not changed by a Reset
sam_grove 5:3f93dd1d4cb3 26 * - We must initialize these registers between power-on and setting the RTC into operation
sam_grove 5:3f93dd1d4cb3 27
sam_grove 5:3f93dd1d4cb3 28 * Clock Control Register
sam_grove 5:3f93dd1d4cb3 29 * RTC_CCR[0] : Enable - 0 = Disabled, 1 = Enabled
sam_grove 5:3f93dd1d4cb3 30 * RTC_CCR[1] : Reset - 0 = Normal, 1 = Reset
sam_grove 5:3f93dd1d4cb3 31 * RTC_CCR[4] : Clock Source - 0 = Prescaler, 1 = 32k Xtal
sam_grove 5:3f93dd1d4cb3 32 *
sam_grove 5:3f93dd1d4cb3 33 * The RTC may already be running, so we should set it up
sam_grove 5:3f93dd1d4cb3 34 * without impacting if it is the case
sam_grove 5:3f93dd1d4cb3 35 */
sam_grove 5:3f93dd1d4cb3 36 void rtc_init(void) {
sam_grove 5:3f93dd1d4cb3 37 LPC_SC->PCONP |= 0x200; // Ensure power is on
sam_grove 5:3f93dd1d4cb3 38 LPC_RTC->CCR = 0x00;
sam_grove 5:3f93dd1d4cb3 39
sam_grove 5:3f93dd1d4cb3 40 LPC_RTC->CCR |= 1 << 0; // Ensure the RTC is enabled
sam_grove 5:3f93dd1d4cb3 41 }
sam_grove 5:3f93dd1d4cb3 42
sam_grove 5:3f93dd1d4cb3 43 void rtc_free(void) {
sam_grove 5:3f93dd1d4cb3 44 // [TODO]
sam_grove 5:3f93dd1d4cb3 45 }
sam_grove 5:3f93dd1d4cb3 46
sam_grove 5:3f93dd1d4cb3 47 /*
sam_grove 5:3f93dd1d4cb3 48 * Little check routine to see if the RTC has been enabled
sam_grove 5:3f93dd1d4cb3 49 *
sam_grove 5:3f93dd1d4cb3 50 * Clock Control Register
sam_grove 5:3f93dd1d4cb3 51 * RTC_CCR[0] : 0 = Disabled, 1 = Enabled
sam_grove 5:3f93dd1d4cb3 52 *
sam_grove 5:3f93dd1d4cb3 53 */
sam_grove 5:3f93dd1d4cb3 54 int rtc_isenabled(void) {
sam_grove 5:3f93dd1d4cb3 55 return(((LPC_RTC->CCR) & 0x01) != 0);
sam_grove 5:3f93dd1d4cb3 56 }
sam_grove 5:3f93dd1d4cb3 57
sam_grove 5:3f93dd1d4cb3 58 /*
sam_grove 5:3f93dd1d4cb3 59 * RTC Registers
sam_grove 5:3f93dd1d4cb3 60 * RTC_SEC Seconds 0-59
sam_grove 5:3f93dd1d4cb3 61 * RTC_MIN Minutes 0-59
sam_grove 5:3f93dd1d4cb3 62 * RTC_HOUR Hour 0-23
sam_grove 5:3f93dd1d4cb3 63 * RTC_DOM Day of Month 1-28..31
sam_grove 5:3f93dd1d4cb3 64 * RTC_DOW Day of Week 0-6
sam_grove 5:3f93dd1d4cb3 65 * RTC_DOY Day of Year 1-365
sam_grove 5:3f93dd1d4cb3 66 * RTC_MONTH Month 1-12
sam_grove 5:3f93dd1d4cb3 67 * RTC_YEAR Year 0-4095
sam_grove 5:3f93dd1d4cb3 68 *
sam_grove 5:3f93dd1d4cb3 69 * struct tm
sam_grove 5:3f93dd1d4cb3 70 * tm_sec seconds after the minute 0-61
sam_grove 5:3f93dd1d4cb3 71 * tm_min minutes after the hour 0-59
sam_grove 5:3f93dd1d4cb3 72 * tm_hour hours since midnight 0-23
sam_grove 5:3f93dd1d4cb3 73 * tm_mday day of the month 1-31
sam_grove 5:3f93dd1d4cb3 74 * tm_mon months since January 0-11
sam_grove 5:3f93dd1d4cb3 75 * tm_year years since 1900
sam_grove 5:3f93dd1d4cb3 76 * tm_wday days since Sunday 0-6
sam_grove 5:3f93dd1d4cb3 77 * tm_yday days since January 1 0-365
sam_grove 5:3f93dd1d4cb3 78 * tm_isdst Daylight Saving Time flag
sam_grove 5:3f93dd1d4cb3 79 */
sam_grove 5:3f93dd1d4cb3 80 time_t rtc_read(void) {
sam_grove 5:3f93dd1d4cb3 81 // Setup a tm structure based on the RTC
sam_grove 5:3f93dd1d4cb3 82 struct tm timeinfo;
sam_grove 5:3f93dd1d4cb3 83 timeinfo.tm_sec = LPC_RTC->SEC;
sam_grove 5:3f93dd1d4cb3 84 timeinfo.tm_min = LPC_RTC->MIN;
sam_grove 5:3f93dd1d4cb3 85 timeinfo.tm_hour = LPC_RTC->HOUR;
sam_grove 5:3f93dd1d4cb3 86 timeinfo.tm_mday = LPC_RTC->DOM;
sam_grove 5:3f93dd1d4cb3 87 timeinfo.tm_mon = LPC_RTC->MONTH - 1;
sam_grove 5:3f93dd1d4cb3 88 timeinfo.tm_year = LPC_RTC->YEAR - 1900;
sam_grove 5:3f93dd1d4cb3 89
sam_grove 5:3f93dd1d4cb3 90 // Convert to timestamp
sam_grove 5:3f93dd1d4cb3 91 time_t t = mktime(&timeinfo);
sam_grove 5:3f93dd1d4cb3 92
sam_grove 5:3f93dd1d4cb3 93 return t;
sam_grove 5:3f93dd1d4cb3 94 }
sam_grove 5:3f93dd1d4cb3 95
sam_grove 5:3f93dd1d4cb3 96 void rtc_write(time_t t) {
sam_grove 5:3f93dd1d4cb3 97 // Convert the time in to a tm
sam_grove 5:3f93dd1d4cb3 98 struct tm *timeinfo = localtime(&t);
sam_grove 5:3f93dd1d4cb3 99
sam_grove 5:3f93dd1d4cb3 100 // Pause clock, and clear counter register (clears us count)
sam_grove 5:3f93dd1d4cb3 101 LPC_RTC->CCR |= 2;
sam_grove 5:3f93dd1d4cb3 102
sam_grove 5:3f93dd1d4cb3 103 // Set the RTC
sam_grove 5:3f93dd1d4cb3 104 LPC_RTC->SEC = timeinfo->tm_sec;
sam_grove 5:3f93dd1d4cb3 105 LPC_RTC->MIN = timeinfo->tm_min;
sam_grove 5:3f93dd1d4cb3 106 LPC_RTC->HOUR = timeinfo->tm_hour;
sam_grove 5:3f93dd1d4cb3 107 LPC_RTC->DOM = timeinfo->tm_mday;
sam_grove 5:3f93dd1d4cb3 108 LPC_RTC->MONTH = timeinfo->tm_mon + 1;
sam_grove 5:3f93dd1d4cb3 109 LPC_RTC->YEAR = timeinfo->tm_year + 1900;
sam_grove 5:3f93dd1d4cb3 110
sam_grove 5:3f93dd1d4cb3 111 // Restart clock
sam_grove 5:3f93dd1d4cb3 112 LPC_RTC->CCR &= ~((uint32_t)2);
sam_grove 5:3f93dd1d4cb3 113 }