Integrating the ublox LISA C200 modem

Fork of SprintUSBModemHTTPClientTest by Donatien Garnier

Committer:
sam_grove
Date:
Thu Sep 26 00:44:20 2013 -0500
Revision:
5:3f93dd1d4cb3
Exported program and replaced contents of the repo with the source
to build and debug using keil mdk. Libs NOT upto date are lwip, lwip-sys
and socket. these have newer versions under mbed_official but were starting
from a know working point

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sam_grove 5:3f93dd1d4cb3 1 /* mbed Microcontroller Library
sam_grove 5:3f93dd1d4cb3 2 * Copyright (c) 2006-2013 ARM Limited
sam_grove 5:3f93dd1d4cb3 3 *
sam_grove 5:3f93dd1d4cb3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sam_grove 5:3f93dd1d4cb3 5 * you may not use this file except in compliance with the License.
sam_grove 5:3f93dd1d4cb3 6 * You may obtain a copy of the License at
sam_grove 5:3f93dd1d4cb3 7 *
sam_grove 5:3f93dd1d4cb3 8 * http://www.apache.org/licenses/LICENSE-2.0
sam_grove 5:3f93dd1d4cb3 9 *
sam_grove 5:3f93dd1d4cb3 10 * Unless required by applicable law or agreed to in writing, software
sam_grove 5:3f93dd1d4cb3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sam_grove 5:3f93dd1d4cb3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sam_grove 5:3f93dd1d4cb3 13 * See the License for the specific language governing permissions and
sam_grove 5:3f93dd1d4cb3 14 * limitations under the License.
sam_grove 5:3f93dd1d4cb3 15 */
sam_grove 5:3f93dd1d4cb3 16 #ifndef MBED_SPI_H
sam_grove 5:3f93dd1d4cb3 17 #define MBED_SPI_H
sam_grove 5:3f93dd1d4cb3 18
sam_grove 5:3f93dd1d4cb3 19 #include "platform.h"
sam_grove 5:3f93dd1d4cb3 20
sam_grove 5:3f93dd1d4cb3 21 #if DEVICE_SPI
sam_grove 5:3f93dd1d4cb3 22
sam_grove 5:3f93dd1d4cb3 23 #include "spi_api.h"
sam_grove 5:3f93dd1d4cb3 24
sam_grove 5:3f93dd1d4cb3 25 namespace mbed {
sam_grove 5:3f93dd1d4cb3 26
sam_grove 5:3f93dd1d4cb3 27 /** A SPI Master, used for communicating with SPI slave devices
sam_grove 5:3f93dd1d4cb3 28 *
sam_grove 5:3f93dd1d4cb3 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
sam_grove 5:3f93dd1d4cb3 30 *
sam_grove 5:3f93dd1d4cb3 31 * Most SPI devices will also require Chip Select and Reset signals. These
sam_grove 5:3f93dd1d4cb3 32 * can be controlled using <DigitalOut> pins
sam_grove 5:3f93dd1d4cb3 33 *
sam_grove 5:3f93dd1d4cb3 34 * Example:
sam_grove 5:3f93dd1d4cb3 35 * @code
sam_grove 5:3f93dd1d4cb3 36 * // Send a byte to a SPI slave, and record the response
sam_grove 5:3f93dd1d4cb3 37 *
sam_grove 5:3f93dd1d4cb3 38 * #include "mbed.h"
sam_grove 5:3f93dd1d4cb3 39 *
sam_grove 5:3f93dd1d4cb3 40 * SPI device(p5, p6, p7); // mosi, miso, sclk
sam_grove 5:3f93dd1d4cb3 41 *
sam_grove 5:3f93dd1d4cb3 42 * int main() {
sam_grove 5:3f93dd1d4cb3 43 * int response = device.write(0xFF);
sam_grove 5:3f93dd1d4cb3 44 * }
sam_grove 5:3f93dd1d4cb3 45 * @endcode
sam_grove 5:3f93dd1d4cb3 46 */
sam_grove 5:3f93dd1d4cb3 47 class SPI {
sam_grove 5:3f93dd1d4cb3 48
sam_grove 5:3f93dd1d4cb3 49 public:
sam_grove 5:3f93dd1d4cb3 50
sam_grove 5:3f93dd1d4cb3 51 /** Create a SPI master connected to the specified pins
sam_grove 5:3f93dd1d4cb3 52 *
sam_grove 5:3f93dd1d4cb3 53 * Pin Options:
sam_grove 5:3f93dd1d4cb3 54 * (5, 6, 7) or (11, 12, 13)
sam_grove 5:3f93dd1d4cb3 55 *
sam_grove 5:3f93dd1d4cb3 56 * mosi or miso can be specfied as NC if not used
sam_grove 5:3f93dd1d4cb3 57 *
sam_grove 5:3f93dd1d4cb3 58 * @param mosi SPI Master Out, Slave In pin
sam_grove 5:3f93dd1d4cb3 59 * @param miso SPI Master In, Slave Out pin
sam_grove 5:3f93dd1d4cb3 60 * @param sclk SPI Clock pin
sam_grove 5:3f93dd1d4cb3 61 */
sam_grove 5:3f93dd1d4cb3 62 SPI(PinName mosi, PinName miso, PinName sclk);
sam_grove 5:3f93dd1d4cb3 63
sam_grove 5:3f93dd1d4cb3 64 /** Configure the data transmission format
sam_grove 5:3f93dd1d4cb3 65 *
sam_grove 5:3f93dd1d4cb3 66 * @param bits Number of bits per SPI frame (4 - 16)
sam_grove 5:3f93dd1d4cb3 67 * @param mode Clock polarity and phase mode (0 - 3)
sam_grove 5:3f93dd1d4cb3 68 *
sam_grove 5:3f93dd1d4cb3 69 * @code
sam_grove 5:3f93dd1d4cb3 70 * mode | POL PHA
sam_grove 5:3f93dd1d4cb3 71 * -----+--------
sam_grove 5:3f93dd1d4cb3 72 * 0 | 0 0
sam_grove 5:3f93dd1d4cb3 73 * 1 | 0 1
sam_grove 5:3f93dd1d4cb3 74 * 2 | 1 0
sam_grove 5:3f93dd1d4cb3 75 * 3 | 1 1
sam_grove 5:3f93dd1d4cb3 76 * @endcode
sam_grove 5:3f93dd1d4cb3 77 */
sam_grove 5:3f93dd1d4cb3 78 void format(int bits, int mode = 0);
sam_grove 5:3f93dd1d4cb3 79
sam_grove 5:3f93dd1d4cb3 80 /** Set the spi bus clock frequency
sam_grove 5:3f93dd1d4cb3 81 *
sam_grove 5:3f93dd1d4cb3 82 * @param hz SCLK frequency in hz (default = 1MHz)
sam_grove 5:3f93dd1d4cb3 83 */
sam_grove 5:3f93dd1d4cb3 84 void frequency(int hz = 1000000);
sam_grove 5:3f93dd1d4cb3 85
sam_grove 5:3f93dd1d4cb3 86 /** Write to the SPI Slave and return the response
sam_grove 5:3f93dd1d4cb3 87 *
sam_grove 5:3f93dd1d4cb3 88 * @param value Data to be sent to the SPI slave
sam_grove 5:3f93dd1d4cb3 89 *
sam_grove 5:3f93dd1d4cb3 90 * @returns
sam_grove 5:3f93dd1d4cb3 91 * Response from the SPI slave
sam_grove 5:3f93dd1d4cb3 92 */
sam_grove 5:3f93dd1d4cb3 93 virtual int write(int value);
sam_grove 5:3f93dd1d4cb3 94
sam_grove 5:3f93dd1d4cb3 95 protected:
sam_grove 5:3f93dd1d4cb3 96 spi_t _spi;
sam_grove 5:3f93dd1d4cb3 97
sam_grove 5:3f93dd1d4cb3 98 void aquire(void);
sam_grove 5:3f93dd1d4cb3 99 static SPI *_owner;
sam_grove 5:3f93dd1d4cb3 100 int _bits;
sam_grove 5:3f93dd1d4cb3 101 int _mode;
sam_grove 5:3f93dd1d4cb3 102 int _hz;
sam_grove 5:3f93dd1d4cb3 103 };
sam_grove 5:3f93dd1d4cb3 104
sam_grove 5:3f93dd1d4cb3 105 } // namespace mbed
sam_grove 5:3f93dd1d4cb3 106
sam_grove 5:3f93dd1d4cb3 107 #endif
sam_grove 5:3f93dd1d4cb3 108
sam_grove 5:3f93dd1d4cb3 109 #endif